[coreboot] Is this a correct way to read PCI control space register?

[FENG Yu Ning]

On 11/13/08, Stefan Reinauer <stepan at coresystems.de> wrote:
> 0x1 I would assume. But that's the register.
>

Then (at least my) 945PL and 945GM/GME have the same 'reg8' value
here. The chip identification code in stage1.c is OK for mobile
chipsets, but more information is needed if taking desktop chipsets
into consideration.