[coreboot] v3 CAR/ROM area collision on C7 and Core2Duo
c-d.hailfinger.devel.2006 at gmx.net
Fri Nov 21 23:03:09 CET 2008
On 21.11.2008 22:48, Stefan Reinauer wrote:
> Carl-Daniel Hailfinger wrote:
>> On 21.11.2008 21:34, Stefan Reinauer wrote:
>>> On 21.11.2008, at 16:47, Carl-Daniel Hailfinger
>>> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>>>> in v2 we enable full ROM decoding before initram. For VIA C7 and Intel
>>>> Core 2 Duo, that means the CAR area is inside the mapped ROM contents.
>>> That observation is wrong for the intel core case. CAR lives 1MiB
>>> below the rom there. So no problems arise.
>> Core 2 Duo CAR lives at 0xFFEF0000 with a size of 32 kiB in v3.
>> Core 2 Duo CAR lives at 0xFFDF8000 with a size of 32 kiB in v2 for the
>> Kontron board.
> None of the Intel stuff in v3 even compiles, so don't worry about that
> too much.
OK. I'll use v2 as reference for C2D from now on.
> In v2, the CAR lives 1M below the ROM. If you change the ROM size, you
> have to change the CAR BASE too. The code can use a little brush-up
> there, but since we never had to use flash chips larger than 8MBit it
> does not really matter.
>> How variable is the location where we can have CAR in the Core 2 Duo? Is
>> anything in the top 16 MiB allowed?
> It needs to live 1MB below the flash part.
Since the flash part size can't be determined automatically (the flash
chip will decode any address you throw at it), that means the "1 MB
below flash" requirement is either overspecified or incorrect for flash
sizes != 1 MB.
I'm not blaming you, I'm just trying to understand and it wouldn't be
the first time that some data sheets are unclear.
More information about the coreboot