[coreboot] r1056 - in coreboot-v3/arch/x86: . intel/core2

svn at coreboot.org svn at coreboot.org
Wed Nov 26 00:10:24 CET 2008


Author: stepan
Date: 2008-11-26 00:10:24 +0100 (Wed, 26 Nov 2008)
New Revision: 1056

Modified:
   coreboot-v3/arch/x86/Kconfig
   coreboot-v3/arch/x86/intel/core2/stage0.S
Log:
hack to make v3 rom access a lot faster.
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>



Modified: coreboot-v3/arch/x86/Kconfig
===================================================================
--- coreboot-v3/arch/x86/Kconfig	2008-11-25 22:51:15 UTC (rev 1055)
+++ coreboot-v3/arch/x86/Kconfig	2008-11-25 23:10:24 UTC (rev 1056)
@@ -176,7 +176,7 @@
 	default 0x80000 if CPU_AMD_GEODELX
 	default 0xc8000 if CPU_AMD_K8
 	default 0xffef0000 if CPU_VIA_C7
-	default 0xffef0000 if CPU_INTEL_CORE2
+	default 0xffdf8000 if CPU_INTEL_CORE2
 	help
 	  This option sets the base address of the area used for CAR.
 

Modified: coreboot-v3/arch/x86/intel/core2/stage0.S
===================================================================
--- coreboot-v3/arch/x86/intel/core2/stage0.S	2008-11-25 22:51:15 UTC (rev 1055)
+++ coreboot-v3/arch/x86/intel/core2/stage0.S	2008-11-25 23:10:24 UTC (rev 1056)
@@ -22,6 +22,9 @@
 #define CACHE_AS_RAM_SIZE CONFIG_CARSIZE
 #define CACHE_AS_RAM_BASE CONFIG_CARBASE
 
+#define XIP_ROM_BASE 0xfff00000
+#define XIP_ROM_SIZE 0x00100000
+
 #include <mtrr.h>
 
 #include <macros.h>





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