[coreboot] simple useful utility
rminnich at gmail.com
Sat Oct 11 23:45:05 CEST 2008
On Sat, Oct 11, 2008 at 1:51 PM, Vincent Legoll
<vincent.legoll at gmail.com> wrote:
> On Sat, Oct 11, 2008 at 10:31 PM, ron minnich <rminnich at gmail.com> wrote:
>> That is really nice. Yes, now we just need it for config and io and
>> prefmem space :-)
> You mean 0x80h to 0xECh ?
> MMIO base / limit
> PCI IO base / limit
> Config base / limit
> That's my next target...
> I have questions, though:
> - I've got reserved values for Interleave Enable: Reserved 0b010, is
> that normal, or a bug in my code ?
probably normal but not sure. What kind of machine are you testing on?
> - In the doc, page 70 of 26094.pdf
> 3.4.4 DRAM Address Map
> For the purposes of this comparison, the lower unspecified
> bits of the base are assumed to be 0s and the lower unspecified bits
> of the limit are assumed to be 1s.
> For the limit registers I assumed the unspecified bits are 0-24, and I
> set them to 0xFFFFFF.
> Is that the right thing to do ?
> Idem for base registers, with 24 bits set to 0x000000 ?
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