[coreboot] [PATCH] v3: VIA C7 CAR

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sun Oct 12 23:04:31 CEST 2008

On 12.10.2008 20:15, ron minnich wrote:
> On Sun, Oct 12, 2008 at 11:04 AM, Corey Osgood <corey.osgood at gmail.com> wrote:
>>  I'm attaching a minicom log file. From the looks of things, it also looks
>> like I'm losing all output from stage0/1. The reason it boots twice is a
>> GPIO that automatically resets the system if it isn't disabled, and it's not
>> disabled yet.
> the garbage may be your stage0/1 output. We've had trouble in the past
> with cheap uarts glitching badly when things like baud rate change. I
> actually don't think you need to worry about this garbage. I think
> you're doing very well indeed.
> printk works, so your stack is working. So car is probably working.
> You ran initram. CAR is definitely working. You returned from initram.
> This is great.
> Your biggest problem may be that you are not really getting initram
> right, which is why there is no stage2 output.
> Oh, yeah, you are in trouble:
> LAR: Compression algorithm #1 (lzma) used
> Decoding error = 1
> ram is no good. You need a test at the end of initram. But CAR is
> definitely solid I think. You need more debug in initram.

Sure. Even if his RAM init worked, the stack wouldn't be backed by RAM
anymore after disable_car() due to the odd CAR location (and that's a
hardware limitation).

> You're close.
> I am going to be presenting CN700 at SC 08 I hope thanks to your fine work!

I'm definitely looking forward to this.



More information about the coreboot mailing list