[coreboot] Quick question on vt8237 smbus

Marc Jones Marc.Jones at amd.com
Mon Oct 13 20:49:58 CEST 2008


Corey Osgood wrote:
> I'm working on vt8237 smbus in v3, and I had a quick question, mostly 
> for Rudolf Marek and Bari, but feel free to jump in with your 2 cents:
> 
>     u8 smbus_read_byte(u16 dimm, u8 offset, u16 smbus_io_base)
>     {
>         u8 val;
> 
>         printk(BIOS_SPEW, "SMBus Read from DIMM %1x at address 0x%4x\n",
>                     dimm, offset);
> 
>         smbus_reset(smbus_io_base);
> 
>         /* Clear host data port. */
>         outb(0x00, smbus_io_base + SMBHSTDAT0);
>         //SMBUS_DELAY();
>         smbus_wait_until_ready(smbus_io_base);
> 
>         dimm = (dimm << 1) | 1;
> 
>         outb(dimm, smbus_io_base + SMBXMITADD);
> 
> 
> The dimm = (dimm << 1) | 1 is something that came from a via southbridge 
> porting guide (NOT the one for the vt8237r, I don't have that one). With 
> it, my spd addresses are 0x50, 0x51, etc, without it, they'd be 0xa1, 
> 0xa3, etc. Which would be preferred? Do you think we'd ever need a 0xa0 
> or 0xa2 address?

My 2cents.
I have never really cared for the <<1. I prefer the more normal IO 
address. Most platform specs I have seen indicate the spd device at 
0xA0, 0xA2, etc.

Marc



-- 
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com
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