[coreboot] [RFC] v3: Stack switching abstraction for C7 and later Intel processors

Marc Jones Marc.Jones at amd.com
Tue Oct 14 21:15:17 CEST 2008

Carl-Daniel Hailfinger wrote:

>> If the stack is > CARBASE, then it is the CARBASE + CARSIZE - 4. If < carbase,
>> it is the RAMBASE + RAMSIZE - 4. Done. But let's make it flexible.
> Hm yes, something along these lines. Which leads to an interesting
> question: Where do we want the stack if we have to move it? Top of memory?

That should be specific to the CPU or platform but it would be good to 
be below 1MB. 0x1000 is a normal location. This will allow the stack to 
be shared if/when coreboot goes to real mode (SeaBIOS integration 


Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com

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