[coreboot] [PATCH]es 7 assorted fixes

Jens Rottmann JRottmann at LiPPERTEmbedded.de
Thu Oct 23 14:57:05 CEST 2008


Marc,

Thanks for your help.


>> autoboot_delay.diff (changes filo.c):
>> Fixes compile error when AUTOBOOT_DELAY=0.
>
> But this would break if AUTOBOOT_DELAY wasn't defined. ...

I'm glad this patch didn't make it, because I think my English needs
some fixing:

autoboot_delay.diff (changes filo.c):
Fixes compile error if AUTOBOOT_DELAY=0.

Apart from that, let's make CPP speak for itself:   ;-)

#include <stdio.h>
#undef AUTOBOOT_DELAY

int main() {
#if !AUTOBOOT_DELAY
	printf("Jens' patch is ok.  :-)\n");
#endif
	return 0;
}


>> fs_arch.diff (changes ext2fs.c, fat.c):
>> #if ARCH == 'i386' results in a compile error: character constant too
>> long (or something alike). Changed it to
>> #ifdef __i386
>
> Can you send the build output?

Sure. (Remarkable, what bzip2 compresses 600 KB text into.)
As you can see, ARCH == 'i386' is mis-evaluated as FALSE, eventually
choking the assembler on a PPC instruction.

> I don't think anyone builds this so we wouldn't see it.  We just use 
> filo.

Funny, I thought, I was using filo, too. :-) I somehow imagined filo
was, what this part of coreboot was called like ... after all, there is
a file src/boot/filo.c, and unless I set AUTOBOOT_DELAY=0, I get a
command line on COM1 and can load Linux kernels from any ext2 partition
I like and add kernel parameters.

First I tried embedding the Linux kernel as payload in the rom, but
space was really tight. With src/stream/fs_stream.c I can load the
payload (= my kernel) from my ext2 root fs. This boots even faster than
copying it out of the LPC rom. I think this piece of code is _really_
handy, shame if no one's using it ...


>> it8712_gpio.diff (changes superio.c (IT8712F)):
>> Added the missing I/O resources for IT8712F GPIOs.
> 
>> {&ops, IT8712F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, {0xfff, 0}, {0xff8, 0}, {0xff8, 0},},
> 
> I think that PNP_IO1 should be 0xfff

Simple-I/O provides 1 register for each GPIO pin set 1, 2, 3, 4, 5. It
occupies 5 consecutive I/O bytes with a granularity of 8. I see ITE's
manual says differently, but that must be wrong, I tried it out.


Thanks again. Best regards,
Jens

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