[coreboot] [Patch]inteltool GM965 and ICH8 Regs dump, GM965 IGP temperature report

lu zhihe tombowfly at gmail.com
Mon Oct 27 14:02:23 CET 2008


It bases on inteltool  trunk r3692.

This patch include GM965 and ICH8(except mpbase, it makes my Laptop halt)
regs dump.

It also support GM965 IGP temperature report. The support for GM945 mem.
temperature report

need test!

Hope you like it.

Signed-off-by: Lu Zhihe <tombowfly at gmail.com>

diff --new-file -u -r inteltool.orig/Makefile inteltool/Makefile
--- inteltool.orig/Makefile 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/Makefile 2008-10-27 20:18:33.000000000 +0000
@@ -27,7 +27,7 @@
 CFLAGS = -O2 -g -Wall -W
 LDFLAGS = -lpci -lz

-OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o
+OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o
temp.o

 all: pciutils dep $(PROGRAM)

diff --new-file -u -r inteltool.orig/gpio.c inteltool/gpio.c
--- inteltool.orig/gpio.c 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/gpio.c 2008-10-26 19:07:49.000000000 +0000
@@ -78,6 +78,26 @@
  { 0x3C, 4, "RESERVED" }
 };

+static const io_register_t ich8_gpio_registers[] = {
+ { 0x00, 4, "GPIO_USE_SEL" },
+ { 0x04, 4, "GP_IO_SEL" },
+ { 0x08, 4, "RESERVED" },
+ { 0x0c, 4, "GP_LVL" },
+ { 0x10, 4, "GPIO_USE_SEL_Override_LOW" },
+ { 0x14, 4, "RESERVED" },
+ { 0x18, 4, "GPO_BLINK" },
+ { 0x1c, 4, "GP_SER_BLINK" },
+ { 0x20, 4, "GP_SB_CMDSTS" },
+ { 0x24, 4, "GP_SB_DATA" },
+ { 0x28, 4, "RESERVED" },
+ { 0x2c, 4, "GPI_INV" },
+ { 0x30, 4, "GPIO_USE_SEL2" },
+ { 0x34, 4, "GP_IO_SEL2" },
+ { 0x38, 4, "GP_LVL2" },
+ { 0x3C, 4, "GPIO_USE_SEL_Override_HIGH" }
+};
+
+
 int print_gpios(struct pci_dev *sb)
 {
  int i, size;
@@ -87,6 +107,11 @@
  printf("\n============= GPIOS =============\n\n");

  switch (sb->device_id) {
+ case PCI_DEVICE_ID_INTEL_ICH8:
+ gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
+ gpio_registers = ich8_gpio_registers;
+ size = ARRAY_SIZE(ich8_gpio_registers);
+ break;
  case PCI_DEVICE_ID_INTEL_ICH7:
  case PCI_DEVICE_ID_INTEL_ICH7M:
  case PCI_DEVICE_ID_INTEL_ICH7DH:
diff --new-file -u -r inteltool.orig/inteltool.c inteltool/inteltool.c
--- inteltool.orig/inteltool.c 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/inteltool.c 2008-10-27 20:11:33.000000000 +0000
@@ -32,6 +32,8 @@
 } supported_chips_list[] = {
  { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" },
  { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82965GM, "i965GM" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8, "ICH8" },
  { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
  { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
  { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },
@@ -92,12 +94,14 @@
  int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;
  int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;
  int dump_pciexbar = 0, dump_coremsrs = 0;
+ int detect_temp = 0;

  static struct option long_options[] = {
  {"version", 0, 0, 'v'},
  {"help", 0, 0, 'h'},
  {"gpios", 0, 0, 'g'},
  {"mchbar", 0, 0, 'm'},
+ {"temp", 0, 0, 't'},
  {"rcba", 0, 0, 'r'},
  {"pmbase", 0, 0, 'p'},
  {"epbar", 0, 0, 'e'},
@@ -108,7 +112,7 @@
  {0, 0, 0, 0}
  };

- while ((opt = getopt_long(argc, argv, "vh?grpmedPMa",
+ while ((opt = getopt_long(argc, argv, "vh?grpmtedPMa",
  long_options, &option_index)) != EOF) {
  switch (opt) {
  case 'v':
@@ -121,6 +125,9 @@
  case 'm':
  dump_mchbar = 1;
  break;
+ case 't':
+ detect_temp = 1;
+ break;
  case 'r':
  dump_rcba = 1;
  break;
@@ -142,6 +149,7 @@
  case 'a':
  dump_gpios = 1;
  dump_mchbar = 1;
+ detect_temp = 1;
  dump_rcba = 1;
  dump_pmbase = 1;
  dump_epbar = 1;
@@ -174,7 +182,7 @@

  /* Find the required devices */

- sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);
+ sb = pci_get_dev(pacc, 0, 0, 0x1f, 0); /*Device 30, Func 0*/
  if (!sb) {
  printf("No southbridge found.\n");
  exit(1);
@@ -187,7 +195,7 @@
  exit(1);
  }

- nb = pci_get_dev(pacc, 0, 0, 0x00, 0);
+ nb = pci_get_dev(pacc, 0, 0, 0x00, 0); /*Device 0, Func 0*/
  if (!nb) {
  printf("No northbridge found.\n");
  exit(1);
@@ -239,6 +247,11 @@
  print_mchbar(nb);
  printf("\n\n");
  }
+
+ if (detect_temp) {
+ print_temp(nb);
+ printf("\n\n");
+ }

  if (dump_epbar) {
  print_epbar(nb);
diff --new-file -u -r inteltool.orig/inteltool.h inteltool/inteltool.h
--- inteltool.orig/inteltool.h 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/inteltool.h 2008-10-27 20:44:00.000000000 +0000
@@ -33,9 +33,45 @@
 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
 #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
 #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
+#define PCI_DEVICE_ID_INTEL_ICH8 0x2815

 #define PCI_DEVICE_ID_INTEL_82845 0x1a30
 #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0
+#define PCI_DEVICE_ID_INTEL_82965GM 0x2a00
+
+
+/*GM965 Regs*/
+#define GM965_TSC1 (0x1001) //16bits
+#define GM965_TSS1 (0x1004) //16bits
+#define GM965_TR1 (0x1006) //8bits
+
+#define GM965_TSE 0x8000
+#define GM965_TMOV (0x01 << 10)
+
+/*GM965 doc say TSC2 control memory thermal sensor */
+#define GM965_TSC2 (0x1041) //16bits
+#define GM965_TSS2 (0x1044) //16bits
+#define GM965_TR2 (0x1046) //8bits
+
+
+/*GM945 Regs*/
+/*GM945 doc say TSC1 just control memory thermal sensor
+ * no as GM965 control IGP's
+ * */
+#define GM945_TSC1 (0xC88) //8bits
+
+#define GM945_TSS1 (0xC8A) //8bits
+#define GM945_TR1 (0xC8B) //8bits
+
+#define GM945_TSE 0x80
+#define GM945_TMOV 0x10
+
+/*GM945 doc say TSC0-1 control memory thermal sensor*/
+#define GM945_TSC0_1 (0xCD8) //8bits
+#define GM945_TSS0 (0xCDA) //8bits
+#define GM945_TR0 (0xCDB) //8bits
+
+

 #define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))

@@ -53,4 +89,5 @@
 int print_epbar(struct pci_dev *nb);
 int print_dmibar(struct pci_dev *nb);
 int print_pciexbar(struct pci_dev *nb);
+int print_temp(struct pci_dev *nb);

diff --new-file -u -r inteltool.orig/memory.c inteltool/memory.c
--- inteltool.orig/memory.c 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/memory.c 2008-10-25 20:04:02.000000000 +0000
@@ -36,6 +36,9 @@
  printf("\n============= MCHBAR ============\n\n");

  switch (nb->device_id) {
+ case PCI_DEVICE_ID_INTEL_82965GM:
+ mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;
+ break;
  case PCI_DEVICE_ID_INTEL_82945GM:
  mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;
  break;
diff --new-file -u -r inteltool.orig/pcie.c inteltool/pcie.c
--- inteltool.orig/pcie.c 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/pcie.c 2008-10-25 20:11:06.000000000 +0000
@@ -35,6 +35,7 @@
  printf("\n============= EPBAR =============\n\n");

  switch (nb->device_id) {
+ case PCI_DEVICE_ID_INTEL_82965GM:
  case PCI_DEVICE_ID_INTEL_82945GM:
  epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
  break;
@@ -76,6 +77,9 @@
  printf("\n============= DMIBAR ============\n\n");

  switch (nb->device_id) {
+ case PCI_DEVICE_ID_INTEL_82965GM:
+ dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe;
+ break;
  case PCI_DEVICE_ID_INTEL_82945GM:
  dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe;
  break;
@@ -119,6 +123,9 @@
  printf("========= PCIEXBAR ========\n\n");

  switch (nb->device_id) {
+ case PCI_DEVICE_ID_INTEL_82965GM:
+ pciexbar_reg = pci_read_long(nb, 0x60);
+ break;
  case PCI_DEVICE_ID_INTEL_82945GM:
  pciexbar_reg = pci_read_long(nb, 0x48);
  break;
diff --new-file -u -r inteltool.orig/powermgt.c inteltool/powermgt.c
--- inteltool.orig/powermgt.c 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/powermgt.c 2008-10-26 19:24:28.000000000 +0000
@@ -31,6 +31,7 @@
  printf("\n============= PMBASE ============\n\n");

  switch (sb->device_id) {
+ /*case PCI_DEVICE_ID_INTEL_ICH8: //F31G will hang when dump pmbase Lu
Zhihe*/
  case PCI_DEVICE_ID_INTEL_ICH7:
  case PCI_DEVICE_ID_INTEL_ICH7M:
  case PCI_DEVICE_ID_INTEL_ICH7DH:
diff --new-file -u -r inteltool.orig/rootcmplx.c inteltool/rootcmplx.c
--- inteltool.orig/rootcmplx.c 2008-08-20 13:41:24.000000000 +0000
+++ inteltool/rootcmplx.c 2008-10-26 19:13:23.000000000 +0000
@@ -41,6 +41,7 @@
  printf("\n============= RCBA ==============\n\n");

  switch (sb->device_id) {
+ case PCI_DEVICE_ID_INTEL_ICH8:
  case PCI_DEVICE_ID_INTEL_ICH7:
  case PCI_DEVICE_ID_INTEL_ICH7M:
  case PCI_DEVICE_ID_INTEL_ICH7DH:
diff --new-file -u -r inteltool.orig/temp.c inteltool/temp.c
--- inteltool.orig/temp.c 1970-01-01 00:00:00.000000000 +0000
+++ inteltool/temp.c 2008-10-27 20:43:07.000000000 +0000
@@ -0,0 +1,154 @@
+/*
+ * Written by Lu Zhihe <tombowfly at gmail.com >
+ *
+ * Now only support GM965 IGP temperature detect.
+ * The support for GM945 mem. temperature detect need more test.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/mman.h>
+#include <unistd.h>
+
+#include "inteltool.h"
+
+int do_temp_detect(volatile uint8_t *mchbar, int reg_group)
+{
+ uint16_t tsc1 = 0, tss1 = 0, tr1 = 0;
+ uint16_t tse = 0, tmov = 0;
+ uint16_t tsc1_val = 0;
+ uint8_t tr1_val = 0;
+ float temp = 0;
+
+ switch (reg_group)
+ {
+ case PCI_DEVICE_ID_INTEL_82965GM:
+ {
+#if 1
+ tsc1 = GM965_TSC1;
+ tss1 = GM965_TSS1;
+ tr1 = GM965_TR1;
+#else
+ tsc1 = GM965_TSC2;
+ tss1 = GM965_TSS2;
+ tr1 = GM965_TR2;
+#endif
+ tse = GM965_TSE;
+ tmov = GM965_TMOV;
+ }
+ break;
+
+ /*FIXME*/
+ case PCI_DEVICE_ID_INTEL_82945GM:
+ {
+#if 1
+ tsc1 = GM945_TSC1;
+ tss1 = GM945_TSS1;
+ tr1 = GM945_TR1;
+#else
+ tsc1 = GM945_TSC0_1;
+ tss1 = GM945_TSS0;
+ tr1 = GM945_TR0;
+#endif
+ tse = GM945_TSE;
+ tmov = GM945_TMOV;
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ tsc1_val = *(uint16_t *)(mchbar+tsc1);
+
+ if(!(tsc1_val&tse))
+ {
+ *(uint16_t *)(mchbar+tsc1) |= tse;
+ tsc1_val = *(uint16_t *)(mchbar+tsc1);
+ }
+
+ while(1)
+ {
+ if(tsc1_val&tse)
+ {
+ do{
+ tr1_val = *(uint8_t *)(mchbar + tr1);
+#ifdef EXPERIENT
+ /*Default Regs vaule = 0xFF, GM865 doc say: under 40 degrees Centigrade,
+ * the temperature report may unavailable*/
+ if(tr1_val != 0xFF)
+ {
+ /*Magic Num by experiential data*/
+ printf("GPU Thermal = %d degrees Centigrade\n", (170 - tr1_val));
+ }
+ else
+ {
+ printf("Your GPU temperature is under 40 degrees Centigrade\n");
+ }
+#else
+ /*Base on Intel GM9965 doc, July 2006 rel. ver. Lu Zhihe*/
+ temp = 0.0016*tr1_val*tr1_val-1.10707*tr1_val + 161.05;
+ printf("GPU Thermal = %.2f degC\n", temp);
+
+#endif
+ sleep(1);
+ }while(*(uint16_t *)(mchbar + tss1)& tmov );
+ }
+ }
+ return 0;
+}
+
+
+int print_temp(struct pci_dev *nb)
+{
+ int size = (16 * 1024);
+ volatile uint8_t *mchbar;
+ uint32_t mchbar_phys;
+ int reg_group;
+
+ switch (nb->device_id) {
+ case PCI_DEVICE_ID_INTEL_82965GM:
+ mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;
+ reg_group = PCI_DEVICE_ID_INTEL_82965GM;
+ break;
+ case PCI_DEVICE_ID_INTEL_82945GM:
+ mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;
+ reg_group = PCI_DEVICE_ID_INTEL_82945GM;
+ break;
+ case 0x1234: // Dummy for non-existent functionality
+ printf("This northbrigde does not have MCHBAR.\n");
+ return 1;
+ default:
+ printf("Error: Dumping MCHBAR on this northbridge is not (yet)
supported.\n");
+ return 1;
+ }
+
+ mchbar = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
+ fd_mem, (off_t) mchbar_phys);
+
+ if (mchbar == MAP_FAILED) {
+ perror("Error mapping MCHBAR");
+ exit(1);
+ }
+
+ do_temp_detect(mchbar, reg_group);
+
+ munmap((void *)mchbar, size);
+ return 0;
+}
+
+

-- 
Thx

Lu Zhihe
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