[coreboot] v3 HT

[ron minnich]

On Mon, Oct 27, 2008 at 4:25 PM, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:
> The explanations by Tom and Marc made a few things clear for me:
> - The physical HT structure is not what we want to model.
> - The appearance of HT and topology in PCI config space is what matters.
> - 18.0 is not a PCI bridge, don't pretend it is one
>
> With that in mind, I'd like to propose another dts.
> I know that it has its own quirks, but it can serve as a discussion point.
>

I'm beginning to feel like we're thinking too much.

The fact is that whether or not the three HT links are a bridge, there
is routing in there that makes each link logically the parent of a
different set of devices. do we call that a bridge?

I don't know what to do with bus at 1.

ah well it's been a long day, will look at this later. For now let's
get myles patch in and try to see where that goes. I think I'm not
ready for this dts. But if myles wants to try it that's fine too.

ron