[coreboot] v3 HT
mylesgw at gmail.com
Tue Oct 28 17:34:50 CET 2008
> On Tue, Oct 28, 2008 at 8:03 AM, Myles Watson <mylesgw at gmail.com> wrote:
> > Here's a list of the #defines that I think we should look at. I would
> > to detect as many as possible, and add the rest to the dts or Kconfig.
> > ./coherent_ht.c:#ifdef CONFIG_K8_HT_FREQ_1G_SUPPORT
> we only support f2 or later. This should die.
> > ./coherent_ht.c:#if CONFIG_CROSS_BAR_47_56
> don't know how to autodetect this ... it is a wiring on the mainboard
Naively I would say that you could detect it after you had 4 & 5
initialized. If they were connected to each other than it was ladder,
otherwise crossbar. I realize it may not be that simple.
Should we put it in the dts then?
> > ./coherent_ht.c:#if CONFIG_USE_PRINTK_IN_CAR
> Is this in v3? I thought I had killed all these.
I just killed the last one.
> > ./coherent_ht.c:#if CONFIG_LOGICAL_CPUS==1
> Ditto. That should be dead.
I'll take it out.
> > ./pci.c:#if SB_HT_CHAIN_ON_BUS0 > 0
> This is detectable and stefan is going to tell us how.
Good. There's a place in the code where it does a test to find the
southbridge link by checking the value of one of the k8 registers.
> > ./pci.c:#if SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
This one ?
> > ./pci.c:#ifdef CONFIG_MULTIPLE_VGA_INIT
> config variable. Don't know how to do this dynamically.
> > ./incoherent_ht.c: #if (CONFIG_K8_SCAN_PCI_BUS == 1)
> > ./incoherent_ht.c:#if CONFIG_K8_ALLOCATE_IO_RANGE == 1
> > ./raminit.c:#if defined(CONFIG_LB_MEM_TOPK) & ((CONFIG_LB_MEM_TOPK -1)
> != 0)
> > ./raminit.c:#ifdef QRANK_DIMM_SUPPORT
> > ./raminit.c:#if CPU_SOCKET_TYPE == SOCKET_L1
> > ./raminit.c:#if CPU_SOCKET_TYPE == SOCKET_AM2
> yes, these are trivial to detect at runtime.
> > ./raminit.c:#ifdef DRAM_MIN_CYCLE_TIME
> > ./raminit.c:#if DIMM_SUPPORT==0x0104 /* DDR2 and REG */
> This ought to be determined somehow but not sure how.
> > ./raminit.c:#if MEM_TRAIN_SEQ == 0
> > ./dqs.c: #if CONFIG_AP_CODE_IN_CAR == 0
> These are hard, but we can try.
> > ./domain.c:#ifdef CONFIG_PCI_64BIT_PREF_MEM
> agree. But let's do the easy ones first.
> Starting with
> FREQ_1G_support: all F2 are ok with 1G, right? We don't need that
Isn't this just for processors that don't report their supported frequency
correctly? You can find F2 Semprons that don't support 1G.
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