[coreboot] r961 - in coreboot-v3: device include/device mainboard/amd/dbm690t mainboard/emulation/qemu-x86 southbridge/intel/i82371eb
svn at coreboot.org
svn at coreboot.org
Wed Oct 29 05:25:33 CET 2008
Author: rminnich
Date: 2008-10-29 05:25:32 +0100 (Wed, 29 Oct 2008)
New Revision: 961
Modified:
coreboot-v3/device/device.c
coreboot-v3/device/device_util.c
coreboot-v3/include/device/device.h
coreboot-v3/mainboard/amd/dbm690t/mainboard.c
coreboot-v3/mainboard/emulation/qemu-x86/vga.c
coreboot-v3/southbridge/intel/i82371eb/i82371eb.c
Log:
General cleanup and comments for things that should be fixed in future.
Most substantive change is getting rid of 'initialized', which was only
ever needed in v2 due to an implementation mistake.
With Uwe's comments taken into account,
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Acked-by: Myles Watson <mylesgw at gmail.com>
Modified: coreboot-v3/device/device.c
===================================================================
--- coreboot-v3/device/device.c 2008-10-29 02:22:38 UTC (rev 960)
+++ coreboot-v3/device/device.c 2008-10-29 04:25:32 UTC (rev 961)
@@ -805,6 +805,7 @@
#warning do we call phase3_enable here.
new_max = busdevice->ops->phase3_scan(busdevice, max);
do_phase3 = 0;
+ /* do we *ever* use this path */
for (link = 0; link < busdevice->links; link++) {
if (busdevice->link[link].reset_needed) {
if (reset_bus(&busdevice->link[link])) {
@@ -973,15 +974,13 @@
printk(BIOS_INFO, "Phase 6: Initializing devices...\n");
for (dev = all_devices; dev; dev = dev->next) {
- if (dev->enabled && !dev->initialized &&
- dev->ops && dev->ops->phase6_init) {
+ if (dev->enabled && dev->ops && dev->ops->phase6_init) {
if (dev->path.type == DEVICE_PATH_I2C) {
printk(BIOS_DEBUG, "Phase 6: smbus: %s[%d]->",
dev_path(dev->bus->dev), dev->bus->link);
}
printk(BIOS_DEBUG, "Phase 6: %s init.\n",
dev_path(dev));
- dev->initialized = 1;
dev->ops->phase6_init(dev);
}
}
@@ -995,8 +994,8 @@
printk(BIOS_INFO, "Show all devs...\n");
for (dev = all_devices; dev; dev = dev->next) {
printk(BIOS_SPEW,
- "%s(%s): enabled %d have_resources %d initialized %d\n",
+ "%s(%s): enabled %d have_resources %d\n",
dev->dtsname, dev_path(dev), dev->enabled,
- dev->have_resources, dev->initialized);
+ dev->have_resources);
}
}
Modified: coreboot-v3/device/device_util.c
===================================================================
--- coreboot-v3/device/device_util.c 2008-10-29 02:22:38 UTC (rev 960)
+++ coreboot-v3/device/device_util.c 2008-10-29 04:25:32 UTC (rev 961)
@@ -430,10 +430,7 @@
for (i = 0; i < dev->resources;) {
resource = &dev->resource[i];
if (!resource->flags) {
- /* Note: memmove() was used here. But this can never
- * overlap, right?
- */
- memcpy(resource, resource + 1, (dev->resources-i)* sizeof(*resource));
+ memmove(resource, resource + 1, (dev->resources-i)* sizeof(*resource));
dev->resources -= 1;
memset(&dev->resource[dev->resources], 0,
sizeof(*resource));
Modified: coreboot-v3/include/device/device.h
===================================================================
--- coreboot-v3/include/device/device.h 2008-10-29 02:22:38 UTC (rev 960)
+++ coreboot-v3/include/device/device.h 2008-10-29 04:25:32 UTC (rev 961)
@@ -214,7 +214,6 @@
unsigned int class; /* 3 bytes: (base,sub,prog-if) */
unsigned int hdr_type; /* PCI header type */
unsigned int enabled : 1; /* set if we should enable the device */
- unsigned int initialized : 1; /* set if we have initialized the device */
unsigned int have_resources : 1; /* Set if we have read the devices resources */
unsigned int on_mainboard : 1;
unsigned long rom_address;
Modified: coreboot-v3/mainboard/amd/dbm690t/mainboard.c
===================================================================
--- coreboot-v3/mainboard/amd/dbm690t/mainboard.c 2008-10-29 02:22:38 UTC (rev 960)
+++ coreboot-v3/mainboard/amd/dbm690t/mainboard.c 2008-10-29 04:25:32 UTC (rev 961)
@@ -17,6 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+/* N.B. This file should be removed in the long term. */
+/* the nic code goes to the south support. The UMA code should
+ * be moved to the cpu support.
+ */
+
#include <mainboard.h>
#include <config.h>
#include <types.h>
Modified: coreboot-v3/mainboard/emulation/qemu-x86/vga.c
===================================================================
--- coreboot-v3/mainboard/emulation/qemu-x86/vga.c 2008-10-29 02:22:38 UTC (rev 960)
+++ coreboot-v3/mainboard/emulation/qemu-x86/vga.c 2008-10-29 04:25:32 UTC (rev 961)
@@ -38,6 +38,8 @@
/*
* FIXME: This should be in the Super I/O code some day,
* but since QEMU has no Super I/O...
+ * we need to create superio/emulation/qemu and move the keyboard
+ * bits there.
*/
init_pc_keyboard(0x60, 0x64, &conf);
/* now run the rom */
Modified: coreboot-v3/southbridge/intel/i82371eb/i82371eb.c
===================================================================
--- coreboot-v3/southbridge/intel/i82371eb/i82371eb.c 2008-10-29 02:22:38 UTC (rev 960)
+++ coreboot-v3/southbridge/intel/i82371eb/i82371eb.c 2008-10-29 04:25:32 UTC (rev 961)
@@ -43,6 +43,7 @@
{
unsigned short c;
+ /* These should be controlled in the dts. */
printk(BIOS_DEBUG, "Enabling IDE channel 1\n");
c = pci_read_config16(dev, 0x40);
c |= 0x8000;
@@ -82,6 +83,9 @@
pci_write_config8(dev, 0x80, 1);
}
+/*NOTE: We need our own read and set resources for this part! It has
+ * BARS that are not in the normal place (such as SMBUS)
+ */
/* You can override or extend each operation as needed for the device. */
struct device_operations i82371eb_isa = {
.id = {.type = DEVICE_ID_PCI,
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