[coreboot] nvramtool: chipset enable ? [Was: piix4: cmos memory bank 2]

[Andriy Gapon]

Maybe nvramtool should have some mechanism to enable access to extended
CMOS similarly how flashrom enables access to BIOS memory?

E.g.:
$ pciconf -r -b pci0:0:7:0 0xcb
21
$ ./nvramtool -x
0000 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................
0010 | 00 74 00 02 0f 80 02 c0 ff 00 00 7a ff ff 00 00 | .t.........z....
0020 | 00 00 00 00 3f 00 00 00 00 00 00 00 ff 00 06 7c | ....?..........|
0030 | c0 ff 20 80 ff ff ff ff 80 ff ff 0f b2 d1 e9 11 | .. .............
0040 | ff 29 ad 3b dc 88 88 bf 05 9b 6a c1 06 00 ff fe | .).;......j.....
0050 | e4 98 aa f3 0c 00 07 ff ff d7 ff ff ff 59 00 00 | .............Y..
0060 | e0 38 60 17 fe 70 ff 00 00 00 00 00 00 00 ff 00 | .8`..p..........
0070 | 00 00 00 00 00 00 00 ff 00 00 ff ff ff 1a d7 b0 | ................
0080 | 40 34 13 02 12 17 04 29 10 08 29 42 00 80 00 00 | @4.....)..)B....
0090 | 00 74 00 02 0f 80 02 c0 ff 00 00 7a ff ff 00 00 | .t.........z....
00a0 | 00 00 00 00 3f 00 00 00 00 00 00 00 ff 00 06 7c | ....?..........|
00b0 | c0 ff 20 80 ff ff ff ff 80 ff ff 0f b2 d1 e9 11 | .. .............
00c0 | ff 29 ad 3b dc 88 88 bf 05 9b 6a c1 06 00 ff fe | .).;......j.....
00d0 | e4 98 aa f3 0c 00 07 ff ff d7 ff ff ff 59 00 00 | .............Y..
00e0 | e0 38 60 17 fe 70 ff 00 00 00 00 00 00 00 ff 00 | .8`..p..........
00f0 | 00 00 00 00 00 00 00 ff 00 00 ff ff ff 1a d7 b0 | ................

$ pciconf -w -b pci0:0:7:0 0xcb 0x25
$ pciconf -r -b pci0:0:7:0 0xcb
25
$ ./nvramtool -x
0000 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................
0010 | 00 74 00 02 0f 80 02 c0 ff 00 00 7a ff ff 00 00 | .t.........z....
0020 | 00 00 00 00 3f 00 00 00 00 00 00 00 ff 00 06 7c | ....?..........|
0030 | c0 ff 20 80 ff ff ff ff 80 ff ff 0f b2 d1 e9 11 | .. .............
0040 | ff 29 ad 3b dc 88 88 bf 05 9b 6a c1 06 00 ff fe | .).;......j.....
0050 | e4 98 aa f3 0c 00 07 ff ff d7 ff ff ff 59 00 00 | .............Y..
0060 | e0 38 60 17 fe 70 ff 00 00 00 00 00 00 00 ff 00 | .8`..p..........
0070 | 00 00 00 00 00 00 00 ff 00 00 ff ff ff 1a d7 b0 | ................
0080 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff | ................
0090 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff | ................
00a0 | aa 04 ff ff ff ff ff 83 06 ff ff ff ff ff ff ff | ................
00b0 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff | ................
00c0 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff | ................
00d0 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff | ................
00e0 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff | ................
00f0 | ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff | ................

BTW, this was done on FreeBSD, expect a port patch soon :-)


on 24/10/2008 18:53 Andriy Gapon said the following:
> Was the following a revelation only to me or is it a generally obscure
> knowledge?
> 
> PIIX4 documentation says that bit 2 of PCI config register 0xCB (of
> function 0) enables access to CMOS memory bank2 via IO ports 0x72 and
> 0x73 similarly to regular CMOS memory access via 0x70/0x71.
> 
> I tested this on my 440BX-based system and this does indeed work:
> $ od -t xC extcmos.img
> 0000000    ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> *
> 0000040    aa 04 ff ff ff ff ff 83 06 ff ff ff ff ff ff ff
> 0000060    ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> *
> 0000200
> 
> Most registers are 0xff, but several contain some data, e.g. "83 06"
> seems to be 0x683, ID of my Pentium III CPU.
> 
> When bit 2 of 0xCB is zero, then 0x72/0x73 ports seem to provide access
> to regular CMOS just like 0x70/0x71.
> 


-- 
Andriy Gapon