[coreboot] coreboot.v2+seabios on 440bx: option roms not found

Andriy Gapon avg at icyb.net.ua
Thu Oct 30 16:33:17 CET 2008


on 30/10/2008 16:52 Myles Watson said the following:
> 
>> -----Original Message-----
>> From: Andriy Gapon [mailto:avg at icyb.net.ua]
>> Sent: Thursday, October 30, 2008 8:43 AM
>> To: Myles Watson
>> Cc: 'Coreboot'
>> Subject: Re: [coreboot] coreboot.v2+seabios on 440bx: option roms not
>> found
>>
>> on 30/10/2008 16:34 Myles Watson said the following:
>>>> -----Original Message-----
>>>> From: coreboot-bounces at coreboot.org [mailto:coreboot-
>> bounces at coreboot.org]
>>>> On Behalf Of Andriy Gapon
>>>> Sent: Thursday, October 30, 2008 8:25 AM
>>>> To: Coreboot
>>>> Subject: [coreboot] coreboot.v2+seabios on 440bx: option roms not found
>>>>
>>>>
>>>> In northbridge/intel/i440bx/raminit.c:sdram_set_spd_registers all PAM
>>>> registers are programmed for RAM R/W access (0x33).
>>>> When SeaBIOS searches for option ROMs (including VGA ROM) it doesn't do
>>>> anything about PAM, so it sees empty memory instead of the ROMs.
>>>>
>>>> I am not sure what is the best solution here. It is debatable how
>>>> coreboot should set PAM register, and it is not right to make SeaBIOS
>>>> too hardware dependent.
>>>>
>>>> Maybe coreboot could somehow export functions for setting access to
>>>> option ROM space (aka legacy memory segments) and SeaBIOS could call
>> them.
>>> I think SeaBIOS expects Coreboot to copy the option ROM to 0xc0000 in
>> RAM.
>>> That way SeaBIOS gets to stay hardware agnostic.
>>>
>> Makes sense!
>> But it doesn't look like this does actually happen (by default).
>> I am playing with msi/ms6147 target (under heavily tweaked qemu).
> 
> You're right.  It doesn't happen by default.  Kevin sent a simple patch to
> the list, which I can't find right now :(
> 
> Basically you tell coreboot to run the ROM, but comment out the execution
> right after the copy.  Let me know if you can't find it, and I'll try to
> help you dig.

I found a post where Kevin talks about this but no patch.

I am thinking about this approach for 440BX: set PAM registers to "read
from ROM, write to RAM" mode, copy the whole range onto itself, set PAM
register to R/W RAM mode.
I am not sure if this better be done for all legacy segments (0xC0000 -
0xFFFFF range) or only for option ROM segments (0xC0000 - 0xDFFFF range)
excluding BIOS Area and BIOS Extension segments.

P.S.
This approach won't work in stock qemu because of incorrect
implementation (absence, actually) of emulation of this "mixed" PAM mode.

-- 
Andriy Gapon




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