[coreboot] [PATCH] fix K8M890

[Rudolf Marek]

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Hello

Attached patch fixes at least one issue ;) During the PCI BAR sizing must be the
D1F0 bridge without activated I/O and MEM resources, otherwise it will hang
whole PCI bus.

U-boot is also disabling the IO/MEM decode when sizing the BARs, dont know why
does we not.

Second small change just changes a bit which controls the PSTATECTL logic.

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Rudolf
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