[coreboot] EHCI debug port finder

Corey Osgood corey.osgood at gmail.com
Tue Sep 9 03:53:22 CEST 2008

On Mon, Sep 8, 2008 at 9:48 PM, Joseph Smith <joe at settoplinux.org> wrote:
> On Tue, 09 Sep 2008 03:31:00 +0200, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>> I wanted to know which physical port of my multiple USB controllers have
>> the debug capability. There was no way to find that easily, so I created
>> a tool which will do most of the work for the user.
>> Example output:
>> The following PCI devices support a USB debug port (says lspci):
>> 0000:00:1d.7
>> The following PCI devices support a USB debug port (says the kernel):
>> 0000:00:1d.7
>> PCI device 0000:00:1d.7, USB bus 3, USB physical port 1
>> Currently connected high-speed devices:
>> /:  Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ehci_hcd/6p, 480M
>>     |__ Port 2: Dev 20, If 0, Class=stor., Driver=usb-storage, 480M
>> The output can be improved, but it's a good start.
> Doesn't lspci -vvv tell you? It does for me on the ICH4
> 00:1d.7 USB Controller: Intel Corp. 82801DB/DBM (ICH4/ICH4-M) USB2 EHCI
> Controller (rev 02) (prog-if 20 [EHCI])
>        Subsystem: Unknown device bc8a:4610
>        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
> Stepping- SERR- FastB2B-
>        Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort-
> <MAbort- >SERR- <PERR-
>        Latency: 0
>        Interrupt: pin D routed to IRQ 11
>        Region 0: Memory at feb7fc00 (32-bit, non-prefetchable) [size=1K]
>        Capabilities: [50] Power Management version 2
>                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA
> PME(D0+,D1-,D2-,D3hot+,D3cold+)
>                Status: D0 PME-Enable- DSel=0 DScale=0 PME-
>        Capabilities: [58] Debug port

But IIRC, only the first port on the controller works as a debug port,
and Carl-Daniel's program will let you figure out exactly which port
that is, by swapping a USB device between the two ports. Right?


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