[coreboot] r3571 build service
info at coresystems.de
Wed Sep 10 23:21:54 CEST 2008
Dear coreboot readers!
This is the automated build check service of coreboot.
The developer "stepan" checked in revision 3571 to
the coreboot source repository and caused the following
Add the "jetway j7f*" mainboard. As compared to the Via Epia CN, this
changes the superio to a Fintek F71805F as described at
It also creates the mainboard tree for this series of motherboards
(Jetway J7F2 and J7F4). I've tested it with one motherboard
(J7F2WE1G3), and I believe it works with the others, as the differences
among them are mostly trivial (processor speed, chipset and quantity of
LAN cards, audio chipset, etc.). A list of the relevant motherboards
with specs can be found at
The irq_tables.c is copied directly from the epia-cn, because the one
generated by getpir with the factory BIOS did not work properly while
the EPIA-CN one did.
Minor changes on checkin to cope with moved romcc in latest revision.
NOTE: This board is broken until the issue introduced in r3567 is resolved.
Signed-off-by: Alex Mauer <hawke at hawkesnest.net>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Compilation of jetway:j7f24 is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3571&device=j7f24&vendor=jetway
Compilation of via:epia-cn is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3571&device=epia-cn&vendor=via
If something broke during this checkin please be a pain
in stepan's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should
be backed out.
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