[coreboot] jetway IDE enable strangeness

Kevin O'Connor kevin at koconnor.net
Fri Sep 12 13:48:41 CEST 2008

On Thu, Sep 11, 2008 at 05:20:59PM -0500, Alex Mauer wrote:
> But back in src/southbridge/via/vt8237r/vt8237r_ide.c (around line 41),
> sb->ide0_enable and sb->ide1_enable are both 0.
> But the question is, what's going on there? Why are these values set to
> 0?  Is ide_init accessing chip_info for the wrong device?  Does anyone
> have any ideas?

I had the same problem.  I added

      device pci f.1 on end			# IDE

to the southbridge area of Config.lb and it seemed to resolve the


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