[coreboot] Timings v2
peter at stuge.se
Tue Apr 21 04:00:08 CEST 2009
Kevin O'Connor wrote:
> But, you have a good point about the LPC/FWH being a limit. Does
> anyone know if 50ms is the lower limit on reading 63488 bytes from
> flash? It still seems high.
Memory Read is the cycle used by LPC chips, 1 byte at a time.
Firmware Memory Read is used by FWH chips, 1/2/4/128 bytes at a time.
Often only 1.
1 byte LPC needs 21 LPC clocks, 630 ns * 63488 = 39997440 ns = 40 ms.
1 byte FWH needs 19 LPC clocks, 570 ns * 63488 = 36188160 ns = 36 ms.
I think you're as close as you will get without multibyte Firmware
128 byte FWH needs 273 LPC clocks = 8.27 us * (63488/128) = 4.1 ms.
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