From nathan at traverse.com.au  Tue Dec  1 00:17:47 2009
From: nathan at traverse.com.au (Nathan Williams)
Date: Tue, 01 Dec 2009 10:17:47 +1100
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <534e5dc20911301417y77ffbcbfja10897ce14849791@mail.gmail.com>
References: <4AF2C840.5050104@traverse.com.au>	
	<534e5dc20911091259w3257048r355737faa4e69692@mail.gmail.com>	
	<4AF9CC5A.7020803@traverse.com.au>	
	<534e5dc20911101507m774e58cdxe079e9ba8595db93@mail.gmail.com>	
	<4B0A3967.70806@traverse.com.au>	
	<534e5dc20911231316i3efbb8bax2c9a764a59f6d9d3@mail.gmail.com>	
	<4B0B94A7.5050500@traverse.com.au>	
	<534e5dc20911240928x164a97c7h62bc4a3b8f4fc2eb@mail.gmail.com>	
	<4B0E29C7.7080900@traverse.com.au>
	<4B0F966B.8080309@traverse.com.au>
	<534e5dc20911301417y77ffbcbfja10897ce14849791@mail.gmail.com>
Message-ID: <4B14529B.60406@traverse.com.au>

Marc Jones wrote:
> On Fri, Nov 27, 2009 at 2:05 AM, Nathan Williams <nathan at traverse.com.au> wrote:
>> Nathan Williams wrote:
>>> Marc Jones wrote:
>>>> On Tue, Nov 24, 2009 at 1:09 AM, Nathan Williams <nathan at traverse.com.au> wrote:
>>>>> Marc Jones wrote:
>>>>>> On Mon, Nov 23, 2009 at 12:27 AM, Nathan Williams
>>>>>> <nathan at traverse.com.au> wrote:
>>>>>>> I managed to get the commercial BIOS to boot on my board and diffed it with coreboot:
>>>>>>>
>>>>>>> http://coreboot.pastebin.com/m39b22c21
>>>>>>>
>>>>>>> The only differences I can see are related to interrupts, which shouldn't matter in relation to
>>>>>>> my RAM problems.
>>>>>>>
>>>>>>> I have also run a memtest86 with the commercial BIOS (from bootable CDROM) and as a payload in coreboot.
>>>>>>> The commercial BIOS didn't have any errors, but my coreboot did.  So the hardware can't be too bad.
>>>>>> That looks like just the southbridge cs5536 target. The memory
>>>>>> differences would be in the processor geodelx target. Can you send
>>>>>> those results?
>>>>>>
>>>>>> Marc
>>>>>>
>>>>> I did some new MSR dumps.
>>>>>
>>>>> Diff:
>>>>> ./msrtool -t geodelx -t cs5536 -d amd_ref_bios
>>>>> http://coreboot.pastebin.com/m5e487f87
>>>>>
>>>>> AMD NAS reference BIOS:
>>>>> ./msrtool -t geodelx -t cs5536 -l -s amd_ref_bios
>>>>> http://coreboot.pastebin.com/madc04ac
>>>>>
>>>>> My Coreboot:
>>>>> ./msrtool -t geodelx -t cs5536 -l -s nathan_bios
>>>>> http://coreboot.pastebin.com/m7f35d855
>>>>>
>>>>>
>>>>> The diffs I did today show some differences with GLCP_DELAY_CONTROLS.
>>>>> Last time I added some code to force it to match the commercial BIOS
>>>>> GLCP_DELAY_CONTROLS MSR, but it didn't seem to make any difference.
>>>>>
>>>>> I also tested all the SODIMMS I have here (about 10) with the commercial BIOS.
>>>>> Each time I did a msrtool diff to one I saved on disk.
>>>>>
>>>>> Most are 333MHz, but 2 are 400MHz.  There weren't any changes to the MSRs.
>>>>>
>>>>> Could there be an issue with the initialisation sequence that reading MSRs
>>>>> after booting won't show?  Also, quite a few MSRs aren't defined in geodelx.c yet.
>>>>> Are there any obvious ones that should be added in?
>>>>>
>>>> --- AMD NAS reference BIOS
>>>> +++ Nathan's coreboot v3
>>>> #
>>>> # GLCP_DELAY_CONTROLS
>>>> #
>>>> -0x4c00000f 0x83f1_00aa_5696_0404
>>>> +0x4c00000f 0x8271_005a_ 5696_ 0404
>>>>
>>>> It looks like coreboot and the ref bios detect different dimm
>>>> configuration. This timing setup could be part of the instability (I
>>>> don't think it explains the reset problem). Look at the code here:
>>>> SetDelayControl(void) and anywhere else that GLCP_DELAY_CONTROLS gets
>>>> set to see what might be happening. Make sure that MTest is disabled
>>>> in the ref bios setup. This setting is based on the number of devices
>>>> (load) there is on the dimm.
>>>>
>>>> I didn't realize that so few registers were in the msr tool for
>>>> geodelx. You should add these:
>>>> 20000018h R/W Refresh and SDRAM Program (MC_CF07_DATA)
>>>> 10071007_00000040h Page 227
>>>> 20000019h R/W Timing and Mode Program (MC_CF8F_DATA) 18000008_287337A3h Page 229
>>>> 2000001Ah R/W Feature Enables (MC_CF1017_DATA) 00000000_11080001h Page 231
>>>> 2000001Bh RO Performance Counters (MC_CFPERF_CNT1) 00000000_00000000h Page 232
>>>> 2000001Ch R/W Counter and CAS Control (MC_PERCNT2) 00000000_00FF00FFh Page 233
>>>> 2000001Dh R/W Clocking and Debug (MC_CFCLK_DBUG) 00000000_00001300h Page 233
>>>>
>>>> 4C00000Fh R/W GLCP I/O Delay
>>>> Controls(GLCP_DELAY_CONTROLS)00000000_00000000h Page 549
>>>> 4C000014h R/W GLCP System Reset and PLL Control (GLCP_SYS_RSTPLL)
>>>> Bootstrap specific Page 554
>>>>
>>>> Marc
>>>>
>>> I've now added the MSRs and uploaded to pastebin:
>>>
>>> AMD NAS:
>>> http://coreboot.pastebin.com/m53aed60b
>>>
>>> My coreboot:
>>> http://coreboot.pastebin.com/md23bc6a
>>>
>>> ./msrtool -d AMD_NAS:
>>> http://coreboot.pastebin.com/m77663de5
>>>
>>> Tomorrow I'll try the tests on the NAS hardware, instead of our own motherboards
>>> just in case there are some hidden hardware issues.
>>>
>>> Regards,
>>> Nathan
>>>
>> On the NAS reference board I got the following diff between coreboot
>> and the commercial BIOS:
>>
>> http://coreboot.pastebin.com/m1353db1a
>>
>> As you can see there are a lot of latency differences.
>> Unfortunately it was only later that I realised that the differences are because the bootstraps are set to bypass, which means coreboot uses 266 as the speed, where as the commercial bios uses 333.  So when I repeat the same on our boards, the only difference in the geodelx MSRs is:
>>
>> # MC_CFCLK_DBUG
>> -0x2000001d 0x0000000000000000
>> +0x2000001d 0x0000000000001000
>> #    12 TRISTATE_DIS TRI-STATE Disable
>> -0: Tri-stating enabled
>> +1: Tri-stating disabled
> 
> 
> Nathan,
> 
> I don't think the tri-state disable bit explains the problems you have
> seen. Since the memory has the same settings, the problem must be
> somewhere else. You will need to go back the the reboot path to
> investigate. It seems like something in the reset isn't doing a
> complete reset, which causes a problem with the cache disable.
> 
> Marc
> 
> 

I am suspicious that the reset problem only occurs when I'm using a laptop hard drive
off the 44pin IDE connector on our board.  I have tried booting with a 3.5" drive
and external 12V, but I can't replicate the problem.  With the 3.5" drive, a reboot from
fsck works fine.  Hopefully the next PCB revision should perform better because we've
moved the 5V plane further away from the DDR tracks.

I don't know if I mentioned another problem that has similar symptoms.  Some RAM causes
the same cache disable problem, even if there are no IDE devices connected.  This happens
from power-up, so it's not a reset issue.

Nathan



From svn at coreboot.org  Tue Dec  1 00:53:06 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue,  1 Dec 2009 00:53:06 +0100
Subject: [coreboot] [commit] r4968 - trunk/src/superio/smsc/smscsuperio
Message-ID: <mailman.4068.1355071658.16123.coreboot@coreboot.org>

Author: uwe
Date: 2009-12-01 00:53:06 +0100 (Tue, 01 Dec 2009)
New Revision: 4968

Modified:
   trunk/src/superio/smsc/smscsuperio/superio.c
Log:
Add support for the SMSC SCH4304 Super I/O.

Signed-off-by: Zheng Bao <zheng.bao at amd.com>
Acked-by: Peter Stuge <peter at stuge.se>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>



Modified: trunk/src/superio/smsc/smscsuperio/superio.c
===================================================================
--- trunk/src/superio/smsc/smscsuperio/superio.c	2009-11-28 09:31:30 UTC (rev 4967)
+++ trunk/src/superio/smsc/smscsuperio/superio.c	2009-11-30 23:53:06 UTC (rev 4968)
@@ -61,6 +61,7 @@
 #define SCH3112		0x7c
 #define SCH5307		0x81	/* Rebranded LPC47B397(?) */
 #define SCH5027D	0x89
+#define SCH4304		0x90	/* SCH4304 */
 
 /* Register defines */
 #define DEVICE_ID_REG	0x20	/* Device ID register */
@@ -137,6 +138,7 @@
 	{SCH3112,  {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},
 	{SCH5307,  {0, 3, 4,  5, -1,  7, -1,  -1,  8,  -1, -1, -1, 10, -1, -1}},
 	{SCH5027D, {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, 11}},
+	{SCH4304,  {0, 3, 4,  5, -1,  7, -1,  11, -1,  -1, -1, -1, 10, -1, -1}},
 };
 
 /**




From uwe at hermann-uwe.de  Tue Dec  1 00:55:04 2009
From: uwe at hermann-uwe.de (Uwe Hermann)
Date: Tue, 1 Dec 2009 00:55:04 +0100
Subject: [coreboot] [PATCH]: Updated: Add the superio SMSC sch4304
 support.
In-Reply-To: <20091130204521.23851.qmail@stuge.se>
References: <DD1CC71B621B004FA76856E5129D6B170341424F@sbjgexmb1.amd.com>
	<DD1CC71B621B004FA76856E5129D6B1703414662@sbjgexmb1.amd.com>
	<20091130204521.23851.qmail@stuge.se>
Message-ID: <20091130235503.GA9815@greenwood>

On Mon, Nov 30, 2009 at 09:45:21PM +0100, Peter Stuge wrote:
> > Signed-off-by: Zheng Bao <zheng.bao at amd.com>
> 
> Acked-by: Peter Stuge <peter at stuge.se>

Thanks for the patch, r4968.

I committed the original version of the patch, the LDN numbers are
not in any way secret, even if there were an NDA. They can be easily
guessed or tested out with hardware access.


Uwe.
-- 
http://www.hermann-uwe.de  | http://www.randomprojects.org
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org



From joe at settoplinux.org  Tue Dec  1 03:52:53 2009
From: joe at settoplinux.org (Joseph Smith)
Date: Mon, 30 Nov 2009 21:52:53 -0500
Subject: [coreboot] Atom platform porting problem.
In-Reply-To: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA9D3Nb7Z7m0KdAnNM+uNHfQEAAAAA@quanmax.com>
References: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA9D3Nb7Z7m0KdAnNM+uNHfQEAAAAA@quanmax.com>
Message-ID: <4B148505.4020401@settoplinux.org>

On 11/30/2009 09:39 PM, Scott.Hsiao wrote:
> Hello! Joseph,
> Yes, the process stopped at same place everytime.
> Completed log is attatched.
>
> Scott Hsiao
>
> -----Original Message-----
> From: Joseph Smith [mailto:joe at settoplinux.org]
> Sent: Tuesday, December 01, 2009 10:31 AM
> To: Scott.Hsiao
> Cc: coreboot at coreboot.org
> Subject: Re: [coreboot] Atom platform porting problem.
>
> On 11/30/2009 03:29 AM, Scott.Hsiao wrote:
>> I am porting coreboot to a Intel Atom based mainboard which
>> incorperate atom (N270) + 945GSE + it8718f.
>> The initial progress of north bridge seems okay but I got error in the
>> "dev_initialize" function.
>> Here are the partial output:
>> ....
>> Initializing devices...
>> Root Device init
>> APIC_CLUSTER: 0 init
>> malloc Enter, size 91, free_mem_ptr 0013b998 malloc 0013b998
>> start_eip=0x0000a000, offset=0x00100000, code_size=0x0000005b
>> Initializing SMM handler... ... pmbase = 0x0500
>> SMI_STS: PM1
>> PM1_STS: WAK PWRBTN TMROF
>> GPE0_STS:
>> TCO_STS:
>> ... raise SMI#
>> Initializing CPU #0
>> CPU: vendor Intel device 106c2
>> CPU: family 06, model 1c, stepping 02
>> Using generic cpu ops (good)
>> Enabling cache
>> microcode_info: sig = 0x000106c2 pf=0x00000004 rev = 0x00000000
>> CPU: Intel(R) Core(TM) CPU N270 @ 1.60GHz.
>> Setting fixed MTRRs(0-88) Type: UC
>> Setting fixed MTRRs(0-16) Type: WB
>> Setting fixed MTRRs(24-88) Type: WB
>> DONE fixed MTRRs
>> call enable_fixed_mtrr()
>> Setting variable MTRR 0, base: 0MB, range: 512MB, type WB
>> ADDRESS_MASK_HIGH=0xf Unexpected Exception: 13 @ 10:001025e9 - Halting
>> Code: 0 eflags: 00010002
>> eax: e0000800 ebx: 0000000f ecx: 00000201 edx: 0000000f
>> edi: e0000000 esi: 00000000 ebp: 0000000f esp: 00139df4
>
> Hello Scott,
> Could you send me your whole boot log?
>
> Are you getting the Unexpected Exception errors in the same place every
> boot? Or, is it in a different spot each time?
>
>
Wow it looks like you are getting pretty far in the boot process, 
congrats :-)  I think there may be something wrong with how the MTRRs 
are setup. I think you are supposed to have more than one variable MTRR?

My suggestion would be to get inteltool working on the board, and then 
you can tell what the MTRRs look like with the vender bios and compare 
it with your code. I hope that helps.

-- 
Thanks,
Joseph Smith
Set-Top-Linux
www.settoplinux.org



From joe at settoplinux.org  Tue Dec  1 03:30:58 2009
From: joe at settoplinux.org (Joseph Smith)
Date: Mon, 30 Nov 2009 21:30:58 -0500
Subject: [coreboot] Atom platform porting problem.
In-Reply-To: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA6jOdvE8B10euZwBFkqOwOgEAAAAA@quanmax.com>
References: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA6jOdvE8B10euZwBFkqOwOgEAAAAA@quanmax.com>
Message-ID: <4B147FE2.6020301@settoplinux.org>

On 11/30/2009 03:29 AM, Scott.Hsiao wrote:
> I am porting coreboot to a Intel Atom based mainboard which incorperate
> atom (N270) + 945GSE + it8718f.
> The initial progress of north bridge seems okay but I got error in the
> "dev_initialize" function.
> Here are the partial output:
> ....
> Initializing devices...
> Root Device init
> APIC_CLUSTER: 0 init
> malloc Enter, size 91, free_mem_ptr 0013b998
> malloc 0013b998
> start_eip=0x0000a000, offset=0x00100000, code_size=0x0000005b
> Initializing SMM handler... ... pmbase = 0x0500
> SMI_STS: PM1
> PM1_STS: WAK PWRBTN TMROF
> GPE0_STS:
> TCO_STS:
> ... raise SMI#
> Initializing CPU #0
> CPU: vendor Intel device 106c2
> CPU: family 06, model 1c, stepping 02
> Using generic cpu ops (good)
> Enabling cache
> microcode_info: sig = 0x000106c2 pf=0x00000004 rev = 0x00000000
> CPU: Intel(R) Core(TM) CPU N270 @ 1.60GHz.
> Setting fixed MTRRs(0-88) Type: UC
> Setting fixed MTRRs(0-16) Type: WB
> Setting fixed MTRRs(24-88) Type: WB
> DONE fixed MTRRs
> call enable_fixed_mtrr()
> Setting variable MTRR 0, base: 0MB, range: 512MB, type WB
> ADDRESS_MASK_HIGH=0xf
> Unexpected Exception: 13 @ 10:001025e9 - Halting
> Code: 0 eflags: 00010002
> eax: e0000800 ebx: 0000000f ecx: 00000201 edx: 0000000f
> edi: e0000000 esi: 00000000 ebp: 0000000f esp: 00139df4

Hello Scott,
Could you send me your whole boot log?

Are you getting the Unexpected Exception errors in the same place every 
boot? Or, is it in a different spot each time?


-- 
Thanks,
Joseph Smith
Set-Top-Linux
www.settoplinux.org



From svn at coreboot.org  Tue Dec  1 04:22:17 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue,  1 Dec 2009 04:22:17 +0100
Subject: [coreboot] [commit] r4969 - trunk/src/superio/smsc/smscsuperio
Message-ID: <mailman.4069.1355071658.16123.coreboot@coreboot.org>

Author: zbao
Date: 2009-12-01 04:22:16 +0100 (Tue, 01 Dec 2009)
New Revision: 4969

Modified:
   trunk/src/superio/smsc/smscsuperio/superio.c
Log:
Trivial. SCH4304 and SCH4307 have the same device id.

Signed-off-by: Zheng Bao <zheng.bao at amd.com>
Acked-by: Peter Stuge <peter at stuge.se>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>



Modified: trunk/src/superio/smsc/smscsuperio/superio.c
===================================================================
--- trunk/src/superio/smsc/smscsuperio/superio.c	2009-11-30 23:53:06 UTC (rev 4968)
+++ trunk/src/superio/smsc/smscsuperio/superio.c	2009-12-01 03:22:16 UTC (rev 4969)
@@ -61,7 +61,7 @@
 #define SCH3112		0x7c
 #define SCH5307		0x81	/* Rebranded LPC47B397(?) */
 #define SCH5027D	0x89
-#define SCH4304		0x90	/* SCH4304 */
+#define SCH4304		0x90	/* SCH4304, SCH4307 */
 
 /* Register defines */
 #define DEVICE_ID_REG	0x20	/* Device ID register */




From mylesgw at gmail.com  Tue Dec  1 04:34:13 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 30 Nov 2009 20:34:13 -0700
Subject: [coreboot] Atom platform porting problem.
In-Reply-To: <4B148505.4020401@settoplinux.org>
References: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA9D3Nb7Z7m0KdAnNM+uNHfQEAAAAA@quanmax.com>
	<4B148505.4020401@settoplinux.org>
Message-ID: <8215B592BA51403DBF73A91965D0FD70@chimp>


> >> DONE fixed MTRRs
> >> call enable_fixed_mtrr()
> >> Setting variable MTRR 0, base: 0MB, range: 512MB, type WB
> >> ADDRESS_MASK_HIGH=0xf Unexpected Exception: 13 @ 10:001025e9 - Halting
> >> Code: 0 eflags: 00010002
> >> eax: e0000800 ebx: 0000000f ecx: 00000201 edx: 0000000f
> >> edi: e0000000 esi: 00000000 ebp: 0000000f esp: 00139df4
The register contents look like they are from setting the MTRR, so I'd think
the problem was there.

It seems like some processors don't like having too many bits of the MTRRs
set.  I would suggest hacking it so that it doesn't set the upper bits to
see if that makes a difference.

Thanks,
Myles




From mansoor at iwavesystems.com  Tue Dec  1 06:37:07 2009
From: mansoor at iwavesystems.com (Mansoor)
Date: Tue, 1 Dec 2009 11:07:07 +0530
Subject: [coreboot] Atom platform porting problem.
In-Reply-To: <8215B592BA51403DBF73A91965D0FD70@chimp>
Message-ID: <200912010538.nB15cpdM010343@mail.iwavesystems.com>

Hi Scott,

I am also working on Intel atom based platform.
I got the same problem
Please try to change the following line 
	/* Setup MTRRs */
	x86_setup_mtrrs(36);

to 

	/* Setup MTRRs */
	x86_setup_mtrrs(32);

Atom support only 32 bit address lines



> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Myles Watson
> Sent: Tuesday, December 01, 2009 9:04 AM
> To: 'Scott.Hsiao'; 'coreboot'
> Subject: Re: [coreboot] Atom platform porting problem.
> 
> 
> > >> DONE fixed MTRRs
> > >> call enable_fixed_mtrr()
> > >> Setting variable MTRR 0, base: 0MB, range: 512MB, type WB
> > >> ADDRESS_MASK_HIGH=0xf Unexpected Exception: 13 @ 10:001025e9 -
> Halting
> > >> Code: 0 eflags: 00010002
> > >> eax: e0000800 ebx: 0000000f ecx: 00000201 edx: 0000000f
> > >> edi: e0000000 esi: 00000000 ebp: 0000000f esp: 00139df4
> The register contents look like they are from setting the MTRR, so I'd
> think
> the problem was there.
> 
> It seems like some processors don't like having too many bits of the MTRRs
> set.  I would suggest hacking it so that it doesn't set the upper bits to
> see if that makes a difference.
> 
> Thanks,
> Myles
> 
> 
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
> 
> --------------------------------------------------------------------------
> -----
> DISCLAIMER: This e-mail and any attachment (s) is for authorised use by
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> confidential
> information and/or be subject to the legal privilege of iWave Systems
> Technologies Private Limited. If you have received this message in error,
> please notify the originator immediately. If you are not the intended
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> you
> for your co-operation.
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------------------------------------------------------------------------------- 
DISCLAIMER: This e-mail and any attachment (s) is for authorised use by the
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Technologies Private Limited. If you have received this message in error,
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From scott.hsiao at quanmax.com  Tue Dec  1 09:09:04 2009
From: scott.hsiao at quanmax.com (Scott.Hsiao)
Date: Tue, 1 Dec 2009 16:09:04 +0800
Subject: [coreboot] Atom platform porting problem.
In-Reply-To: <200912010538.nB15cpdM010343@mail.iwavesystems.com>
Message-ID: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAAjgAPe94vbUidpe4DTi1SkgEAAAAA@quanmax.com>

Hi! Mansoor,
It works after adding your patch.
Now coreboot can go on to load the payload (and die XD) and this is just a
second time trial build.
Seems like I have more work to do now.

Thank you to  everyone. 

Scott Hsiao 

-----Original Message-----
From: Mansoor [mailto:mansoor at iwavesystems.com] 
Sent: Tuesday, December 01, 2009 1:37 PM
To: 'Myles Watson'; 'Scott.Hsiao'; 'coreboot'
Subject: RE: [coreboot] Atom platform porting problem.

Hi Scott,

I am also working on Intel atom based platform.
I got the same problem
Please try to change the following line 
	/* Setup MTRRs */
	x86_setup_mtrrs(36);

to 

	/* Setup MTRRs */
	x86_setup_mtrrs(32);

Atom support only 32 bit address lines



> -----Original Message-----
> From: coreboot-bounces at coreboot.org 
> [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Myles Watson
> Sent: Tuesday, December 01, 2009 9:04 AM
> To: 'Scott.Hsiao'; 'coreboot'
> Subject: Re: [coreboot] Atom platform porting problem.
> 
> 
> > >> DONE fixed MTRRs
> > >> call enable_fixed_mtrr()
> > >> Setting variable MTRR 0, base: 0MB, range: 512MB, type WB 
> > >> ADDRESS_MASK_HIGH=0xf Unexpected Exception: 13 @ 10:001025e9 -
> Halting
> > >> Code: 0 eflags: 00010002
> > >> eax: e0000800 ebx: 0000000f ecx: 00000201 edx: 0000000f
> > >> edi: e0000000 esi: 00000000 ebp: 0000000f esp: 00139df4
> The register contents look like they are from setting the MTRR, so I'd 
> think the problem was there.
> 
> It seems like some processors don't like having too many bits of the 
> MTRRs set.  I would suggest hacking it so that it doesn't set the 
> upper bits to see if that makes a difference.
> 
> Thanks,
> Myles
> 
> 
> --
> coreboot mailing list: coreboot at coreboot.org 
> http://www.coreboot.org/mailman/listinfo/coreboot
> 
> ----------------------------------------------------------------------
> ----
> -----
> DISCLAIMER: This e-mail and any attachment (s) is for authorised use 
> by the intended recipient (s) only. It may contain proprietary 
> material, confidential information and/or be subject to the legal 
> privilege of iWave Systems Technologies Private Limited. If you have 
> received this message in error, please notify the originator 
> immediately. If you are not the intended recipient, you are notified 
> that you are strictly prohibited from retaining, using, copying, 
> alerting or disclosing the content of this message. Thank you for your 
> co-operation.
> ----------------------------------------------------------------------
> ----
> ----


----------------------------------------------------------------------------
---
DISCLAIMER: This e-mail and any attachment (s) is for authorised use by the
intended recipient (s) only. It may contain proprietary material,
confidential information and/or be subject to the legal privilege of iWave
Systems Technologies Private Limited. If you have received this message in
error, please notify the originator immediately. If you are not the intended
recipient, you are notified that you are strictly prohibited from retaining,
using, copying, alerting or disclosing the content of this message. Thank
you for your co-operation. 
----------------------------------------------------------------------------
--






From svn at coreboot.org  Tue Dec  1 09:15:38 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue,  1 Dec 2009 09:15:38 +0100
Subject: [coreboot] [commit] r4970 - trunk/src/cpu/intel/model_106cx
Message-ID: <mailman.4070.1355071658.16123.coreboot@coreboot.org>

Author: stepan
Date: 2009-12-01 09:15:38 +0100 (Tue, 01 Dec 2009)
New Revision: 4970

Modified:
   trunk/src/cpu/intel/model_106cx/model_106cx_init.c
Log:
Atom only supports 32bit MTRRs (trivial)
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>



Modified: trunk/src/cpu/intel/model_106cx/model_106cx_init.c
===================================================================
--- trunk/src/cpu/intel/model_106cx/model_106cx_init.c	2009-12-01 03:22:16 UTC (rev 4969)
+++ trunk/src/cpu/intel/model_106cx/model_106cx_init.c	2009-12-01 08:15:38 UTC (rev 4970)
@@ -181,7 +181,7 @@
 #endif
 
 	/* Setup MTRRs */
-	x86_setup_mtrrs(36);
+	x86_setup_mtrrs(32);
 	x86_mtrr_check();
 
 #if CONFIG_USBDEBUG_DIRECT




From svn at coreboot.org  Tue Dec  1 10:35:20 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue,  1 Dec 2009 10:35:20 +0100
Subject: [coreboot] [commit] r4971 - trunk/src/arch/i386/init
Message-ID: <mailman.4071.1355071658.16123.coreboot@coreboot.org>

Author: oxygene
Date: 2009-12-01 10:35:19 +0100 (Tue, 01 Dec 2009)
New Revision: 4971

Modified:
   trunk/src/arch/i386/init/ldscript_fallback_cbfs.lb
Log:
Not all boards cope with automatically sized bootblocks, leading to 4GB
images due to the "helpful" 4GB rollover behaviour of ld(1).

Back out r4961, something like this should go in eventually, but more
completely tested and working.

Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>


Modified: trunk/src/arch/i386/init/ldscript_fallback_cbfs.lb
===================================================================
--- trunk/src/arch/i386/init/ldscript_fallback_cbfs.lb	2009-12-01 08:15:38 UTC (rev 4970)
+++ trunk/src/arch/i386/init/ldscript_fallback_cbfs.lb	2009-12-01 09:35:19 UTC (rev 4971)
@@ -40,10 +40,8 @@
 	_x = .;
 	. = (_x < (CONFIG_ROMBASE - 0x10000 +  CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 +  CONFIG_ROM_IMAGE_SIZE) : _x;
 
-	__my_rom_start = .; 
-
 	/* This section might be better named .setup */
-	.rom _myrom : {
+	.rom . : {
 		_rom = .;
 		*(.rom.text);
 		*(.rom.data);
@@ -56,7 +54,6 @@
 	}
 
 	_lrom = LOADADDR(.rom);
-
 	_elrom = LOADADDR(.rom) + SIZEOF(.rom);
 
 	/DISCARD/ : {
@@ -65,13 +62,4 @@
 		*(.comment.*)
 		*(.note.*)
 	}
-
-	__my_rom_end = .; 
-
-	__my_rom_size = (( ( __my_rom_end - __my_rom_start ) / 256) + 2 ) * 256; 
-	/* Next line gives same output for me as above one but causes
-	 * ld to complain about non constant offset so
-	__my_rom_size = (( (SIZEOF(.rom) + SIZEOF(.data) + SIZEOF(.text)) / 256 ) + 2 ) * 256;
-	*/
-	_myrom = _rom + (0x10000 - __my_rom_size);
 }




From maciej.pijanka at gmail.com  Tue Dec  1 15:24:53 2009
From: maciej.pijanka at gmail.com (Maciej Pijanka)
Date: Tue, 1 Dec 2009 15:24:53 +0100
Subject: [coreboot] ldscript_fallback_cbs.lb and 4G files
Message-ID: <20091201142453.GA2204@debshine>

Hello

Sorry for troubles caused by my ldscript patch that triggered slightly
misbehaviour resulting in 4GB image files in abuild. I didn't noticed
such behaviour on my machine and thats why i send it to ML.

I created separated from ld way to reuse space in top 64k not used by bootblock
patch in attachment. Only missing thing in this patch would be option to enable
firing script that calculates size that can be claimed and adjusting gapsize
so it might be disabled by default.

Signed-off: Maciej Pijanka <maciej.pijanka at gmail.com>
(or should i add Blames-To: also?)

best regards
Maciej

-- 
Maciej Pijanka
reg. Linux user #133161
-------------- next part --------------
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From svn at coreboot.org  Tue Dec  1 15:49:58 2009
From: svn at coreboot.org (coreboot)
Date: Tue, 01 Dec 2009 14:49:58 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
Message-ID: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------
 A vanilla build of r4971 appears to hang at the "Decompressing Coreboot to
 Ram" message when run on the Zoom DB800 development board.

 After tearing this down, it appears that the code pre "call
 cbfs_and_run_core" (and post done_cache_as ram_main) in cache_as_ram.inc
 for the geode appears to have gained some code from the crt0.S.lb generic
 i386 infrastructure.

 From the end of "done_cache_as_ram_main" to the point of calling
 cbfs_and_run_core appears to attempt to "reset" the stack after flushing
 the cache.

 This causes the subsequent calls to printk_debug() (or related functions)
 to fail.

 (CONSOLE_DEBUG_TX_STRING would also appear to not clean up after itself)

 Solution is to leave the stack as is until the copy to ram has completed.

 Patch attached as tested working on Zoom AMD DB800 board, 256MB of RAM,
 1024k Flash (SST 49LF008A).

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149>
coreboot <http://www.coreboot.org/>


From svn at coreboot.org  Tue Dec  1 16:54:40 2009
From: svn at coreboot.org (coreboot)
Date: Tue, 01 Dec 2009 15:54:40 -0000
Subject: [coreboot] #150: AMD DB800 dev board PLL strapping leaves CPU and
 GLIU in non-optimal clock
Message-ID: <063.1bf80aa307df34e55edca10b821df311@coreboot.org>

#150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  enhancement                  |         Status:  new     
   Priority:  minor                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------
 The AMD DB800 board PLL strappings are left open as supplied, and leave
 the CPU/Memory in the sub-optimal 400MHz CPU,266MHz GLIU configuration.
 This requires a manual PLL strapping to achieve 500Mhz CPU and 400MHz GLIU
 as is normally used in the dev-kits (and the commercial GeodeRom).
 These are the correct (manual) strappings for a DB800:
 #define PLLMSRhi 0x000005DD
 #define PLLMSRlo 0x00DE60EE
 Patch attached.

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/150>
coreboot <http://www.coreboot.org/>


From svn at coresystems.de  Tue Dec  1 15:38:39 2009
From: svn at coresystems.de (coresystems autobuild service)
Date: Tue, 01 Dec 2009 15:38:39 +0100
Subject: [coreboot] KBuild Report [r4971]
Message-ID: <4b152a6f.pd+HC42VUit1h8S8%svn@coresystems.de>

[1/116] a-trend/atc-6220 ok.
Processing mainboard/a-trend/atc-6220 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[2/116] a-trend/atc-6240 ok.
Processing mainboard/a-trend/atc-6240 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[3/116] abit/be6-ii_v2_0 ok.
Processing mainboard/abit/be6-ii_v2_0 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[4/116] advantech/pcm-5820 ok.
Processing mainboard/advantech/pcm-5820 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[5/116] amd/db800 ok.
Processing mainboard/amd/db800 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 4;
+CONFIG_IRQ_SLOT_COUNT = 6;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[6/116] amd/dbm690t ok.
Processing mainboard/amd/dbm690t (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/amd/dbm690t/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[7/116] amd/norwich ok.
Processing mainboard/amd/norwich (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[8/116] amd/pistachio ok.
Processing mainboard/amd/pistachio (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/amd/pistachio/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[9/116] amd/rumba ok.
Processing mainboard/amd/rumba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[10/116] amd/serengeti_cheetah ok.
Processing mainboard/amd/serengeti_cheetah (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/amd/serengeti_cheetah/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_ACPI_SSDTX_NUM = 1;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[11/116] amd/serengeti_cheetah_fam10 fail.
[12/116] arima/hdama ok.
Processing mainboard/arima/hdama (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/arima/hdama/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[13/116] artecgroup/dbe61 ok.
Processing mainboard/artecgroup/dbe61 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[14/116] asi/mb_5blgp ok.
Processing mainboard/asi/mb_5blgp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[15/116] asi/mb_5blmp ok.
Processing mainboard/asi/mb_5blmp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GENERATE_MP_TABLE = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[16/116] asus/a8n_e ok.
Processing mainboard/asus/a8n_e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/asus/a8n_e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 819200;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_SIZE = 32768;
+CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[17/116] asus/a8v-e_se ok.
Processing mainboard/asus/a8v-e_se (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HEAP_SIZE = 262144;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[18/116] asus/m2v-mx_se ok.
Processing mainboard/asus/m2v-mx_se (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/asus/m2v-mx_se/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 12s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 32505856;
+CONFIG_RAMBASE = 1048576;
-CONFIG_RAMTOP = 33554432;
+CONFIG_RAMTOP = 2097152;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[19/116] asus/mew-am ok.
Processing mainboard/asus/mew-am (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[20/116] asus/mew-vm ok.
Processing mainboard/asus/mew-vm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[21/116] asus/p2b-d ok.
Processing mainboard/asus/p2b-d (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[22/116] asus/p2b-ds ok.
Processing mainboard/asus/p2b-ds (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

+CONFIG_AGP_APERTURE_SIZE = 67108864;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_ADDR_BITS = 36;
+CONFIG_CPU_ADDR_BITS = 40;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 786432;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_ID_SECTION_OFFSET = 16;
+CONFIG_ID_SECTION_OFFSET = 128;
-CONFIG_IRQ_SLOT_COUNT = 7;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 33114;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4163;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MEM_TRAIN_SEQ = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 262144;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_USE_DCACHE_RAM = 1;
-CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[23/116] asus/p2b-f ok.
Processing mainboard/asus/p2b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[24/116] asus/p2b ok.
Processing mainboard/asus/p2b (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[25/116] asus/p3b-f ok.
Processing mainboard/asus/p3b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[26/116] axus/tc320 ok.
Processing mainboard/axus/tc320 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[27/116] azza/pt-6ibd ok.
Processing mainboard/azza/pt-6ibd (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[28/116] bcom/winnet100 ok.
Processing mainboard/bcom/winnet100 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[29/116] bcom/winnetp680 ok.
Processing mainboard/bcom/winnetp680 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/bcom/winnetp680/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[30/116] biostar/m6tba ok.
Processing mainboard/biostar/m6tba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[31/116] broadcom/blast ok.
Processing mainboard/broadcom/blast (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[32/116] compaq/deskpro_en_sff_p600 ok.
Processing mainboard/compaq/deskpro_en_sff_p600 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[33/116] dell/s1850 ok.
Processing mainboard/dell/s1850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 1;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SSE = 1;
-CONFIG_TTYS0_BAUD = 19200;
+CONFIG_TTYS0_BAUD = 115200;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[34/116] digitallogic/adl855pc ok.
Processing mainboard/digitallogic/adl855pc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[35/116] digitallogic/msm586seg ok.
Processing mainboard/digitallogic/msm586seg (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/digitallogic/msm586seg/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_SC520 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 262144;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[36/116] digitallogic/msm800sev ok.
Processing mainboard/digitallogic/msm800sev (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 7;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[37/116] eaglelion/5bcm ok.
Processing mainboard/eaglelion/5bcm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[38/116] emulation/qemu-x86 ok.
Processing mainboard/emulation/qemu-x86 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/emulation/qemu-x86/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_EMULATION_QEMU_X86 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 585728;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 1;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[39/116] gigabyte/ga-6bxc ok.
Processing mainboard/gigabyte/ga-6bxc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 6;
+CONFIG_IRQ_SLOT_COUNT = 5;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[40/116] gigabyte/ga_2761gxdk ok.
Processing mainboard/gigabyte/ga_2761gxdk (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/gigabyte/ga_2761gxdk/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[41/116] gigabyte/m57sli ok.
Processing mainboard/gigabyte/m57sli (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/gigabyte/m57sli/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[42/116] hp/dl145_g3 ok.
Processing mainboard/hp/dl145_g3 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[43/116] hp/e_vectra_p2706t ok.
Processing mainboard/hp/e_vectra_p2706t (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[44/116] ibm/e325 ok.
Processing mainboard/ibm/e325 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[45/116] ibm/e326 ok.
Processing mainboard/ibm/e326 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/ibm/e326/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[46/116] iei/juki-511p ok.
Processing mainboard/iei/juki-511p (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/iei/juki-511p/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[47/116] iei/nova4899r ok.
Processing mainboard/iei/nova4899r (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[48/116] iei/pcisa-lx-800-r10 ok.
Processing mainboard/iei/pcisa-lx-800-r10 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[49/116] intel/d945gclf fail.
[50/116] intel/eagleheights ok.
Processing mainboard/intel/eagleheights (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_CORE2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 18;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[51/116] intel/jarrell ok.
Processing mainboard/intel/jarrell (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 18;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_REBOOT_CNT = 8;
+CONFIG_MAX_REBOOT_CNT = 3;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[52/116] intel/mtarvon ok.
Processing mainboard/intel/mtarvon (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[53/116] intel/truxton ok.
Processing mainboard/intel/truxton (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_EP80579 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[54/116] intel/xe7501devkit ok.
Processing mainboard/intel/xe7501devkit (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 36s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[55/116] iwill/dk8_htx ok.
Processing mainboard/iwill/dk8_htx (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/iwill/dk8_htx/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 802816;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_SIZE = 49152;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 524288;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[56/116] iwill/dk8s2 ok.
Processing mainboard/iwill/dk8s2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 12;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[57/116] iwill/dk8x ok.
Processing mainboard/iwill/dk8x (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[58/116] jetway/j7f24 ok.
Processing mainboard/jetway/j7f24 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/jetway/j7f24/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[59/116] kontron/986lcd-m ok.
Processing mainboard/kontron/986lcd-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/kontron/986lcd-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[60/116] kontron/kt690 ok.
Processing mainboard/kontron/kt690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/kontron/kt690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[61/116] lippert/frontrunner ok.
Processing mainboard/lippert/frontrunner (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[62/116] lippert/roadrunner-lx ok.
Processing mainboard/lippert/roadrunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[63/116] lippert/spacerunner-lx ok.
Processing mainboard/lippert/spacerunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[64/116] mitac/6513wu ok.
Processing mainboard/mitac/6513wu (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[65/116] msi/ms6119 ok.
Processing mainboard/msi/ms6119 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[66/116] msi/ms6147 ok.
Processing mainboard/msi/ms6147 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[67/116] msi/ms6156 ok.
Processing mainboard/msi/ms6156 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[68/116] msi/ms6178 ok.
Processing mainboard/msi/ms6178 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_UDELAY_IO = 0;
+CONFIG_UDELAY_IO = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[69/116] msi/ms7135 fail.
[70/116] msi/ms7260 ok.
Processing mainboard/msi/ms7260 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/msi/ms7260/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[71/116] msi/ms9185 ok.
Processing mainboard/msi/ms9185 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/msi/ms9185/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[72/116] msi/ms9282 ok.
Processing mainboard/msi/ms9282 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/msi/ms9282/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[73/116] nec/powermate2000 ok.
Processing mainboard/nec/powermate2000 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[74/116] newisys/khepri ok.
Processing mainboard/newisys/khepri (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[75/116] nvidia/l1_2pvv ok.
Processing mainboard/nvidia/l1_2pvv (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/nvidia/l1_2pvv/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[76/116] olpc/btest ok.
Processing mainboard/olpc/btest (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[77/116] olpc/rev_a ok.
Processing mainboard/olpc/rev_a (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[78/116] pcengines/alix1c ok.
Processing mainboard/pcengines/alix1c (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[79/116] rca/rm4100 ok.
Processing mainboard/rca/rm4100 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/rca/rm4100/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[80/116] soyo/sy-6ba-plus-iii ok.
Processing mainboard/soyo/sy-6ba-plus-iii (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[81/116] sunw/ultra40 ok.
Processing mainboard/sunw/ultra40 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[82/116] supermicro/h8dme ok.
Processing mainboard/supermicro/h8dme (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/supermicro/h8dme/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[83/116] supermicro/h8dmr ok.
Processing mainboard/supermicro/h8dmr (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/supermicro/h8dmr/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[84/116] supermicro/h8dmr_fam10 fail.
[85/116] supermicro/x6dai_g ok.
Processing mainboard/supermicro/x6dai_g (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[86/116] supermicro/x6dhe_g fail.
[87/116] supermicro/x6dhe_g2 fail.
[88/116] supermicro/x6dhr_ig ok.
Processing mainboard/supermicro/x6dhr_ig (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[89/116] supermicro/x6dhr_ig2 ok.
Processing mainboard/supermicro/x6dhr_ig2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[90/116] technexion/tim5690 ok.
Processing mainboard/technexion/tim5690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/technexion/tim5690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[91/116] technexion/tim8690 ok.
Processing mainboard/technexion/tim8690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/technexion/tim8690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[92/116] technologic/ts5300 fail.
[93/116] televideo/tc7020 ok.
Processing mainboard/televideo/tc7020 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[94/116] thomson/ip1000 ok.
Processing mainboard/thomson/ip1000 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/thomson/ip1000/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[95/116] tyan/s1846 ok.
Processing mainboard/tyan/s1846 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[96/116] tyan/s2735 ok.
Processing mainboard/tyan/s2735 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SSE = 1;
-CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[97/116] tyan/s2850 ok.
Processing mainboard/tyan/s2850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[98/116] tyan/s2875 ok.
Processing mainboard/tyan/s2875 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[99/116] tyan/s2880 ok.
Processing mainboard/tyan/s2880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 13;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[100/116] tyan/s2881 ok.
Processing mainboard/tyan/s2881 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[101/116] tyan/s2882 ok.
Processing mainboard/tyan/s2882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 15;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[102/116] tyan/s2885 ok.
Processing mainboard/tyan/s2885 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 11;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[103/116] tyan/s2891 ok.
Processing mainboard/tyan/s2891 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/tyan/s2891/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[104/116] tyan/s2892 ok.
Processing mainboard/tyan/s2892 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/tyan/s2892/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[105/116] tyan/s2895 ok.
Processing mainboard/tyan/s2895 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/tyan/s2895/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[106/116] tyan/s2912 ok.
Processing mainboard/tyan/s2912 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/tyan/s2912/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[107/116] tyan/s2912_fam10 fail.
[108/116] tyan/s4880 ok.
Processing mainboard/tyan/s4880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[109/116] tyan/s4882 ok.
Processing mainboard/tyan/s4882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 8192;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[110/116] via/epia-cn ok.
Processing mainboard/via/epia-cn (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/via/epia-cn/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[111/116] via/epia-m ok.
Processing mainboard/via/epia-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/via/epia-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[112/116] via/epia-m700 fail.
[113/116] via/epia-n ok.
Processing mainboard/via/epia-n (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/via/epia-n/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CN400_VIDEO_MB_128MB = 0;
+CONFIG_CN400_VIDEO_MB_16MB = 0;
+CONFIG_CN400_VIDEO_MB_32MB = 1;
+CONFIG_CN400_VIDEO_MB_64MB = 0;
+CONFIG_CN400_VIDEO_MB_8MB = 0;
+CONFIG_CN400_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[114/116] via/epia ok.
Processing mainboard/via/epia (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[115/116] via/pc2500e ok.
Processing mainboard/via/pc2500e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4971/targets/via/pc2500e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 18s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_OPTION_TABLE = 1;
+CONFIG_USE_OPTION_TABLE = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[116/116] via/vt8454c fail.



From patrick at georgi-clan.de  Tue Dec  1 18:55:30 2009
From: patrick at georgi-clan.de (Patrick Georgi)
Date: Tue, 01 Dec 2009 18:55:30 +0100
Subject: [coreboot] [PATCH]eliminate some noise in compareboard
Message-ID: <4B155892.9000009@georgi-clan.de>

Hi,

attached patch eliminates some noise in the output of compareboard 
(which will show up every couple commits on this list now).
Some variables do not exist in kconfig if they're irrelevant to the 
configuration at hands.

The patch hides AMD K8/Fam10h-specific variables on non-K8/Fam10h 
boards. Currently they appear as "only in oldstyle build".
There's more to do, this is just the first step.
Once the remaining differences in configuration are done away with, 
Kconfig and newconfig should be functionally equivalent on working boards.


Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
-------------- next part --------------
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Name: 20091201-1-eliminate-some-noise-in-compareboard
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20091201/39b25812/attachment.ksh>

From peter at stuge.se  Tue Dec  1 19:07:49 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 1 Dec 2009 19:07:49 +0100
Subject: [coreboot] [PATCH]eliminate some noise in compareboard
In-Reply-To: <4B155892.9000009@georgi-clan.de>
References: <4B155892.9000009@georgi-clan.de>
Message-ID: <20091201180749.11161.qmail@stuge.se>

Patrick Georgi wrote:
> attached patch eliminates some noise in the output of compareboard
>
> Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>

Acked-by: Peter Stuge <peter at stuge.se>



From svn at coreboot.org  Tue Dec  1 19:19:42 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue,  1 Dec 2009 19:19:42 +0100
Subject: [coreboot] [commit] r4972 - trunk/util/compareboard
Message-ID: <mailman.4072.1355071658.16123.coreboot@coreboot.org>

Author: oxygene
Date: 2009-12-01 19:19:42 +0100 (Tue, 01 Dec 2009)
New Revision: 4972

Modified:
   trunk/util/compareboard/compareboard
Log:
Eliminate some noise in the output of compareboard on non-K8/Fam10h boards

Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: trunk/util/compareboard/compareboard
===================================================================
--- trunk/util/compareboard/compareboard	2009-12-01 09:35:19 UTC (rev 4971)
+++ trunk/util/compareboard/compareboard	2009-12-01 18:19:42 UTC (rev 4972)
@@ -23,6 +23,21 @@
 sort coreboot-builds/$BOARDPATH/fallback/ldoptions > $A/old
 sort build/ldoptions > $A/new
 
+if [ `grep -c "^CONFIG_NORTHBRIDGE_AMD" $A/new` -eq 0 ]; then
+	sed \
+		-e "/^CONFIG_C[BD]B / d" \
+		-e "/^CONFIG_AMDMCT / d" \
+		-e "/^CONFIG_HT3_SUPPORT / d" \
+		-e "/^CONFIG_HT_CHAIN_UNITID_BASE / d" \
+		-e "/^CONFIG_HT_CHAIN_END_UNITID_BASE / d" \
+		-e "/^CONFIG_K8_HT_FREQ_1G_SUPPORT / d" \
+		-e "/^CONFIG_K8_MEM_BANK_B_ONLY / d" \
+		-e "/^CONFIG_MEM_TRAIN_SEQ / d" \
+		-e "/^CONFIG_SB_HT_CHAIN_ON_BUS0 / d" \
+		-e "/^CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY / d" \
+		$A/old > $A/old.tmp && mv $A/old.tmp $A/old
+fi
+
 sed \
 	-e "/^CONFIG_CONSOLE_/ d" \
 	-e "/^CONFIG_RESET_/ d" \




From svn at coreboot.org  Tue Dec  1 19:23:36 2009
From: svn at coreboot.org (coreboot)
Date: Tue, 01 Dec 2009 18:23:36 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.d9e8a75b2feea315203fc0c3351875a6@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by marcj303@?):

 Sorry, I don't understand why moving the stack is a problem. Does that
 stack not work at that location? Have you done some stack push/pop tests
 or other memory tests?

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:1>
coreboot <http://www.coreboot.org/>


From svn at coresystems.de  Tue Dec  1 21:01:08 2009
From: svn at coresystems.de (coresystems autobuild service)
Date: Tue, 01 Dec 2009 21:01:08 +0100
Subject: [coreboot] KBuild Report [r4972]
Message-ID: <4b157604.Xo2AK2DzFXY98G+M%svn@coresystems.de>

[1/116] a-trend/atc-6220 ok.
Processing mainboard/a-trend/atc-6220 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[2/116] a-trend/atc-6240 ok.
Processing mainboard/a-trend/atc-6240 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[3/116] abit/be6-ii_v2_0 ok.
Processing mainboard/abit/be6-ii_v2_0 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[4/116] advantech/pcm-5820 ok.
Processing mainboard/advantech/pcm-5820 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[5/116] amd/db800 ok.
Processing mainboard/amd/db800 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 4;
+CONFIG_IRQ_SLOT_COUNT = 6;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[6/116] amd/dbm690t ok.
Processing mainboard/amd/dbm690t (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/amd/dbm690t/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[7/116] amd/norwich ok.
Processing mainboard/amd/norwich (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[8/116] amd/pistachio ok.
Processing mainboard/amd/pistachio (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/amd/pistachio/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[9/116] amd/rumba ok.
Processing mainboard/amd/rumba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[10/116] amd/serengeti_cheetah ok.
Processing mainboard/amd/serengeti_cheetah (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/amd/serengeti_cheetah/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_ACPI_SSDTX_NUM = 1;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[11/116] amd/serengeti_cheetah_fam10 fail.
[12/116] arima/hdama ok.
Processing mainboard/arima/hdama (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/arima/hdama/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[13/116] artecgroup/dbe61 ok.
Processing mainboard/artecgroup/dbe61 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[14/116] asi/mb_5blgp ok.
Processing mainboard/asi/mb_5blgp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[15/116] asi/mb_5blmp ok.
Processing mainboard/asi/mb_5blmp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GENERATE_MP_TABLE = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[16/116] asus/a8n_e ok.
Processing mainboard/asus/a8n_e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/asus/a8n_e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 819200;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_SIZE = 32768;
+CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[17/116] asus/a8v-e_se ok.
Processing mainboard/asus/a8v-e_se (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HEAP_SIZE = 262144;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[18/116] asus/m2v-mx_se ok.
Processing mainboard/asus/m2v-mx_se (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/asus/m2v-mx_se/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 12s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 32505856;
+CONFIG_RAMBASE = 1048576;
-CONFIG_RAMTOP = 33554432;
+CONFIG_RAMTOP = 2097152;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[19/116] asus/mew-am ok.
Processing mainboard/asus/mew-am (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[20/116] asus/mew-vm ok.
Processing mainboard/asus/mew-vm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[21/116] asus/p2b-d ok.
Processing mainboard/asus/p2b-d (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[22/116] asus/p2b-ds ok.
Processing mainboard/asus/p2b-ds (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

+CONFIG_AGP_APERTURE_SIZE = 67108864;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_ADDR_BITS = 36;
+CONFIG_CPU_ADDR_BITS = 40;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 786432;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_ID_SECTION_OFFSET = 16;
+CONFIG_ID_SECTION_OFFSET = 128;
-CONFIG_IRQ_SLOT_COUNT = 7;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 33114;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4163;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MEM_TRAIN_SEQ = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 262144;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_USE_DCACHE_RAM = 1;
-CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[23/116] asus/p2b-f ok.
Processing mainboard/asus/p2b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[24/116] asus/p2b ok.
Processing mainboard/asus/p2b (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[25/116] asus/p3b-f ok.
Processing mainboard/asus/p3b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[26/116] axus/tc320 ok.
Processing mainboard/axus/tc320 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[27/116] azza/pt-6ibd ok.
Processing mainboard/azza/pt-6ibd (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[28/116] bcom/winnet100 ok.
Processing mainboard/bcom/winnet100 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[29/116] bcom/winnetp680 ok.
Processing mainboard/bcom/winnetp680 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/bcom/winnetp680/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[30/116] biostar/m6tba ok.
Processing mainboard/biostar/m6tba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[31/116] broadcom/blast ok.
Processing mainboard/broadcom/blast (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[32/116] compaq/deskpro_en_sff_p600 ok.
Processing mainboard/compaq/deskpro_en_sff_p600 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[33/116] dell/s1850 ok.
Processing mainboard/dell/s1850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 1;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_TTYS0_BAUD = 19200;
+CONFIG_TTYS0_BAUD = 115200;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[34/116] digitallogic/adl855pc ok.
Processing mainboard/digitallogic/adl855pc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[35/116] digitallogic/msm586seg ok.
Processing mainboard/digitallogic/msm586seg (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/digitallogic/msm586seg/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_AMD_SC520 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 262144;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[36/116] digitallogic/msm800sev ok.
Processing mainboard/digitallogic/msm800sev (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 7;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[37/116] eaglelion/5bcm ok.
Processing mainboard/eaglelion/5bcm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[38/116] emulation/qemu-x86 ok.
Processing mainboard/emulation/qemu-x86 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/emulation/qemu-x86/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_EMULATION_QEMU_X86 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 585728;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 1;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[39/116] gigabyte/ga-6bxc ok.
Processing mainboard/gigabyte/ga-6bxc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 6;
+CONFIG_IRQ_SLOT_COUNT = 5;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[40/116] gigabyte/ga_2761gxdk ok.
Processing mainboard/gigabyte/ga_2761gxdk (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/gigabyte/ga_2761gxdk/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[41/116] gigabyte/m57sli ok.
Processing mainboard/gigabyte/m57sli (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/gigabyte/m57sli/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[42/116] hp/dl145_g3 ok.
Processing mainboard/hp/dl145_g3 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[43/116] hp/e_vectra_p2706t ok.
Processing mainboard/hp/e_vectra_p2706t (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[44/116] ibm/e325 ok.
Processing mainboard/ibm/e325 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 18s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[45/116] ibm/e326 ok.
Processing mainboard/ibm/e326 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/ibm/e326/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[46/116] iei/juki-511p ok.
Processing mainboard/iei/juki-511p (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/iei/juki-511p/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[47/116] iei/nova4899r ok.
Processing mainboard/iei/nova4899r (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[48/116] iei/pcisa-lx-800-r10 ok.
Processing mainboard/iei/pcisa-lx-800-r10 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[49/116] intel/d945gclf fail.
[50/116] intel/eagleheights ok.
Processing mainboard/intel/eagleheights (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 18s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 18;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[51/116] intel/jarrell ok.
Processing mainboard/intel/jarrell (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 18;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_REBOOT_CNT = 8;
+CONFIG_MAX_REBOOT_CNT = 3;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[52/116] intel/mtarvon ok.
Processing mainboard/intel/mtarvon (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[53/116] intel/truxton ok.
Processing mainboard/intel/truxton (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_EP80579 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[54/116] intel/xe7501devkit ok.
Processing mainboard/intel/xe7501devkit (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[55/116] iwill/dk8_htx ok.
Processing mainboard/iwill/dk8_htx (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/iwill/dk8_htx/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 802816;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_SIZE = 49152;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 524288;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[56/116] iwill/dk8s2 ok.
Processing mainboard/iwill/dk8s2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 12;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[57/116] iwill/dk8x ok.
Processing mainboard/iwill/dk8x (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[58/116] jetway/j7f24 ok.
Processing mainboard/jetway/j7f24 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/jetway/j7f24/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[59/116] kontron/986lcd-m ok.
Processing mainboard/kontron/986lcd-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/kontron/986lcd-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[60/116] kontron/kt690 ok.
Processing mainboard/kontron/kt690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/kontron/kt690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[61/116] lippert/frontrunner ok.
Processing mainboard/lippert/frontrunner (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[62/116] lippert/roadrunner-lx ok.
Processing mainboard/lippert/roadrunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[63/116] lippert/spacerunner-lx ok.
Processing mainboard/lippert/spacerunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[64/116] mitac/6513wu ok.
Processing mainboard/mitac/6513wu (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[65/116] msi/ms6119 ok.
Processing mainboard/msi/ms6119 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[66/116] msi/ms6147 ok.
Processing mainboard/msi/ms6147 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[67/116] msi/ms6156 ok.
Processing mainboard/msi/ms6156 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[68/116] msi/ms6178 ok.
Processing mainboard/msi/ms6178 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_UDELAY_IO = 0;
+CONFIG_UDELAY_IO = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[69/116] msi/ms7135 fail.
[70/116] msi/ms7260 ok.
Processing mainboard/msi/ms7260 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/msi/ms7260/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[71/116] msi/ms9185 ok.
Processing mainboard/msi/ms9185 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/msi/ms9185/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[72/116] msi/ms9282 ok.
Processing mainboard/msi/ms9282 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/msi/ms9282/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[73/116] nec/powermate2000 ok.
Processing mainboard/nec/powermate2000 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[74/116] newisys/khepri ok.
Processing mainboard/newisys/khepri (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[75/116] nvidia/l1_2pvv ok.
Processing mainboard/nvidia/l1_2pvv (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/nvidia/l1_2pvv/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[76/116] olpc/btest ok.
Processing mainboard/olpc/btest (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[77/116] olpc/rev_a ok.
Processing mainboard/olpc/rev_a (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[78/116] pcengines/alix1c ok.
Processing mainboard/pcengines/alix1c (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[79/116] rca/rm4100 ok.
Processing mainboard/rca/rm4100 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/rca/rm4100/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[80/116] soyo/sy-6ba-plus-iii ok.
Processing mainboard/soyo/sy-6ba-plus-iii (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[81/116] sunw/ultra40 ok.
Processing mainboard/sunw/ultra40 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[82/116] supermicro/h8dme ok.
Processing mainboard/supermicro/h8dme (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/supermicro/h8dme/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[83/116] supermicro/h8dmr ok.
Processing mainboard/supermicro/h8dmr (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/supermicro/h8dmr/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[84/116] supermicro/h8dmr_fam10 fail.
[85/116] supermicro/x6dai_g ok.
Processing mainboard/supermicro/x6dai_g (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[86/116] supermicro/x6dhe_g fail.
[87/116] supermicro/x6dhe_g2 fail.
[88/116] supermicro/x6dhr_ig ok.
Processing mainboard/supermicro/x6dhr_ig (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[89/116] supermicro/x6dhr_ig2 ok.
Processing mainboard/supermicro/x6dhr_ig2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[90/116] technexion/tim5690 ok.
Processing mainboard/technexion/tim5690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/technexion/tim5690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[91/116] technexion/tim8690 ok.
Processing mainboard/technexion/tim8690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/technexion/tim8690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[92/116] technologic/ts5300 fail.
[93/116] televideo/tc7020 ok.
Processing mainboard/televideo/tc7020 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[94/116] thomson/ip1000 ok.
Processing mainboard/thomson/ip1000 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/thomson/ip1000/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[95/116] tyan/s1846 ok.
Processing mainboard/tyan/s1846 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[96/116] tyan/s2735 ok.
Processing mainboard/tyan/s2735 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SSE = 1;
-CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[97/116] tyan/s2850 ok.
Processing mainboard/tyan/s2850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[98/116] tyan/s2875 ok.
Processing mainboard/tyan/s2875 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[99/116] tyan/s2880 ok.
Processing mainboard/tyan/s2880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 13;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[100/116] tyan/s2881 ok.
Processing mainboard/tyan/s2881 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[101/116] tyan/s2882 ok.
Processing mainboard/tyan/s2882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 15;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[102/116] tyan/s2885 ok.
Processing mainboard/tyan/s2885 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 11;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[103/116] tyan/s2891 ok.
Processing mainboard/tyan/s2891 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/tyan/s2891/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[104/116] tyan/s2892 ok.
Processing mainboard/tyan/s2892 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/tyan/s2892/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[105/116] tyan/s2895 ok.
Processing mainboard/tyan/s2895 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/tyan/s2895/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[106/116] tyan/s2912 ok.
Processing mainboard/tyan/s2912 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/tyan/s2912/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[107/116] tyan/s2912_fam10 fail.
[108/116] tyan/s4880 ok.
Processing mainboard/tyan/s4880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[109/116] tyan/s4882 ok.
Processing mainboard/tyan/s4882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 8192;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[110/116] via/epia-cn ok.
Processing mainboard/via/epia-cn (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/via/epia-cn/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[111/116] via/epia-m ok.
Processing mainboard/via/epia-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/via/epia-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[112/116] via/epia-m700 fail.
[113/116] via/epia-n ok.
Processing mainboard/via/epia-n (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/via/epia-n/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN400_VIDEO_MB_128MB = 0;
+CONFIG_CN400_VIDEO_MB_16MB = 0;
+CONFIG_CN400_VIDEO_MB_32MB = 1;
+CONFIG_CN400_VIDEO_MB_64MB = 0;
+CONFIG_CN400_VIDEO_MB_8MB = 0;
+CONFIG_CN400_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[114/116] via/epia ok.
Processing mainboard/via/epia (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[115/116] via/pc2500e ok.
Processing mainboard/via/pc2500e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4972/targets/via/pc2500e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_OPTION_TABLE = 1;
+CONFIG_USE_OPTION_TABLE = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[116/116] via/vt8454c fail.



From libv at skynet.be  Wed Dec  2 00:36:49 2009
From: libv at skynet.be (Luc Verhaegen)
Date: Wed, 2 Dec 2009 00:36:49 +0100
Subject: [coreboot] We have a FOSDEM DevRoom!
Message-ID: <20091201233649.GA28217@skynet.be>

The kind FOSDEM organizers have given us a DevRoom on saturday the 6th 
of February, as requested.

We got room AW.124, in the AW building on the other side of the campus 
road from the main building. A "smallish" room at 60 seats, the perfect 
size for coreboot, and we will have like a window for ventilation and 
such, which is a nice luxury.

Some key european developers are already coming; Carl-Daniel Hailfinger, 
Peter Stuge and Rudolf Marek, and i hope many more will spend a bit of  
time and a bit of money (FOSDEM is all free, but travel costs money) on 
coming to the greatest open source event in europe.

We have a total of 6 slots available, two of which should be filled with 
an "introductory" talk about coreboot and one about flashrom. 
Introductory here means "this is what $project is, and now we dive 
straight into the gory details." So there are 4 more which i would like 
to see filled up in the next month.

The page where fosdem info will be kept for coreboot is:

http://www.coreboot.org/FOSDEM_2010

Hope to see many of you there!

Luc Verhaegen.



From rminnich at gmail.com  Wed Dec  2 00:43:52 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 1 Dec 2009 15:43:52 -0800
Subject: [coreboot] [flashrom] We have a FOSDEM DevRoom!
In-Reply-To: <20091201233649.GA28217@skynet.be>
References: <20091201233649.GA28217@skynet.be>
Message-ID: <13426df10912011543q3b41dc7bh408ee6068170b4b@mail.gmail.com>

Wonderful work! I really envy you guys going to FOSDEM -- it is a
really great meeting.

ron



From libv at skynet.be  Wed Dec  2 01:17:43 2009
From: libv at skynet.be (Luc Verhaegen)
Date: Wed, 2 Dec 2009 01:17:43 +0100
Subject: [coreboot] We have a FOSDEM DevRoom!
In-Reply-To: <13426df10912011543q3b41dc7bh408ee6068170b4b@mail.gmail.com>
References: <20091201233649.GA28217@skynet.be>
	<13426df10912011543q3b41dc7bh408ee6068170b4b@mail.gmail.com>
Message-ID: <20091202001742.GB28207@skynet.be>

On Tue, Dec 01, 2009 at 03:43:52PM -0800, ron minnich wrote:
> Wonderful work! I really envy you guys going to FOSDEM -- it is a
> really great meeting.
> 
> ron

Ah, too bad that you're not able to make it this year. I watched your 
excellent talk there in 2007.

Oh, and how do people here feel about getting together with X.org folk 
in some great restaurant with belgian cooking (le mirabelle) 500ms from 
FOSDEM on saturday evening?

Luc Verhaegen



From c-d.hailfinger.devel.2006 at gmx.net  Wed Dec  2 01:13:18 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 02 Dec 2009 01:13:18 +0100
Subject: [coreboot] [flashrom] We have a FOSDEM DevRoom!
In-Reply-To: <20091201233649.GA28217@skynet.be>
References: <20091201233649.GA28217@skynet.be>
Message-ID: <4B15B11E.1070309@gmx.net>

On 02.12.2009 00:36, Luc Verhaegen wrote:
> The kind FOSDEM organizers have given us a DevRoom on saturday the 6th 
> of February, as requested.
>   

Thanks a lot for organizing this, Luc!


> We have a total of 6 slots available, two of which should be filled with 
> an "introductory" talk about coreboot and one about flashrom. 
> Introductory here means "this is what $project is, and now we dive 
> straight into the gory details." So there are 4 more which i would like 
> to see filled up in the next month.
>   

Possible topics from me (time requirements vary, I'm pretty flexible in
that regard):
- Writing a flashrom driver for your favourite programmer (can do in 15
minutes or less).
- Hands-on flash chip programming (one flash chip and one cheap
home-built programmer for interested participants). Could be combined
with the topic above for a "Total Flashrom Experience(tm)".
- Managing user emergency support and development (flashrom is one of
the most dangerous-to-working-computer projects out there). Mostly a
management talk about how to deal with desperate users and nonconforming
hardware without getting a black eye. Not really my favourite topic, but
if there is overwhelming demand, I can do.
- Using flashrom to detect BIOS rootkits and other nasty stuff living in
your BIOS chip (with demo and background).

I gave the BIOS rootkit detection talk at 0sec conference in Berne and
OpenExpo in Z?rich (with quite a lot of audience participation each
time), tailored for the needs of each event. Depending on what the
audience expects, I will come up with some new stuff and adjust the main
focus of that talk on the security aspect or the real-world problems
faced by this task.

It would be great if someone else who is involved in flashrom
development right now could fill one of the slots. With Luc tackling the
flash enable stuff, I can either cover one of the topics I mentioned
above or give a general introductory flashrom talk. Cooperative talks
are an option for me as well.

Oh, and we need all the external programmers supported by flashrom for
display purposes. (Photos are also acceptable, but being able to show
the real stuff is so much more exciting for the audience.)

Regards,
Carl-Daniel

-- 
Developer quote of the month: 
"We are juggling too many chainsaws and flaming arrows and tigers."




From libv at skynet.be  Wed Dec  2 01:22:58 2009
From: libv at skynet.be (Luc Verhaegen)
Date: Wed, 2 Dec 2009 01:22:58 +0100
Subject: [coreboot] [flashrom] We have a FOSDEM DevRoom!
In-Reply-To: <4B15B11E.1070309@gmx.net>
References: <20091201233649.GA28217@skynet.be> <4B15B11E.1070309@gmx.net>
Message-ID: <20091202002258.GB28903@skynet.be>

On Wed, Dec 02, 2009 at 01:13:18AM +0100, Carl-Daniel Hailfinger wrote:
> On 02.12.2009 00:36, Luc Verhaegen wrote:
> > The kind FOSDEM organizers have given us a DevRoom on saturday the 6th 
> > of February, as requested.
> >   
> 
> Thanks a lot for organizing this, Luc!
> 
> 
> > We have a total of 6 slots available, two of which should be filled with 
> > an "introductory" talk about coreboot and one about flashrom. 
> > Introductory here means "this is what $project is, and now we dive 
> > straight into the gory details." So there are 4 more which i would like 
> > to see filled up in the next month.
> >   
> 
> Possible topics from me (time requirements vary, I'm pretty flexible in
> that regard):
> - Writing a flashrom driver for your favourite programmer (can do in 15
> minutes or less).
> - Hands-on flash chip programming (one flash chip and one cheap
> home-built programmer for interested participants). Could be combined
> with the topic above for a "Total Flashrom Experience(tm)".
> - Managing user emergency support and development (flashrom is one of
> the most dangerous-to-working-computer projects out there). Mostly a
> management talk about how to deal with desperate users and nonconforming
> hardware without getting a black eye. Not really my favourite topic, but
> if there is overwhelming demand, I can do.
> - Using flashrom to detect BIOS rootkits and other nasty stuff living in
> your BIOS chip (with demo and background).
> 
> I gave the BIOS rootkit detection talk at 0sec conference in Berne and
> OpenExpo in Z?rich (with quite a lot of audience participation each
> time), tailored for the needs of each event. Depending on what the
> audience expects, I will come up with some new stuff and adjust the main
> focus of that talk on the security aspect or the real-world problems
> faced by this task.
> 
> It would be great if someone else who is involved in flashrom
> development right now could fill one of the slots. With Luc tackling the
> flash enable stuff, I can either cover one of the topics I mentioned
> above or give a general introductory flashrom talk. Cooperative talks
> are an option for me as well.
> 
> Oh, and we need all the external programmers supported by flashrom for
> display purposes. (Photos are also acceptable, but being able to show
> the real stuff is so much more exciting for the audience.)
> 
> Regards,
> Carl-Daniel

Well, i definitely want you to do the introductory flashrom talk. But on 
the other hand, the introductory part with flashrom is rather limited, 
after which you can go and delve deeper into one or several 
further topics that you mentioned.

Chances are that it gets filmed in HDTV and makes it onto phoronix.com.

And for showing off, maybe we should get a webcam along that we then can 
use to show hardware up close on the projector.

Luc Verhaegen.



From svn at coreboot.org  Wed Dec  2 06:43:50 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Wed,  2 Dec 2009 06:43:50 +0100
Subject: [coreboot] [commit] r4973 - in trunk/src: cpu/intel
	mainboard/intel/d945gclf
Message-ID: <mailman.4073.1355071659.16123.coreboot@coreboot.org>

Author: myles
Date: 2009-12-02 06:43:50 +0100 (Wed, 02 Dec 2009)
New Revision: 4973

Modified:
   trunk/src/cpu/intel/Makefile.inc
   trunk/src/mainboard/intel/d945gclf/Kconfig
Log:
Trivial fix for kconfig socket 441 (typo was 411) so that d945gclf builds.

Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Myles Watson <mylesgw at gmail.com>


Modified: trunk/src/cpu/intel/Makefile.inc
===================================================================
--- trunk/src/cpu/intel/Makefile.inc	2009-12-01 18:19:42 UTC (rev 4972)
+++ trunk/src/cpu/intel/Makefile.inc	2009-12-02 05:43:50 UTC (rev 4973)
@@ -3,7 +3,7 @@
 #
 # Therefore: ONLY include Makefile.inc from socket directories!
 
-subdirs-$(CONFIG_CPU_INTEL_SOCKET_411) += socket_411
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_441) += socket_441
 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += bga956
 subdirs-$(CONFIG_CPU_INTEL_EP80579) += ep80579
 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478

Modified: trunk/src/mainboard/intel/d945gclf/Kconfig
===================================================================
--- trunk/src/mainboard/intel/d945gclf/Kconfig	2009-12-01 18:19:42 UTC (rev 4972)
+++ trunk/src/mainboard/intel/d945gclf/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
@@ -21,7 +21,7 @@
 	bool "D945GCLF"
 	select ARCH_X86
 	select CPU_INTEL_CORE
-	select CPU_INTEL_SOCKET_411
+	select CPU_INTEL_SOCKET_441
 	select NORTHBRIDGE_INTEL_I945
 	select SOUTHBRIDGE_INTEL_I82801GX
 	select SUPERIO_SMSC_LPC47M15X




From svn at coresystems.de  Wed Dec  2 08:25:40 2009
From: svn at coresystems.de (coresystems autobuild service)
Date: Wed, 02 Dec 2009 08:25:40 +0100
Subject: [coreboot] KBuild Report [r4973]
Message-ID: <4b161674.yelMe6Rwwb/ar99X%svn@coresystems.de>

[1/116] a-trend/atc-6220 ok.
Processing mainboard/a-trend/atc-6220 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[2/116] a-trend/atc-6240 ok.
Processing mainboard/a-trend/atc-6240 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[3/116] abit/be6-ii_v2_0 ok.
Processing mainboard/abit/be6-ii_v2_0 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[4/116] advantech/pcm-5820 ok.
Processing mainboard/advantech/pcm-5820 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[5/116] amd/db800 ok.
Processing mainboard/amd/db800 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 4;
+CONFIG_IRQ_SLOT_COUNT = 6;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[6/116] amd/dbm690t ok.
Processing mainboard/amd/dbm690t (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/amd/dbm690t/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[7/116] amd/norwich ok.
Processing mainboard/amd/norwich (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[8/116] amd/pistachio ok.
Processing mainboard/amd/pistachio (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/amd/pistachio/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[9/116] amd/rumba ok.
Processing mainboard/amd/rumba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[10/116] amd/serengeti_cheetah ok.
Processing mainboard/amd/serengeti_cheetah (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/amd/serengeti_cheetah/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_ACPI_SSDTX_NUM = 1;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[11/116] amd/serengeti_cheetah_fam10 fail.
[12/116] arima/hdama ok.
Processing mainboard/arima/hdama (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/arima/hdama/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[13/116] artecgroup/dbe61 ok.
Processing mainboard/artecgroup/dbe61 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[14/116] asi/mb_5blgp ok.
Processing mainboard/asi/mb_5blgp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[15/116] asi/mb_5blmp ok.
Processing mainboard/asi/mb_5blmp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GENERATE_MP_TABLE = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[16/116] asus/a8n_e ok.
Processing mainboard/asus/a8n_e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/asus/a8n_e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 819200;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_SIZE = 32768;
+CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[17/116] asus/a8v-e_se ok.
Processing mainboard/asus/a8v-e_se (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HEAP_SIZE = 262144;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[18/116] asus/m2v-mx_se ok.
Processing mainboard/asus/m2v-mx_se (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/asus/m2v-mx_se/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 12s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 32505856;
+CONFIG_RAMBASE = 1048576;
-CONFIG_RAMTOP = 33554432;
+CONFIG_RAMTOP = 2097152;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[19/116] asus/mew-am ok.
Processing mainboard/asus/mew-am (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[20/116] asus/mew-vm ok.
Processing mainboard/asus/mew-vm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[21/116] asus/p2b-d ok.
Processing mainboard/asus/p2b-d (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[22/116] asus/p2b-ds ok.
Processing mainboard/asus/p2b-ds (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

+CONFIG_AGP_APERTURE_SIZE = 67108864;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_ADDR_BITS = 36;
+CONFIG_CPU_ADDR_BITS = 40;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 786432;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_ID_SECTION_OFFSET = 16;
+CONFIG_ID_SECTION_OFFSET = 128;
-CONFIG_IRQ_SLOT_COUNT = 7;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 33114;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4163;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MEM_TRAIN_SEQ = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 262144;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_USE_DCACHE_RAM = 1;
-CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[23/116] asus/p2b-f ok.
Processing mainboard/asus/p2b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[24/116] asus/p2b ok.
Processing mainboard/asus/p2b (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[25/116] asus/p3b-f ok.
Processing mainboard/asus/p3b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[26/116] axus/tc320 ok.
Processing mainboard/axus/tc320 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[27/116] azza/pt-6ibd ok.
Processing mainboard/azza/pt-6ibd (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[28/116] bcom/winnet100 ok.
Processing mainboard/bcom/winnet100 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[29/116] bcom/winnetp680 ok.
Processing mainboard/bcom/winnetp680 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/bcom/winnetp680/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[30/116] biostar/m6tba ok.
Processing mainboard/biostar/m6tba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[31/116] broadcom/blast ok.
Processing mainboard/broadcom/blast (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[32/116] compaq/deskpro_en_sff_p600 ok.
Processing mainboard/compaq/deskpro_en_sff_p600 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[33/116] dell/s1850 ok.
Processing mainboard/dell/s1850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 1;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_TTYS0_BAUD = 19200;
+CONFIG_TTYS0_BAUD = 115200;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[34/116] digitallogic/adl855pc ok.
Processing mainboard/digitallogic/adl855pc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[35/116] digitallogic/msm586seg ok.
Processing mainboard/digitallogic/msm586seg (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/digitallogic/msm586seg/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_AMD_SC520 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 262144;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[36/116] digitallogic/msm800sev ok.
Processing mainboard/digitallogic/msm800sev (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 7;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[37/116] eaglelion/5bcm ok.
Processing mainboard/eaglelion/5bcm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[38/116] emulation/qemu-x86 ok.
Processing mainboard/emulation/qemu-x86 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/emulation/qemu-x86/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_EMULATION_QEMU_X86 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 585728;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 1;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[39/116] gigabyte/ga-6bxc ok.
Processing mainboard/gigabyte/ga-6bxc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 6;
+CONFIG_IRQ_SLOT_COUNT = 5;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[40/116] gigabyte/ga_2761gxdk ok.
Processing mainboard/gigabyte/ga_2761gxdk (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/gigabyte/ga_2761gxdk/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[41/116] gigabyte/m57sli ok.
Processing mainboard/gigabyte/m57sli (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/gigabyte/m57sli/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[42/116] hp/dl145_g3 ok.
Processing mainboard/hp/dl145_g3 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[43/116] hp/e_vectra_p2706t ok.
Processing mainboard/hp/e_vectra_p2706t (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[44/116] ibm/e325 ok.
Processing mainboard/ibm/e325 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[45/116] ibm/e326 ok.
Processing mainboard/ibm/e326 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/ibm/e326/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[46/116] iei/juki-511p ok.
Processing mainboard/iei/juki-511p (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/iei/juki-511p/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[47/116] iei/nova4899r ok.
Processing mainboard/iei/nova4899r (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[48/116] iei/pcisa-lx-800-r10 ok.
Processing mainboard/iei/pcisa-lx-800-r10 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[49/116] intel/d945gclf ok.
Processing mainboard/intel/d945gclf (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/intel/d945gclf/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 4293754880;
+CONFIG_DCACHE_RAM_BASE = 4292837376;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294920448;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GENERATE_ACPI_TABLES = 1;
+CONFIG_GENERATE_ACPI_TABLES = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_INIT_TIMER = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HAVE_SMI_HANDLER = 1;
+CONFIG_HAVE_SMI_HANDLER = 0;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 17996;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 32902;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[50/116] intel/eagleheights ok.
Processing mainboard/intel/eagleheights (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 18;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[51/116] intel/jarrell ok.
Processing mainboard/intel/jarrell (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 35s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 18;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_REBOOT_CNT = 8;
+CONFIG_MAX_REBOOT_CNT = 3;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[52/116] intel/mtarvon ok.
Processing mainboard/intel/mtarvon (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[53/116] intel/truxton ok.
Processing mainboard/intel/truxton (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_EP80579 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[54/116] intel/xe7501devkit ok.
Processing mainboard/intel/xe7501devkit (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 37s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[55/116] iwill/dk8_htx ok.
Processing mainboard/iwill/dk8_htx (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/iwill/dk8_htx/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 802816;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_SIZE = 49152;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 524288;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[56/116] iwill/dk8s2 ok.
Processing mainboard/iwill/dk8s2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 12;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[57/116] iwill/dk8x ok.
Processing mainboard/iwill/dk8x (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[58/116] jetway/j7f24 ok.
Processing mainboard/jetway/j7f24 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/jetway/j7f24/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[59/116] kontron/986lcd-m ok.
Processing mainboard/kontron/986lcd-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/kontron/986lcd-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[60/116] kontron/kt690 ok.
Processing mainboard/kontron/kt690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/kontron/kt690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[61/116] lippert/frontrunner ok.
Processing mainboard/lippert/frontrunner (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[62/116] lippert/roadrunner-lx ok.
Processing mainboard/lippert/roadrunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[63/116] lippert/spacerunner-lx ok.
Processing mainboard/lippert/spacerunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[64/116] mitac/6513wu ok.
Processing mainboard/mitac/6513wu (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[65/116] msi/ms6119 ok.
Processing mainboard/msi/ms6119 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[66/116] msi/ms6147 ok.
Processing mainboard/msi/ms6147 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[67/116] msi/ms6156 ok.
Processing mainboard/msi/ms6156 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[68/116] msi/ms6178 ok.
Processing mainboard/msi/ms6178 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_UDELAY_IO = 0;
+CONFIG_UDELAY_IO = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[69/116] msi/ms7135 fail.
[70/116] msi/ms7260 ok.
Processing mainboard/msi/ms7260 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/msi/ms7260/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[71/116] msi/ms9185 ok.
Processing mainboard/msi/ms9185 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/msi/ms9185/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[72/116] msi/ms9282 ok.
Processing mainboard/msi/ms9282 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/msi/ms9282/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[73/116] nec/powermate2000 ok.
Processing mainboard/nec/powermate2000 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[74/116] newisys/khepri ok.
Processing mainboard/newisys/khepri (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[75/116] nvidia/l1_2pvv ok.
Processing mainboard/nvidia/l1_2pvv (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/nvidia/l1_2pvv/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[76/116] olpc/btest ok.
Processing mainboard/olpc/btest (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[77/116] olpc/rev_a ok.
Processing mainboard/olpc/rev_a (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[78/116] pcengines/alix1c ok.
Processing mainboard/pcengines/alix1c (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[79/116] rca/rm4100 ok.
Processing mainboard/rca/rm4100 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/rca/rm4100/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[80/116] soyo/sy-6ba-plus-iii ok.
Processing mainboard/soyo/sy-6ba-plus-iii (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[81/116] sunw/ultra40 ok.
Processing mainboard/sunw/ultra40 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[82/116] supermicro/h8dme ok.
Processing mainboard/supermicro/h8dme (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/supermicro/h8dme/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[83/116] supermicro/h8dmr ok.
Processing mainboard/supermicro/h8dmr (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/supermicro/h8dmr/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[84/116] supermicro/h8dmr_fam10 fail.
[85/116] supermicro/x6dai_g ok.
Processing mainboard/supermicro/x6dai_g (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[86/116] supermicro/x6dhe_g fail.
[87/116] supermicro/x6dhe_g2 fail.
[88/116] supermicro/x6dhr_ig ok.
Processing mainboard/supermicro/x6dhr_ig (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[89/116] supermicro/x6dhr_ig2 ok.
Processing mainboard/supermicro/x6dhr_ig2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[90/116] technexion/tim5690 ok.
Processing mainboard/technexion/tim5690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/technexion/tim5690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[91/116] technexion/tim8690 ok.
Processing mainboard/technexion/tim8690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/technexion/tim8690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[92/116] technologic/ts5300 fail.
[93/116] televideo/tc7020 ok.
Processing mainboard/televideo/tc7020 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[94/116] thomson/ip1000 ok.
Processing mainboard/thomson/ip1000 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/thomson/ip1000/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[95/116] tyan/s1846 ok.
Processing mainboard/tyan/s1846 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[96/116] tyan/s2735 ok.
Processing mainboard/tyan/s2735 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SSE = 1;
-CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[97/116] tyan/s2850 ok.
Processing mainboard/tyan/s2850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[98/116] tyan/s2875 ok.
Processing mainboard/tyan/s2875 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[99/116] tyan/s2880 ok.
Processing mainboard/tyan/s2880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 13;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[100/116] tyan/s2881 ok.
Processing mainboard/tyan/s2881 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[101/116] tyan/s2882 ok.
Processing mainboard/tyan/s2882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 15;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[102/116] tyan/s2885 ok.
Processing mainboard/tyan/s2885 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 11;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[103/116] tyan/s2891 ok.
Processing mainboard/tyan/s2891 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/tyan/s2891/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[104/116] tyan/s2892 ok.
Processing mainboard/tyan/s2892 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/tyan/s2892/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[105/116] tyan/s2895 ok.
Processing mainboard/tyan/s2895 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/tyan/s2895/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[106/116] tyan/s2912 ok.
Processing mainboard/tyan/s2912 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/tyan/s2912/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[107/116] tyan/s2912_fam10 fail.
[108/116] tyan/s4880 ok.
Processing mainboard/tyan/s4880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[109/116] tyan/s4882 ok.
Processing mainboard/tyan/s4882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 8192;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[110/116] via/epia-cn ok.
Processing mainboard/via/epia-cn (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/via/epia-cn/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[111/116] via/epia-m ok.
Processing mainboard/via/epia-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/via/epia-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[112/116] via/epia-m700 fail.
[113/116] via/epia-n ok.
Processing mainboard/via/epia-n (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/via/epia-n/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN400_VIDEO_MB_128MB = 0;
+CONFIG_CN400_VIDEO_MB_16MB = 0;
+CONFIG_CN400_VIDEO_MB_32MB = 1;
+CONFIG_CN400_VIDEO_MB_64MB = 0;
+CONFIG_CN400_VIDEO_MB_8MB = 0;
+CONFIG_CN400_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[114/116] via/epia ok.
Processing mainboard/via/epia (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[115/116] via/pc2500e ok.
Processing mainboard/via/pc2500e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4973/targets/via/pc2500e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_OPTION_TABLE = 1;
+CONFIG_USE_OPTION_TABLE = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[116/116] via/vt8454c fail.



From svn at coreboot.org  Wed Dec  2 09:48:50 2009
From: svn at coreboot.org (coreboot)
Date: Wed, 02 Dec 2009 08:48:50 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.17598f28ea78284f6f6c0bdea2538163@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by edwin_beasant@?):

 Hi there:

 I've run both a ram test and also checked using push/pop - at least for
 basic operations, the stack seems to function fine at the new
 location.(including adding debug that writes raw to the serial port to
 effectively single step trace the problem).

 But:
 After the stack move to 0x400000, then all the previously functioning
 printk_* functions fail (as does the entire boot process, printk just is
 the first thing that occurs after the stack move).

 A similar failure also occurs if the stack is not moved, and the cache is
 invalided and written back (wbinvd at done_cache_as_ram_main:).
 (might be a candidate for trying mb instead).

 Hope this provides some more info.

 pre-stack move, printk and other functions are fine, post stack move use
 causes "hang".

 I've also been cautious of the CONSOLE_DEBUG_TX_STRING(), need to run some
 more tests to possibly bisect a little more.

 This code was pulled in as a lump with the CBFS transition, along with the
 interesting caveat that warned that this place was a good place to start!
 (trac search for geode and cbfs will show it)

 Any help appreciated: this patch is what works for me, consistently and
 reliably.

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:2>
coreboot <http://www.coreboot.org/>


From svn at coreboot.org  Wed Dec  2 13:17:22 2009
From: svn at coreboot.org (coreboot)
Date: Wed, 02 Dec 2009 12:17:22 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.350cee0ac4b17765e8fdf9ca0eef4366@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by hailfinger):

 Is there any reason to use coreboot v2 instead of v3 on the AMD DB800
 target?

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:3>
coreboot <http://www.coreboot.org/>


From svn at coreboot.org  Wed Dec  2 13:48:44 2009
From: svn at coreboot.org (coreboot)
Date: Wed, 02 Dec 2009 12:48:44 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.25d9b83e3eb2993035ff7d462a47f9d2@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by edwin_beasant@?):

 I was following the caveats on the front page of coreboot.org download
 page that most of coreboot v3 has been merged back to the coreboot main
 repository, and that coreboot v3 branch was now obselete?

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:4>
coreboot <http://www.coreboot.org/>


From daniel at caiaq.de  Wed Dec  2 14:26:04 2009
From: daniel at caiaq.de (Daniel Mack)
Date: Wed, 2 Dec 2009 14:26:04 +0100
Subject: [coreboot] coreboot-v3 vs coreboot
Message-ID: <20091202132604.GB14091@buzzloop.caiaq.de>

I'm sure this has been discussed on this list already, but I couldn't
find a comprehensive statement in the archives yet. If there is one, I
would be happy to be pointed there.

It seems that the coreboot-v3 tree has now been obsoleted by coreboot
and hasn't seen any update anymore since August 09. However, what
happend to the 'stable' branch doesn't seem to be a merge of all the
new shiny features. In paricular, I miss support there for ALIX2 boards.

So what's the verdict? Things should be ported now from v3 to stable?

Thanks,
Daniel




From daniel at caiaq.de  Wed Dec  2 14:18:30 2009
From: daniel at caiaq.de (Daniel Mack)
Date: Wed, 2 Dec 2009 14:18:30 +0100
Subject: [coreboot] GeodeLX RAM initialisation issue
Message-ID: <20091202131830.GA14091@buzzloop.caiaq.de>

(sorry I can't post a proper reply message, I picked that up from the
archives)

Nathan Williams <nathan at traverse.com.au> wrote:

> I am suspicious that the reset problem only occurs when I'm using a
> laptop hard drive off the 44pin IDE connector on our board. I have tried
> booting with a 3.5" drive and external 12V, but I can't replicate the
> problem. With the 3.5" drive, a reboot from fsck works fine. Hopefully
> the next PCB revision should perform better because we've moved the 5V
> plane further away from the DDR tracks.
> 
> I don't know if I mentioned another problem that has similar symptoms.
> Some RAM causes the same cache disable problem, even if there are no
> IDE devices connected. This happens from power-up, so it's not a reset
> issue.

I'm facing a very similar issue here on an ALIX.2D board which is based
on the same chipset. The problem happens to occur only sometimes, just
like you described it, and resetting from Linux gives a higher change of
provoking it. However, I also have once out of 20 power-up cycles as
well.

What's really strange about that is the fact that sometimes, not even
power cycling will fix it - coreboot will always ever stop at the same
point (from what I've traced, exactly at the same instructions that you
pointed out). Powering off and waiting for ~10 minutes likely brings the
board back to life.

Connecting or disconnecting extern IDE44 drives does not appear to
affect the probability, though. One more thing that bring some awareness
is that the effect is harder to trigger when booting from an external
LPC flash emulator (in contrast to coreboot flashed to the internal
LPC).

I urgently need to resolve that and would appreciate any more hints
about where to add more code for flushing caches and the like. I also
suspect the reset vector to not properly flush the hardware, but I'm
somewhat lost in this codebase I must admit, and Geode is also nothing
I'm terribly familiar with.

Thanks,
Daniel




From c-d.hailfinger.devel.2006 at gmx.net  Wed Dec  2 14:58:30 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 02 Dec 2009 14:58:30 +0100
Subject: [coreboot] coreboot-v3 vs coreboot
In-Reply-To: <20091202132604.GB14091@buzzloop.caiaq.de>
References: <20091202132604.GB14091@buzzloop.caiaq.de>
Message-ID: <4B167286.10009@gmx.net>

On 02.12.2009 14:26, Daniel Mack wrote:
> I'm sure this has been discussed on this list already, but I couldn't
> find a comprehensive statement in the archives yet. If there is one, I
> would be happy to be pointed there.
>
> It seems that the coreboot-v3 tree has now been obsoleted by coreboot
> and hasn't seen any update anymore since August 09. However, what
> happend to the 'stable' branch doesn't seem to be a merge of all the
> new shiny features. In paricular, I miss support there for ALIX2 boards.
>   

To summarize:
coreboot v3 is the branch you want to use for any GeodeLX target.

> So what's the verdict? Things should be ported now from v3 to stable?
>   

Sort of, yes. v2 is slowly getting some v3 features, but the GeodeLX
code is among the stuff not yet ported. Given that v3 works fine for a
lot of GeodeLX targets, there's no real motivation to backport that code.

Regards,
Carl-Daniel

-- 
Developer quote of the month: 
"We are juggling too many chainsaws and flaming arrows and tigers."




From peter at stuge.se  Wed Dec  2 14:59:01 2009
From: peter at stuge.se (Peter Stuge)
Date: Wed, 2 Dec 2009 14:59:01 +0100
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <20091202131830.GA14091@buzzloop.caiaq.de>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
Message-ID: <20091202135901.16894.qmail@stuge.se>

Daniel Mack wrote:
> the effect is harder to trigger when booting from an external LPC
> flash emulator (in contrast to coreboot flashed to the internal
> LPC).

Then you could experiment with a few different flash chips.

PC Engines makes a nice and neat Flash recovery board, which plugs
onto the LPC header, and comes with a PLCC chip in a socket.

http://pcengines.ch/lpc1a.htm

Order one or two of these, and order a few different flash chips
which are compatible with the board, and start collecting data
points.

Each LPC.1A comes with SST49LF040B. On the ALIX.2 and .3 there is an
AMIC flash chip. (Different from ALIX.1 which also has SST.)

You can also use Winbond W39V040APZ/080APZ. Note [0-9]A, it must not
be e.g. W39V040FAPZ (note [0-9]FA) which is a FWH chip.

Another compatible chip is PMC Pm49FL004T.


//Peter



From peter at stuge.se  Wed Dec  2 15:00:26 2009
From: peter at stuge.se (Peter Stuge)
Date: Wed, 2 Dec 2009 15:00:26 +0100
Subject: [coreboot] coreboot-v3 vs coreboot
In-Reply-To: <4B167286.10009@gmx.net>
References: <20091202132604.GB14091@buzzloop.caiaq.de> <4B167286.10009@gmx.net>
Message-ID: <20091202140026.17197.qmail@stuge.se>

Carl-Daniel Hailfinger wrote:
> Given that v3 works fine for a lot of GeodeLX targets, there's no
> real motivation to backport that code.

..just now. But it would be welcomed. Others are also interested in
getting the best of the Geode support in v3 into trunk.


//Peter



From svn at coreboot.org  Wed Dec  2 15:00:46 2009
From: svn at coreboot.org (coreboot)
Date: Wed, 02 Dec 2009 14:00:46 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.c6676f9c3e50cab619a566dfc1949fd5@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by hailfinger):

 v3 is obsolete in theory.
 However, if you have any GeodeLX target, v3 is the preferred branch
 because it works very well. v2 is not recommended for GeodeLX until
 someone ports all the v3 GeodeLX code to v2.

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:5>
coreboot <http://www.coreboot.org/>


From patrick at georgi-clan.de  Wed Dec  2 15:22:57 2009
From: patrick at georgi-clan.de (Patrick Georgi)
Date: Wed, 02 Dec 2009 15:22:57 +0100
Subject: [coreboot] [PATCH]Move VSA image to CBFS
Message-ID: <4B167841.7090504@georgi-clan.de>

Hi,

attached patch makes amd/model_lx systems load the VSA image from CBFS. 
There are some prerequisite steps necessary to convert it into a form 
that cbfstool can parse, that are not hooked up yet.
A very similar change should also do for model_gx2, which is currently 
non-functional due to a partial backport from v3.

The VSA postprocessing steps:
objcopy --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B 
i386 vsa.binary vsa.o
ld -e 0x60020 --section-start .data=0x60000 vsa.o -o vsa.elf

Then, after build, do
cbfstool coreboot.rom add-stage vsa.elf vsa l
to add it to the image.

I didn't test it myself, but got positive feedback on IRC.
Given that these steps aren't automated yet, it's not really meant for 
commit in this form. It can, and should, also be discussed if "stage" is 
the right type for the file - we might want to have a generic file 
header that includes a compression flag. I post it for reference, 
further testing, adaptation to gx2 by interested parties, etc.

Nonetheless, to clear up the status,
Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>


Patrick
-------------- next part --------------
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From peter at stuge.se  Wed Dec  2 15:34:21 2009
From: peter at stuge.se (Peter Stuge)
Date: Wed, 2 Dec 2009 15:34:21 +0100
Subject: [coreboot] [PATCH]Move VSA image to CBFS
In-Reply-To: <4B167841.7090504@georgi-clan.de>
References: <4B167841.7090504@georgi-clan.de>
Message-ID: <20091202143421.22573.qmail@stuge.se>

Patrick Georgi wrote:
> Given that these steps aren't automated yet, it's not really meant
> for commit in this form.

Sure it is.


> It can, and should, also be discussed if "stage" is the right type
> for the file

Maybe not. That's next.


> Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>

Acked-by: Peter Stuge <peter at stuge.se>



From daniel at caiaq.de  Wed Dec  2 15:44:15 2009
From: daniel at caiaq.de (Daniel Mack)
Date: Wed, 2 Dec 2009 15:44:15 +0100
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <20091202135901.16894.qmail@stuge.se>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
	<20091202135901.16894.qmail@stuge.se>
Message-ID: <20091202144415.GD14091@buzzloop.caiaq.de>

On Wed, Dec 02, 2009 at 02:59:01PM +0100, Peter Stuge wrote:
> Daniel Mack wrote:
> > the effect is harder to trigger when booting from an external LPC
> > flash emulator (in contrast to coreboot flashed to the internal
> > LPC).
> 
> Then you could experiment with a few different flash chips.
> 
> PC Engines makes a nice and neat Flash recovery board, which plugs
> onto the LPC header, and comes with a PLCC chip in a socket.

I doubt the flash chip itself is the problem. Might be I haven't been
totally clear about what I observed.

When using the Linux tools to flash an image to the internal LPC, the
system most likely won't come up immediately. I need that power-off
delay of some minutes to reanimate the board. After that, the bug is
very hard to trigger, even though it does happen, especially when
powering the device off (by unplugging the supply) and on again right
after that.

So my theory is that there is something left in any part of the system
which makes coreboot fail in disable_car(). And the same (or maybe just
a similar) effect is triggered when the LPC is written.

Does that ring a bell? As I said, I'm pretty lost in debugging this, but
I'm sure we're not having a hardware issue.

Thanks,
Daniel




From svn at coreboot.org  Wed Dec  2 17:00:38 2009
From: svn at coreboot.org (coreboot)
Date: Wed, 02 Dec 2009 16:00:38 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.d0fbf3615bd0a681556f16f478173d07@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by anonymous):

 Hmm. I did try v3 but had no luck getting it to build. I'll try harder.

 In the meantime, this patch does get you a working DB800 board....

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:6>
coreboot <http://www.coreboot.org/>


From svn at coreboot.org  Wed Dec  2 17:29:42 2009
From: svn at coreboot.org (coreboot)
Date: Wed, 02 Dec 2009 16:29:42 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.5429e67f090ff8825edc928d9ca8859f@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by hailfinger):

 Very odd. I just downloaded latest svn of v3, ran "make menuconfig",
 picked Mainboard->AMD-DB800, save&exit, ran "make" and got an image. Can
 you tell us about the error message you're seeing in the v3 build?

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:7>
coreboot <http://www.coreboot.org/>


From svn at coreboot.org  Wed Dec  2 22:11:13 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Wed,  2 Dec 2009 22:11:13 +0100
Subject: [coreboot] [commit] r4974 - in trunk/src/mainboard: .
	intel/d945gclf msi/ms7135 supermicro/x6dhe_g
	supermicro/x6dhe_g2 technologic/ts5300 tyan/s2912
	tyan/s2912_fam10 via/epia-m700 via/vt8454c
Message-ID: <mailman.4074.1355071659.16123.coreboot@coreboot.org>

Author: myles
Date: 2009-12-02 22:11:12 +0100 (Wed, 02 Dec 2009)
New Revision: 4974

Modified:
   trunk/src/mainboard/Kconfig
   trunk/src/mainboard/intel/d945gclf/Kconfig
   trunk/src/mainboard/msi/ms7135/Kconfig
   trunk/src/mainboard/supermicro/x6dhe_g/Kconfig
   trunk/src/mainboard/supermicro/x6dhe_g/Makefile.inc
   trunk/src/mainboard/supermicro/x6dhe_g2/Kconfig
   trunk/src/mainboard/supermicro/x6dhe_g2/Makefile.inc
   trunk/src/mainboard/technologic/ts5300/Kconfig
   trunk/src/mainboard/tyan/s2912/Kconfig
   trunk/src/mainboard/tyan/s2912_fam10/Kconfig
   trunk/src/mainboard/via/epia-m700/Makefile.inc
   trunk/src/mainboard/via/vt8454c/Makefile.inc
Log:
Trivial fixes for kconfig.  They fix all non-fam10 build failures.

Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Myles Watson <mylesgw at gmail.com>


Modified: trunk/src/mainboard/Kconfig
===================================================================
--- trunk/src/mainboard/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -210,6 +210,11 @@
 	default "Intel"
 	depends on VENDOR_INTEL
 
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+	hex
+	default 0x8086
+	depends on VENDOR_INTEL
+
 config MAINBOARD_VENDOR
 	string
 	default "IWILL"
@@ -240,6 +245,11 @@
 	default "MSI"
 	depends on VENDOR_MSI
 
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+	hex
+	default 0x1462
+	depends on VENDOR_MSI
+
 config MAINBOARD_VENDOR
 	string
 	default "NEC"

Modified: trunk/src/mainboard/intel/d945gclf/Kconfig
===================================================================
--- trunk/src/mainboard/intel/d945gclf/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/intel/d945gclf/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -65,6 +65,11 @@
 	default "D945GCLF"
 	depends on BOARD_INTEL_D945GCLF
 
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+	hex
+	default 0x464C
+	depends on BOARD_INTEL_D945GCLF
+
 config MMCONF_BASE_ADDRESS
 	hex
 	default 0xf0000000

Modified: trunk/src/mainboard/msi/ms7135/Kconfig
===================================================================
--- trunk/src/mainboard/msi/ms7135/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/msi/ms7135/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -24,7 +24,7 @@
 
 config MEM_TRAIN_SEQ
 	int
-	default 1
+	default 0
 	depends on BOARD_MSI_MS7135
 
 config SB_HT_CHAIN_ON_BUS0
@@ -49,7 +49,7 @@
 
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
 	hex
-	default 0x2895
+	default 0x7135
 	depends on BOARD_MSI_MS7135
 
 config HW_MEM_HOLE_SIZEK

Modified: trunk/src/mainboard/supermicro/x6dhe_g/Kconfig
===================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/supermicro/x6dhe_g/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -38,7 +38,7 @@
 
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
 	hex
-	default 0x6780
+	default 0x6080
 	depends on BOARD_SUPERMICRO_X6DHE_G
 
 config MAX_CPUS

Modified: trunk/src/mainboard/supermicro/x6dhe_g/Makefile.inc
===================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/Makefile.inc	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/supermicro/x6dhe_g/Makefile.inc	2009-12-02 21:11:12 UTC (rev 4974)
@@ -21,4 +21,5 @@
 ROMCCFLAGS=-mcpu=p4 -O2
 obj-$(CONFIG_HAVE_HARD_RESET) += reset.o
 include $(src)/mainboard/Makefile.romccboard.inc
+driver-y += ../../../drivers/generic/debug/debug_dev.o
 

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/Kconfig
===================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -38,7 +38,7 @@
 
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
 	hex
-	default 0x6780
+	default 0x6080
 	depends on BOARD_SUPERMICRO_X6DHE_G2
 
 config MAX_CPUS

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/Makefile.inc
===================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/Makefile.inc	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/Makefile.inc	2009-12-02 21:11:12 UTC (rev 4974)
@@ -21,4 +21,5 @@
 ROMCCFLAGS=-mcpu=p4 -O2
 obj-$(CONFIG_HAVE_HARD_RESET) += reset.o
 include $(src)/mainboard/Makefile.romccboard.inc
+driver-y += ../../../drivers/generic/debug/debug_dev.o
 

Modified: trunk/src/mainboard/technologic/ts5300/Kconfig
===================================================================
--- trunk/src/mainboard/technologic/ts5300/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/technologic/ts5300/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -20,3 +20,7 @@
 	default 2
 	depends on BOARD_TECHNOLOGIC_TS5300
 
+config HAVE_INIT_TIMER
+	bool
+	default n
+	depends on BOARD_TECHNOLOGIC_TS5300

Modified: trunk/src/mainboard/tyan/s2912/Kconfig
===================================================================
--- trunk/src/mainboard/tyan/s2912/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/tyan/s2912/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -132,11 +132,6 @@
 	default n
 	depends on BOARD_TYAN_S2912
 
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
-	hex
-	default 0x1022
-	depends on BOARD_TYAN_S2912
-
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
 	hex
 	default 0x2912

Modified: trunk/src/mainboard/tyan/s2912_fam10/Kconfig
===================================================================
--- trunk/src/mainboard/tyan/s2912_fam10/Kconfig	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/tyan/s2912_fam10/Kconfig	2009-12-02 21:11:12 UTC (rev 4974)
@@ -133,11 +133,6 @@
 	default n
 	depends on BOARD_TYAN_S2912_FAM10
 
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
-	hex
-	default 0x10f1
-	depends on BOARD_TYAN_S2912_FAM10
-
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
 	hex
 	default 0x2912

Modified: trunk/src/mainboard/via/epia-m700/Makefile.inc
===================================================================
--- trunk/src/mainboard/via/epia-m700/Makefile.inc	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/via/epia-m700/Makefile.inc	2009-12-02 21:11:12 UTC (rev 4974)
@@ -46,13 +46,9 @@
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
-	iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
-	mv dsdt.hex $@
-
 $(obj)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@

Modified: trunk/src/mainboard/via/vt8454c/Makefile.inc
===================================================================
--- trunk/src/mainboard/via/vt8454c/Makefile.inc	2009-12-02 05:43:50 UTC (rev 4973)
+++ trunk/src/mainboard/via/vt8454c/Makefile.inc	2009-12-02 21:11:12 UTC (rev 4974)
@@ -42,11 +42,11 @@
 
 ifdef POST_EVALUATION
 
-$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
-	iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
+	iasl -p dsdt -tc $<
 	mv dsdt.hex $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h




From svn at coresystems.de  Thu Dec  3 00:03:00 2009
From: svn at coresystems.de (coresystems autobuild service)
Date: Thu, 03 Dec 2009 00:03:00 +0100
Subject: [coreboot] KBuild Report [r4974]
Message-ID: <4b16f224.dZtx+HuG/aVSTcJF%svn@coresystems.de>

[1/116] a-trend/atc-6220 ok.
Processing mainboard/a-trend/atc-6220 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[2/116] a-trend/atc-6240 ok.
Processing mainboard/a-trend/atc-6240 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[3/116] abit/be6-ii_v2_0 ok.
Processing mainboard/abit/be6-ii_v2_0 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[4/116] advantech/pcm-5820 ok.
Processing mainboard/advantech/pcm-5820 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[5/116] amd/db800 ok.
Processing mainboard/amd/db800 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 4;
+CONFIG_IRQ_SLOT_COUNT = 6;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[6/116] amd/dbm690t ok.
Processing mainboard/amd/dbm690t (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/amd/dbm690t/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[7/116] amd/norwich ok.
Processing mainboard/amd/norwich (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[8/116] amd/pistachio ok.
Processing mainboard/amd/pistachio (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/amd/pistachio/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[9/116] amd/rumba ok.
Processing mainboard/amd/rumba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[10/116] amd/serengeti_cheetah ok.
Processing mainboard/amd/serengeti_cheetah (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/amd/serengeti_cheetah/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_ACPI_SSDTX_NUM = 1;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[11/116] amd/serengeti_cheetah_fam10 fail.
[12/116] arima/hdama ok.
Processing mainboard/arima/hdama (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/arima/hdama/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[13/116] artecgroup/dbe61 ok.
Processing mainboard/artecgroup/dbe61 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[14/116] asi/mb_5blgp ok.
Processing mainboard/asi/mb_5blgp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[15/116] asi/mb_5blmp ok.
Processing mainboard/asi/mb_5blmp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GENERATE_MP_TABLE = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[16/116] asus/a8n_e ok.
Processing mainboard/asus/a8n_e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/asus/a8n_e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 819200;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_SIZE = 32768;
+CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[17/116] asus/a8v-e_se ok.
Processing mainboard/asus/a8v-e_se (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HEAP_SIZE = 262144;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[18/116] asus/m2v-mx_se ok.
Processing mainboard/asus/m2v-mx_se (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/asus/m2v-mx_se/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 12s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 32505856;
+CONFIG_RAMBASE = 1048576;
-CONFIG_RAMTOP = 33554432;
+CONFIG_RAMTOP = 2097152;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[19/116] asus/mew-am ok.
Processing mainboard/asus/mew-am (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[20/116] asus/mew-vm ok.
Processing mainboard/asus/mew-vm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[21/116] asus/p2b-d ok.
Processing mainboard/asus/p2b-d (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[22/116] asus/p2b-ds ok.
Processing mainboard/asus/p2b-ds (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

+CONFIG_AGP_APERTURE_SIZE = 67108864;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_ADDR_BITS = 36;
+CONFIG_CPU_ADDR_BITS = 40;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 786432;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_ID_SECTION_OFFSET = 16;
+CONFIG_ID_SECTION_OFFSET = 128;
-CONFIG_IRQ_SLOT_COUNT = 7;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 33114;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4163;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MEM_TRAIN_SEQ = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 262144;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_USE_DCACHE_RAM = 1;
-CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[23/116] asus/p2b-f ok.
Processing mainboard/asus/p2b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[24/116] asus/p2b ok.
Processing mainboard/asus/p2b (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[25/116] asus/p3b-f ok.
Processing mainboard/asus/p3b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[26/116] axus/tc320 ok.
Processing mainboard/axus/tc320 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[27/116] azza/pt-6ibd ok.
Processing mainboard/azza/pt-6ibd (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[28/116] bcom/winnet100 ok.
Processing mainboard/bcom/winnet100 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[29/116] bcom/winnetp680 ok.
Processing mainboard/bcom/winnetp680 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/bcom/winnetp680/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 18s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[30/116] biostar/m6tba ok.
Processing mainboard/biostar/m6tba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[31/116] broadcom/blast ok.
Processing mainboard/broadcom/blast (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[32/116] compaq/deskpro_en_sff_p600 ok.
Processing mainboard/compaq/deskpro_en_sff_p600 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[33/116] dell/s1850 ok.
Processing mainboard/dell/s1850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 35s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 1;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_TTYS0_BAUD = 19200;
+CONFIG_TTYS0_BAUD = 115200;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[34/116] digitallogic/adl855pc ok.
Processing mainboard/digitallogic/adl855pc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 35s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[35/116] digitallogic/msm586seg ok.
Processing mainboard/digitallogic/msm586seg (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/digitallogic/msm586seg/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_AMD_SC520 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 262144;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[36/116] digitallogic/msm800sev ok.
Processing mainboard/digitallogic/msm800sev (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 7;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[37/116] eaglelion/5bcm ok.
Processing mainboard/eaglelion/5bcm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[38/116] emulation/qemu-x86 ok.
Processing mainboard/emulation/qemu-x86 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/emulation/qemu-x86/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_EMULATION_QEMU_X86 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 585728;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 1;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[39/116] gigabyte/ga-6bxc ok.
Processing mainboard/gigabyte/ga-6bxc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 6;
+CONFIG_IRQ_SLOT_COUNT = 5;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[40/116] gigabyte/ga_2761gxdk ok.
Processing mainboard/gigabyte/ga_2761gxdk (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/gigabyte/ga_2761gxdk/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[41/116] gigabyte/m57sli ok.
Processing mainboard/gigabyte/m57sli (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/gigabyte/m57sli/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[42/116] hp/dl145_g3 ok.
Processing mainboard/hp/dl145_g3 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[43/116] hp/e_vectra_p2706t ok.
Processing mainboard/hp/e_vectra_p2706t (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[44/116] ibm/e325 ok.
Processing mainboard/ibm/e325 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[45/116] ibm/e326 ok.
Processing mainboard/ibm/e326 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/ibm/e326/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[46/116] iei/juki-511p ok.
Processing mainboard/iei/juki-511p (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/iei/juki-511p/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[47/116] iei/nova4899r ok.
Processing mainboard/iei/nova4899r (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[48/116] iei/pcisa-lx-800-r10 ok.
Processing mainboard/iei/pcisa-lx-800-r10 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[49/116] intel/d945gclf ok.
Processing mainboard/intel/d945gclf (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/intel/d945gclf/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 4293754880;
+CONFIG_DCACHE_RAM_BASE = 4292837376;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294920448;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GENERATE_ACPI_TABLES = 1;
+CONFIG_GENERATE_ACPI_TABLES = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_INIT_TIMER = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HAVE_SMI_HANDLER = 1;
+CONFIG_HAVE_SMI_HANDLER = 0;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[50/116] intel/eagleheights ok.
Processing mainboard/intel/eagleheights (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 18s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 18;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 32902;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[51/116] intel/jarrell ok.
Processing mainboard/intel/jarrell (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 18;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_REBOOT_CNT = 8;
+CONFIG_MAX_REBOOT_CNT = 3;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[52/116] intel/mtarvon ok.
Processing mainboard/intel/mtarvon (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[53/116] intel/truxton ok.
Processing mainboard/intel/truxton (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_EP80579 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[54/116] intel/xe7501devkit ok.
Processing mainboard/intel/xe7501devkit (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 36s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[55/116] iwill/dk8_htx ok.
Processing mainboard/iwill/dk8_htx (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/iwill/dk8_htx/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 802816;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_SIZE = 49152;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 524288;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[56/116] iwill/dk8s2 ok.
Processing mainboard/iwill/dk8s2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 12;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[57/116] iwill/dk8x ok.
Processing mainboard/iwill/dk8x (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[58/116] jetway/j7f24 ok.
Processing mainboard/jetway/j7f24 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/jetway/j7f24/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[59/116] kontron/986lcd-m ok.
Processing mainboard/kontron/986lcd-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/kontron/986lcd-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[60/116] kontron/kt690 ok.
Processing mainboard/kontron/kt690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/kontron/kt690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[61/116] lippert/frontrunner ok.
Processing mainboard/lippert/frontrunner (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[62/116] lippert/roadrunner-lx ok.
Processing mainboard/lippert/roadrunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[63/116] lippert/spacerunner-lx ok.
Processing mainboard/lippert/spacerunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[64/116] mitac/6513wu ok.
Processing mainboard/mitac/6513wu (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[65/116] msi/ms6119 ok.
Processing mainboard/msi/ms6119 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[66/116] msi/ms6147 ok.
Processing mainboard/msi/ms6147 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[67/116] msi/ms6156 ok.
Processing mainboard/msi/ms6156 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[68/116] msi/ms6178 ok.
Processing mainboard/msi/ms6178 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_UDELAY_IO = 0;
+CONFIG_UDELAY_IO = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[69/116] msi/ms7135 ok.
Processing mainboard/msi/ms7135 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/msi/ms7135/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DCACHE_RAM_BASE = 819200;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_SIZE = 32768;
+CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[70/116] msi/ms7260 ok.
Processing mainboard/msi/ms7260 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/msi/ms7260/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[71/116] msi/ms9185 ok.
Processing mainboard/msi/ms9185 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/msi/ms9185/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[72/116] msi/ms9282 ok.
Processing mainboard/msi/ms9282 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/msi/ms9282/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[73/116] nec/powermate2000 ok.
Processing mainboard/nec/powermate2000 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[74/116] newisys/khepri ok.
Processing mainboard/newisys/khepri (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[75/116] nvidia/l1_2pvv ok.
Processing mainboard/nvidia/l1_2pvv (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/nvidia/l1_2pvv/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[76/116] olpc/btest ok.
Processing mainboard/olpc/btest (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[77/116] olpc/rev_a ok.
Processing mainboard/olpc/rev_a (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[78/116] pcengines/alix1c ok.
Processing mainboard/pcengines/alix1c (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[79/116] rca/rm4100 ok.
Processing mainboard/rca/rm4100 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/rca/rm4100/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[80/116] soyo/sy-6ba-plus-iii ok.
Processing mainboard/soyo/sy-6ba-plus-iii (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[81/116] sunw/ultra40 ok.
Processing mainboard/sunw/ultra40 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[82/116] supermicro/h8dme ok.
Processing mainboard/supermicro/h8dme (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/supermicro/h8dme/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[83/116] supermicro/h8dmr ok.
Processing mainboard/supermicro/h8dmr (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/supermicro/h8dmr/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[84/116] supermicro/h8dmr_fam10 fail.
[85/116] supermicro/x6dai_g ok.
Processing mainboard/supermicro/x6dai_g (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[86/116] supermicro/x6dhe_g ok.
Processing mainboard/supermicro/x6dhe_g (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[87/116] supermicro/x6dhe_g2 ok.
Processing mainboard/supermicro/x6dhe_g2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[88/116] supermicro/x6dhr_ig ok.
Processing mainboard/supermicro/x6dhr_ig (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[89/116] supermicro/x6dhr_ig2 ok.
Processing mainboard/supermicro/x6dhr_ig2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[90/116] technexion/tim5690 ok.
Processing mainboard/technexion/tim5690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/technexion/tim5690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[91/116] technexion/tim8690 ok.
Processing mainboard/technexion/tim8690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/technexion/tim8690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[92/116] technologic/ts5300 ok.
Processing mainboard/technologic/ts5300 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/technologic/ts5300/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_AMD_SC520 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 131072;
+CONFIG_ROM_SIZE = 262144;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
-CONFIG_TTYS0_BASE = 760;
+CONFIG_TTYS0_BASE = 1016;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[93/116] televideo/tc7020 ok.
Processing mainboard/televideo/tc7020 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[94/116] thomson/ip1000 ok.
Processing mainboard/thomson/ip1000 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/thomson/ip1000/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[95/116] tyan/s1846 ok.
Processing mainboard/tyan/s1846 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[96/116] tyan/s2735 ok.
Processing mainboard/tyan/s2735 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SSE = 1;
-CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[97/116] tyan/s2850 ok.
Processing mainboard/tyan/s2850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[98/116] tyan/s2875 ok.
Processing mainboard/tyan/s2875 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[99/116] tyan/s2880 ok.
Processing mainboard/tyan/s2880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 13;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[100/116] tyan/s2881 ok.
Processing mainboard/tyan/s2881 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[101/116] tyan/s2882 ok.
Processing mainboard/tyan/s2882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 15;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[102/116] tyan/s2885 ok.
Processing mainboard/tyan/s2885 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 11;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[103/116] tyan/s2891 ok.
Processing mainboard/tyan/s2891 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/tyan/s2891/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[104/116] tyan/s2892 ok.
Processing mainboard/tyan/s2892 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/tyan/s2892/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[105/116] tyan/s2895 ok.
Processing mainboard/tyan/s2895 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/tyan/s2895/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[106/116] tyan/s2912 ok.
Processing mainboard/tyan/s2912 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/tyan/s2912/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[107/116] tyan/s2912_fam10 fail.
[108/116] tyan/s4880 ok.
Processing mainboard/tyan/s4880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[109/116] tyan/s4882 ok.
Processing mainboard/tyan/s4882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 8192;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[110/116] via/epia-cn ok.
Processing mainboard/via/epia-cn (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/via/epia-cn/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 18s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[111/116] via/epia-m ok.
Processing mainboard/via/epia-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/via/epia-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[112/116] via/epia-m700 ok.
Processing mainboard/via/epia-m700 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/via/epia-m700/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 10s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_SIZE = 8192;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HEAP_SIZE = 20480;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4121;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[113/116] via/epia-n ok.
Processing mainboard/via/epia-n (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/via/epia-n/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN400_VIDEO_MB_128MB = 0;
+CONFIG_CN400_VIDEO_MB_16MB = 0;
+CONFIG_CN400_VIDEO_MB_32MB = 1;
+CONFIG_CN400_VIDEO_MB_64MB = 0;
+CONFIG_CN400_VIDEO_MB_8MB = 0;
+CONFIG_CN400_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[114/116] via/epia ok.
Processing mainboard/via/epia (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[115/116] via/pc2500e ok.
Processing mainboard/via/pc2500e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/via/pc2500e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 18s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_OPTION_TABLE = 1;
+CONFIG_USE_OPTION_TABLE = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[116/116] via/vt8454c ok.
Processing mainboard/via/vt8454c (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4974/targets/via/vt8454c/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 10s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4121;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;



From joe at settoplinux.org  Thu Dec  3 00:09:04 2009
From: joe at settoplinux.org (joe at settoplinux.org)
Date: Wed, 2 Dec 2009 23:09:04 +0000 (GMT)
Subject: [coreboot] [flashrom] We have a FOSDEM DevRoom!
In-Reply-To: <20091202002258.GB28903@skynet.be>
References: <20091201233649.GA28217@skynet.be> <4B15B11E.1070309@gmx.net>
	<20091202002258.GB28903@skynet.be>
Message-ID: <1252504088.52237.1259795345014.JavaMail.open-xchange@oxusltgw10.schlund.de>


On December 2, 2009 at 12:22 AM Luc Verhaegen <libv at skynet.be> wrote:

> On Wed, Dec 02, 2009 at 01:13:18AM +0100, Carl-Daniel Hailfinger wrote:
> > On 02.12.2009 00:36, Luc Verhaegen wrote:
> > > The kind FOSDEM organizers have given us a DevRoom on saturday the 6th 
> > > of February, as requested.
> > >? ?
> > 
> > Thanks a lot for organizing this, Luc!
> > 
Yes this is a great oppritunity Luc.
I wish I could be there...
> 
> Well, i definitely want you to do the introductory flashrom talk. But on 
> the other hand, the introductory part with flashrom is rather limited, 
> after which you can go and delve deeper into one or several 
> further topics that you mentioned.
> 
> Chances are that it gets filmed in HDTV and makes it onto phoronix.com.
> 
> And for showing off, maybe we should get a webcam along that we then can 
> use to show hardware up close on the projector.
> 
According to the wiki it looks like you want to get into bios security a bit.
This may be an opritune time to introduce SerialICE???

Thanks - Joe



From maciej.pijanka at gmail.com  Thu Dec  3 01:05:44 2009
From: maciej.pijanka at gmail.com (Maciej Pijanka)
Date: Thu, 3 Dec 2009 01:05:44 +0100
Subject: [coreboot] Biostar M6TLD
Message-ID: <20091203000544.GD13755@debshine>

Hello

I have biostar M6TLD, it survives already raminit, patch is in attachment, also
log from boot and config. Payload is uncompressed since i had problems with
error in decompression from lzma, and current payload is coreinfo.

Machine reboots at point indicated in log but only difference between next loops
is like that one below, diff between two restarts from same log.

 Jumping to image.
 coreboot-2.3 Thu Dec  3 00:30:36 CET 2009 booting...
 Calibrating delay loop...
-end 1ee10434f, start 1c570413d
+end 2c5cfc8a0, start 29d2fc6b1
 32-bit delta 650
 calibrate_tsc 32-bit result is 650
 clocks_per_usec: 650

Anyone has idea how to debug why it restarts?
I am not placing signed off yet as it don't work unless producing endless stream of coreboot
attempts to start is working.

best regards
Maciej

-- 
Maciej Pijanka
reg. Linux user #133161
-------------- next part --------------
#
# Automatically generated make config: don't edit
# coreboot version: 2.3
# Thu Dec  3 00:56:17 2009
#

#
# General setup
#
CONFIG_EXPERT=y
CONFIG_LOCALVERSION=""

#
# Mainboard
#
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADVANTECH is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_ARIMA is not set
# CONFIG_VENDOR_ARTEC_GROUP is not set
# CONFIG_VENDOR_ASI is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AXUS is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BCOM is not set
CONFIG_VENDOR_BIOSTAR=y
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_DIGITAL_LOGIC is not set
# CONFIG_VENDOR_EAGLELION is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NEWISYS is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_OLPC is not set
# CONFIG_VENDOR_PC_ENGINES is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_TECHNOLOGIC is not set
# CONFIG_VENDOR_TELEVIDEO is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_MAINBOARD_VENDOR="Biostar"
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x0
CONFIG_MAINBOARD_DIR="biostar/m6tld"
CONFIG_MAINBOARD_PART_NUMBER="M6TLD"
# CONFIG_HAVE_OPTION_TABLE is not set
CONFIG_IRQ_SLOT_COUNT=5
CONFIG_RAMBASE=0x100000
CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE=0x0
CONFIG_LB_CKS_RANGE_END=125
CONFIG_LB_CKS_LOC=126
CONFIG_MAX_CPUS=1
CONFIG_MAX_PHYSICAL_CPUS=1
# CONFIG_USE_INIT is not set
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x0
CONFIG_SERIAL_CPU_INIT=y
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x4000
CONFIG_ACPI_SSDTX_NUM=0
# CONFIG_BOARD_BIOSTAR_M6TBA is not set
CONFIG_BOARD_BIOSTAR_M6TLD=y
CONFIG_HAVE_INIT_TIMER=y
CONFIG_LB_CKS_RANGE_START=49
# CONFIG_PCI_64BIT_PREF_MEM is not set
CONFIG_HAVE_FALLBACK_BOOT=y
CONFIG_USE_FALLBACK_IMAGE=y
# CONFIG_WAIT_BEFORE_CPUS_INIT is not set
# CONFIG_K8_REV_F_SUPPORT is not set
CONFIG_STACK_SIZE=0x8000
CONFIG_VGA_ROM_RUN=y
CONFIG_PCI_ROM_RUN=y
CONFIG_COREBOOT_ROMSIZE_KB_128=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
CONFIG_COREBOOT_ROMSIZE_KB=128
CONFIG_ROM_SIZE=0x20000
CONFIG_ARCH_X86=y
# CONFIG_AP_IN_SIPI_WAIT is not set
CONFIG_ARCH="i386"
CONFIG_ROMBASE=0xffff0000
CONFIG_ROM_IMAGE_SIZE=0x10000
CONFIG_MAX_REBOOT_CNT=3

#
# Chipset
#

#
# CPU
#
CONFIG_XIP_ROM_BASE=0xfffe0000
CONFIG_XIP_ROM_SIZE=0x20000
CONFIG_CPU_ADDR_BITS=36
CONFIG_CPU_INTEL_SLOT_2=y
CONFIG_UDELAY_IO=y
# CONFIG_UDELAY_LAPIC is not set
# CONFIG_UDELAY_TSC is not set
# CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 is not set
# CONFIG_USE_DCACHE_RAM is not set
# CONFIG_SMP is not set
CONFIG_VAR_MTRR_HOLE=y

#
# Northbridge
#
CONFIG_NORTHBRIDGE_INTEL_I440LX=y
CONFIG_VIDEO_MB=0

#
# Southbridge
#
CONFIG_SOUTHBRIDGE_INTEL_I82371EB=y
CONFIG_ID_SECTION_OFFSET=0x10

#
# Super I/O
#
CONFIG_SUPERIO_SMSC_SMSCSUPERIO=y

#
# Devices
#
CONFIG_VGA_BRIDGE_SETUP=y
CONFIG_PCI_OPTION_ROM_RUN_REALMODE=y
# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set
# CONFIG_PCI_OPTION_ROM_RUN_X86EMU is not set
# CONFIG_CONSOLE_VGA_MULTI is not set
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_AGP_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_PCI_BUS_SEGN_BITS=0
CONFIG_LOGICAL_CPUS=y
CONFIG_COREBOOT_V2=y
CONFIG_COREBOOT_V4=y
# CONFIG_DEBUG is not set
# CONFIG_USE_PRINTK_IN_CAR is not set
# CONFIG_USE_OPTION_TABLE is not set
# CONFIG_MMCONF_SUPPORT_DEFAULT is not set
# CONFIG_MMCONF_SUPPORT is not set

#
# Console options
#
CONFIG_CONSOLE_SERIAL8250=y
CONFIG_CONSOLE_SERIAL_COM1=y
# CONFIG_CONSOLE_SERIAL_COM2 is not set
# CONFIG_CONSOLE_SERIAL_COM3 is not set
# CONFIG_CONSOLE_SERIAL_COM4 is not set
CONFIG_TTYS0_BASE=0x3f8
CONFIG_CONSOLE_SERIAL_115200=y
# CONFIG_CONSOLE_SERIAL_57600 is not set
# CONFIG_CONSOLE_SERIAL_38400 is not set
# CONFIG_CONSOLE_SERIAL_19200 is not set
# CONFIG_CONSOLE_SERIAL_9600 is not set
CONFIG_TTYS0_BAUD=115200
CONFIG_TTYS0_LCS=3
# CONFIG_SERIAL_POST is not set
# CONFIG_USBDEBUG_DIRECT is not set
# CONFIG_CONSOLE_VGA is not set
# CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST is not set
CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_8=y
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_0 is not set
CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
# CONFIG_CONSOLE_BTEXT is not set
# CONFIG_CONSOLE_SROM is not set
# CONFIG_CONSOLE_LOGBUF is not set
# CONFIG_HAVE_ACPI_RESUME is not set
# CONFIG_HAVE_FAILOVER_BOOT is not set
# CONFIG_USE_FAILOVER_IMAGE is not set
# CONFIG_HAVE_HARD_RESET is not set
# CONFIG_HAVE_MAINBOARD_RESOURCES is not set
# CONFIG_HAVE_MOVNTI is not set
# CONFIG_PIRQ_ROUTE is not set
# CONFIG_HAVE_SMI_HANDLER is not set
# CONFIG_PCI_IO_CFG_EXT is not set
# CONFIG_IOAPIC is not set
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
# CONFIG_VGA is not set
# CONFIG_GFXUMA is not set
CONFIG_HAVE_LOW_TABLES=y
CONFIG_HAVE_HIGH_TABLES=y
CONFIG_HAVE_PIRQ_TABLE=y
# CONFIG_GENERATE_ACPI_TABLES is not set
# CONFIG_GENERATE_MP_TABLE is not set
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_WRITE_HIGH_TABLES=y

#
# System tables
#
# CONFIG_MULTIBOOT is not set

#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
CONFIG_PAYLOAD_ELF=y
CONFIG_FALLBACK_PAYLOAD_FILE="payload.elf"
# CONFIG_COMPRESSED_PAYLOAD_LZMA is not set
# CONFIG_COMPRESSED_PAYLOAD_NRV2B is not set

#
# VGA BIOS
#
# CONFIG_VGA_BIOS is not set

#
# Debugging
#
CONFIG_GDB_STUB=y
# CONFIG_LIFT_BSP_APIC_ID is not set
# CONFIG_AP_CODE_IN_CAR is not set
# CONFIG_ENABLE_APIC_EXT_ID is not set
# CONFIG_WARNINGS_ARE_ERRORS is not set
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From libv at skynet.be  Thu Dec  3 01:20:52 2009
From: libv at skynet.be (Luc Verhaegen)
Date: Thu, 3 Dec 2009 01:20:52 +0100
Subject: [coreboot] [flashrom] We have a FOSDEM DevRoom!
In-Reply-To: <1252504088.52237.1259795345014.JavaMail.open-xchange@oxusltgw10.schlund.de>
References: <20091201233649.GA28217@skynet.be> <4B15B11E.1070309@gmx.net>
	<20091202002258.GB28903@skynet.be>
	<1252504088.52237.1259795345014.JavaMail.open-xchange@oxusltgw10.schlund.de>
Message-ID: <20091203002052.GA407@skynet.be>

On Wed, Dec 02, 2009 at 11:09:04PM +0000, joe at settoplinux.org wrote:
> 
> According to the wiki it looks like you want to get into bios security a bit.
> This may be an opritune time to introduce SerialICE???

If we can get Stepan to talk about it on FOSDEM, sure :)

Luc Verhaegen.



From peter at stuge.se  Thu Dec  3 03:26:12 2009
From: peter at stuge.se (Peter Stuge)
Date: Thu, 3 Dec 2009 03:26:12 +0100
Subject: [coreboot] Biostar M6TLD
In-Reply-To: <20091203000544.GD13755@debshine>
References: <20091203000544.GD13755@debshine>
Message-ID: <20091203022612.19995.qmail@stuge.se>

Maciej Pijanka wrote:
> I have biostar M6TLD, it survives already raminit, patch is in
> attachment, also log from boot and config.

Nice work so far!


> Payload is uncompressed since i had problems with error in
> decompression from lzma,

What errors did you get?


> and current payload is coreinfo.
> 
> Machine reboots at point indicated in log but only difference
> between next loops is like that one below, diff between two
> restarts from same log.
> 
>  Jumping to image.
>  coreboot-2.3 Thu Dec  3 00:30:36 CET 2009 booting...
>  Calibrating delay loop...
> -end 1ee10434f, start 1c570413d
> +end 2c5cfc8a0, start 29d2fc6b1
>  32-bit delta 650
>  calibrate_tsc 32-bit result is 650
>  clocks_per_usec: 650

This difference makes sense if it is using something like RDTSC to
calibrate. It runs from power on, so will be higher after a reset.


> Anyone has idea how to debug why it restarts?

I think the problem may be that RAM is not completely functional.
Decompression needs RAM, and the payload also needs RAM.

Did you try calling the very simple ram_check() function to test your
RAM configuration? And how does the RAM configuration done by
coreboot compare with that done by the factory BIOS?


//Peter



From librali1977 at gmail.com  Thu Dec  3 03:54:04 2009
From: librali1977 at gmail.com (Libra Li)
Date: Thu, 3 Dec 2009 10:54:04 +0800
Subject: [coreboot] AMD ASB1 Package L325 & L625
Message-ID: <df21912a0912021854x3825442ax304b27b059ebf4b1@mail.gmail.com>

Hello,

    Can the coreboot support AMD CPU L325 & L625 on version 2?
    Can it working on L325+RS690 & L625+RS690?
    Thanks.
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From mylesgw at gmail.com  Thu Dec  3 04:07:07 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Wed, 2 Dec 2009 20:07:07 -0700
Subject: [coreboot] Biostar M6TLD
In-Reply-To: <20091203022612.19995.qmail@stuge.se>
References: <20091203000544.GD13755@debshine>
	<20091203022612.19995.qmail@stuge.se>
Message-ID: <12E0E49CB939496DAA9F4772B3A6DF97@chimp>

> > Anyone has idea how to debug why it restarts?
> 
> I think the problem may be that RAM is not completely functional.
> Decompression needs RAM, and the payload also needs RAM.
I agree.  It might be interesting to disable caching and see if you still
get so far.  I've been fooled before because the cache was big enough to fit
the working set.

Thanks,
Myles





From kevin at koconnor.net  Thu Dec  3 04:03:39 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Wed, 2 Dec 2009 22:03:39 -0500
Subject: [coreboot] Some SeaBIOS timings
Message-ID: <20091203030339.GA13935@morn.localdomain>

I decided to rerun some timing tests on my epia-cn.

With some hacking, I've gotten the time from power-on to SeaBIOS boot
menu down to 850ms.  Of this time, 530ms is coreboot, 210ms is via vga
rom, 60ms is usb init (and other hardware probes), and 30ms is time to
copy and decompress vga rom from flash.

This rom is pretty small too (under 128K) - 20K for bootblock, 30K for
coreboot_ram, 33K for seabios, and 36K for via vga rom.

To get to these numbers I had to disconnect my ATA drive - it's spinup
time dominates startup otherwise (9 seconds from power on).  I'm
hopeful the times shown would be representative if I had an SSD drive.

I also needed to hack coreboot to improve caching.  I modified
entry16.inc to turn on caching of the rom as soon as possible, I
modified auto.c to make sure ram was cached prior to decompressing
coreboot_ram, and finally I modified the permanent mtrr setup to leave
the rom cached for seabios.

As an aside, I think coreboot could improve in this area.  It seems as
if each board is tasked with setting up caching - I'm sure epia-cn is
not the exception with unoptimized caches.

I'm attaching the serial output below.  The timing numbers quoted
above are from a program that times the serial responses.  This
program also takes into account the cost to send serial messages and
subtracts that time from the reports.  I believe the numbers shown are
representative of times had debugging been disabled.

My epia-cn seems to write a null byte to the serial port when I press
the power button - I'm using that to time the rest of the boot.  I
suspect much of the 400ms to the first coreboot message is due to
power stabilization prior to cpu execution.

-Kevin


=======================

00.000: <00>
00.008: <00>
00.399: 0
00.400: 
00.401: coreboot-2.0.0-r4967M-epiacn Wed Dec  2 20:01:30 EST 2009 starting...
00.426: Stage: loading fallback/coreboot_ram @ 0x4000 (114688 bytes), entry @ 0x4000
00.459: coreboot-2.0.0-r4967M-epiacn Wed Dec  2 20:01:30 EST 2009 booting...
00.479: clocks_per_usec: 1501
00.481: Enumerating buses...
00.481: Finding PCI configuration type.
00.484: done
00.483: Allocating resources...
00.481: Reading resources...
00.487: PNP: 002e.b missing read_resources
00.485: APIC: 00 missing read_resources
00.485: Done reading resources.
00.488: skipping PNP: 002e.1 at 74 fixed resource, size=0!
00.484: skipping PNP: 002e.b at 60 fixed resource, size=0!
00.489: Setting resources...
00.488: ERROR: PNP: 002e.3 74 drq size: 0x0000000001 not assigned
00.491: PNP: 002e.b missing set_resources
00.488: ERROR: PNP: 002e.4 60 io size: 0x0000000008 not assigned
00.491: ERROR: PNP: 002e.4 70 irq size: 0x0000000001 not assigned
00.489: ERROR: PNP: 002e.6 70 irq size: 0x0000000001 not assigned
00.490: Done setting resources.
00.490: Done allocating resources.
00.494: Enabling resources...
00.492: PCI: 00:00.3 missing enable_resources
00.491: PNP: 002e.b missing enable_resources
00.494: done.
00.493: Initializing devices...
00.493: Primary IDE interface enabled
00.497: Secondary IDE interface enabled
00.494: Initializing CPU #0
00.494: Detected VIA Model D C7-D
00.499: Voltage: 1084mV (min 1084mV; max 1084mV)
00.496: CPU multiplier: 15x (min 15x; max 15x)
00.495: Current voltage: 1084mV
00.500: Current CPU multiplier: 15x
00.497: Enabling cache
00.498: Running out of variable MTRRs!
00.501: Disabling local apic...done.
00.500: CPU #0 initialized
00.505: Devices initialized
00.503: Copying Interrupt Routing Table to 0x000f0000... done.
00.502: Copying Interrupt Routing Table to 0x3dff0400... done.
00.505: ACPI: Writing ACPI tables at 3dff1400...
00.503: ACPI: done.
00.503: Multiboot Information structure has been written.
00.537: Start bios (version pre-0.4.3-20091202_003935-morn.localdomain)
00.539: Found mainboard via epia-cn
00.540: Found CBFS header at 0xffffaae0
00.542: Ram Size=0x3dff0000
00.542: CPU Mhz=1501
00.543: No apic - only the main cpu is present.
00.545: Copying ACPI RSDP from 0x3dff1400 to 0x000fdc00
00.543: SMBIOS ptr=0x000fdbe0 table=0x3dfef800
00.548: Scan for VGA option rom
00.579: Running option rom at c000:0003
00.581: fail handle_155fXX:23(86):
00.582:    a=00005f0b  b=00010100  c=00000044  d=00000110 ds=0000 es=f000 ss=0000
00.583:   si=0000ab66 di=00000044 bp=00000000 sp=00006e82 cs=c000 ip=c996  f=0006
00.582: fail handle_155fXX:23(86):
00.584:    a=00005f01  b=00010100  c=00000044  d=00000110 ds=0000 es=f000 ss=0000
00.585:   si=0000ab66 di=00000044 bp=00000000 sp=00006e68 cs=c000 ip=c8c6  f=0002
00.768: fail handle_155fXX:23(86):
00.770:    a=00005f02  b=00010001  c=00000000  d=000003c2 ds=0000 es=f000 ss=0000
00.769:   si=00000001 di=00000044 bp=00000000 sp=00006e96 cs=c000 ip=c8f9  f=0002
00.773: fail handle_155fXX:23(86):
00.771:    a=00005f18  b=00010200  c=00000044  d=000003c2 ds=0000 es=f000 ss=0000
00.773:   si=00000000 di=00000044 bp=00000000 sp=00006e9c cs=c000 ip=ca89  f=0006
00.784: Turning on vga console
00.790: Starting SeaBIOS (version pre-0.4.3-20091202_003935-morn.localdomain)
00.790: 
00.790: ebda moved from 9f400 to 9f000
00.790: Found 1 lpt ports
00.794: Found 2 serial ports
00.792: ATA controller 0 at 24a0/24b0 (dev 78 prog_if 8f)
00.792: ATA controller 1 at 24a8/24b4 (dev 78 prog_if 8f)
00.792: ATA controller 2 at 1f0/3f0 (dev 79 prog_if 8a)
00.796: Got ps2 nak (status=d1); continuing
00.793: ATA controller 3 at 170/370 (dev 79 prog_if 8a)
00.827: config_usb: 0x000fdf94 1
00.851: Scan for option roms
00.853: Press F12 for boot menu.
00.854: 
03.390: Returned 28672 bytes of ZoneHigh
03.393: e820 map has 5 items:
03.394:   0: 0000000000000000 - 000000000009f000 = 1
03.394:   1: 000000000009f000 - 00000000000a0000 = 2
03.396:   2: 00000000000f0000 - 0000000000100000 = 2
03.396:   3: 0000000000100000 - 000000003dfe7000 = 1
03.397:   4: 000000003dfe7000 - 000000003e000000 = 2
03.398: enter handle_19:
03.398:   NULL

=======================

coreboot.final.rom: 1024 kB, bootblocksize 21248, romsize 1048576, offset 0x0
Alignment: 64 bytes

Name                           Offset     Type         Size
fallback/payload               0x0        payload      33364
fallback/coreboot_ram          0x82c0     stage        30820
pci1106,3344.rom.lzma          0xfb80     optionrom    36368
                               0x18a00    null         926392



From maciej.pijanka at gmail.com  Thu Dec  3 09:26:17 2009
From: maciej.pijanka at gmail.com (Maciej Pijanka)
Date: Thu, 3 Dec 2009 09:26:17 +0100
Subject: [coreboot] Biostar M6TLD
In-Reply-To: <20091203022612.19995.qmail@stuge.se>
References: <20091203000544.GD13755@debshine>
	<20091203022612.19995.qmail@stuge.se>
Message-ID: <20091203082617.GJ13755@debshine>


On Thu, 03 Dec 2009, Peter Stuge wrote:

> Maciej Pijanka wrote:
> > I have biostar M6TLD, it survives already raminit, patch is in
> > attachment, also log from boot and config.
> 
> Nice work so far!
> 
> 
> > Payload is uncompressed since i had problems with error in
> > decompression from lzma,
> 
> What errors did you get?
just decompression error and then hang or reboot, it was some days ago, i can
recheck in next hours i think
 
 
> > Machine reboots at point indicated in log but only difference
> > between next loops is like that one below, diff between two
> > restarts from same log.
> > 
> >  Jumping to image.
> >  coreboot-2.3 Thu Dec  3 00:30:36 CET 2009 booting...
> >  Calibrating delay loop...
> > -end 1ee10434f, start 1c570413d
> > +end 2c5cfc8a0, start 29d2fc6b1
> >  32-bit delta 650
> >  calibrate_tsc 32-bit result is 650
> >  clocks_per_usec: 650
> 
> This difference makes sense if it is using something like RDTSC to
> calibrate. It runs from power on, so will be higher after a reset.

I am aware that this change is harmless, but its only change diff found.
 
> > Anyone has idea how to debug why it restarts?
> 
> I think the problem may be that RAM is not completely functional.
> Decompression needs RAM, and the payload also needs RAM.
> 
> Did you try calling the very simple ram_check() function to test your
> RAM configuration? And how does the RAM configuration done by
> coreboot compare with that done by the factory BIOS?
yep, both low 1M, and 1M->memsize, even few times in rows (few times added in C code)

Mostly configuration (register contents) is similar or very, only thing i can't change
is APBASE register thus i disabled AGP interface.

best regards
Maciej

-- 
Maciej Pijanka
reg. Linux user #133161



From maciej.pijanka at gmail.com  Thu Dec  3 10:42:10 2009
From: maciej.pijanka at gmail.com (Maciej Pijanka)
Date: Thu, 3 Dec 2009 10:42:10 +0100
Subject: [coreboot] Biostar M6TLD and Lzma decompress error
Message-ID: <20091203094210.GK13755@debshine>


Hello

I just enabled LZMA compression, and bootlog looks like one attached
(and its looping over jump to boot code at 0x100000 endlessly until i power down)

best regards
Maciej

-- 
Maciej Pijanka
reg. Linux user #133161
-------------- next part --------------


coreboot-2.3" Thu Dec  3 00:56:18 CET 2009 starting...
SMBus controller enabled
Copying coreboot to RAM.
Loading stage image.
Stage: loading fallback/coreboot_ram @ 0x100000 (147456 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
coreboot-2.3 Thu Dec  3 10:33:42 CET 2009 booting...
clocks_per_usec: 650
Enumerating buses...
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7180] enabled
PCI: 00:01.0 [8086/7181] disabled
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] enabled
PCI: 00:07.3 [8086/7113] enabled
Found SMSC Super I/O (ID=0x46, rev=0x01)
PNP: 03f0.0 enabled
PNP: 03f0.3 enabled
PNP: 03f0.4 enabled
PNP: 03f0.5 enabled
PNP: 03f0.7 enabled
PNP: 03f0.8 enabled
PCI: pci_scan_bus returning with max=000
done
Allocating resources...
Reading resources...
APIC: 00 missing read_resources
PNP: 03f0.0 missing read_resources
PNP: 03f0.3 missing read_resources
PNP: 03f0.4 missing read_resources
PNP: 03f0.5 missing read_resources
PNP: 03f0.7 missing read_resources
PNP: 03f0.8 missing read_resources
Done reading resources.
skipping PNP: 03f0.0 at 60 fixed resource, size=0!
skipping PNP: 03f0.0 at 70 fixed resource, size=0!
skipping PNP: 03f0.0 at 74 fixed resource, size=0!
skipping PNP: 03f0.3 at 60 fixed resource, size=0!
skipping PNP: 03f0.3 at 70 fixed resource, size=0!
skipping PNP: 03f0.4 at 60 fixed resource, size=0!
skipping PNP: 03f0.4 at 70 fixed resource, size=0!
skipping PNP: 03f0.5 at 60 fixed resource, size=0!
skipping PNP: 03f0.5 at 70 fixed resource, size=0!
skipping PNP: 03f0.7 at 60 fixed resource, size=0!
skipping PNP: 03f0.7 at 62 fixed resource, size=0!
skipping PNP: 03f0.7 at 70 fixed resource, size=0!
skipping PNP: 03f0.7 at 72 fixed resource, size=0!
Setting resources...
Setting RAM size to 128 MB
PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PNP: 03f0.0 missing set_resources
PNP: 03f0.3 missing set_resources
PNP: 03f0.4 missing set_resources
PNP: 03f0.5 missing set_resources
PNP: 03f0.7 missing set_resources
PCI: 00:07.1 20 <- [0x0000001020 - 0x000000102f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:07.0 cmd <- 07
PCI: 00:07.1 cmd <- 01
PCI: 00:07.2 cmd <- 01
PCI: 00:07.3 cmd <- 01
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor Intel device 660
CPU: family 06, model 06, stepping 00
Enabling cache

Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range:  128MB, type WB
DONE variable MTRRs
Clear out the extra MTRR's

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

microcode_info: sig = 0x00000660 pf=0x00000001 rev = 0x00000000
Disabling local apic...done.
CPU #0 initialized
PCI: 00:00.0 init
PCI: 00:07.0 init
RTC Init
PCI: 00:07.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: off
IDE: Primary IDE interface, drive 1: UDMA/33: off
IDE: Secondary IDE interface, drive 0: UDMA/33: off
IDE: Secondary IDE interface, drive 1: UDMA/33: off
PCI: 00:07.2 init
Devices initialized
Initializing CBMEM area to 0x7ff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 07ff0200...ok
High Tables Base is 7ff0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x07ff0400... done.
PIRQ table: 112 bytes.
Adding CBMEM entry as no. 3
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum e3df
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x07ff1400
rom_table_end = 0x07ff1400
Adjust low_table_end from 0x00000518 to 0x00001000 
Adjust rom_table_end from 0x07ff1400 to 0x08000000 
Adding high table area
Wrote coreboot table at: 07ff1400 - 07ff1590  checksum 3bbe
coreboot table: 400 bytes.
 0. FREE SPACE 83ffbff7a1e90170 840f45ffffff58bd
 3. COREBOOT   07ff1400 00002000
Got a payload
Loading segment from rom address 0xfffe8238
  parameter section (skipped)
Loading segment from rom address 0xfffe8254
  data (compression=1)
  New segment dstaddr 0x100000 memsize 0x36710 srcaddr 0xfffe82e2 filesize 0x3e82
  (cleaned up) New segment addr 0x100000 size 0x36710 offset 0xfffe82e2 filesize 0x3e82
Loading segment from rom address 0xfffe8270
  Entry Point 0x00100000
Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000036710 filesz: 0x0000000000003e82
Post relocation: addr: 0x0000000007f958f0 memsz: 0x0000000000036710 filesz: 0x0000000000003e82
using LZMA
lzma: Decoding error = 1
Clearing Segment: addr: 0x0000000007f958f0 memsz: 0x0000000000036710
dest 07f958f0, end 07fcc000, bouncebuffer 7f958f0
move suffix around: from 7fb98f0, to 124000, amount: 12710
Jumping to boot code at 100000
coreboot-2.3 Thu Dec  3 10:33:42 CET 2009 rebooting...
clocks_per_usec: 180
Enumerating buses...
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7180] enabled
PCI: 00:01.0 [8086/7181] disabled
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] enabled
PCI: 00:07.3 [8086/7113] enabled
PNP: 03f0.0 enabled
PNP: 03f0.3 enabled
PNP: 03f0.4 enabled
PNP: 03f0.5 enabled
PNP: 03f0.7 enabled
PNP: 03f0.8 enabled
PCI: pci_scan_bus returning with max=000
done
Allocating resources...
Reading resources...
APIC: 00 missing read_resources
CPU: 00 missing read_resources
PNP: 03f0.0 missing read_resources
PNP: 03f0.3 missing read_resources
PNP: 03f0.4 missing read_resources
PNP: 03f0.5 missing read_resources
PNP: 03f0.7 missing read_resources
PNP: 03f0.8 missing read_resources
Done reading resources.
skipping PNP: 03f0.0 at 60 fixed resource, size=0!
skipping PNP: 03f0.0 at 70 fixed resource, size=0!
skipping PNP: 03f0.0 at 74 fixed resource, size=0!
skipping PNP: 03f0.3 at 60 fixed resource, size=0!
skipping PNP: 03f0.3 at 70 fixed resource, size=0!
skipping PNP: 03f0.4 at 60 fixed resource, size=0!
skipping PNP: 03f0.4 at 70 fixed resource, size=0!
skipping PNP: 03f0.5 at 60 fixed resource, size=0!
skipping PNP: 03f0.5 at 70 fixed resource, size=0!
skipping PNP: 03f0.7 at 60 fixed resource, size=0!
skipping PNP: 03f0.7 at 62 fixed resource, size=0!
skipping PNP: 03f0.7 at 70 fixed resource, size=0!
skipping PNP: 03f0.7 at 72 fixed resource, size=0!
Setting resources...
Setting RAM size to 128 MB
PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PNP: 03f0.0 missing set_resources
PNP: 03f0.3 missing set_resources
PNP: 03f0.4 missing set_resources
PNP: 03f0.5 missing set_resources
PNP: 03f0.7 missing set_resources
PCI: 00:07.1 20 <- [0x0000001020 - 0x000000102f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:07.0 cmd <- 07
PCI: 00:07.1 cmd <- 05
PCI: 00:07.2 cmd <- 01
PCI: 00:07.3 cmd <- 01
done.
Initializing devices...
Devices initialized
Initializing CBMEM area to 0x7ff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 07ff0200...ok
High Tables Base is 7ff0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x07ff0400... done.
PIRQ table: 112 bytes.
Adding CBMEM entry as no. 3
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum e3df
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x07ff1400
rom_table_end = 0x07ff1400
Adjust low_table_end from 0x00000518 to 0x00001000 
Adjust rom_table_end from 0x07ff1400 to 0x08000000 
Adding high table area
Wrote coreboot table at: 07ff1400 - 07ff1590  checksum 3bbe
coreboot table: 400 bytes.
 0. FREE SPACE 83ffbff7a1e90170 840f45ffffff58bd
 2. IRQ TABLE  07ff0400 00001000
 3. COREBOOT   07ff1400 00002000
Got a payload
Loading segment from rom address 0xfffe8238
  parameter section (skipped)
Loading segment from rom address 0xfffe8254
  data (compression=1)
  New segment dstaddr 0x100000 memsize 0x36710 srcaddr 0xfffe82e2 filesize 0x3e82
  (cleaned up) New segment addr 0x100000 size 0x36710 offset 0xfffe82e2 filesize 0x3e82
Loading segment from rom address 0xfffe8270
  Entry Point 0x00100000
Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000036710 filesz: 0x0000000000003e82
Post relocation: addr: 0x0000000007f958f0 memsz: 0x0000000000036710 filesz: 0x0000000000003e82
using LZMA
lzma: Decoding error = 1
Clearing Segment: addr: 0x0000000007f958f0 memsz: 0x0000000000036710
dest 07f958f0, end 07fcc000, bouncebuffer 7f958f0
move suffix around: from 7fb98f0, to 124000, amount: 12710
Jumping to boot code at 100000
coreboot-2.3 Thu Dec  3 10:33:42 CET 2009 rebooting...
clocks_per_usec: 180
Enumerating buses...
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7180] enabled
PCI: 00:01.0 [8086/7181] disabled
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] enabled
PCI: 00:07.3 [8086/7113] enabled
PNP: 03f0.0 enabled
PNP: 03f0.3 enabled
PNP: 03f0.4 enabled
PNP: 03f0.5 enabled
PNP: 03f0.7 enabled
PNP: 03f0.8 enabled
PCI: pci_scan_bus returning with max=000
done
Allocating resources...
Reading resources...
APIC: 00 missing read_resources
CPU: 00 missing read_resources
PNP: 03f0.0 missing read_resources
PNP: 03f0.3 missing read_resources
PNP: 03f0.4 missing read_resources
PNP: 03f0.5 missing read_resources
PNP: 03f0.7 missing read_resources
PNP: 03f0.8 missing read_resources
Done reading resources.
skipping PNP: 03f0.0 at 60 fixed resource, size=0!
skipping PNP: 03f0.0 at 70 fixed resource, size=0!
skipping PNP: 03f0.0 at 74 fixed resource, size=0!
skipping PNP: 03f0.3 at 60 fixed resource, size=0!
skipping PNP: 03f0.3 at 70 fixed resource, size=0!
skipping PNP: 03f0.4 at 60 fixed resource, size=0!
skipping PNP: 03f0.4 at 70 fixed resource, size=0!
skipping PNP: 03f0.5 at 60 fixed resource, size=0!
skipping PNP: 03f0.5 at 70 fixed resource, size=0!
skipping PNP: 03f0.7 at 60 fixed resource, size=0!
skipping PNP: 03f0.7 at 62 fixed resource, size=0!
skipping PNP: 03f0.7 at 70 fixed resource, size=0!
skipping PNP: 03f0.7 at 72 fixed resource, size=0!
Setting resources...
Setting RAM size to 128 MB
PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PNP: 03f0.0 missing set_resources
PNP: 03f0.3 missing set_resources
PNP: 03f0.4 missing set_resources
PNP: 03f0.5 missing set_resources
PNP: 03f0.7 missing set_resources
PCI: 00:07.1 20 <- [0x0000001020 - 0x000000102f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:07.0 cmd <- 07
PCI: 00:07.1 cmd <- 05
PCI: 00:07.2 cmd <- 01
PCI: 00:07.3 cmd <- 01
done.
Initializing devices...
Devices initialized
Initializing CBMEM area to 0x7ff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 07ff0200...ok
High Tables Base is 7ff0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x07ff0400... done.
PIRQ table: 112 bytes.
Adding CBMEM entry as no. 3
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum e3df
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x07ff1400
rom_table_end = 0x07ff1400
Adjust low_table_end from 0x00000518 to 0x00001000 
Adjust rom_table_end from 0x07ff1400 to 0x08000000 
Adding high table area
Wrote coreboot table at: 07ff1400 - 07ff1590  checksum 3bbe
coreboot table: 400 bytes.
 0. FREE SPACE 83ffbff7a1e90170 840f45ffffff58bd
 2. IRQ TABLE  07ff0400 00001000
 3. COREBOOT   07ff1400 00002000
Got a payload
Loading segment from rom address 0xfffe8238
  parameter section (skipped)
Loading segment from rom address 0xfffe8254
  data (compression=1)
  New segment dstaddr 0x100000 memsize 0x36710 srcaddr 0xfffe82e2 filesize 0x3e82
  (cleaned up) New segment addr 0x100000 size 0x36710 offset 0xfffe82e2 filesize 0x3e82
Loading segment from rom address 0xfffe8270
  Entry Point 0x00100000
Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000036710 filesz: 0x0000000000003e82
Post relocation: addr: 0x0000000007f958f0 memsz: 0x0000000000036710 filesz: 0x0000000000003e82
using LZMA
lzma: Decoding error = 1
Clearing Segment: addr: 0x0000000007f958f0 memsz: 0x0000000000036710
dest 07f958f0, end 07fcc000, bouncebuffer 7f958f0
move suffix around: from 7fb98f0, to 124000, amount: 12710
Jumping to boot code at 100000


From marcj303 at gmail.com  Thu Dec  3 19:41:44 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Thu, 3 Dec 2009 11:41:44 -0700
Subject: [coreboot] AMD ASB1 Package L325 & L625
In-Reply-To: <df21912a0912021854x3825442ax304b27b059ebf4b1@mail.gmail.com>
References: <df21912a0912021854x3825442ax304b27b059ebf4b1@mail.gmail.com>
Message-ID: <534e5dc20912031041w2155720bq495bd099ae61475b@mail.gmail.com>

On Wed, Dec 2, 2009 at 7:54 PM, Libra Li <librali1977 at gmail.com> wrote:
> Hello,
>
> ??? Can the coreboot support AMD CPU L325 & L625 on version 2?
> ??? Can it working on L325+RS690 & L625+RS690?
> ??? Thanks.
>

Yes, I think you can use the AMD Pistachio platform as an example.
Marc


-- 
http://marcjonesconsulting.com



From jonathanrrogers at gmail.com  Thu Dec  3 22:38:49 2009
From: jonathanrrogers at gmail.com (Jonathan Rogers)
Date: Thu, 3 Dec 2009 16:38:49 -0500
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
Message-ID: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>

I just built coreboot from SVN using the kconfig system for my ASUS
A8V-E SE. However, I never get anything after the "now booting...
fallback" message on the serial port. Also, the hard drive activity
light stays on solid.

I had coreboot working fine on this exact board over a year ago. Then,
I had to use the manual build method. Back then, even when the video
card didn't initialize, I got a lot more output on the serial port.

What should I try next? Do I still need to use the manual build method
for this board?
-- 
Jonathan Rogers



From mylesgw at gmail.com  Thu Dec  3 23:28:07 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Thu, 3 Dec 2009 15:28:07 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <0355BDD90642444A84B1B999889A8194@chimp>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<0355BDD90642444A84B1B999889A8194@chimp>
Message-ID: <2831fecf0912031428h4b610a7ciba81eabd0c1e9610@mail.gmail.com>

On Thu, Dec 3, 2009 at 3:14 PM, Myles Watson <mylesgw at gmail.com> wrote:
>
>> I just built coreboot from SVN using the kconfig system for my ASUS
>> A8V-E SE. However, I never get anything after the "now booting...
>> fallback" message on the serial port. Also, the hard drive activity
>> light stays on solid.
>>
>> I had coreboot working fine on this exact board over a year ago. Then,
>> I had to use the manual build method. Back then, even when the video
>> card didn't initialize, I got a lot more output on the serial port.
>>
>> What should I try next? Do I still need to use the manual build method
>> for this board?
> It looks like there are quite a few differences between the old build's
> CONFIG_* settings and Kconfig's settings. ?Does the old way still work for
> you with the latest svn? ?If so, we can fix Kconfig to match and try that.
Here's the patch that makes most of the important things match.
There's really no good reason to go back to the old way of building.
Let's just fix what we're using.

Signed-off-by: Myles Watson <mylesgw at gmail.com>

Thanks,
Myles
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From mylesgw at gmail.com  Thu Dec  3 23:14:31 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Thu, 3 Dec 2009 15:14:31 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
Message-ID: <0355BDD90642444A84B1B999889A8194@chimp>


> I just built coreboot from SVN using the kconfig system for my ASUS
> A8V-E SE. However, I never get anything after the "now booting...
> fallback" message on the serial port. Also, the hard drive activity
> light stays on solid.
> 
> I had coreboot working fine on this exact board over a year ago. Then,
> I had to use the manual build method. Back then, even when the video
> card didn't initialize, I got a lot more output on the serial port.
> 
> What should I try next? Do I still need to use the manual build method
> for this board?
It looks like there are quite a few differences between the old build's
CONFIG_* settings and Kconfig's settings.  Does the old way still work for
you with the latest svn?  If so, we can fix Kconfig to match and try that.

Thanks,
Myles 




From peter at stuge.se  Fri Dec  4 00:34:40 2009
From: peter at stuge.se (Peter Stuge)
Date: Fri, 4 Dec 2009 00:34:40 +0100
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <2831fecf0912031428h4b610a7ciba81eabd0c1e9610@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<0355BDD90642444A84B1B999889A8194@chimp>
	<2831fecf0912031428h4b610a7ciba81eabd0c1e9610@mail.gmail.com>
Message-ID: <20091203233440.2188.qmail@stuge.se>

Myles Watson wrote:
> Here's the patch that makes most of the important things match.
> There's really no good reason to go back to the old way of building.
> Let's just fix what we're using.
> 
> Signed-off-by: Myles Watson <mylesgw at gmail.com>

Acked-by: Peter Stuge <peter at stuge.se>



From librali1977 at gmail.com  Fri Dec  4 02:34:04 2009
From: librali1977 at gmail.com (Libra Li)
Date: Fri, 4 Dec 2009 09:34:04 +0800
Subject: [coreboot] AMD ASB1 Package L325 & L625
In-Reply-To: <534e5dc20912031041w2155720bq495bd099ae61475b@mail.gmail.com>
References: <df21912a0912021854x3825442ax304b27b059ebf4b1@mail.gmail.com>
	<534e5dc20912031041w2155720bq495bd099ae61475b@mail.gmail.com>
Message-ID: <df21912a0912031734n51967c81h449b21ac14c5ea89@mail.gmail.com>

Hi, Marc,

    I'll try it.
    Thank you.


2009/12/4 Marc Jones <marcj303 at gmail.com>

> On Wed, Dec 2, 2009 at 7:54 PM, Libra Li <librali1977 at gmail.com> wrote:
> > Hello,
> >
> >     Can the coreboot support AMD CPU L325 & L625 on version 2?
> >     Can it working on L325+RS690 & L625+RS690?
> >     Thanks.
> >
>
> Yes, I think you can use the AMD Pistachio platform as an example.
> Marc
>
>
> --
> http://marcjonesconsulting.com
>
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From mylesgw at gmail.com  Fri Dec  4 06:52:52 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Thu, 3 Dec 2009 22:52:52 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <65adf8860912032138i2f8b2b5eyb41f372a10b6c44c@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<0355BDD90642444A84B1B999889A8194@chimp>
	<2831fecf0912031428h4b610a7ciba81eabd0c1e9610@mail.gmail.com>
	<65adf8860912032138i2f8b2b5eyb41f372a10b6c44c@mail.gmail.com>
Message-ID: <2FD78DF61B1A4B6E8051C9FE2ED8745B@chimp>

 
> Thanks. I tried this patch and built it with kconfig, but it still hangs.

I'm assuming that it hangs in the same spot, right?

Since I don't have the board, I can only suggest narrowing down where it
hangs.  You could insert more print statements liberally, etc.

You could try commenting out enumerate_ht_chain() in cache_as_ram_auto.c,
and see if that gets you farther.

Sorry it's broken.

Myles 




From svn at coreboot.org  Fri Dec  4 10:09:59 2009
From: svn at coreboot.org (coreboot)
Date: Fri, 04 Dec 2009 09:09:59 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.fbacb9135ebf7efcbdcb1d397b49131d@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by edwin_beasant@?):

 V3 issues resolved : someone had  messed up the gcc install (how I will
 never know) on our build system.
 Coreboot v3 sucessfully built and running  on a db800. if only seabios
 didn't reset on execution now :-)
 Anyway, I guess it might be an idea to park the patch until v3 DB800 is
 backported to v2?
 Thanks again,
 Edwin

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:8>
coreboot <http://www.coreboot.org/>


From scott.hsiao at quanmax.com  Thu Dec  3 05:09:19 2009
From: scott.hsiao at quanmax.com (Scott.Hsiao)
Date: Thu, 3 Dec 2009 12:09:19 +0800
Subject: [coreboot] howto build qemu bios image with VGA console support?
Message-ID: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA7fUEnOSCgEKMu2M8AXqTmgEAAAAA@quanmax.com>

Dear all,
I am trying some features of coreboot.
The pre-compiled qemu images with various payload are fine but the one built
by myself is not so lucky.
Only the serail console is up but no VGA console.
 
Here are the modifications I done:
1) add two lines in the mainboard Options.lb
(src/mainboard/emulation/qemu-x86) accrording "VGA Support" document ( I
assume PCI 02:0 is add-on PCI card, is this right for QEMU?)
uses CONFIG_CONSOLE_VGA
default CONFIG_CONSOLE_VGA=1
2) add two lines in target Config.lb (target/emulation/qemu-x86)
option CONFIG_CONSOLE_VGA=1
option CONFIG_PCI_ROM_RUN=1
 
Please give me some directions to enable the VGA outout.
Thanks,
Scott Hsiao
-------------- next part --------------
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From r.marek at assembler.cz  Fri Dec  4 10:30:59 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Fri, 04 Dec 2009 10:30:59 +0100
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
Message-ID: <4B18D6D3.9050309@assembler.cz>

Hi,

Please can you compare  last 128 bytes of image? I suspect that ROM SIP for HT 
bus settings is not right. I mean it is same issue as M2V-MX SE.

It should contain:

0007FF80 AA 00 44 50 ? C2 0F 97 61 ? AA 00 44 50 ? C2 0F 97 61 ? AA 00 44 50 
?.DP?.?a?.DP?.?a?.DP
0007FF94 C2 0F 97 61 ? AA 00 44 50 ? C2 0F 97 61 ? AA 00 44 50 ? C2 0F 97 61 
?.?a?.DP?.?a?.DP?.?a
0007FFA8 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 
....................
0007FFBC 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 
....................
0007FFD0 80 FF 0F 00 ? FF FF FF FF ? FF FF FF FF ? FF FF FF FF ? FF FF FF FF 
??..????????????????
0007FFE4 FF FF FF FF ? FF FF FF FF ? FF FF FF FF ? E9 11 00 FF ? FF 00 00 00 
?????????????..??...
0007FFF8 E9 5F 00 FF ? D0 FF FD FF ?

Repeated AA 00 44 50 at 0007FF80

I will go out of internet for a weekend, so I can help next week or Sunday.

Eventually I can try with mine A8V-E SE if it does boot with normal bios at least...

Rudolf



From mylesgw at gmail.com  Fri Dec  4 17:36:01 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 4 Dec 2009 09:36:01 -0700
Subject: [coreboot] howto build qemu bios image with VGA console support?
In-Reply-To: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA7fUEnOSCgEKMu2M8AXqTmgEAAAAA@quanmax.com>
References: <!~!UENERkVCMDkAAQACAAAAAAAAAAAAAAAAABgAAAAAAAAASvrZ/fYprkuwT75q50ykaMKAAAAQAAAA7fUEnOSCgEKMu2M8AXqTmgEAAAAA@quanmax.com>
Message-ID: <2831fecf0912040836v196e227co2d21190fd41c8c97@mail.gmail.com>

> Please give me some directions to enable the VGA outout.

The best way is to use Kconfig.
1. make menuconfig
2. Select  [*] Use VGA console once initialized  in the Console Options menu
3. make clean
4. make

Thanks,
Myles



From daniel at caiaq.de  Fri Dec  4 17:47:55 2009
From: daniel at caiaq.de (Daniel Mack)
Date: Fri, 4 Dec 2009 17:47:55 +0100
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <20091202144415.GD14091@buzzloop.caiaq.de>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
	<20091202135901.16894.qmail@stuge.se>
	<20091202144415.GD14091@buzzloop.caiaq.de>
Message-ID: <20091204164755.GU14091@buzzloop.caiaq.de>

No hint, anyone?

On Wed, Dec 02, 2009 at 03:44:15PM +0100, Daniel Mack wrote:
> On Wed, Dec 02, 2009 at 02:59:01PM +0100, Peter Stuge wrote:
> > Daniel Mack wrote:
> > > the effect is harder to trigger when booting from an external LPC
> > > flash emulator (in contrast to coreboot flashed to the internal
> > > LPC).
> > 
> > Then you could experiment with a few different flash chips.
> > 
> > PC Engines makes a nice and neat Flash recovery board, which plugs
> > onto the LPC header, and comes with a PLCC chip in a socket.
> 
> I doubt the flash chip itself is the problem. Might be I haven't been
> totally clear about what I observed.
> 
> When using the Linux tools to flash an image to the internal LPC, the
> system most likely won't come up immediately. I need that power-off
> delay of some minutes to reanimate the board. After that, the bug is
> very hard to trigger, even though it does happen, especially when
> powering the device off (by unplugging the supply) and on again right
> after that.
> 
> So my theory is that there is something left in any part of the system
> which makes coreboot fail in disable_car(). And the same (or maybe just
> a similar) effect is triggered when the LPC is written.
> 
> Does that ring a bell? As I said, I'm pretty lost in debugging this, but
> I'm sure we're not having a hardware issue.
> 
> Thanks,
> Daniel



From mylesgw at gmail.com  Fri Dec  4 17:58:54 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 4 Dec 2009 09:58:54 -0700
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <20091204164755.GU14091@buzzloop.caiaq.de>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
	<20091202135901.16894.qmail@stuge.se>
	<20091202144415.GD14091@buzzloop.caiaq.de>
	<20091204164755.GU14091@buzzloop.caiaq.de>
Message-ID: <2831fecf0912040858u1b6d412byce48ee666f55930d@mail.gmail.com>

On Fri, Dec 4, 2009 at 9:47 AM, Daniel Mack <daniel at caiaq.de> wrote:
> No hint, anyone?
Maybe you could zero all the RAM.  If you have to power it down for a
specific amount of time, that could be the time for the RAM to lose
its state.  If that works, you could start finding uninitialized
variables or a bad pointer somewhere.

As long as you're grasping at straws :)

Thanks,
Myles



From rminnich at gmail.com  Fri Dec  4 18:03:14 2009
From: rminnich at gmail.com (ron minnich)
Date: Fri, 4 Dec 2009 09:03:14 -0800
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <20091204164755.GU14091@buzzloop.caiaq.de>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
	<20091202135901.16894.qmail@stuge.se>
	<20091202144415.GD14091@buzzloop.caiaq.de>
	<20091204164755.GU14091@buzzloop.caiaq.de>
Message-ID: <13426df10912040903j5f242600k39bd8b6517079d94@mail.gmail.com>

On Fri, Dec 4, 2009 at 8:47 AM, Daniel Mack <daniel at caiaq.de> wrote:
> No hint, anyone?

Just about every time I had this problem on my geodes it was a problem
with dram. Just about every time. It's quite weird how well DRAM can
work even if it has not been programmed correctly. The correspondance
with disable_car() might just be that there's lots of burst cache
traffic to ram when you do this operation and cache is suddenly
connected to dram again.

Also, over the years, we have frequently found that DRAM vendors are,
well, less-than-honest about their product. One experience was on
OLPC. We had three boards, all with nominally the same parts,
different vendors however.
Boards A&B worked with faster timing; Boards A&C worked with medium
timing; and boards B&C only worked with the slowest timing. (I believe
in this case it was ras to cas delay)

Yes, indeed, it's not always true that slowing down dram makes it work :-)

Rather than "power off for 10 minutes" -- I assume this is "at the
wall plug" -- I wonder if you'd see an improvement if you yanked the
DC power at the board. Which were you doing -- AC or DC power off?

Thanks

ron



From mylesgw at gmail.com  Fri Dec  4 18:10:11 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 4 Dec 2009 10:10:11 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <4B18D6D3.9050309@assembler.cz>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
Message-ID: <2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>

On Fri, Dec 4, 2009 at 2:30 AM, Rudolf Marek <r.marek at assembler.cz> wrote:
> Hi,
>
> Please can you compare ?last 128 bytes of image? I suspect that ROM SIP for
> HT bus settings is not right. I mean it is same issue as M2V-MX SE.
Thanks.  I always forget about that.

You can try the attached patch.  Make sure to:
rm -rf build
make oldconfig
make

after applying the patch.

Signed-off-by: Myles Watson <mylesgw at gmail.com>

> It should contain:
>
> 0007FF80 AA 00 44 50 ? C2 0F 97 61 ? AA 00 44 50 ? C2 0F 97 61 ? AA 00 44 50
> ?.DP?.?a?.DP?.?a?.DP
> 0007FF94 C2 0F 97 61 ? AA 00 44 50 ? C2 0F 97 61 ? AA 00 44 50 ? C2 0F 97 61
> ?.?a?.DP?.?a?.DP?.?a
> 0007FFA8 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00
> ....................
> 0007FFBC 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00 ? 00 00 00 00
> ....................
> 0007FFD0 80 FF 0F 00 ? FF FF FF FF ? FF FF FF FF ? FF FF FF FF ? FF FF FF FF
> ??..????????????????
> 0007FFE4 FF FF FF FF ? FF FF FF FF ? FF FF FF FF ? E9 11 00 FF ? FF 00 00 00
> ?????????????..??...
> 0007FFF8 E9 5F 00 FF ? D0 FF FD FF ?
>
> Repeated AA 00 44 50 at 0007FF80
 hexdump -C build/coreboot.rom | tail
*
0007ff80  aa 00 44 50 c2 0f 97 61  aa 00 44 50 c2 0f 97 61  |..DP...a..DP...a|
*
0007ffa0  aa 00 44 50 c2 0f 97 61  00 00 00 00 00 00 00 00  |..DP...a........|
0007ffb0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
0007ffd0  80 ff 0f 00 00 00 41 53  55 53 00 41 38 56 2d 45  |......ASUS.A8V-E|
0007ffe0  20 53 45 00 2a 00 00 00  25 00 00 00 00 00 08 00  | SE.*...%.......|
0007fff0  e9 11 00 ff ff 00 00 00  e9 5f 00 ff e0 ff fe ff  |........._......|
00080000

Thanks,
Myles
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From daniel at caiaq.de  Fri Dec  4 18:12:44 2009
From: daniel at caiaq.de (Daniel Mack)
Date: Fri, 4 Dec 2009 18:12:44 +0100
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <13426df10912040903j5f242600k39bd8b6517079d94@mail.gmail.com>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
	<20091202135901.16894.qmail@stuge.se>
	<20091202144415.GD14091@buzzloop.caiaq.de>
	<20091204164755.GU14091@buzzloop.caiaq.de>
	<13426df10912040903j5f242600k39bd8b6517079d94@mail.gmail.com>
Message-ID: <20091204171244.GV14091@buzzloop.caiaq.de>

Hi Ron,

thanks for your answer.

On Fri, Dec 04, 2009 at 09:03:14AM -0800, ron minnich wrote:
> On Fri, Dec 4, 2009 at 8:47 AM, Daniel Mack <daniel at caiaq.de> wrote:
> > No hint, anyone?
> 
> Just about every time I had this problem on my geodes it was a problem
> with dram. Just about every time. It's quite weird how well DRAM can
> work even if it has not been programmed correctly. The correspondance
> with disable_car() might just be that there's lots of burst cache
> traffic to ram when you do this operation and cache is suddenly
> connected to dram again.

Help me understanding how the DRAM can be programmed correctly. Is it
about timing constraints?

> Also, over the years, we have frequently found that DRAM vendors are,
> well, less-than-honest about their product. One experience was on
> OLPC. We had three boards, all with nominally the same parts,
> different vendors however.
> Boards A&B worked with faster timing; Boards A&C worked with medium
> timing; and boards B&C only worked with the slowest timing. (I believe
> in this case it was ras to cas delay)

That could well be an explanation for what I'm seeing, however, I wonder
why all boards work totally stable once they booted. Wouldn't wrong DRAM
settings result in unpredictable behaviour such as sporadic fails? I
don't see anything like that.

> Rather than "power off for 10 minutes" -- I assume this is "at the
> wall plug" -- I wonder if you'd see an improvement if you yanked the
> DC power at the board. Which were you doing -- AC or DC power off?

I was unplugging the DC jack from the board. There is some blocking
capacitors on it, but I doubt they will cause any part of the system to
survive much longer than a couple of seconds. But even something like
10s doesn't solve it. Only sometimes though, and I haven't found a
reliable pattern yet. Damn, I really wish I could provide more specific
input :-/

Thanks,
Daniel



From rminnich at gmail.com  Fri Dec  4 18:16:37 2009
From: rminnich at gmail.com (ron minnich)
Date: Fri, 4 Dec 2009 09:16:37 -0800
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <20091204171244.GV14091@buzzloop.caiaq.de>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
	<20091202135901.16894.qmail@stuge.se>
	<20091202144415.GD14091@buzzloop.caiaq.de>
	<20091204164755.GU14091@buzzloop.caiaq.de>
	<13426df10912040903j5f242600k39bd8b6517079d94@mail.gmail.com>
	<20091204171244.GV14091@buzzloop.caiaq.de>
Message-ID: <13426df10912040916y26daf7acgd30b95dd8fbe8139@mail.gmail.com>

On Fri, Dec 4, 2009 at 9:12 AM, Daniel Mack <daniel at caiaq.de> wrote:

> Help me understanding how the DRAM can be programmed correctly. Is it
> about timing constraints?

it's how you set the timing in the dram controller and how it matches
the DRAM, but it's also about the order in which you program things
and the timing of how you issue the commands. If you're doing v3 this
should all "just work", it certainly used to for me. But I have not
touched this code in 9 months or more.

> That could well be an explanation for what I'm seeing, however, I wonder
> why all boards work totally stable once they booted. Wouldn't wrong DRAM
> settings result in unpredictable behaviour such as sporadic fails? I
> don't see anything like that.

I wish I knew.

> I was unplugging the DC jack from the board. There is some blocking
> capacitors on it, but I doubt they will cause any part of the system to
> survive much longer than a couple of seconds. But even something like
> 10s doesn't solve it. Only sometimes though, and I haven't found a
> reliable pattern yet. Damn, I really wish I could provide more specific
> input :-/

This points more to what Myles was saying -- you might want to zero
all of memory and see if that helps. Are you using crosstool to build?
If not, you should.

ron



From svn at coreboot.org  Fri Dec  4 18:18:23 2009
From: svn at coreboot.org (coreboot)
Date: Fri, 04 Dec 2009 17:18:23 -0000
Subject: [coreboot] #149: AMD DB800 Hangs at "Decompressing Coreboot to
 Ram"
In-Reply-To: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
References: <063.d4257763b4ee0b86e716dc154bfba5c2@coreboot.org>
Message-ID: <072.5f18e6547a7d9d01b16cd022d2c81cbc@coreboot.org>

#149: AMD DB800 Hangs at "Decompressing Coreboot to Ram"
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  defect                       |         Status:  new     
   Priority:  major                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by hailfinger):

 I'm happy to hear that v3 now works.
 I don't know about SeaBIOS/v3 interactions. It could also depend on which
 VSA you're using.

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/149#comment:9>
coreboot <http://www.coreboot.org/>


From marcj303 at gmail.com  Fri Dec  4 18:30:21 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Fri, 4 Dec 2009 10:30:21 -0700
Subject: [coreboot] GeodeLX RAM initialisation issue
In-Reply-To: <20091204171244.GV14091@buzzloop.caiaq.de>
References: <20091202131830.GA14091@buzzloop.caiaq.de>
	<20091202135901.16894.qmail@stuge.se>
	<20091202144415.GD14091@buzzloop.caiaq.de>
	<20091204164755.GU14091@buzzloop.caiaq.de>
	<13426df10912040903j5f242600k39bd8b6517079d94@mail.gmail.com>
	<20091204171244.GV14091@buzzloop.caiaq.de>
Message-ID: <534e5dc20912040930k2c3d5fbwc9fbe905732efb39@mail.gmail.com>

On Fri, Dec 4, 2009 at 10:12 AM, Daniel Mack <daniel at caiaq.de> wrote:
> Hi Ron,
>
> thanks for your answer.
>
> On Fri, Dec 04, 2009 at 09:03:14AM -0800, ron minnich wrote:
>> On Fri, Dec 4, 2009 at 8:47 AM, Daniel Mack <daniel at caiaq.de> wrote:
>> > No hint, anyone?
>>
>> Just about every time I had this problem on my geodes it was a problem
>> with dram. Just about every time. It's quite weird how well DRAM can
>> work even if it has not been programmed correctly. The correspondance
>> with disable_car() might just be that there's lots of burst cache
>> traffic to ram when you do this operation and cache is suddenly
>> connected to dram again.
>
> Help me understanding how the DRAM can be programmed correctly. Is it
> about timing constraints?
>
>> Also, over the years, we have frequently found that DRAM vendors are,
>> well, less-than-honest about their product. One experience was on
>> OLPC. We had three boards, all with nominally the same parts,
>> different vendors however.
>> Boards A&B worked with faster timing; Boards A&C worked with medium
>> timing; and boards B&C only worked with the slowest timing. (I believe
>> in this case it was ras to cas delay)
>
> That could well be an explanation for what I'm seeing, however, I wonder
> why all boards work totally stable once they booted. Wouldn't wrong DRAM
> settings result in unpredictable behaviour such as sporadic fails? I
> don't see anything like that.
>
>> Rather than "power off for 10 minutes" -- I assume this is "at the
>> wall plug" -- I wonder if you'd see an improvement if you yanked the
>> DC power at the board. Which were you doing -- AC or DC power off?
>
> I was unplugging the DC jack from the board. There is some blocking
> capacitors on it, but I doubt they will cause any part of the system to
> survive much longer than a couple of seconds. But even something like
> 10s doesn't solve it. Only sometimes though, and I haven't found a
> reliable pattern yet. Damn, I really wish I could provide more specific
> input :-/

I'm a little confused. Is the failure always at disable_car when you
do the flash programming? What does "the system most likely won't come
up immediately" mean? This description sounds more like the 5536 being
in a bad state, which may or may not have to do with RAM. I have heard
of problems with the 5536 getting locked up if power sequencing is not
exactly right. Does it work if you unplug, remove the cmos battery,
press the power button to remove any capacitance, then plug it back in
make it work?

If it always breaks at disable_car(), it could be a memory or cache
state problem that wouldn't be seen with the legacy BIOS because it
doesn't do CAR. It could still be hardware/power sequence related
since we don't see this on every platform.  As far as I know, the AMD
reference designs and the Artec mainboards don't exhibit this problem.

Marc

-- 
http://marcjonesconsulting.com



From mylesgw at gmail.com  Sat Dec  5 00:09:30 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 4 Dec 2009 16:09:30 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
Message-ID: <FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>


> I applied the patch, but unfortunately, it still hangs in the same place.
Did you check with hexdump to make sure it was effective?

Does it hang in the same place with a cold boot, or only on warm reset?


> > ?hexdump -C build/coreboot.rom | tail
> > *
> > 0007ff80 ?aa 00 44 50 c2 0f 97 61 ?aa 00 44 50 c2 0f 97 61
> ?|..DP...a..DP...a|
> > *
> > 0007ffa0 ?aa 00 44 50 c2 0f 97 61 ?00 00 00 00 00 00 00 00
> ?|..DP...a........|
> > 0007ffb0 ?00 00 00 00 00 00 00 00 ?00 00 00 00 00 00 00 00
> ?|................|
> > *
> > 0007ffd0 ?80 ff 0f 00 00 00 41 53 ?55 53 00 41 38 56 2d 45
> ?|......ASUS.A8V-E|
> > 0007ffe0 ?20 53 45 00 2a 00 00 00 ?25 00 00 00 00 00 08 00 ?|
> SE.*...%.......|
> > 0007fff0 ?e9 11 00 ff ff 00 00 00 ?e9 5f 00 ff e0 ff fe ff
> ?|........._......|
> > 00080000
Thanks,
Myles




From jonathanrrogers at gmail.com  Sat Dec  5 01:05:22 2009
From: jonathanrrogers at gmail.com (Jonathan Rogers)
Date: Fri, 4 Dec 2009 19:05:22 -0500
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
Message-ID: <65adf8860912041605l4f4818b6u107ffb15f602834c@mail.gmail.com>

On Fri, Dec 4, 2009 at 6:09 PM, Myles Watson <mylesgw at gmail.com> wrote:
>
>> I applied the patch, but unfortunately, it still hangs in the same place.
> Did you check with hexdump to make sure it was effective?

I now realize that the hexdump you sent is not the same as the one
Rudolph Marek did. Mine matches yours, so that's wrong I guess. I had
applied your patch, but I'm not sure where those last 128 bytes are
supposed to come from.
>
> Does it hang in the same place with a cold boot, or only on warm reset?

It hangs in exactly the same place both from cold boot and warm reset.

>
>
>> > ?hexdump -C build/coreboot.rom | tail
>> > *
>> > 0007ff80 ?aa 00 44 50 c2 0f 97 61 ?aa 00 44 50 c2 0f 97 61
>> ?|..DP...a..DP...a|
>> > *
>> > 0007ffa0 ?aa 00 44 50 c2 0f 97 61 ?00 00 00 00 00 00 00 00
>> ?|..DP...a........|
>> > 0007ffb0 ?00 00 00 00 00 00 00 00 ?00 00 00 00 00 00 00 00
>> ?|................|
>> > *
>> > 0007ffd0 ?80 ff 0f 00 00 00 41 53 ?55 53 00 41 38 56 2d 45
>> ?|......ASUS.A8V-E|
>> > 0007ffe0 ?20 53 45 00 2a 00 00 00 ?25 00 00 00 00 00 08 00 ?|
>> SE.*...%.......|
>> > 0007fff0 ?e9 11 00 ff ff 00 00 00 ?e9 5f 00 ff e0 ff fe ff
>> ?|........._......|
>> > 00080000
> Thanks,
> Myles
>
>



-- 
Jonathan Rogers



From mylesgw at gmail.com  Sat Dec  5 01:09:10 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 4 Dec 2009 17:09:10 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <65adf8860912041605l4f4818b6u107ffb15f602834c@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
	<65adf8860912041605l4f4818b6u107ffb15f602834c@mail.gmail.com>
Message-ID: <2831fecf0912041609j13e3dcabi4f276bed720c808a@mail.gmail.com>

On Fri, Dec 4, 2009 at 5:05 PM, Jonathan Rogers
<jonathanrrogers at gmail.com>wrote:

> On Fri, Dec 4, 2009 at 6:09 PM, Myles Watson <mylesgw at gmail.com> wrote:
> >
> >> I applied the patch, but unfortunately, it still hangs in the same
> place.
> > Did you check with hexdump to make sure it was effective?
>
> I now realize that the hexdump you sent is not the same as the one
> Rudolph Marek did. Mine matches yours, so that's wrong I guess. I had
> applied your patch, but I'm not sure where those last 128 bytes are
> supposed to come from.
>
That's good to realize.  Try reverting romstrap.inc and romstrap.lds to 3110
since that one gets farther.

Thanks,
Myles
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From mylesgw at gmail.com  Sat Dec  5 06:43:06 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 4 Dec 2009 22:43:06 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <2831fecf0912041609j13e3dcabi4f276bed720c808a@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
	<65adf8860912041605l4f4818b6u107ffb15f602834c@mail.gmail.com>
	<2831fecf0912041609j13e3dcabi4f276bed720c808a@mail.gmail.com>
Message-ID: <2831fecf0912042143s49470c88g25b56a5d45aa0c84@mail.gmail.com>

On Fri, Dec 4, 2009 at 5:09 PM, Myles Watson <mylesgw at gmail.com> wrote:

>
>
> On Fri, Dec 4, 2009 at 5:05 PM, Jonathan Rogers <jonathanrrogers at gmail.com
> > wrote:
>
>> On Fri, Dec 4, 2009 at 6:09 PM, Myles Watson <mylesgw at gmail.com> wrote:
>> >
>> >> I applied the patch, but unfortunately, it still hangs in the same
>> place.
>> > Did you check with hexdump to make sure it was effective?
>>
>> I now realize that the hexdump you sent is not the same as the one
>> Rudolph Marek did. Mine matches yours, so that's wrong I guess. I had
>> applied your patch, but I'm not sure where those last 128 bytes are
>> supposed to come from.
>>
> That's good to realize.  Try reverting romstrap.inc and romstrap.lds to
> 3110 since that one gets farther.
>
I just looked, and those files haven't changed since then.  At least you can
compare the last 128 bytes from that image with your latest.  As I read the
file, it all looks correct.  The table is there and the pointer to it is
intact.

Is it jumping to the "normal" image somehow?  Since there is no normal image
that would be bad.

Myles
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From knuku at gap.upv.es  Sat Dec  5 13:57:27 2009
From: knuku at gap.upv.es (Knut Kujat)
Date: Sat, 5 Dec 2009 13:57:27 +0100 (CET)
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
Message-ID: <1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>

Hi,

I'm trying to build coreboot for the exact same board and getting to
the same point as Jonathan Rogers. I also tried with the patch and same
result it hangs at "now booting... fallback". I inserted some prints
and get till



else if (do_normal_boot()) {

          printf_info("debug6");

        goto normal_image;





any suggestions?



thx and have a nice weekend.
>
>> I applied the patch, but unfortunately, it still hangs in the same
>> place.
> Did you check with hexdump to make sure it was effective?
>
> Does it hang in the same place with a cold boot, or only on warm reset?
>
>
>> > ?hexdump -C build/coreboot.rom | tail
>> > *
>> > 0007ff80 ?aa 00 44 50 c2 0f 97 61 ?aa 00 44 50 c2 0f 97 61
>> ?|..DP...a..DP...a|
>> > *
>> > 0007ffa0 ?aa 00 44 50 c2 0f 97 61 ?00 00 00 00 00 00 00 00
>> ?|..DP...a........|
>> > 0007ffb0 ?00 00 00 00 00 00 00 00 ?00 00 00 00 00 00 00 00
>> ?|................|
>> > *
>> > 0007ffd0 ?80 ff 0f 00 00 00 41 53 ?55 53 00 41 38 56 2d 45
>> ?|......ASUS.A8V-E|
>> > 0007ffe0 ?20 53 45 00 2a 00 00 00 ?25 00 00 00 00 00 08 00 ?|
>> SE.*...%.......|
>> > 0007fff0 ?e9 11 00 ff ff 00 00 00 ?e9 5f 00 ff e0 ff fe ff
>> ?|........._......|
>> > 00080000
> Thanks,
> Myles
>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>


-- 
Knut Kujat




From patrick at georgi-clan.de  Sat Dec  5 14:12:54 2009
From: patrick at georgi-clan.de (Patrick Georgi)
Date: Sat, 05 Dec 2009 14:12:54 +0100
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>	<4B18D6D3.9050309@assembler.cz>	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
	<1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>
Message-ID: <4B1A5C56.9090103@georgi-clan.de>

Am 05.12.2009 13:57, schrieb Knut Kujat:
> Hi,
>
> I'm trying to build coreboot for the exact same board and getting to
> the same point as Jonathan Rogers. I also tried with the patch and same
> result it hangs at "now booting... fallback". I inserted some prints
> and get till
>
>
>
> else if (do_normal_boot()) {
>
>            printf_info("debug6");
>
>          goto normal_image;
>
>
>
>
>
> any suggestions?
>    
"normal_image" might lead to nowhere in a kconfig build.


Patrick



From root at crankyadmin.net  Sat Dec  5 16:31:42 2009
From: root at crankyadmin.net (David Houston)
Date: Sat, 5 Dec 2009 15:31:42 +0000
Subject: [coreboot] Serial Debugging.
Message-ID: <35c4df160912050731n797a753bhf7e4cc8e03cb1b90@mail.gmail.com>

Hi!

I have finally got round to making myself a IDC Serial header for debugging
purposes.

http://www.maplin.co.uk/Module.aspx?ModuleNo=29968 <--- would it be ok to
get a male to female converter for this adapter and will it still work ok
with coreboot?

Cheer guys

Dave
-------------
root at crankyadmin.net
cranky at archlinux.us
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From mylesgw at gmail.com  Sat Dec  5 18:01:30 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Sat, 5 Dec 2009 10:01:30 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
	<1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>
Message-ID: <1B4396E266EA498D9917CA3EB3525E0C@chimp>



> -----Original Message-----
> From: Knut Kujat [mailto:knuku at gap.upv.es]
> Sent: Saturday, December 05, 2009 5:57 AM
> To: Myles Watson
> Cc: 'Jonathan Rogers'; coreboot at coreboot.org
> Subject: Re: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
> 
> Hi,
> 
> I'm trying to build coreboot for the exact same board and getting to
> the same point as Jonathan Rogers. I also tried with the patch and same
> result it hangs at "now booting... fallback". I inserted some prints
> and get till
> 
> else if (do_normal_boot()) {
> 
>           printf_info("debug6");
> 
>         goto normal_image;
Great.

> any suggestions?

There is no normal_image with Kconfig yet.  The quick way to test would be
to change all normal_image to fallback_image, or any other way to make sure
it never jumps to normal_image.

Thanks,
Myles




From peter at stuge.se  Sat Dec  5 23:54:20 2009
From: peter at stuge.se (Peter Stuge)
Date: Sat, 5 Dec 2009 23:54:20 +0100
Subject: [coreboot] Serial Debugging.
In-Reply-To: <35c4df160912050731n797a753bhf7e4cc8e03cb1b90@mail.gmail.com>
References: <35c4df160912050731n797a753bhf7e4cc8e03cb1b90@mail.gmail.com>
Message-ID: <20091205225420.21108.qmail@stuge.se>

David Houston wrote:
> I have finally got round to making myself a IDC Serial header for
> debugging purposes.

Which board are you working with?


> http://www.maplin.co.uk/Module.aspx?ModuleNo=29968 <--- would it be
> ok to get a male to female converter for this adapter and will it
> still work ok with coreboot?

You can connect that to a laptop or other modern PC without a serial
port, in order to get a serial port which applications can use. You
also need a cross-over serial cable, not just a gender changer.

However, that USB thing is only useful on the host system, where you
do development, compiling, save logs, and so on. It is not useful on
the target side. There you must have an onboard serial port.


//Peter



From root at crankyadmin.net  Sun Dec  6 00:09:04 2009
From: root at crankyadmin.net (David Houston)
Date: Sat, 5 Dec 2009 23:09:04 +0000
Subject: [coreboot] Serial Debugging.
In-Reply-To: <20091205225420.21108.qmail@stuge.se>
References: <35c4df160912050731n797a753bhf7e4cc8e03cb1b90@mail.gmail.com>
	<20091205225420.21108.qmail@stuge.se>
Message-ID: <35c4df160912051509g62744500sf41629783990e3fa@mail.gmail.com>

>
> Which board are you working with?


Sun Workstation 20 Ultra M2, Board has a header (9 pin) which I have
attached my IDC serial header to.

You can connect that to a laptop or other modern PC without a serial

port, in order to get a serial port which applications can use



However, that USB thing is only useful on the host system, where you

do development, compiling, save logs, and so on. It is not useful on

the target side. There you must have an onboard serial port.


My development board EVGA nforce 6 based board with no onboard serial.
A  cross-over serial cable, is that the same of different to a null modem
cable.

Many thanks again

Dave
-------------
root at crankyadmin.net
cranky at archlinux.us


On Sat, Dec 5, 2009 at 10:54 PM, Peter Stuge <peter at stuge.se> wrote:

> David Houston wrote:
> > I have finally got round to making myself a IDC Serial header for
> > debugging purposes.
>
> Which board are you working with?
>
>
> > http://www.maplin.co.uk/Module.aspx?ModuleNo=29968 <--- would it be
> > ok to get a male to female converter for this adapter and will it
> > still work ok with coreboot?
>
> You can connect that to a laptop or other modern PC without a serial
> port, in order to get a serial port which applications can use. You
> also need a cross-over serial cable, not just a gender changer.
>
> However, that USB thing is only useful on the host system, where you
> do development, compiling, save logs, and so on. It is not useful on
> the target side. There you must have an onboard serial port.
>
>
> //Peter
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>
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From peter at stuge.se  Sun Dec  6 00:42:42 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 6 Dec 2009 00:42:42 +0100
Subject: [coreboot] Serial Debugging.
In-Reply-To: <35c4df160912051509g62744500sf41629783990e3fa@mail.gmail.com>
References: <35c4df160912050731n797a753bhf7e4cc8e03cb1b90@mail.gmail.com>
	<20091205225420.21108.qmail@stuge.se>
	<35c4df160912051509g62744500sf41629783990e3fa@mail.gmail.com>
Message-ID: <20091205234242.27435.qmail@stuge.se>

David Houston wrote:
> > Which board are you working with?
> 
> Sun Workstation 20 Ultra M2, Board has a header (9 pin) which I
> have attached my IDC serial header to.

Ok. That is an onboard serial port. By port I don't mean DB9
connector, but rather _any connector_. So you are good, if this is
your target board. If this is your workstation board then the USB
cable is of no use.


> My development board EVGA nforce 6 based board with no onboard
> serial.

Then you lose. The target board must have a real serial port onboard.

You can also check if the chipset implements the EHCI Debug Port, in
which case you could use a USB Debug Class Device to communicate with
coreboot. This is a particular USB device, and it must be that one.
A generic USB-serial converter does not work.

http://www.coreboot.org/EHCI_Debug_Port


> A cross-over serial cable, is that the same of different to a null
> modem cable.

Yep!


//Peter



From kevin at koconnor.net  Sun Dec  6 03:31:45 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Sat, 5 Dec 2009 21:31:45 -0500
Subject: [coreboot] Some SeaBIOS timings
In-Reply-To: <20091203030339.GA13935@morn.localdomain>
References: <20091203030339.GA13935@morn.localdomain>
Message-ID: <20091206023145.GA30044@morn.localdomain>

On Wed, Dec 02, 2009 at 10:03:39PM -0500, Kevin O'Connor wrote:
> I decided to rerun some timing tests on my epia-cn.
> 
> With some hacking, I've gotten the time from power-on to SeaBIOS boot
> menu down to 850ms.  Of this time, 530ms is coreboot, 210ms is via vga
> rom, 60ms is usb init (and other hardware probes), and 30ms is time to
> copy and decompress vga rom from flash.

I've done some additional tests, and I've gotten the time from
power-on to boot menu down to 765ms (490ms for coreboot and 275ms for
SeaBIOS).

At this point, I think the hardware costs are dominating the execution
on this board - I only see a few minor ways to further improve
performance.

To get to these numbers, I removed debugging reports (I try to account
for the cost of serial, but it's not perfect), reduced the time
coreboot spends calibrating its timers (20ms to 2ms), and (partly)
parallelized the VGA BIOS execution.

SeaBIOS currently uses a cooperative multi-tasking scheme, so it can't
fully parallelize the vga rom.  Instead, I just delayed launching the
vga rom until after hardware init had started so that some of the
setup time overlaps.  I haven't checked this change in - I'm not sure
it's fully safe.

-Kevin



From peter at stuge.se  Sun Dec  6 12:19:52 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 6 Dec 2009 12:19:52 +0100
Subject: [coreboot] cbfstool: Fill memory allocated in create_cbfs_file()
	with 0xff
Message-ID: <20091206111952.18221.qmail@stuge.se>

See patch.


//Peter
-------------- next part --------------
cbfstool: Fill memory allocated in create_cbfs_file() with 0xff

This should improve programming speed a bit.

Signed-off-by: Peter Stuge <peter at stuge.se>

Index: util/cbfstool/common.c
===================================================================
--- util/cbfstool/common.c	(revision 4973)
+++ util/cbfstool/common.c	(working copy)
@@ -279,6 +279,7 @@
 		       headersize);
 		exit(1);
 	}
+	memset(newdata, 0xff, *datasize + headersize);
 	struct cbfs_file *nextfile = (struct cbfs_file *)newdata;
 	strncpy(nextfile->magic, "LARCHIVE", 8);
 	nextfile->len = htonl(*datasize);

From stepan at coresystems.de  Sun Dec  6 12:59:45 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Sun, 06 Dec 2009 12:59:45 +0100
Subject: [coreboot] cbfstool: Fill memory allocated in
 create_cbfs_file() with 0xff
In-Reply-To: <20091206111952.18221.qmail@stuge.se>
References: <20091206111952.18221.qmail@stuge.se>
Message-ID: <4B1B9CB1.3030603@coresystems.de>

On 12/6/09 12:19 PM, Peter Stuge wrote:
> cbfstool: Fill memory allocated in create_cbfs_file() with 0xff
>
> This should improve programming speed a bit.
>
> Signed-off-by: Peter Stuge <peter at stuge.se>
>   
Unfortunately not a measurable improvement here with the Numonyx M25P32
and the Dediprog SF100, but I guess I need to figure out if it does
"smart flashing" at all.. (it did with some software release afaicr)

Anyways, good idea:
Acked-by: Stefan Reinauer <stepan at coresystems.de>

Stefan



From svn at coreboot.org  Sun Dec  6 13:14:39 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Sun,  6 Dec 2009 13:14:39 +0100
Subject: [coreboot] [commit] r4975 - trunk/util/cbfstool
Message-ID: <mailman.4075.1355071660.16123.coreboot@coreboot.org>

Author: stuge
Date: 2009-12-06 13:14:39 +0100 (Sun, 06 Dec 2009)
New Revision: 4975

Modified:
   trunk/util/cbfstool/common.c
Log:
cbfstool: Fill memory allocated in create_cbfs_file() with 0xff

This should improve programming speed a bit.

Signed-off-by: Peter Stuge <peter at stuge.se>
Acked-by: Stefan Reinauer <stepan at coresystems.de>



Modified: trunk/util/cbfstool/common.c
===================================================================
--- trunk/util/cbfstool/common.c	2009-12-02 21:11:12 UTC (rev 4974)
+++ trunk/util/cbfstool/common.c	2009-12-06 12:14:39 UTC (rev 4975)
@@ -279,6 +279,7 @@
 		       headersize);
 		exit(1);
 	}
+	memset(newdata, 0xff, *datasize + headersize);
 	struct cbfs_file *nextfile = (struct cbfs_file *)newdata;
 	strncpy(nextfile->magic, "LARCHIVE", 8);
 	nextfile->len = htonl(*datasize);




From peter at stuge.se  Sun Dec  6 13:15:36 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 6 Dec 2009 13:15:36 +0100
Subject: [coreboot] cbfstool: Fill memory allocated
	in	create_cbfs_file() with 0xff
In-Reply-To: <4B1B9CB1.3030603@coresystems.de>
References: <20091206111952.18221.qmail@stuge.se>
	<4B1B9CB1.3030603@coresystems.de>
Message-ID: <20091206121536.25601.qmail@stuge.se>

Stefan Reinauer wrote:
> Acked-by: Stefan Reinauer <stepan at coresystems.de>

r4975



From svn at coresystems.de  Sun Dec  6 15:01:08 2009
From: svn at coresystems.de (coresystems autobuild service)
Date: Sun, 06 Dec 2009 15:01:08 +0100
Subject: [coreboot] KBuild Report [r4975]
Message-ID: <4b1bb924.3MKC+KAHduHym468%svn@coresystems.de>

[1/116] a-trend/atc-6220 ok.
Processing mainboard/a-trend/atc-6220 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[2/116] a-trend/atc-6240 ok.
Processing mainboard/a-trend/atc-6240 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[3/116] abit/be6-ii_v2_0 ok.
Processing mainboard/abit/be6-ii_v2_0 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[4/116] advantech/pcm-5820 ok.
Processing mainboard/advantech/pcm-5820 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[5/116] amd/db800 ok.
Processing mainboard/amd/db800 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 4;
+CONFIG_IRQ_SLOT_COUNT = 6;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[6/116] amd/dbm690t ok.
Processing mainboard/amd/dbm690t (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/amd/dbm690t/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[7/116] amd/norwich ok.
Processing mainboard/amd/norwich (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[8/116] amd/pistachio ok.
Processing mainboard/amd/pistachio (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/amd/pistachio/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[9/116] amd/rumba ok.
Processing mainboard/amd/rumba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[10/116] amd/serengeti_cheetah ok.
Processing mainboard/amd/serengeti_cheetah (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/amd/serengeti_cheetah/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_ACPI_SSDTX_NUM = 1;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[11/116] amd/serengeti_cheetah_fam10 fail.
[12/116] arima/hdama ok.
Processing mainboard/arima/hdama (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/arima/hdama/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[13/116] artecgroup/dbe61 ok.
Processing mainboard/artecgroup/dbe61 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[14/116] asi/mb_5blgp ok.
Processing mainboard/asi/mb_5blgp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[15/116] asi/mb_5blmp ok.
Processing mainboard/asi/mb_5blmp (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GENERATE_MP_TABLE = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[16/116] asus/a8n_e ok.
Processing mainboard/asus/a8n_e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/asus/a8n_e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 819200;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_SIZE = 32768;
+CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[17/116] asus/a8v-e_se ok.
Processing mainboard/asus/a8v-e_se (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HEAP_SIZE = 262144;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[18/116] asus/m2v-mx_se ok.
Processing mainboard/asus/m2v-mx_se (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/asus/m2v-mx_se/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 12s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 32505856;
+CONFIG_RAMBASE = 1048576;
-CONFIG_RAMTOP = 33554432;
+CONFIG_RAMTOP = 2097152;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[19/116] asus/mew-am ok.
Processing mainboard/asus/mew-am (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[20/116] asus/mew-vm ok.
Processing mainboard/asus/mew-vm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[21/116] asus/p2b-d ok.
Processing mainboard/asus/p2b-d (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[22/116] asus/p2b-ds ok.
Processing mainboard/asus/p2b-ds (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

+CONFIG_AGP_APERTURE_SIZE = 67108864;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_ADDR_BITS = 36;
+CONFIG_CPU_ADDR_BITS = 40;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 786432;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_ID_SECTION_OFFSET = 16;
+CONFIG_ID_SECTION_OFFSET = 128;
-CONFIG_IRQ_SLOT_COUNT = 7;
+CONFIG_IRQ_SLOT_COUNT = 13;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 33114;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4163;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
+CONFIG_MEM_TRAIN_SEQ = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 262144;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_USE_DCACHE_RAM = 1;
-CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[23/116] asus/p2b-f ok.
Processing mainboard/asus/p2b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[24/116] asus/p2b ok.
Processing mainboard/asus/p2b (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[25/116] asus/p3b-f ok.
Processing mainboard/asus/p3b-f (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[26/116] axus/tc320 ok.
Processing mainboard/axus/tc320 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[27/116] azza/pt-6ibd ok.
Processing mainboard/azza/pt-6ibd (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[28/116] bcom/winnet100 ok.
Processing mainboard/bcom/winnet100 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[29/116] bcom/winnetp680 ok.
Processing mainboard/bcom/winnetp680 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/bcom/winnetp680/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[30/116] biostar/m6tba ok.
Processing mainboard/biostar/m6tba (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[31/116] broadcom/blast ok.
Processing mainboard/broadcom/blast (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[32/116] compaq/deskpro_en_sff_p600 ok.
Processing mainboard/compaq/deskpro_en_sff_p600 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[33/116] dell/s1850 ok.
Processing mainboard/dell/s1850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 36s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 1;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_TTYS0_BAUD = 19200;
+CONFIG_TTYS0_BAUD = 115200;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[34/116] digitallogic/adl855pc ok.
Processing mainboard/digitallogic/adl855pc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[35/116] digitallogic/msm586seg ok.
Processing mainboard/digitallogic/msm586seg (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/digitallogic/msm586seg/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_AMD_SC520 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 262144;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[36/116] digitallogic/msm800sev ok.
Processing mainboard/digitallogic/msm800sev (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 7;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[37/116] eaglelion/5bcm ok.
Processing mainboard/eaglelion/5bcm (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[38/116] emulation/qemu-x86 ok.
Processing mainboard/emulation/qemu-x86 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/emulation/qemu-x86/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_EMULATION_QEMU_X86 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 585728;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 1;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[39/116] gigabyte/ga-6bxc ok.
Processing mainboard/gigabyte/ga-6bxc (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IRQ_SLOT_COUNT = 6;
+CONFIG_IRQ_SLOT_COUNT = 5;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[40/116] gigabyte/ga_2761gxdk ok.
Processing mainboard/gigabyte/ga_2761gxdk (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/gigabyte/ga_2761gxdk/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 0;
+CONFIG_SMP = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[41/116] gigabyte/m57sli ok.
Processing mainboard/gigabyte/m57sli (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/gigabyte/m57sli/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL = 1;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[42/116] hp/dl145_g3 ok.
Processing mainboard/hp/dl145_g3 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[43/116] hp/e_vectra_p2706t ok.
Processing mainboard/hp/e_vectra_p2706t (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[44/116] ibm/e325 ok.
Processing mainboard/ibm/e325 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[45/116] ibm/e326 ok.
Processing mainboard/ibm/e326 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/ibm/e326/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[46/116] iei/juki-511p ok.
Processing mainboard/iei/juki-511p (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/iei/juki-511p/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[47/116] iei/nova4899r ok.
Processing mainboard/iei/nova4899r (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_GX1_VIDEO = 1;
+CONFIG_GX1_VIDEOMODE = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SPLASH_GRAPHIC = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[48/116] iei/pcisa-lx-800-r10 ok.
Processing mainboard/iei/pcisa-lx-800-r10 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294934784;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
-CONFIG_UDELAY_TSC = 0;
+CONFIG_UDELAY_TSC = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[49/116] intel/d945gclf ok.
Processing mainboard/intel/d945gclf (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/intel/d945gclf/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 4293754880;
+CONFIG_DCACHE_RAM_BASE = 4292837376;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294920448;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GENERATE_ACPI_TABLES = 1;
+CONFIG_GENERATE_ACPI_TABLES = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_INIT_TIMER = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HAVE_SMI_HANDLER = 1;
+CONFIG_HAVE_SMI_HANDLER = 0;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[50/116] intel/eagleheights ok.
Processing mainboard/intel/eagleheights (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 18;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 32902;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[51/116] intel/jarrell ok.
Processing mainboard/intel/jarrell (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 34s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 18;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_REBOOT_CNT = 8;
+CONFIG_MAX_REBOOT_CNT = 3;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[52/116] intel/mtarvon ok.
Processing mainboard/intel/mtarvon (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[53/116] intel/truxton ok.
Processing mainboard/intel/truxton (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_EP80579 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LB_CKS_LOC = 126;
+CONFIG_LB_CKS_LOC = 123;
-CONFIG_LB_CKS_RANGE_END = 125;
+CONFIG_LB_CKS_RANGE_END = 122;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[54/116] intel/xe7501devkit ok.
Processing mainboard/intel/xe7501devkit (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 36s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[55/116] iwill/dk8_htx ok.
Processing mainboard/iwill/dk8_htx (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/iwill/dk8_htx/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 802816;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_SIZE = 49152;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 524288;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[56/116] iwill/dk8s2 ok.
Processing mainboard/iwill/dk8s2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_ATI_RAGE_XL = 1;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 12;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[57/116] iwill/dk8x ok.
Processing mainboard/iwill/dk8x (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 19s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[58/116] jetway/j7f24 ok.
Processing mainboard/jetway/j7f24 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/jetway/j7f24/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[59/116] kontron/986lcd-m ok.
Processing mainboard/kontron/986lcd-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/kontron/986lcd-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_CORE = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
-CONFIG_HAVE_ACPI_RESUME = 1;
+CONFIG_HAVE_ACPI_RESUME = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 1;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[60/116] kontron/kt690 ok.
Processing mainboard/kontron/kt690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/kontron/kt690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[61/116] lippert/frontrunner ok.
Processing mainboard/lippert/frontrunner (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[62/116] lippert/roadrunner-lx ok.
Processing mainboard/lippert/roadrunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[63/116] lippert/spacerunner-lx ok.
Processing mainboard/lippert/spacerunner-lx (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 15s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DEBUG = 1;
+CONFIG_DEBUG = 0;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[64/116] mitac/6513wu ok.
Processing mainboard/mitac/6513wu (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[65/116] msi/ms6119 ok.
Processing mainboard/msi/ms6119 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[66/116] msi/ms6147 ok.
Processing mainboard/msi/ms6147 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[67/116] msi/ms6156 ok.
Processing mainboard/msi/ms6156 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[68/116] msi/ms6178 ok.
Processing mainboard/msi/ms6178 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_UDELAY_IO = 0;
+CONFIG_UDELAY_IO = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[69/116] msi/ms7135 ok.
Processing mainboard/msi/ms7135 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/msi/ms7135/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DCACHE_RAM_BASE = 819200;
+CONFIG_DCACHE_RAM_BASE = 847872;
-CONFIG_DCACHE_RAM_SIZE = 32768;
+CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[70/116] msi/ms7260 ok.
Processing mainboard/msi/ms7260 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/msi/ms7260/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 2;
+CONFIG_MEM_TRAIN_SEQ = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[71/116] msi/ms9185 ok.
Processing mainboard/msi/ms9185 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/msi/ms9185/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 8;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 6;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 5218;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[72/116] msi/ms9282 ok.
Processing mainboard/msi/ms9282 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/msi/ms9282/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
+CONFIG_HW_MEM_HOLE_SIZEK = 1048576;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[73/116] nec/powermate2000 ok.
Processing mainboard/nec/powermate2000 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I810_VIDEO_MB_1MB = 1;
+CONFIG_I810_VIDEO_MB_512KB = 0;
+CONFIG_I810_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[74/116] newisys/khepri ok.
Processing mainboard/newisys/khepri (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 9;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[75/116] nvidia/l1_2pvv ok.
Processing mainboard/nvidia/l1_2pvv (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/nvidia/l1_2pvv/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[76/116] olpc/btest ok.
Processing mainboard/olpc/btest (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 22s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[77/116] olpc/rev_a ok.
Processing mainboard/olpc/rev_a (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[78/116] pcengines/alix1c ok.
Processing mainboard/pcengines/alix1c (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_LX = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[79/116] rca/rm4100 ok.
Processing mainboard/rca/rm4100 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/rca/rm4100/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[80/116] soyo/sy-6ba-plus-iii ok.
Processing mainboard/soyo/sy-6ba-plus-iii (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[81/116] sunw/ultra40 ok.
Processing mainboard/sunw/ultra40 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[82/116] supermicro/h8dme ok.
Processing mainboard/supermicro/h8dme (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/supermicro/h8dme/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_LOW_TABLES = 0;
+CONFIG_HAVE_LOW_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[83/116] supermicro/h8dmr ok.
Processing mainboard/supermicro/h8dmr (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/supermicro/h8dmr/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_ROM_SIZE = 1048576;
+CONFIG_ROM_SIZE = 524288;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[84/116] supermicro/h8dmr_fam10 fail.
[85/116] supermicro/x6dai_g ok.
Processing mainboard/supermicro/x6dai_g (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 32s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[86/116] supermicro/x6dhe_g ok.
Processing mainboard/supermicro/x6dhe_g (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[87/116] supermicro/x6dhe_g2 ok.
Processing mainboard/supermicro/x6dhe_g2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[88/116] supermicro/x6dhr_ig ok.
Processing mainboard/supermicro/x6dhr_ig (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 33s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[89/116] supermicro/x6dhr_ig2 ok.
Processing mainboard/supermicro/x6dhr_ig2 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 31s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_SSE = 1;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[90/116] technexion/tim5690 ok.
Processing mainboard/technexion/tim5690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/technexion/tim5690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 29s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[91/116] technexion/tim8690 ok.
Processing mainboard/technexion/tim8690 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/technexion/tim8690/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 30s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 8;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_GFXUMA = 1;
+CONFIG_GFXUMA = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
-CONFIG_HAVE_OPTION_TABLE = 0;
+CONFIG_HAVE_OPTION_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 0;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 1;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[92/116] technologic/ts5300 ok.
Processing mainboard/technologic/ts5300 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/technologic/ts5300/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 14s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_AMD_SC520 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 131072;
+CONFIG_ROM_SIZE = 262144;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
-CONFIG_TTYS0_BASE = 760;
+CONFIG_TTYS0_BASE = 1016;
+CONFIG_UDELAY_LAPIC = 0;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[93/116] televideo/tc7020 ok.
Processing mainboard/televideo/tc7020 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 21s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
+CONFIG_CPU_AMD_GX1 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_MEM_TRAIN_SEQ = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[94/116] thomson/ip1000 ok.
Processing mainboard/thomson/ip1000 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/thomson/ip1000/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
+CONFIG_I830_VIDEO_MB_1MB = 0;
+CONFIG_I830_VIDEO_MB_512KB = 0;
+CONFIG_I830_VIDEO_MB_8MB = 1;
+CONFIG_I830_VIDEO_MB_OFF = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[95/116] tyan/s1846 ok.
Processing mainboard/tyan/s1846 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CPU_INTEL_SLOT_2 = 1;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[96/116] tyan/s2735 ok.
Processing mainboard/tyan/s2735 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_MOVNTI = 1;
+CONFIG_HAVE_MOVNTI = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
+CONFIG_MMX = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SSE = 1;
-CONFIG_USE_PRINTK_IN_CAR = 1;
+CONFIG_USE_PRINTK_IN_CAR = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[97/116] tyan/s2850 ok.
Processing mainboard/tyan/s2850 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[98/116] tyan/s2875 ok.
Processing mainboard/tyan/s2875 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[99/116] tyan/s2880 ok.
Processing mainboard/tyan/s2880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 13;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAX_CPUS = 2;
+CONFIG_MAX_CPUS = 4;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[100/116] tyan/s2881 ok.
Processing mainboard/tyan/s2881 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[101/116] tyan/s2882 ok.
Processing mainboard/tyan/s2882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 6;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 10;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 15;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[102/116] tyan/s2885 ok.
Processing mainboard/tyan/s2885 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 24s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_IRQ_SLOT_COUNT = 11;
+CONFIG_IRQ_SLOT_COUNT = 9;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[103/116] tyan/s2891 ok.
Processing mainboard/tyan/s2891 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/tyan/s2891/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[104/116] tyan/s2892 ok.
Processing mainboard/tyan/s2892 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/tyan/s2892/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 27s)

-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_APIC_ID_OFFSET = 16;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[105/116] tyan/s2895 ok.
Processing mainboard/tyan/s2895 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/tyan/s2895/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_BASE = 847872;
+CONFIG_DCACHE_RAM_BASE = 819200;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DCACHE_RAM_SIZE = 4096;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SERIAL_CPU_INIT = 0;
+CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[106/116] tyan/s2912 ok.
Processing mainboard/tyan/s2912 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/tyan/s2912/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 28s)

-CONFIG_ACPI_SSDTX_NUM = 3;
+CONFIG_ACPI_SSDTX_NUM = 0;
-CONFIG_AMDMCT = 0;
-CONFIG_APIC_ID_OFFSET = 16;
+CONFIG_APIC_ID_OFFSET = 22;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
-CONFIG_HAVE_FALLBACK_BOOT = 1;
+CONFIG_HAVE_FALLBACK_BOOT = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HEAP_SIZE = 32768;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 4;
+CONFIG_MAX_CPUS = 2;
-CONFIG_MAX_PHYSICAL_CPUS = 2;
+CONFIG_MAX_PHYSICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
-CONFIG_SERIAL_CPU_INIT = 1;
+CONFIG_SERIAL_CPU_INIT = 0;
-CONFIG_USE_FALLBACK_IMAGE = 1;
+CONFIG_USE_FALLBACK_IMAGE = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
-CONFIG_WAIT_BEFORE_CPUS_INIT = 1;
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[107/116] tyan/s2912_fam10 fail.
[108/116] tyan/s4880 ok.
Processing mainboard/tyan/s4880 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 25s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
-CONFIG_RAMBASE = 16384;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[109/116] tyan/s4882 ok.
Processing mainboard/tyan/s4882 (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 20s)

-CONFIG_AMDMCT = 0;
-CONFIG_CBB = 0;
-CONFIG_CDB = 24;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_SOCKET_TYPE = 0;
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0;
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_ENABLE_APIC_EXT_ID = 1;
+CONFIG_ENABLE_APIC_EXT_ID = 0;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HT3_SUPPORT = 0;
-CONFIG_HT_CHAIN_END_UNITID_BASE = 32;
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0;
-CONFIG_HT_CHAIN_UNITID_BASE = 1;
+CONFIG_HT_CHAIN_UNITID_BASE = 0;
-CONFIG_IRQ_SLOT_COUNT = 22;
+CONFIG_IRQ_SLOT_COUNT = 11;
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0;
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 1;
-CONFIG_K8_MEM_BANK_B_ONLY = 0;
-CONFIG_MAX_CPUS = 8;
+CONFIG_MAX_CPUS = 4;
-CONFIG_MAX_PHYSICAL_CPUS = 4;
+CONFIG_MAX_PHYSICAL_CPUS = 2;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_RAMBASE = 8192;
+CONFIG_RAMBASE = 1048576;
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0;
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 2;
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[110/116] via/epia-cn ok.
Processing mainboard/via/epia-cn (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/via/epia-cn/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 16s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[111/116] via/epia-m ok.
Processing mainboard/via/epia-m (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/via/epia-m/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 26s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294930688;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[112/116] via/epia-m700 ok.
Processing mainboard/via/epia-m700 (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/via/epia-m700/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 10s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_SIZE = 8192;
+CONFIG_DCACHE_RAM_SIZE = 32768;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HEAP_SIZE = 20480;
+CONFIG_HEAP_SIZE = 16384;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4121;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[113/116] via/epia-n ok.
Processing mainboard/via/epia-n (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/via/epia-n/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN400_VIDEO_MB_128MB = 0;
+CONFIG_CN400_VIDEO_MB_16MB = 0;
+CONFIG_CN400_VIDEO_MB_32MB = 1;
+CONFIG_CN400_VIDEO_MB_64MB = 0;
+CONFIG_CN400_VIDEO_MB_8MB = 0;
+CONFIG_CN400_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
+CONFIG_HAVE_HIGH_TABLES = 0;
-CONFIG_HAVE_MAINBOARD_RESOURCES = 1;
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;
[114/116] via/epia ok.
Processing mainboard/via/epia (i386: ok, we're amd64 with a  cross compiler)
  Creating config file... ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 23s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C3 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 7;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
-CONFIG_HAVE_INIT_TIMER = 0;
+CONFIG_HAVE_INIT_TIMER = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 1;
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0;
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0;
-CONFIG_PCI_ROM_RUN = 0;
+CONFIG_PCI_ROM_RUN = 1;
-CONFIG_UDELAY_IO = 1;
+CONFIG_UDELAY_IO = 0;
+CONFIG_VGA_BIOS = 0;
-CONFIG_VGA_ROM_RUN = 0;
+CONFIG_VGA_ROM_RUN = 1;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[115/116] via/pc2500e ok.
Processing mainboard/via/pc2500e (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/via/pc2500e/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 17s)

-CONFIG_APIC_ID_OFFSET = 0;
+CONFIG_CN700_VIDEO_MB_128MB = 0;
+CONFIG_CN700_VIDEO_MB_16MB = 0;
+CONFIG_CN700_VIDEO_MB_32MB = 1;
+CONFIG_CN700_VIDEO_MB_64MB = 0;
+CONFIG_CN700_VIDEO_MB_8MB = 0;
+CONFIG_CN700_VIDEO_MB_OFF = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DCACHE_RAM_BASE = 786432;
-CONFIG_DCACHE_RAM_SIZE = 4096;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
+CONFIG_EPIA_VT8237R_INIT = 0;
-CONFIG_EXCEPTION_VECTORS = 4294836480;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_FALLBACK_SIZE = 0;
+CONFIG_HAVE_HIGH_TABLES = 1;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1;
-CONFIG_USE_OPTION_TABLE = 1;
+CONFIG_USE_OPTION_TABLE = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
[116/116] via/vt8454c ok.
Processing mainboard/via/vt8454c (i386: ok, we're amd64 with a  cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-4975/targets/via/vt8454c/Config-abuild.lb ok
  Creating builddir...ok
  Compiling image on 1 cpu .. ok. (took 9s)

-CONFIG_APIC_ID_OFFSET = 0;
-CONFIG_CPU_SOCKET_TYPE = 16;
+CONFIG_CPU_VIA_C7 = 1;
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 5;
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8;
-CONFIG_DIMM_SUPPORT = 264;
-CONFIG_EXCEPTION_VECTORS = 4294902016;
+CONFIG_EXPERT = 0;
-CONFIG_EXT_CONF_SUPPORT = 0;
-CONFIG_EXT_RT_TBL_SUPPORT = 0;
-CONFIG_FAKE_SPDROM = 0;
+CONFIG_HAVE_ACPI_TABLES = 1;
-CONFIG_HAVE_HARD_RESET = 1;
+CONFIG_HAVE_HARD_RESET = 0;
+CONFIG_HAVE_HIGH_TABLES = 0;
+CONFIG_HAVE_MP_TABLE = 1;
+CONFIG_HAVE_PIRQ_TABLE = 1;
-CONFIG_HW_MEM_HOLE_SIZEK = 0;
-CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC = 0;
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0;
-CONFIG_IOAPIC = 1;
+CONFIG_IOAPIC = 0;
-CONFIG_LOGICAL_CPUS = 0;
+CONFIG_LOGICAL_CPUS = 1;
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4121;
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 5;
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8;
-CONFIG_PCIE_CONFIGSPACE_HOLE = 0;
-CONFIG_ROM_SIZE = 524288;
+CONFIG_ROM_SIZE = 1048576;
-CONFIG_SMP = 1;
+CONFIG_SMP = 0;
-CONFIG_UDELAY_TSC = 1;
+CONFIG_UDELAY_TSC = 0;
-CONFIG_USE_DCACHE_RAM = 1;
+CONFIG_USE_DCACHE_RAM = 0;
+CONFIG_VGA_BIOS = 0;
+CONFIG_WARNINGS_ARE_ERRORS = 0;
-CONFIG_WRITE_HIGH_TABLES = 1;
+CONFIG_WRITE_HIGH_TABLES = 0;



From root at crankyadmin.net  Sun Dec  6 19:29:45 2009
From: root at crankyadmin.net (David Houston)
Date: Sun, 6 Dec 2009 18:29:45 +0000
Subject: [coreboot] Getting output from serial..... kinda....
Message-ID: <35c4df160912061029t7d8e6e20pda1f7b02a861d5@mail.gmail.com>

Hi all,

Would anyone have any suggestions why all I get out of my serial port when
booting my coreboot build is

??F?????
=U$'E&&M#My=?F?!y=?F?!y=[$M#MO"My=+_Y?b??????????????#?/y=+OIfyy=[$KKOK!K$L???H#C1?"b???VMK$LcDbD?b?#?
>
>                                              #?
>
>                  #?
>                                                                  #?
>
>


I know the usb converter is good as I have tested it on another machine. And
I know the serial port is good as I have got a linux terminal up with the
OEM Bios.

I'm not sure what else to attach to help diagnose the issue.

regards

Dave
-------------
root at crankyadmin.net
cranky at archlinux.us
-------------- next part --------------
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From r.marek at assembler.cz  Sun Dec  6 20:12:12 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 06 Dec 2009 20:12:12 +0100
Subject: [coreboot] Getting output from serial..... kinda....
In-Reply-To: <35c4df160912061029t7d8e6e20pda1f7b02a861d5@mail.gmail.com>
References: <35c4df160912061029t7d8e6e20pda1f7b02a861d5@mail.gmail.com>
Message-ID: <4B1C020C.7030206@assembler.cz>

Hi,

Please answer following:

1) do you port new motherboard ?

2) if you  set speed to 115200 do you see something if you set on the other side 
57600 or 28200 bauds?

3) if you set coreboot to 57600 and the other side to 115200 do you get something?

4) Sometimes when the clock is nearly 115200 but a bit off some USB serials 
cannot handle that. Maybe you can try to connect some other device, or try to 
test with some real serial line on some other PC.

Rudolf



David Houston napsal(a):
> Hi all,
> 
> Would anyone have any suggestions why all I get out of my serial port 
> when booting my coreboot build is 
> 
>     ??F?????
=U$'E&&M#My=?F?!y=?F?!y=[$M#MO"My=+_Y?b??????????????#?/y
>     =+OIfyy=[$KKOK!K$L???H#C1?"b???VMK$LcDbD?b?#?              
>                                                                        
>                                            #?                          
>                                                                        
>                                #?                                      
>                                                                        
>                    #?                                                  
>                                                                           
> 
> 
> I know the usb converter is good as I have tested it on another machine. 
> And I know the serial port is good as I have got a linux terminal up 
> with the OEM Bios.
> 
> I'm not sure what else to attach to help diagnose the issue. 
> 
> regards
> 
> Dave
> -------------
> root at crankyadmin.net <mailto:root at crankyadmin.net>
> cranky at archlinux.us <mailto:cranky at archlinux.us>
> 



From root at crankyadmin.net  Sun Dec  6 20:17:15 2009
From: root at crankyadmin.net (David Houston)
Date: Sun, 6 Dec 2009 19:17:15 +0000
Subject: [coreboot] Getting output from serial..... kinda....
In-Reply-To: <4B1C020C.7030206@assembler.cz>
References: <35c4df160912061029t7d8e6e20pda1f7b02a861d5@mail.gmail.com>
	<4B1C020C.7030206@assembler.cz>
Message-ID: <35c4df160912061117u31485275tc528cb909c7c8cc1@mail.gmail.com>

>
> 1) do you port new motherboard ?


I am.

2) if you  set speed to 115200 do you see something if you set on the other
> side 57600 or 28200 bauds?


Both set to 115200, works fine with OEM BIOS to get linux console up.

3) if you set coreboot to 57600 and the other side to 115200 do you get
> something?


Same

4) Sometimes when the clock is nearly 115200 but a bit off some USB serials
> cannot handle that. Maybe you can try to connect some other device, or try
> to test with some real serial line on some other PC.


Works on another PC.

If it is any help, minicom flicks between online and offline when doing it.

Dave
-------------
root at crankyadmin.net
cranky at archlinux.us


On Sun, Dec 6, 2009 at 7:12 PM, Rudolf Marek <r.marek at assembler.cz> wrote:

> Hi,
>
> Please answer following:
>
> 1) do you port new motherboard ?
>
> 2) if you  set speed to 115200 do you see something if you set on the other
> side 57600 or 28200 bauds?
>
> 3) if you set coreboot to 57600 and the other side to 115200 do you get
> something?
>
> 4) Sometimes when the clock is nearly 115200 but a bit off some USB serials
> cannot handle that. Maybe you can try to connect some other device, or try
> to test with some real serial line on some other PC.
>
> Rudolf
>
>
>
> David Houston napsal(a):
>
>> Hi all,
>>
>> Would anyone have any suggestions why all I get out of my serial port when
>> booting my coreboot build is
>>    ??F????? =U$'E&&M#M y= ?F ?!y= ?F ?!y=[$ M# MO"M
>> y=+_Y?b??????????????#?/y
>>    =+OIfyy=[$K KO K!K$L??? H#C1 ?"b???VM  K$LcDbD?b?#?
>>
>>                               #?
>>
>>       #?
>>                                                           #?
>>
>>
>>
>> I know the usb converter is good as I have tested it on another machine.
>> And I know the serial port is good as I have got a linux terminal up with
>> the OEM Bios.
>>
>> I'm not sure what else to attach to help diagnose the issue.
>> regards
>>
>> Dave
>> -------------
>> root at crankyadmin.net <mailto:root at crankyadmin.net>
>> cranky at archlinux.us <mailto:cranky at archlinux.us>
>>
>>
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From r.marek at assembler.cz  Sun Dec  6 20:33:18 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 06 Dec 2009 20:33:18 +0100
Subject: [coreboot] Getting output from serial..... kinda....
In-Reply-To: <35c4df160912061117u31485275tc528cb909c7c8cc1@mail.gmail.com>
References: <35c4df160912061029t7d8e6e20pda1f7b02a861d5@mail.gmail.com>	<4B1C020C.7030206@assembler.cz>
	<35c4df160912061117u31485275tc528cb909c7c8cc1@mail.gmail.com>
Message-ID: <4B1C06FE.7020807@assembler.cz>

>     1) do you port new motherboard ?
> 
> 
> I am.

Good. what superio is it? Some have a bit to trigger if clock source is 24MHz or 
48MHz. Try to fidling with that.

We are on IRC irc.freenode.net #coreboot

Rudolf


> 
>     2) if you  set speed to 115200 do you see something if you set on
>     the other side 57600 or 28200 bauds?
> 
> 
> Both set to 115200, works fine with OEM BIOS to get linux console up.
> 
>     3) if you set coreboot to 57600 and the other side to 115200 do you
>     get something?
> 
> 
> Same
> 
>     4) Sometimes when the clock is nearly 115200 but a bit off some USB
>     serials cannot handle that. Maybe you can try to connect some other
>     device, or try to test with some real serial line on some other PC.
> 
> 
> Works on another PC.
> 
> If it is any help, minicom flicks between online and offline when doing it.
> 
> Dave
> -------------
> root at crankyadmin.net <mailto:root at crankyadmin.net>
> cranky at archlinux.us <mailto:cranky at archlinux.us>
> 
> 
> On Sun, Dec 6, 2009 at 7:12 PM, Rudolf Marek <r.marek at assembler.cz 
> <mailto:r.marek at assembler.cz>> wrote:
> 
>     Hi,
> 
>     Please answer following:
> 
>     1) do you port new motherboard ?
> 
>     2) if you  set speed to 115200 do you see something if you set on
>     the other side 57600 or 28200 bauds?
> 
>     3) if you set coreboot to 57600 and the other side to 115200 do you
>     get something?
> 
>     4) Sometimes when the clock is nearly 115200 but a bit off some USB
>     serials cannot handle that. Maybe you can try to connect some other
>     device, or try to test with some real serial line on some other PC.
> 
>     Rudolf
> 
> 
> 
>     David Houston napsal(a):
> 
>         Hi all,
> 
>         Would anyone have any suggestions why all I get out of my serial
>         port when booting my coreboot build is
>            ??F????? =U$'E&&M#M y= ?F ?!y= ?F ?!y=[$ M# MO"M
>         y=+_Y?b??????????????#?/y
>            =+OIfyy=[$K KO K!K$L??? H#C1 ?"b???VM  K$LcDbD?b?#?        
>                                                                        
>                                                               #?      
>                                                                        
>                                                                 #?    
>                                                                        
>                                                                   #?  
>                                                                        
>                                                                  
> 
>         I know the usb converter is good as I have tested it on another
>         machine. And I know the serial port is good as I have got a
>         linux terminal up with the OEM Bios.
> 
>         I'm not sure what else to attach to help diagnose the issue.
>         regards
> 
>         Dave
>         -------------
>         root at crankyadmin.net <mailto:root at crankyadmin.net>
>         <mailto:root at crankyadmin.net <mailto:root at crankyadmin.net>>
>         cranky at archlinux.us <mailto:cranky at archlinux.us>
>         <mailto:cranky at archlinux.us <mailto:cranky at archlinux.us>>
> 
> 



From root at crankyadmin.net  Sun Dec  6 20:46:53 2009
From: root at crankyadmin.net (David Houston)
Date: Sun, 6 Dec 2009 19:46:53 +0000
Subject: [coreboot] Getting output from serial..... kinda....
In-Reply-To: <4B1C06FE.7020807@assembler.cz>
References: <35c4df160912061029t7d8e6e20pda1f7b02a861d5@mail.gmail.com>
	<4B1C020C.7030206@assembler.cz>
	<35c4df160912061117u31485275tc528cb909c7c8cc1@mail.gmail.com>
	<4B1C06FE.7020807@assembler.cz>
Message-ID: <35c4df160912061146m3c593532q26755ea682799b3b@mail.gmail.com>

superiotool -d output:

Found Winbond W83627EHF/EF/EHG/EG (id=0x88, rev=0x63) at 0x2e
Register dump:
idx 20 21 22 23 24 25 26 27  28 29 2a 2b 2c 2d 2e 2f
val 88 63 ff 00 80 00 00 ff  50 04 00 00 00 21 00 ff
def 88 MM ff 00 MM 00 MM RR  50 04 00 RR 00 21 00 00
LDN 0x00 (Floppy)
idx 30 60 61 70 74 f0 f1 f2  f4 f5
val 00 00 00 06 02 8e 00 ff  00 00
def 01 03 f0 06 02 8e 00 ff  00 00
LDN 0x01 (Parallel port)
idx 30 60 61 70 74 f0
val 00 00 00 07 04 3f
def 01 03 78 07 04 3f
LDN 0x02 (COM1)
idx 30 60 61 70 f0
val 00 00 00 04 00
def 01 03 f8 04 00
LDN 0x03 (COM2)
idx 30 60 61 70 f0 f1
val 00 02 f8 03 00 00
def 01 02 f8 03 00 00
LDN 0x05 (Keyboard)
idx 30 60 61 62 63 70 72 f0
val 01 00 60 00 64 01 00 80
def 01 00 60 00 64 01 0c 83
LDN 0x06 (Serial flash interface)
idx 30 62 63
val 00 ff ff
def 00 00 00
LDN 0x07 (GPIO 1, GPIO 6, game port, MIDI port)
idx 30 60 61 62 63 70 f0 f1  f2 f3 f4 f5 f6 f7
val 00 00 00 03 30 09 ff ff  ff ff ff ff ff 00
def 00 02 01 03 30 09 ff 00  00 00 ff 00 00 00
LDN 0x08 (WDTO#, PLED)
idx 30 f5 f6 f7
val 00 ff 00 ff
def 00 00 00 00
LDN 0x09 (GPIO 2, GPIO 3, GPIO 4, GPIO 5, SUSLED)
idx 30 e0 e1 e2 e3 e4 e5 f0  f1 f2 f3 f4 f5 f6 f7
val 00 ff ff ff ff ff ff ff  ff ff 09 ff ff ff ff
def 00 ff 00 00 ff 00 00 ff  00 00 00 ff 00 00 00
LDN 0x0a (ACPI)
idx 30 70 e0 e1 e2 e3 e4 e5  e6 e7 e8 f2 f3 f4 f6 f7
val 00 00 01 00 a0 00 40 00  0c 00 09 7c 00 00 00 00
def 00 00 01 00 ff 08 00 RR  00 00 RR 7c 00 00 00 00
LDN 0x0b (Hardware monitor)
idx 30 60 61 70 f0 f1
val 00 00 00 00 c1 3f
def 00 00 00 00 c1 00

I have attached my devicetree.cb & Options.lb where would I tweak the
clock source?

Thanks again

Dave
-------------
root at crankyadmin.net
cranky at archlinux.us


On Sun, Dec 6, 2009 at 7:33 PM, Rudolf Marek <r.marek at assembler.cz> wrote:
>>
>> ? ?1) do you port new motherboard ?
>>
>>
>> I am.
>
> Good. what superio is it? Some have a bit to trigger if clock source is 24MHz or 48MHz. Try to fidling with that.
>
> We are on IRC irc.freenode.net #coreboot
>
> Rudolf
>
>
>>
>> ? ?2) if you ?set speed to 115200 do you see something if you set on
>> ? ?the other side 57600 or 28200 bauds?
>>
>>
>> Both set to 115200, works fine with OEM BIOS to get linux console up.
>>
>> ? ?3) if you set coreboot to 57600 and the other side to 115200 do you
>> ? ?get something?
>>
>>
>> Same
>>
>> ? ?4) Sometimes when the clock is nearly 115200 but a bit off some USB
>> ? ?serials cannot handle that. Maybe you can try to connect some other
>> ? ?device, or try to test with some real serial line on some other PC.
>>
>>
>> Works on another PC.
>>
>> If it is any help, minicom flicks between online and offline when doing it.
>>
>> Dave
>> -------------
>> root at crankyadmin.net <mailto:root at crankyadmin.net>
>> cranky at archlinux.us <mailto:cranky at archlinux.us>
>>
>>
>> On Sun, Dec 6, 2009 at 7:12 PM, Rudolf Marek <r.marek at assembler.cz <mailto:r.marek at assembler.cz>> wrote:
>>
>> ? ?Hi,
>>
>> ? ?Please answer following:
>>
>> ? ?1) do you port new motherboard ?
>>
>> ? ?2) if you ?set speed to 115200 do you see something if you set on
>> ? ?the other side 57600 or 28200 bauds?
>>
>> ? ?3) if you set coreboot to 57600 and the other side to 115200 do you
>> ? ?get something?
>>
>> ? ?4) Sometimes when the clock is nearly 115200 but a bit off some USB
>> ? ?serials cannot handle that. Maybe you can try to connect some other
>> ? ?device, or try to test with some real serial line on some other PC.
>>
>> ? ?Rudolf
>>
>>
>>
>> ? ?David Houston napsal(a):
>>
>> ? ? ? ?Hi all,
>>
>> ? ? ? ?Would anyone have any suggestions why all I get out of my serial
>> ? ? ? ?port when booting my coreboot build is
>> ? ? ? ? ? ??F????? =U$'E&&M#M y= ?F ?!y= ?F ?!y=[$ M# MO"M
>> ? ? ? ?y=+_Y?b??????????????#?/y
>> ? ? ? ? ? =+OIfyy=[$K KO K!K$L??? H#C1 ?"b???VM ?K$LcDbD?b?#? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?#? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?#? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?#?
>> ? ? ? ?I know the usb converter is good as I have tested it on another
>> ? ? ? ?machine. And I know the serial port is good as I have got a
>> ? ? ? ?linux terminal up with the OEM Bios.
>>
>> ? ? ? ?I'm not sure what else to attach to help diagnose the issue.
>> ? ? ? ?regards
>>
>> ? ? ? ?Dave
>> ? ? ? ?-------------
>> ? ? ? ?root at crankyadmin.net <mailto:root at crankyadmin.net>
>> ? ? ? ?<mailto:root at crankyadmin.net <mailto:root at crankyadmin.net>>
>> ? ? ? ?cranky at archlinux.us <mailto:cranky at archlinux.us>
>> ? ? ? ?<mailto:cranky at archlinux.us <mailto:cranky at archlinux.us>>
>>
>>
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From r.marek at assembler.cz  Sun Dec  6 21:03:59 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 06 Dec 2009 21:03:59 +0100
Subject: [coreboot] Getting output from serial..... kinda....
In-Reply-To: <35c4df160912061146m3c593532q26755ea682799b3b@mail.gmail.com>
References: <35c4df160912061029t7d8e6e20pda1f7b02a861d5@mail.gmail.com>	
	<4B1C020C.7030206@assembler.cz>	
	<35c4df160912061117u31485275tc528cb909c7c8cc1@mail.gmail.com>	
	<4B1C06FE.7020807@assembler.cz>
	<35c4df160912061146m3c593532q26755ea682799b3b@mail.gmail.com>
Message-ID: <4B1C0E2F.7010508@assembler.cz>

Hi,

That dump is from orig BIOS? If yes ~0x40 line may work ;)

Ok try this somewhere in the begining before enable serial (stolen from a8v-e_se)


#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)

          pnp_enter_ext_func_mode(SERIAL_DEV);
         /* We have 24MHz input. */
         reg = pnp_read_config(SERIAL_DEV, 0x24);
         pnp_write_config(SERIAL_DEV, 0x24, (reg & ~0x40));
or
        pnp_write_config(SERIAL_DEV, 0x24, (reg | 0x40));

         pnp_exit_ext_func_mode(SERIAL_DEV);

Rudolf




From svn at coreboot.org  Mon Dec  7 05:18:13 2009
From: svn at coreboot.org (coreboot)
Date: Mon, 07 Dec 2009 04:18:13 -0000
Subject: [coreboot] #150: AMD DB800 dev board PLL strapping leaves CPU
 and GLIU in non-optimal clock
In-Reply-To: <063.1bf80aa307df34e55edca10b821df311@coreboot.org>
References: <063.1bf80aa307df34e55edca10b821df311@coreboot.org>
Message-ID: <072.c9fb19dc98e2b555a6bec1adaa6ba72b@coreboot.org>

#150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  enhancement                  |         Status:  new     
   Priority:  minor                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by daunderne):

 Alohi. Mi zer novazo. http://jestormani.net

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/150#comment:1>
coreboot <http://www.coreboot.org/>


From knuku at gap.upv.es  Mon Dec  7 11:15:07 2009
From: knuku at gap.upv.es (Knut Kujat)
Date: Mon, 07 Dec 2009 11:15:07 +0100
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <1B4396E266EA498D9917CA3EB3525E0C@chimp>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>	<4B18D6D3.9050309@assembler.cz>	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>	<1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>
	<1B4396E266EA498D9917CA3EB3525E0C@chimp>
Message-ID: <4B1CD5AB.5020105@gap.upv.es>

Myles Watson escribi?:
>   
>> -----Original Message-----
>> From: Knut Kujat [mailto:knuku at gap.upv.es]
>> Sent: Saturday, December 05, 2009 5:57 AM
>> To: Myles Watson
>> Cc: 'Jonathan Rogers'; coreboot at coreboot.org
>> Subject: Re: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
>>
>> Hi,
>>
>> I'm trying to build coreboot for the exact same board and getting to
>> the same point as Jonathan Rogers. I also tried with the patch and same
>> result it hangs at "now booting... fallback". I inserted some prints
>> and get till
>>
>> else if (do_normal_boot()) {
>>
>>           printf_info("debug6");
>>
>>         goto normal_image;
>>     
> Great.
>
>   
>> any suggestions?
>>     
>
> There is no normal_image with Kconfig yet.  The quick way to test would be
> to change all normal_image to fallback_image, or any other way to make sure
> it never jumps to normal_image.
>   
Hello,

worked fine now I'm getting a little further ;) :

coreboot-2.3 Fri Dec  4 20:15:37 CET 2009
starting...                                                                        

now booting...
real_main                                                                                                     

core0 started:
now booting... Core0 started
started ap apicid:
SBLink=00
NC node|link=00
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06
VIA HT caps: 0075
ht reset -
soft reset


coreboot-2. normal_image replaced with fallback_imageWelcome to the
real_main!

coreboot-2.3 Fri Dec  4 20:15:37 CET 2009 starting...
now booting... real_main
core0 started:
now booting... Core0 started
started ap apicid:
SBLink=00
NC node|link=00
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06
VIA HT caps: 0075
Current fid_cur: 0x10, fid_max: 0x10
Requested fid_new: 0x10
Debug: after init_fidvid_bsp
Debug: after allow_all_aps_stop
Debug: after fill_mem_ctrl
Debug: after enable_smbus
Debug: after memreset_setup
Ram1.00
Ram2.00
Device error
Device error
No memory for this cpu
Ram3
No memory

but now it seems that coreboot doesn't find any ram. I already tried
with patched Kconfig and without same result.

thx,
Knut Kujat

> Thanks,
> Myles
>
>
>   

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From mylesgw at gmail.com  Mon Dec  7 17:26:12 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 7 Dec 2009 09:26:12 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <4B1CD5AB.5020105@gap.upv.es>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
	<1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>
	<1B4396E266EA498D9917CA3EB3525E0C@chimp> <4B1CD5AB.5020105@gap.upv.es>
Message-ID: <2831fecf0912070826o4bebef5i2ab5aa390b10ae84@mail.gmail.com>

>
> worked fine now I'm getting a little further ;) :
>
Good.


> coreboot-2.3 Fri Dec  4 20:15:37 CET 2009
> starting...
>
> now booting...
> real_main
>
> core0 started:
> now booting... Core0 started
> started ap apicid:
> SBLink=00
> NC node|link=00
> K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06
> VIA HT caps: 0075
> ht reset -
> soft reset
>
>
> coreboot-2. normal_image replaced with fallback_imageWelcome to the
> real_main!
>
> coreboot-2.3 Fri Dec  4 20:15:37 CET 2009 starting...
> now booting... real_main
> core0 started:
> now booting... Core0 started
> started ap apicid:
> SBLink=00
> NC node|link=00
> K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06
> VIA HT caps: 0075
> Current fid_cur: 0x10, fid_max: 0x10
> Requested fid_new: 0x10
> Debug: after init_fidvid_bsp
> Debug: after allow_all_aps_stop
> Debug: after fill_mem_ctrl
> Debug: after enable_smbus
> Debug: after memreset_setup
> Ram1.00
> Ram2.00
> Device error
> Device error
> No memory for this cpu
> Ram3
> No memory
>
> but now it seems that coreboot doesn't find any ram. I already tried with
> patched Kconfig and without same result.
>

I haven't played with RAM initialization much.  The "Device error" message
is coming from the smbus, so I would try to see how that is configured and
put more debugging statements in there.  I see that enable_smbus ran, so I
don't know what's missing.  Hopefully someone who knows more will chime in.

Is there a cmos option that could be causing trouble?  I'd check that too
since the board was choosing to do a normal boot.

Thanks,
Myles
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From knuku at gap.upv.es  Mon Dec  7 18:05:09 2009
From: knuku at gap.upv.es (Knut Kujat)
Date: Mon, 07 Dec 2009 18:05:09 +0100
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <2831fecf0912070826o4bebef5i2ab5aa390b10ae84@mail.gmail.com>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>	
	<4B18D6D3.9050309@assembler.cz>	
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>	
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>	
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>	
	<1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>	
	<1B4396E266EA498D9917CA3EB3525E0C@chimp>
	<4B1CD5AB.5020105@gap.upv.es>
	<2831fecf0912070826o4bebef5i2ab5aa390b10ae84@mail.gmail.com>
Message-ID: <4B1D35C5.3090204@gap.upv.es>

Myles Watson escribi?:
>
>
>     worked fine now I'm getting a little further ;) :
>
> Good.
>  
>
>     coreboot-2.3 Fri Dec  4 20:15:37 CET 2009
>     starting...                                                                        
>
>     now booting...
>     real_main                                                                                                     
>
>     core0 started:
>     now booting... Core0 started
>     started ap apicid:
>     SBLink=00
>     NC node|link=00
>     K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT
>     freq: 06 VIA HT caps: 0075
>     ht reset -
>     soft reset
>
>
>     coreboot-2. normal_image replaced with fallback_imageWelcome to
>     the real_main!
>
>     coreboot-2.3 Fri Dec  4 20:15:37 CET 2009 starting...
>     now booting... real_main
>     core0 started:
>     now booting... Core0 started
>     started ap apicid:
>     SBLink=00
>     NC node|link=00
>     K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT
>     freq: 06 VIA HT caps: 0075
>     Current fid_cur: 0x10, fid_max: 0x10
>     Requested fid_new: 0x10
>     Debug: after init_fidvid_bsp
>     Debug: after allow_all_aps_stop
>     Debug: after fill_mem_ctrl
>     Debug: after enable_smbus
>     Debug: after memreset_setup
>     Ram1.00
>     Ram2.00
>     Device error
>     Device error
>     No memory for this cpu
>     Ram3
>     No memory
>
>     but now it seems that coreboot doesn't find any ram. I already
>     tried with patched Kconfig and without same result.
>
>
> I haven't played with RAM initialization much.  The "Device error"
> message is coming from the smbus, so I would try to see how that is
> configured and put more debugging statements in there.  I see that
> enable_smbus ran, so I don't know what's missing.  Hopefully someone
> who knows more will chime in.
>
> Is there a cmos option that could be causing trouble?  I'd check that
> too since the board was choosing to do a normal boot.
>
> Thanks,
> Myles
Hi,

thanks for your help so far. I cleared the CMOS before restart but nothing.

Ram1.00
setting up CPU00 northbridge registers
done.
Ram2.00
Debug: in smbus_read_byte
Debug: after smbus_reset
Debug: after SMBUS_DELAY (first)
Debug: after smbus_wait-until_ready (first)
Debug: after SMBUS_DELAY (second)
Device error
Debug: smbus_wait-until_ready (second)
Debug: out smbus_read_byte
Debug: in smbus_read_byte
Debug: after smbus_reset
Debug: after SMBUS_DELAY (first)
Debug: after smbus_wait-until_ready (first)
Debug: after SMBUS_DELAY (second)
Debug: smbus_wait-until_ready (second)
Debug: out smbus_read_byte
Debug: in smbus_read_byte
Debug: after smbus_reset
Debug: after SMBUS_DELAY (first)
Debug: after smbus_wait-until_ready (first)
Debug: after SMBUS_DELAY (second)
Device error
Debug: smbus_wait-until_ready (second)
Debug: out smbus_read_byte
Debug: in smbus_read_byte
Debug: after smbus_reset
Debug: after SMBUS_DELAY (first)
Debug: after smbus_wait-until_ready (first)
Debug: after SMBUS_DELAY (second)
Debug: smbus_wait-until_ready (second)
Debug: out smbus_read_byte
No memory for this cpu
Ram3
No memory

This board has 4 sockets but only 2 are populated with 1GB dimms each.
Could the other empty two sockets be the device error, which is
generated by the smbus_wait_until_ready function?  But why would it say
that there is no memory at all?

Yet another question, I can see PRINT_DEBUG in vt8237r_early_smbus.c but
i can't see them on the serial although I have the highest message
level. Why?

thx,
Knut Kujat
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From mylesgw at gmail.com  Mon Dec  7 18:12:40 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 7 Dec 2009 10:12:40 -0700
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <4B1D35C5.3090204@gap.upv.es>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>
	<4B18D6D3.9050309@assembler.cz>
	<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>
	<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>
	<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>
	<1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>
	<1B4396E266EA498D9917CA3EB3525E0C@chimp> <4B1CD5AB.5020105@gap.upv.es>
	<2831fecf0912070826o4bebef5i2ab5aa390b10ae84@mail.gmail.com>
	<4B1D35C5.3090204@gap.upv.es>
Message-ID: <2831fecf0912070912i1fceebdja83cb6808b2b8c6d@mail.gmail.com>

> This board has 4 sockets but only 2 are populated with 1GB dimms each. Could
> the other empty two sockets be the device error, which is generated by the
> smbus_wait_until_ready function?? But why would it say that there is no
> memory at all?
I don't know.

> Yet another question, I can see PRINT_DEBUG in vt8237r_early_smbus.c but i
> can't see them on the serial although I have the highest message level. Why?

I think you're on the right track.

from vt8237r.h:

#if DEBUG_SMBUS == 1
#define PRINT_DEBUG(x)		print_debug(x)
#define PRINT_DEBUG_HEX16(x)	print_debug_hex16(x)
#else
#define PRINT_DEBUG(x)
#define PRINT_DEBUG_HEX16(x)
#endif

I'm guessing that DEBUG_SMBUS is not 1.  Change it to #if 1 and recompile.

Thanks,
Myles



From r.marek at assembler.cz  Tue Dec  8 00:37:58 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Tue, 08 Dec 2009 00:37:58 +0100
Subject: [coreboot] Coreboot fails to initialize on ASUS A8V-E SE
In-Reply-To: <4B1D35C5.3090204@gap.upv.es>
References: <65adf8860912031338r59e52c0ev649d6c772f7b14db@mail.gmail.com>		<4B18D6D3.9050309@assembler.cz>		<2831fecf0912040910v6f7a3c88vc188a0e4f3d14cb1@mail.gmail.com>		<65adf8860912041505u7f235dc4j88f0df602da5a728@mail.gmail.com>		<FB382D60BF6A496ABD8F0B7B8CB946FE@chimp>		<1909.213.162.211.252.1260017847.squirrel@wm.gap.upv.es>		<1B4396E266EA498D9917CA3EB3525E0C@chimp>	<4B1CD5AB.5020105@gap.upv.es>	<2831fecf0912070826o4bebef5i2ab5aa390b10ae84@mail.gmail.com>
	<4B1D35C5.3090204@gap.upv.es>
Message-ID: <4B1D91D6.7020405@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi,

Try experimenting with the position of used memory slots. Maybe you just need to
 put DIMMS into right places ;) I think I used the slot closest to CPU then one
empty and then the second DIM and then the closest to edge empty.

Rudolf

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Version: GnuPG v1.4.10 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

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elAAniuDIxlJq33LDiPB35M297F3mkSA
=+f/r
-----END PGP SIGNATURE-----



From andrejskirn at celestials.net  Tue Dec  8 00:58:18 2009
From: andrejskirn at celestials.net (Andrej Skirn)
Date: Tue, 08 Dec 2009 01:58:18 +0200
Subject: [coreboot] VIA EDEN ESP (C3) + Apollo CLE266(VT8623) + VT8237R +
	W83627HG
Message-ID: <4B1D969A.1080502@celestials.net>

I am working on setting up CoreBoot Compulab's CM-iVCF 
computer-on-module. It's essentially like an EPIA-MS board 
(http://www.ewayco.com/20-low-cost-embedded-epia-mini-itx-etc-boards/epia-ms-mini-itx-low-cost-via-embedded-boards.html) 
but with a WinBond super-IO. I'm aware this is rather old board, but the 
chipset combination has been popular in various embedded projects, and 
it looks like porting CoreBoot on EPIA-MS has come up on this list from 
time to time. Has anybody got this combination working with CoreBoot, 
still working on it, or have general tips on it?

Presently, my main problem seems to be that the 
northbridge/via/vt8623/raminit.h does not define a mem_controller struct 
required by the southbridge code, so the north- and southbridge code 
don't seem to be clearly delimited. My code does compile if I use the 
northbridge/via/cn400/raminit.h definition instead, but not surprisingly 
there's no output on the console. The website seems to have few pointers 
on debugging.

Chip markings on the board I'm working with:
CPU: Eden ESP 10K (133X7.5)1.05V SET BWT6E-0610
Northbridge: CLE266 0610CE
Southbridge: VT8237R 0551CD
WinBond Super-IO: W83627HG-AW
DDR memory: Hynix 515A HY5DU121622BT-J
In addition there's at least W311H clock-generator and W255H DDR2 clock 
buffer.

Here's the main() I'm using, which is a combination the EPIA-M (vt8623 + 
vt8235 + vt1211) and EPIA-N (cn400 + vt8237r + w83697hf) code:
static void main(unsigned long bist)
{
    unsigned long x;
    device_t dev;

    /* Enable multifunction for northbridge. */
// Not using cn400 northbridge
//    pci_write_config8(ctrl.d0f0, 0x4f, 0x01);

    w83697hf_set_clksel_48(SERIAL_DEV);

    w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

    uart_init();
    console_init();

    print_spew("In auto.c:main()\r\n");

    enable_smbus();

    smbus_fixup(&ctrl);

    /* Halt if there was a built-in self test failure. */
    report_bist_failure(bist);

    print_debug("Enabling mainboard devices\r\n");
    enable_mainboard_devices();

    print_debug("Enable F-ROM Shadow RAM\r\n");
    enable_shadow_ram();
   
    /* setup cpu */
// This doesn't appear in EPIA-M, probably northbridge specific
//    print_debug("Setup CPU Interface\r\n");
//    c3_cpu_setup(ctrl.d0f2);   


//    ddr_ram_setup();
    ddr_ram_setup((const struct mem_controller *)0);

    if (bist == 0) {
        print_debug("doing early_mtrr\r\n");
        early_mtrr_init();
    }
   
    //ram_check(0, 640 * 1024);

    print_spew("Leaving auto.c:main()\r\n");
}




From stepan at coresystems.de  Tue Dec  8 07:37:32 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Tue, 08 Dec 2009 07:37:32 +0100
Subject: [coreboot] VIA EDEN ESP (C3) + Apollo CLE266(VT8623) + VT8237R
 +	W83627HG
In-Reply-To: <4B1D969A.1080502@celestials.net>
References: <4B1D969A.1080502@celestials.net>
Message-ID: <4B1DF42C.9030902@coresystems.de>

On 12/8/09 12:58 AM, Andrej Skirn wrote:

> Presently, my main problem seems to be that the
> northbridge/via/vt8623/raminit.h does not define a mem_controller
> struct required by the southbridge code, so the north- and southbridge
> code don't seem to be clearly delimited. 
try completely commenting out smbus_fixup...


Stefan




From andrejskirn at celestials.net  Tue Dec  8 10:10:34 2009
From: andrejskirn at celestials.net (Andrej Skirn)
Date: Tue, 08 Dec 2009 11:10:34 +0200
Subject: [coreboot] VIA EDEN ESP (C3) + Apollo CLE266(VT8623) + VT8237R
 +	W83627HG
In-Reply-To: <4B1DF42C.9030902@coresystems.de>
References: <4B1D969A.1080502@celestials.net> <4B1DF42C.9030902@coresystems.de>
Message-ID: <4B1E180A.5090205@celestials.net>

Stefan Reinauer wrote:
> On 12/8/09 12:58 AM, Andrej Skirn wrote:
>
>   
>> Presently, my main problem seems to be that the
>> northbridge/via/vt8623/raminit.h does not define a mem_controller
>> struct required by the southbridge code, so the north- and southbridge
>> code don't seem to be clearly delimited. 
>>     
> try completely commenting out smbus_fixup...
>   
Thanks from the quick reply. The code does indeed compile if I undef out 
the smbus_fixup() function in suthbridge/via/vt8237r_early_smbus.c, or 
use the cn400 raminit.h with the mem_controller definition and don't 
call the smbus_fixup() function. But from the comments it would seem 
like that's something I might need. Also judging from the code I should 
be getting console output starting from console_init(), before any of 
the smbus operations, but as of yet I'm not seeing anything. I will try 
to track activity on LPC bus, but if someone has experience/working code 
for similar platform it would save a lot of effort.



From jon.harrison at selexgalileo.com  Tue Dec  8 14:11:10 2009
From: jon.harrison at selexgalileo.com (Harrison, Jon (SELEX GALILEO, UK))
Date: Tue, 8 Dec 2009 13:11:10 -0000
Subject: [coreboot] coreboot Digest, Vol 58, Issue 20
In-Reply-To: <mailman.1.1260270001.9336.coreboot@coreboot.org>
References: <mailman.1.1260270001.9336.coreboot@coreboot.org>
Message-ID: <8E520A5E7FB8D647BFDA039F6031C1C6066F38BB@desmdswms201.des.grplnk.net>

Hi,

Not been around for a while, but noticed this come by.

Seems to me that this config is pretty much identicle to my epia-n
config.
i.e. VIA EDEN ESP (C3) + Via CN400 + VT8237R +	W83627HG

There's not much difference between the CN400 and CLE266 so something
based on that config may just work without too much tweaking.

I've not built from svn for a long time and I don't remember if my final
patches ever got committed to the upstream. But in the final incarnation
my build was working well and had CBFS and optional SeaBIOS support. 

My recollection is that there's a hardwired smbus address buried in
there somewhere that you might have to tweak for your MoBo to
successfully get through the raminit.

jon

> -----Original Message-----
[snip]
> Today's Topics:
> 
>    1. Re: VIA EDEN ESP (C3) + Apollo CLE266(VT8623) + VT8237R +
>       W83627HG (Andrej Skirn)
> 
> 
> ----------------------------------------------------------------------
> 
> Message: 1
> Date: Tue, 08 Dec 2009 11:10:34 +0200
> From: Andrej Skirn <andrejskirn at celestials.net>
> To: coreboot at coreboot.org
> Subject: Re: [coreboot] VIA EDEN ESP (C3) + Apollo CLE266(VT8623) +
> 	VT8237R +	W83627HG
> Message-ID: <4B1E180A.5090205 at celestials.net>
> Content-Type: text/plain; charset=ISO-8859-1; format=flowed
> 
> Stefan Reinauer wrote:
> > On 12/8/09 12:58 AM, Andrej Skirn wrote:
> >
> >   
> >> Presently, my main problem seems to be that the
> >> northbridge/via/vt8623/raminit.h does not define a mem_controller
> >> struct required by the southbridge code, so the north- and 
> southbridge
> >> code don't seem to be clearly delimited. 
> >>     
> > try completely commenting out smbus_fixup...
> >   
> Thanks from the quick reply. The code does indeed compile if 
> I undef out 
> the smbus_fixup() function in 
> suthbridge/via/vt8237r_early_smbus.c, or 
> use the cn400 raminit.h with the mem_controller definition and don't 
> call the smbus_fixup() function. But from the comments it would seem 
> like that's something I might need. Also judging from the 
> code I should 
> be getting console output starting from console_init(), before any of 
> the smbus operations, but as of yet I'm not seeing anything. 
> I will try 
> to track activity on LPC bus, but if someone has 
> experience/working code 
> for similar platform it would save a lot of effort.
> 
> 
> 
> ------------------------------
> 
> _______________________________________________
> coreboot mailing list
> coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
> 
> End of coreboot Digest, Vol 58, Issue 20
> ****************************************
> 
> 
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From stepan at coresystems.de  Tue Dec  8 16:25:53 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Tue, 08 Dec 2009 16:25:53 +0100
Subject: [coreboot] VIA EDEN ESP (C3) + Apollo CLE266(VT8623) + VT8237R
 +	W83627HG
In-Reply-To: <4B1E180A.5090205@celestials.net>
References: <4B1D969A.1080502@celestials.net> <4B1DF42C.9030902@coresystems.de>
	<4B1E180A.5090205@celestials.net>
Message-ID: <4B1E7001.10507@coresystems.de>

Andrej Skirn wrote:
> Stefan Reinauer wrote:
>> On 12/8/09 12:58 AM, Andrej Skirn wrote:
>>
>>  
>>> Presently, my main problem seems to be that the
>>> northbridge/via/vt8623/raminit.h does not define a mem_controller
>>> struct required by the southbridge code, so the north- and southbridge
>>> code don't seem to be clearly delimited.     
>> try completely commenting out smbus_fixup...
>>   
> Thanks from the quick reply. The code does indeed compile if I undef
> out the smbus_fixup() function in
> suthbridge/via/vt8237r_early_smbus.c, or use the cn400 raminit.h with
> the mem_controller definition and don't call the smbus_fixup()
> function. But from the comments it would seem like that's something I
> might need. Also judging from the code I should be getting console
> output starting from console_init(), before any of the smbus
> operations, but as of yet I'm not seeing anything. I will try to track
> activity on LPC bus, but if someone has experience/working code for
> similar platform it would save a lot of effort.

CN400 will not work.... CL266 is vt8623...

Are you configuring your Super IO correctly? Did you call your Super IO
init function in auto.c? Compare your settings with the output of
superiotool -d

Stefan



From r.marek at assembler.cz  Tue Dec  8 23:01:43 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Tue, 08 Dec 2009 23:01:43 +0100
Subject: [coreboot] [RFC] CMOS options
Message-ID: <4B1ECCC7.9070402@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi all,

Is there someone who is actively using most of the CMOS options? For example I
just know that Luc is using at least the VRAM size. I think he mentioned that on
M2V-MX SE memory init options are too dangerous and board won't boot anymore if
set wrong - maybe even after cmos clear?

I noticed that century byte is happily ignored - need to check if it really
collides.

Question is what to do with that. Maybe it would be useful if someone could do
some payload aka "setup" screen to change those options. Maybe it would make
sense to get rid of most and have there only which are really used.

What do you think?

Rudolf

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From patrick at georgi-clan.de  Tue Dec  8 23:11:02 2009
From: patrick at georgi-clan.de (Patrick Georgi)
Date: Tue, 08 Dec 2009 23:11:02 +0100
Subject: [coreboot] [RFC] CMOS options
In-Reply-To: <4B1ECCC7.9070402@assembler.cz>
References: <4B1ECCC7.9070402@assembler.cz>
Message-ID: <4B1ECEF6.8050905@georgi-clan.de>

Am 08.12.2009 23:01, schrieb Rudolf Marek:
> Is there someone who is actively using most of the CMOS options? For example I
> just know that Luc is using at least the VRAM size. I think he mentioned that on
> M2V-MX SE memory init options are too dangerous and board won't boot anymore if
> set wrong - maybe even after cmos clear?
>    
What we definitely need is a recovery procedure.

Right now, on many boards coreboot looks if CMOS is valid (by using the 
checksum), and jumps to normal which uses CMOS or stays in fallback 
which uses hardcoded values. That fails if the validation routine fails 
(happened for me a couple of times), and isn't too nice to handle - 
basically two copies of the entire code just to switch between two sets 
of values (CMOS or hardcode).

It might be sufficient to keep a static array around with a valid preset 
of CMOS values (the cmos.layout format would have to be extended to 
store defaults for that), and just overwrite CMOS if it's found to be 
invalid - it's a bit harsh, but well, it's something that works (all 
PCBIOSes do it like that), and it works better than what we have, in my 
opinion.

If we figure out a better way to handle it later (indirect access to 
CMOS via accessors that can be retargeted to accessing said static array 
or whatever), all the better. The hard part in this idea is that these 
accessor functions would need to be global variables of some sort.
> Question is what to do with that. Maybe it would be useful if someone could do
> some payload aka "setup" screen to change those options. Maybe it would make
> sense to get rid of most and have there only which are really used.
>    
Basically, an nvramtool with frontend and as payload. Sounds good :-)

While we're talking about CMOS options, there was some talk about adding 
some include statement to cmos.layout, so components could add their 
flags and config variables. I don't think that there was some good 
proposal about how to do it. The issue is that variables should stay in 
their place, even if some component gains or loses some flags.


Patrick



From stepan at coresystems.de  Tue Dec  8 23:15:23 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Tue, 08 Dec 2009 23:15:23 +0100
Subject: [coreboot] [RFC] CMOS options
In-Reply-To: <4B1ECCC7.9070402@assembler.cz>
References: <4B1ECCC7.9070402@assembler.cz>
Message-ID: <4B1ECFFB.8030100@coresystems.de>

Rudolf Marek wrote:
> Hi all,
>
> Is there someone who is actively using most of the CMOS options? For
> example I
> just know that Luc is using at least the VRAM size. I think he
> mentioned that on
> M2V-MX SE memory init options are too dangerous and board won't boot
> anymore if
> set wrong - maybe even after cmos clear?

I am using all CMOS options on Kontron 986LCD-M. Actually, if options
are not supposed to be used, they should be dropped. Many boards have
options that make no sense because people love copy and paste for that
stuff. The only time CMOS options cause an error is when you use an
option in auto.c phase and it's not in cmos.layout. No error in stage 2
and no error when you leave unused options in.

CMOS clear does not happen at all, or correctly. It should write CMOS to
a defined state of default values. right now we don't even define
default values in the CMOS table but only in the code where the values
are actually used. This can lead to troublesome situations.
> I noticed that century byte is happily ignored - need to check if it
> really
> collides.
Is that good for anything? Does the BIOS need to care? I thought hwclock
--sys-to-hc does that ;-)

> Question is what to do with that. Maybe it would be useful if someone
> could do
> some payload aka "setup" screen to change those options.
Have a look at the nvramtool in util/ ... it provides a setup screen
with ssh and support and you can even choose to have X11 running with
animations next to it.

> Maybe it would make
> sense to get rid of most and have there only which are really used.
Yes. We should eliminate dead code.


Stefan



From goderic92 at gmail.com  Tue Dec  8 23:13:58 2009
From: goderic92 at gmail.com (Goderic)
Date: Tue, 8 Dec 2009 23:13:58 +0100
Subject: [coreboot] Coreboot for AMD 780G
Message-ID: <f06102ac0912081413p41efc0f1p63283b65097cf18c@mail.gmail.com>

Hello,

This summer AMD released the documentation for SB700/SB710/SB750 and RS780.
I was very excited about that, I have and AMD 780G board and I'd realy
like to use coreboot. But I didn't hear anymore about it so I wonder
how the work on is going.

Thanks,



From Zheng.Bao at amd.com  Wed Dec  9 03:14:02 2009
From: Zheng.Bao at amd.com (Bao, Zheng)
Date: Wed, 9 Dec 2009 10:14:02 +0800
Subject: [coreboot] Coreboot for AMD 780G
In-Reply-To: <f06102ac0912081413p41efc0f1p63283b65097cf18c@mail.gmail.com>
References: <f06102ac0912081413p41efc0f1p63283b65097cf18c@mail.gmail.com>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17034706E2@sbjgexmb1.amd.com>

Now the code is being reviewed by the law department to make sure there
isn't anything breaking the rules.

Zheng

-----Original Message-----
From: coreboot-bounces+zheng.bao=amd.com at coreboot.org
[mailto:coreboot-bounces+zheng.bao=amd.com at coreboot.org] On Behalf Of
Goderic
Sent: Wednesday, December 09, 2009 6:14 AM
To: coreboot at coreboot.org
Subject: [coreboot] Coreboot for AMD 780G

Hello,

This summer AMD released the documentation for SB700/SB710/SB750 and
RS780.
I was very excited about that, I have and AMD 780G board and I'd realy
like to use coreboot. But I didn't hear anymore about it so I wonder
how the work on is going.

Thanks,

-- 
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot





From svn at coreboot.org  Wed Dec  9 05:24:47 2009
From: svn at coreboot.org (coreboot)
Date: Wed, 09 Dec 2009 04:24:47 -0000
Subject: [coreboot] #150: AMD DB800 dev board PLL strapping leaves CPU
 and GLIU in non-optimal clock
In-Reply-To: <063.1bf80aa307df34e55edca10b821df311@coreboot.org>
References: <063.1bf80aa307df34e55edca10b821df311@coreboot.org>
Message-ID: <072.596798f03ffd7fb6c2bbf176ed52ce41@coreboot.org>

#150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock
-------------------------------------------+--------------------------------
   Reporter:  edwin_beasant@?              |          Owner:  somebody
       Type:  enhancement                  |         Status:  new     
   Priority:  minor                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
-------------------------------------------+--------------------------------

Comment(by daunderne):

 Alohi. Mi zer novazo. http://jestormani.net

-- 
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/150#comment:2>
coreboot <http://www.coreboot.org/>


From peter at stuge.se  Wed Dec  9 08:34:58 2009
From: peter at stuge.se (Peter Stuge)
Date: Wed, 9 Dec 2009 08:34:58