From Zheng.Bao at amd.com  Sun Feb  1 02:19:32 2009
From: Zheng.Bao at amd.com (Bao, Zheng)
Date: Sun, 1 Feb 2009 09:19:32 +0800
Subject: [coreboot] 780/700 Documentation
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD23C@sbjgexmb1.amd.com>

Hi, All,
We have been working on the RS780/SB700 for about 2 weeks. Before we can
submit our code, we realized that it doesn't make sense if the
documentation is not available. We can get the datasheet as an AMD
engineer. How can the developer in Coreboot.org get? Do we need any
official procedure to make the document public?

Joe




From peter at stuge.se  Sun Feb  1 02:32:08 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 1 Feb 2009 02:32:08 +0100
Subject: [coreboot] generic cpu detection proposal
In-Reply-To: <49847B06.6090408@gmx.de>
References: <49847B06.6090408@gmx.de>
Message-ID: <20090201013208.28928.qmail@stuge.se>

Holger Hesselbarth wrote:
> does inteltool support dumping msrs?

If it doesn't already, allow me to promote msrtool which does nothing
but decode MSRs. Please feel free to submit a patch with some
register definitions. So far there are target drivers supporting
Geode LX and CS5536 that you could use for reference.


Thanks!

//Peter



From Maggie.Li at amd.com  Sun Feb  1 09:28:51 2009
From: Maggie.Li at amd.com (Li, Maggie)
Date: Sun, 1 Feb 2009 16:28:51 +0800
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <534e5dc20901282109u6235e677p895bd3225293d79a@mail.gmail.com>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD319@sbjgexmb1.amd.com>

Hi, Dan

I have tested your patch on my dbm690t (ALC882) and pistachio (ALC885) board. It really works. However, I have a suggestion for you.

/* Read in Codec location (BAR + 0xe)[2..0]*/
	dword = readl(base + 0xe);
	dword &= 7;
	if (!dword)  
		goto no_codec;
The above phrase is not correct all the time, at lease to my pistachio board. It will give me the wrong msg "No codec!".

I would appreciate and ack the patch if you can modify it.

BTW, pci_locate_device is only used in early setup stage. So, you can remove it.

Best regards
Maggie li

-----Original Message-----
From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org] On Behalf Of Marc Jones
Sent: Thursday, January 29, 2009 1:10 PM
To: Dan Lykowski
Cc: Carl-Daniel Hailfinger; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

On Tue, Jan 27, 2009 at 11:07 AM, Dan Lykowski
<engineerguy3737 at yahoo.com> wrote:
> Diff was being silly and I wanted to get the patch posted before I left work
> for the day. I've cleaned up the patch and included it.
>
> I wasn't able to find where INTA was used so I used what the RPR lists as
> default. INTG. After looking at the mptable, I agree INTA is the correct
> answer. I've corrected it. I used dev_find_slot because I copied from the
> SATA driver. I've added the comment just like the SATA driver has. I don't
> know what the difference is, or why the SATA driver did this.
>
> The reordering was based on what order things happen in the BIOS Developers
> guide, RPR, and SATA driver. I fixed the order of the devices that didn't
> matter to clean up the change log.
> 1. Enable the Chip
> 2. Setup the SMBus registers
> 3. Setup the Device Registers
> 4. Look for Codec
> 5. Init Codec
>
> The codec init was changed to match the description in the RRG pg 235.
> Mem Reg: Base + 08h Bit 0. There were unneeded things happening.
> So here is the second try.
>
> Thanks,
> Dan Lykowski
>
> Signed-off-by: Dan Lykowski <lykowdk at gmail.com>

This looks good to me. The hda_init looks like it was writing to the
wrong device for the interrupt line setup. It would be good if the the
AMD guys or Carl-Daniel can test and ack it.

Marc

--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot


From blauwirbel at gmail.com  Sun Feb  1 11:10:45 2009
From: blauwirbel at gmail.com (Blue Swirl)
Date: Sun, 1 Feb 2009 12:10:45 +0200
Subject: [coreboot] [OpenBIOS]  OpenBIOS SVN r416 breaks coreboot-v3
In-Reply-To: <4980FA59.800@siriusit.co.uk>
References: <4980246F.70505@siriusit.co.uk> <49805CC7.3090709@aurel32.net>
	<49807CE0.8030603@siriusit.co.uk>
	<2831fecf0901280837q1bb60020q3fc51a65895b9b27@mail.gmail.com>
	<498094F4.5010505@siriusit.co.uk>
	<2831fecf0901280937j98df0a4u1b7cdcf4bc5fae29@mail.gmail.com>
	<4980A8BA.6050808@siriusit.co.uk>
	<30DC82AEA2A54E58B201063B1B33EFA8@chimp> <4980FA59.800@siriusit.co.uk>
Message-ID: <f43fc5580902010210o31001988v8e39e7a0e98e4b35@mail.gmail.com>

On 1/29/09, Mark Cave-Ayland <mark.cave-ayland at siriusit.co.uk> wrote:
> Myles Watson wrote:
>
>
> > Yes.  qemu 0.9.1 works with v2+OpenBIOS and v3+OpenBIOS, but the latest
> qemu
> > doesn't.  The latest qemu works with v2 or v3 +OpenBIOS r186, so it looks
> > like an interaction between OpenBIOS and qemu.
> >
> > HTH,
> > Myles
> >
>
>  Okay, I think I found out what is happening. With coreboot-v3 and OpenBIOS
> SVN then the base address for I/O devices is set to 0x400 which causes
> subsequent hardware to be mapped higher. The backtrace on the hw_error()
> line shows this:
>
>
>  Breakpoint 1, register_ioport_write (start=1296, length=1, size=1,
> func=0x42b105 <ne2000_asic_ioport_write>, opaque=0xc9abb8)
>     at /home/build/src/qemu/trunk/vl.c:392
>  392                 hw_error("register_ioport_write:
> invalid opaque: (start 0x%x, length 0x%x, address 0x%x)", start, length, i);
>  (gdb) print/x start
>  $1 = 0x510
>  (gdb) bt
>  #0  register_ioport_write (start=1296, length=1, size=1, func=0x42b105
> <ne2000_asic_ioport_write>, opaque=0xc9abb8)
>     at /home/build/src/qemu/trunk/vl.c:392
>  #1  0x000000000042bc6b in ne2000_map (pci_dev=0xc9a990, region_num=0,
> addr=1280, size=256, type=1)
>     at /home/build/src/qemu/trunk/hw/ne2000.c:771
>  #2  0x0000000000414548 in pci_update_mappings (d=0xc9a990) at
> /home/build/src/qemu/trunk/hw/pci.c:301
>  #3  0x0000000000414706 in pci_default_write_config (d=0xc9a990, address=16,
> val=1281, len=4) at /home/build/src/qemu/trunk/hw/pci.c:362
>  #4  0x00000000004148d7 in pci_data_write (opaque=0xc281c0, addr=2147489808,
> val=1281, len=4) at /home/build/src/qemu/trunk/hw/pci.c:467
>  #5  0x0000000000483e31 in pci_host_data_writel (opaque=0xc281a0, addr=3324,
> val=1281) at /home/build/src/qemu/trunk/hw/pci_host.h:74
>  #6  0x0000000000406818 in ioport_write (index=2, address=3324, data=1281)
> at /home/build/src/qemu/trunk/vl.c:298
>  #7  0x0000000000406c0d in cpu_outl (env=0xc10650, addr=3324, val=1281) at
> /home/build/src/qemu/trunk/vl.c:438
>  #8  0x00000000005248fe in helper_outl (port=3324, data=1281) at
> /home/build/src/qemu/trunk/target-i386/op_helper.c:582
>  #9  0x0000000040e5d11c in ?? ()
>  #10 0x00000000000000f4 in ?? ()
>  #11 0x0000000006e64a20 in ?? ()
>  #12 0x0000000006f687ab in ?? ()
>  #13 0x0000000040e5ce30 in ?? ()
>  #14 0x0000000040e603c8 in ?? ()
>  #15 0x0000000008000000 in ?? ()
>  #16 0x00007fff4ef701b0 in ?? ()
>  #17 0x00000000004fcd9c in tb_set_jmp_target (tb=0x406670, n=0,
> addr=2361183241434822607) at ../exec-all.h:240
>  #18 0x000000000040c64f in main_loop () at
> /home/build/src/qemu/trunk/vl.c:3737
>  #19 0x000000000040f772 in main (argc=6, argv=0x7fff4ef70bf8,
> envp=0x7fff4ef70c30) at
> /home/build/src/qemu/trunk/vl.c:5712
>
>
>  So in other words, with current OpenBIOS SVN the I/O space for the network
> card requires more than 0x110 bytes from 0x400 and hence when qemu tries to
> map I/O address 0x510 (which is already mapped to the BIOS I/O port), qemu
> reports the error and panics.
>
>  My quick fix was to apply the following patch to openbios in order to raise
> the io_base further from 0x400 to 0x520 so that no devices appear below the
> BIOS_IO_PORT address of 0x510:
>
>
>  --- drivers/pci.c       (revision 428)
>  +++ drivers/pci.c       (working copy)
>  @@ -762,7 +762,7 @@
>         mem_base = arch->mem_base;
>          /* I/O ports under 0x400 are used by devices mapped at fixed
>             location. */
>  -        io_base = arch->io_base + 0x400;
>  +        io_base = arch->io_base + 0x520;
>         path = strdup("");
>         for (bus = 0; bus<0x100; bus++) {
>                 ob_scan_pci_bus(bus, &mem_base, &io_base, &path);
>
>
>  With this patch applied, I am pleased to report that qemu can successfully
> boot openbios once again. Can anyone with more knowledge comment on whether
> this is an adequate solution or not?

Would this patch fix the problem?
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From engineerguy3737 at yahoo.com  Sun Feb  1 11:50:33 2009
From: engineerguy3737 at yahoo.com (Dan Lykowski)
Date: Sun, 1 Feb 2009 02:50:33 -0800 (PST)
Subject: [coreboot] SB600 HDA can't find codec fix
Message-ID: <896647.56888.qm@web57005.mail.re3.yahoo.com>

Maggie,
?Oops, I can't convert binary to hex.. 
7 should have been 15. and it should have been bits [3..0].
Is this what you are referring to?

I don't understand what you mean by pci_locate_device is only used during early setup. I see it called in the SATA driver to find the SMBus. Is this incorrect also? What would be the best way to get the SMBus? Is the device being stored somewhere that I don't currently see?

Thanks,
Dan Lykowski 


--- On Sun, 2/1/09, Li, Maggie <Maggie.Li at amd.com> wrote:

From: Li, Maggie <Maggie.Li at amd.com>
Subject: Re: [coreboot] SB600 HDA can't find codec fix
To: "Dan Lykowski" <engineerguy3737 at yahoo.com>
Cc: "Marc Jones" <marcj303 at gmail.com>, "Carl-Daniel Hailfinger" <c-d.hailfinger.devel.2006 at gmx.net>, coreboot at coreboot.org
Date: Sunday, February 1, 2009, 3:28 AM

Hi, Dan

I have tested your patch on my dbm690t (ALC882) and pistachio (ALC885) board. It really works. However, I have a suggestion for you.

/* Read in Codec location (BAR + 0xe)[2..0]*/
??? dword = readl(base + 0xe);
??? dword &= 7;
??? if (!dword)? 
??? ??? goto no_codec;
The above phrase is not correct all the time, at lease to my pistachio board. It will give me the wrong msg "No codec!".

I would appreciate and ack the patch if you can modify it.

BTW, pci_locate_device is only used in early setup stage. So, you can remove it.

Best regards
Maggie li

-----Original Message-----
From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org] On Behalf Of Marc Jones
Sent: Thursday, January 29, 2009 1:10 PM
To: Dan Lykowski
Cc: Carl-Daniel Hailfinger; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

On Tue, Jan 27, 2009 at 11:07 AM, Dan Lykowski
<engineerguy3737 at yahoo.com> wrote:
> Diff was being silly and I wanted to get the patch posted before I left work
> for the day. I've cleaned up the patch and included it.
>
> I wasn't able to find where INTA was used so I used what the RPR lists as
> default. INTG. After looking at the mptable, I agree INTA is the correct
> answer. I've corrected it. I used dev_find_slot because I copied from the
> SATA driver. I've added the comment just like the SATA driver has. I don't
> know what the difference is, or why the SATA driver did this.
>
> The reordering was based on what order things happen in the BIOS Developers
> guide, RPR, and SATA driver. I fixed the order of the devices that didn't
> matter to clean up the change log.
> 1. Enable the Chip
> 2. Setup the SMBus registers
> 3. Setup the Device Registers
> 4. Look for Codec
> 5. Init Codec
>
> The codec init was changed to match the description in the RRG pg 235.
> Mem Reg: Base + 08h Bit 0. There were unneeded things happening.
> So here is the second try.
>
> Thanks,
> Dan Lykowski
>
> Signed-off-by: Dan Lykowski <lykowdk at gmail.com>

This looks good to me. The hda_init looks like it was writing to the
wrong device for the interrupt line setup. It would be good if the the
AMD guys or Carl-Daniel can test and ack it.

Marc

--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot



      
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From stepan at coresystems.de  Sun Feb  1 14:44:38 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Sun, 1 Feb 2009 14:44:38 +0100
Subject: [coreboot] generic cpu detection proposal
In-Reply-To: <20090201013208.28928.qmail@stuge.se>
References: <49847B06.6090408@gmx.de> <20090201013208.28928.qmail@stuge.se>
Message-ID: <8A81AC62-C18E-47DD-B76C-FC386755FCD8@coresystems.de>


On 01.02.2009, at 02:32, Peter Stuge <peter at stuge.se> wrote:

> Holger Hesselbarth wrote:
>> does inteltool support dumping msrs?
>
> If it doesn't already, allow me to promote msrtool which does nothing
> but decode MSRs. Please feel free to submit a patch with some
> register definitions. So far there are target drivers supporting
> Geode LX and CS5536 that you could use for reference.
>

Inteltool can dump the msrs but it will not parse the bit values the  
fine way msrtool does.

Maybe we should remove the intel focus from inteltool and merge the  
two utilities, call it systemtool or chipsettool instead? Stuff like  
dumping pmbase might be interesting for non-intel systems too, while  
intel systems could gain from a more detailed msr dumper...
Thoughts?

Stefan


>
> Thanks!
>
> //Peter
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>



From r.marek at assembler.cz  Sun Feb  1 17:02:54 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 01 Feb 2009 17:02:54 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
	generation
Message-ID: <4985C7AE.4070609@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hello,

Following patch adds dynamic ACPI AML code generator which can be used to
generate run-time ACPI ASL code like this:

Name (XXX, 0xXX)

Or:

    Scope (\_SB.PCI0)
    {
 Name (BUSN, Package (0x04)
{
    0x11111111,
    0x22222222,
    0x33333333,
    0x44444444
})

Moreover it demonstrates its use on Asus M2V-MX SE where the SSDT table is
generated by new function k8acpi_write_vars (technically similar to
update_ssdt). But lot of nicer ;)

The ACPI binary code generator will be also useful for P-states generation,
without ugly run-time patching of DSDT.

The old SSDT of K8 will be removed and rest of boards converted in next patch.

Tested on that board. It generates same table as the static SSDT patched by
amdk8_acpi. Windows still boots too ;)

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Rudolf
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From r.marek at assembler.cz  Sun Feb  1 17:15:13 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 01 Feb 2009 17:15:13 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
Message-ID: <4985CA91.4040500@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hello,

Following patch converts the run-time SSDT patching via update_ssdt funtion to
new AML code generator. Compile-tested on all changed targets. I think it should
work because it works for Asus M2V-MX SE.

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Perhaps also some private SSDTs of each MB could be also somehow converted. Its
quite complicated and I dont own any board to test, so lets just convert the
generic stuff.

Rudolf
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From peter at stuge.se  Sun Feb  1 18:03:13 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 1 Feb 2009 18:03:13 +0100
Subject: [coreboot] generic cpu detection proposal
In-Reply-To: <8A81AC62-C18E-47DD-B76C-FC386755FCD8@coresystems.de>
References: <49847B06.6090408@gmx.de> <20090201013208.28928.qmail@stuge.se>
	<8A81AC62-C18E-47DD-B76C-FC386755FCD8@coresystems.de>
Message-ID: <20090201170313.21455.qmail@stuge.se>

Stefan Reinauer wrote:
> Inteltool can dump the msrs but it will not parse the bit values
> the fine way msrtool does.

Ok. Maybe you can send a patch to add those MSRs to msrtool Holger?

Have a look at http://stuge.se/mt.cs5536_pic_divil3.patch for one way
to note references in the source files.


> Maybe we should remove the intel focus from inteltool and merge the
> two utilities, call it systemtool or chipsettool instead? Stuff
> like dumping pmbase might be interesting for non-intel systems too,
> while intel systems could gain from a more detailed msr dumper...
> Thoughts?

I've had thoughts in that direction too. TODO mentions handling PCI
and port IO registers as well, ie. turn the tool into a more generic
register decoder. I kind of like that idea. On the other hand then it
will very clearly start competing with prettyprint[1] that the Google
guys showed us. It looks like a somewhat fat implementation though,
which I'm not thrilled about. But they have a nifty user interface,
FUSE is a fun twist. I don't know.

We were discussing GeodeLink routing on IRC the other day, and how
it would be nice to e.g. create a bus graph by piecing together
values from various registers, but I'm not sure that kind of
complexity should go into msrtool. Or maybe it should? But a generic
user interface will be a bit tricky.. msrtool is already option
intense.


//Peter

[1] http://code.google.com/p/prettyprint/



From peter at stuge.se  Sun Feb  1 18:16:36 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 1 Feb 2009 18:16:36 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime
	code	generation
In-Reply-To: <4985C7AE.4070609@assembler.cz>
References: <4985C7AE.4070609@assembler.cz>
Message-ID: <20090201171636.25167.qmail@stuge.se>

Rudolf Marek wrote:
> Following patch adds dynamic ACPI AML code generator which can be
> used to generate run-time ACPI ASL code like this:
> 
> Name (XXX, 0xXX)
> 
> Or:
> 
>     Scope (\_SB.PCI0)
>     {
>  Name (BUSN, Package (0x04)
> {
>     0x11111111,
>     0x22222222,
>     0x33333333,
>     0x44444444
> })
> 
> Moreover it demonstrates its use on Asus M2V-MX SE where the SSDT table is
> generated by new function k8acpi_write_vars (technically similar to
> update_ssdt). But lot of nicer ;)
> 
> The ACPI binary code generator will be also useful for P-states generation,
> without ugly run-time patching of DSDT.
> 
> The old SSDT of K8 will be removed and rest of boards converted in next patch.
> 
> Tested on that board. It generates same table as the static SSDT patched by
> amdk8_acpi. Windows still boots too ;)
> 
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Acked-by: Peter Stuge <peter at stuge.se>



From peter at stuge.se  Sun Feb  1 18:18:20 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 1 Feb 2009 18:18:20 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4985CA91.4040500@assembler.cz>
References: <4985CA91.4040500@assembler.cz>
Message-ID: <20090201171820.25740.qmail@stuge.se>

Rudolf Marek wrote:
> +++ coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c	2009-02-01 12:04:04.738807653 +0100
> @@ -15,6 +15,7 @@
>  #include <device/pci_ids.h>
>  #include <cpu/x86/msr.h>
>  #include <cpu/amd/mtrr.h>
> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>

../../../ that can't be right. Maybe the .h should go into include/
somewhere instead?

Other than that it would be nice to have at least one of these boards
tested before the commit.


//Peter



From rminnich at gmail.com  Sun Feb  1 18:20:35 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 1 Feb 2009 09:20:35 -0800
Subject: [coreboot] generic cpu detection proposal
In-Reply-To: <20090201170313.21455.qmail@stuge.se>
References: <49847B06.6090408@gmx.de> <20090201013208.28928.qmail@stuge.se>
	<8A81AC62-C18E-47DD-B76C-FC386755FCD8@coresystems.de>
	<20090201170313.21455.qmail@stuge.se>
Message-ID: <13426df10902010920t2f8fa8e1qfe4879ca00bbb04d@mail.gmail.com>

These ideas sound great!

now we need a cool name and a cool picture to go with it :-)

ron



From r.marek at assembler.cz  Sun Feb  1 18:31:50 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 01 Feb 2009 18:31:50 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <20090201171820.25740.qmail@stuge.se>
References: <4985CA91.4040500@assembler.cz>
	<20090201171820.25740.qmail@stuge.se>
Message-ID: <4985DC86.7040807@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Peter Stuge wrote:
> Rudolf Marek wrote:
>> +++ coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c	2009-02-01 12:04:04.738807653 +0100
>> @@ -15,6 +15,7 @@
>>  #include <device/pci_ids.h>
>>  #include <cpu/x86/msr.h>
>>  #include <cpu/amd/mtrr.h>
>> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
> 
> ../../../ that can't be right. Maybe the .h should go into include/
> somewhere instead?


This works for me. Also I used it for includes for K8T890 chipset. I dont
remember why I used this kind of construction. Maybe also because I needed some
header which resides in other then include dir?

> Other than that it would be nice to have at least one of these boards
> tested before the commit.

Yep. Lets wait.

R.


> 
> 
> //Peter
> 
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
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From peter at stuge.se  Sun Feb  1 18:42:35 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 1 Feb 2009 18:42:35 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4985DC86.7040807@assembler.cz>
References: <4985CA91.4040500@assembler.cz>
	<20090201171820.25740.qmail@stuge.se>
	<4985DC86.7040807@assembler.cz>
Message-ID: <20090201174236.504.qmail@stuge.se>

Rudolf Marek wrote:
> > ../../../ that can't be right. Maybe the .h should go into
> > include/ somewhere instead?
> 
> This works for me.

Yes, I'm sure it works, I meant that I don't think it is super clean.
Why not put that header in include/ ?


//Peter



From ward at gnu.org  Sun Feb  1 18:42:33 2009
From: ward at gnu.org (Ward Vandewege)
Date: Sun, 1 Feb 2009 12:42:33 -0500
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4985DC86.7040807@assembler.cz>
References: <4985CA91.4040500@assembler.cz>
	<20090201171820.25740.qmail@stuge.se>
	<4985DC86.7040807@assembler.cz>
Message-ID: <20090201174233.GA13468@localdomain>

On Sun, Feb 01, 2009 at 06:31:50PM +0100, Rudolf Marek wrote:
> Peter Stuge wrote:
> > Rudolf Marek wrote:
> >> +++ coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c	2009-02-01 12:04:04.738807653 +0100
> >> @@ -15,6 +15,7 @@
> >>  #include <device/pci_ids.h>
> >>  #include <cpu/x86/msr.h>
> >>  #include <cpu/amd/mtrr.h>
> >> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
> > 
> > ../../../ that can't be right. Maybe the .h should go into include/
> > somewhere instead?
> 
> 
> This works for me. Also I used it for includes for K8T890 chipset. I dont
> remember why I used this kind of construction. Maybe also because I needed some
> header which resides in other then include dir?
> 
> > Other than that it would be nice to have at least one of these boards
> > tested before the commit.
> 
> Yep. Lets wait.

How hard would it be to add this for the m57sli? I'd be more than happy to
test on that board.

Thanks,
Ward.

-- 
Ward Vandewege <ward at fsf.org>
Free Software Foundation - Senior Systems Administrator



From r.marek at assembler.cz  Sun Feb  1 18:51:32 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 01 Feb 2009 18:51:32 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <20090201174233.GA13468@localdomain>
References: <4985CA91.4040500@assembler.cz>	<20090201171820.25740.qmail@stuge.se>	<4985DC86.7040807@assembler.cz>
	<20090201174233.GA13468@localdomain>
Message-ID: <4985E124.1060808@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

> How hard would it be to add this for the m57sli? I'd be more than happy to
> test on that board.

Huh there is no ACPI support at all for this board correct? I was looking into
src/mainboard/gigabyte/m57sli right?

Maybe you can start adding the ACPI support for this board. The only problem
would be the PMIO register layout, but this can be checked from original BIOS.

Rudolf
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From stepan at coresystems.de  Sun Feb  1 19:02:49 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Sun, 01 Feb 2009 19:02:49 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <20090201171820.25740.qmail@stuge.se>
References: <4985CA91.4040500@assembler.cz>
	<20090201171820.25740.qmail@stuge.se>
Message-ID: <4985E3C9.4060702@coresystems.de>

Peter Stuge wrote:
> Rudolf Marek wrote:
>   
>> +++ coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c	2009-02-01 12:04:04.738807653 +0100
>> @@ -15,6 +15,7 @@
>>  #include <device/pci_ids.h>
>>  #include <cpu/x86/msr.h>
>>  #include <cpu/amd/mtrr.h>
>> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
>>     
>
> ../../../ that can't be right. Maybe the .h should go into include/
> somewhere instead?
>   
I don't think I can agree... northbridge specific code should really
really live under northbridge.

Whether we want to add some syntactic sugar to make it look nicer than
the above is another question.


Stefan

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From rminnich at gmail.com  Sun Feb  1 19:04:50 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 1 Feb 2009 10:04:50 -0800
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4985E3C9.4060702@coresystems.de>
References: <4985CA91.4040500@assembler.cz>
	<20090201171820.25740.qmail@stuge.se>
	<4985E3C9.4060702@coresystems.de>
Message-ID: <13426df10902011004t565f8f18p486e53339cbd127e@mail.gmail.com>

On Sun, Feb 1, 2009 at 10:02 AM, Stefan Reinauer <stepan at coresystems.de> wrote:
> Peter Stuge wrote:
>> Rudolf Marek wrote:
>>
>>> +++ coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c      2009-02-01 12:04:04.738807653 +0100
>>> @@ -15,6 +15,7 @@
>>>  #include <device/pci_ids.h>
>>>  #include <cpu/x86/msr.h>
>>>  #include <cpu/amd/mtrr.h>
>>> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
>>>
>>
>> ../../../ that can't be right. Maybe the .h should go into include/
>> somewhere instead?
>>
> I don't think I can agree... northbridge specific code should really
> really live under northbridge.
>
> Whether we want to add some syntactic sugar to make it look nicer than
> the above is another question.
>
>

If it's a huge concern add a -I for that directory in the CFLAGS.

ron



From svn at coreboot.org  Sun Feb  1 19:35:15 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Sun,  1 Feb 2009 19:35:15 +0100
Subject: [coreboot] r3925 - in trunk/coreboot-v2/src: arch/i386/boot
	arch/i386/include/arch mainboard/asus/m2v-mx_se
	northbridge/amd/amdk8
Message-ID: <mailman.2745.1355071478.16123.coreboot@coreboot.org>

Author: ruik
Date: 2009-02-01 19:35:15 +0100 (Sun, 01 Feb 2009)
New Revision: 3925

Added:
   trunk/coreboot-v2/src/arch/i386/boot/acpigen.c
   trunk/coreboot-v2/src/arch/i386/include/arch/acpigen.h
   trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.h
Modified:
   trunk/coreboot-v2/src/arch/i386/boot/Config.lb
   trunk/coreboot-v2/src/arch/i386/boot/acpi.c
   trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h
   trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c
   trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
Log:
Following patch adds dynamic ACPI AML code generator which can be used to
generate run-time ACPI ASL code.

Moreover it demonstrates its use on Asus M2V-MX SE where the SSDT table is
generated by new function k8acpi_write_vars (technically similar to
update_ssdt). But lot of nicer.
x
Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
Acked-by: Peter Stuge <peter at stuge.se>



Modified: trunk/coreboot-v2/src/arch/i386/boot/Config.lb
===================================================================
--- trunk/coreboot-v2/src/arch/i386/boot/Config.lb	2009-01-30 02:05:20 UTC (rev 3924)
+++ trunk/coreboot-v2/src/arch/i386/boot/Config.lb	2009-02-01 18:35:15 UTC (rev 3925)
@@ -13,5 +13,5 @@
 end
 if HAVE_ACPI_TABLES
 object acpi.o
+object acpigen.o
 end
-

Modified: trunk/coreboot-v2/src/arch/i386/boot/acpi.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/boot/acpi.c	2009-01-30 02:05:20 UTC (rev 3924)
+++ trunk/coreboot-v2/src/arch/i386/boot/acpi.c	2009-02-01 18:35:15 UTC (rev 3925)
@@ -24,6 +24,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include <device/pci.h>
 
 u8 acpi_checksum(u8 *table, u32 length)
@@ -181,6 +182,34 @@
 	header->checksum	= acpi_checksum((void *)mcfg, header->length);
 }
 
+/* this can be overriden by platform ACPI setup code,
+   if it calls acpi_create_ssdt_generator */
+unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(unsigned long current,
+						    char *oem_table_id) {
+	return current;
+}
+
+void acpi_create_ssdt_generator(acpi_header_t *ssdt, char *oem_table_id)
+{
+	unsigned long current=(unsigned long)ssdt+sizeof(acpi_header_t);
+	memset((void *)ssdt, 0, sizeof(acpi_header_t));
+	memcpy(&ssdt->signature, SSDT_NAME, 4);
+	ssdt->revision = 2;
+	memcpy(&ssdt->oem_id, OEM_ID, 6);
+	memcpy(&ssdt->oem_table_id, oem_table_id, 8);
+	ssdt->oem_revision = 42;
+	memcpy(&ssdt->asl_compiler_id, "GENAML", 4);
+	ssdt->asl_compiler_revision = 42;
+	ssdt->length = sizeof(acpi_header_t);
+
+	acpigen_set_current((unsigned char *) current);
+	current = acpi_fill_ssdt_generator(current, oem_table_id);
+
+	/* recalculate length */
+	ssdt->length = current - (unsigned long)ssdt;
+	ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length);
+}
+
 int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic)
 {
         lapic->type=0;

Added: trunk/coreboot-v2/src/arch/i386/boot/acpigen.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/boot/acpigen.c	                        (rev 0)
+++ trunk/coreboot-v2/src/arch/i386/boot/acpigen.c	2009-02-01 18:35:15 UTC (rev 3925)
@@ -0,0 +1,138 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 Rudolf Marek <r.marek at assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License v2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* how many nesting we support */
+#define ACPIGEN_LENSTACK_SIZE 10
+
+/* if you need to change this, change the acpigen_write_f and
+   acpigen_patch_len */
+
+#define ACPIGEN_MAXLEN 0xfff
+
+#include <string.h>
+#include <arch/acpigen.h>
+#include <console/console.h>
+
+static char *gencurrent;
+
+char *len_stack[ACPIGEN_LENSTACK_SIZE];
+int ltop = 0;
+
+static int acpigen_write_len_f()
+{
+	ASSERT(ltop < (ACPIGEN_LENSTACK_SIZE - 1))
+	len_stack[ltop++] = gencurrent;
+	acpigen_emit_byte(0);
+	acpigen_emit_byte(0);
+	return 2;
+}
+
+void acpigen_patch_len(int len)
+{
+	ASSERT(len <= ACPIGEN_MAXLEN)
+	ASSERT(ltop > 0)
+	char *p = len_stack[--ltop];
+	/* generate store length for 0xfff max */
+	p[0] = (0x40 | (len & 0xf));
+	p[1] = (len >> 4 & 0xff);
+
+}
+
+void acpigen_set_current(char *curr) {
+    gencurrent = curr;
+}
+
+char *acpigen_get_current(void) {
+    return gencurrent;
+}
+
+int acpigen_emit_byte(unsigned char b)
+{
+	(*gencurrent++) = b;
+	return 1;
+}
+
+int acpigen_write_package(int nr_el)
+{
+	int len;
+	/* package op */
+	acpigen_emit_byte(0x12);
+	len = acpigen_write_len_f();
+	acpigen_emit_byte(nr_el);
+	return len + 2;
+}
+
+int acpigen_write_byte(unsigned int data)
+{
+	/* byte op */
+	acpigen_emit_byte(0xa);
+	acpigen_emit_byte(data & 0xff);
+	return 2;
+}
+
+int acpigen_write_dword(unsigned int data)
+{
+	/* dword op */
+	acpigen_emit_byte(0xc);
+	acpigen_emit_byte(data & 0xff);
+	acpigen_emit_byte((data >> 8) & 0xff);
+	acpigen_emit_byte((data >> 16) & 0xff);
+	acpigen_emit_byte((data >> 24) & 0xff);
+	return 5;
+}
+
+int acpigen_write_name_byte(char *name, uint8_t val) {
+	int len;
+	len = acpigen_write_name(name);
+	len += acpigen_write_byte(val);
+	return len;
+}
+
+int acpigen_write_name_dword(char *name, uint32_t val) {
+	int len;
+	len = acpigen_write_name(name);
+	len += acpigen_write_dword(val);
+	return len;
+}
+
+int acpigen_emit_stream(char *data, int size) {
+	int i;
+	for (i = 0; i < size; i++) {
+		acpigen_emit_byte(data[i]);
+	}
+	return size;
+}
+
+int acpigen_write_name(char *name)
+{
+	int len = strlen(name);
+	/* name op */
+	acpigen_emit_byte(0x8);
+	acpigen_emit_stream(name, len);
+	return len + 1;
+}
+
+int acpigen_write_scope(char *name)
+{
+	int len;
+	/* scope op */
+	acpigen_emit_byte(0x10);
+	len = acpigen_write_len_f();
+	return len + acpigen_emit_stream(name, strlen(name)) + 1;
+}

Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h
===================================================================
--- trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h	2009-01-30 02:05:20 UTC (rev 3924)
+++ trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h	2009-02-01 18:35:15 UTC (rev 3925)
@@ -29,6 +29,7 @@
 #define MCFG_NAME             "MCFG"
 #define SRAT_NAME             "SRAT"
 #define SLIT_NAME	      "SLIT"
+#define SSDT_NAME	      "SSDT"
 
 #define RSDT_TABLE            "RSDT    "
 #define HPET_TABLE            "AMD64   "
@@ -293,6 +294,8 @@
 unsigned long acpi_fill_madt(unsigned long current);
 unsigned long acpi_fill_mcfg(unsigned long current);
 unsigned long acpi_fill_srat(unsigned long current); 
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id);
+void acpi_create_ssdt_generator(acpi_header_t *ssdt, char *oem_table_id);
 void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt);
 
 /* These can be used by the target port */

Added: trunk/coreboot-v2/src/arch/i386/include/arch/acpigen.h
===================================================================
--- trunk/coreboot-v2/src/arch/i386/include/arch/acpigen.h	                        (rev 0)
+++ trunk/coreboot-v2/src/arch/i386/include/arch/acpigen.h	2009-02-01 18:35:15 UTC (rev 3925)
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 Rudolf Marek <r.marek at assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License v2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+#ifndef LIBACPI_H
+#define LIBACPI_H
+#include <assert.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+void acpigen_patch_len(int len);
+void acpigen_set_current(char *curr);
+char *acpigen_get_current(void);
+int acpigen_write_package(int nr_el);
+int acpigen_write_byte(unsigned int data);
+int acpigen_emit_byte(unsigned char data);
+int acpigen_emit_stream(char *data, int size);
+int acpigen_write_dword(unsigned int data);
+int acpigen_write_name(char *name);
+int acpigen_write_name_dword(char *name, uint32_t val);
+int acpigen_write_name_byte(char *name, uint8_t val);
+int acpigen_write_scope(char *name);
+#endif

Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c	2009-01-30 02:05:20 UTC (rev 3924)
+++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c	2009-02-01 18:35:15 UTC (rev 3925)
@@ -30,9 +30,9 @@
 #include <device/pci_ids.h>
 #include <../../../southbridge/via/vt8237r/vt8237r.h>
 #include <../../../southbridge/via/k8t890/k8t890.h>
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
 
 extern unsigned char AmlCode[];
-extern unsigned char AmlCode_ssdt[];
 
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
@@ -81,6 +81,12 @@
 	return current;
 }
 
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+	k8acpi_write_vars();
+	/* put PSTATES generator call here */
+	return (unsigned long) (acpigen_get_current());
+}
+
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
@@ -175,14 +181,11 @@
 	/* SSDT */
 	printk_debug("ACPI:    * SSDT\n");
 	ssdt = (acpi_header_t *)current;
-	current += ((acpi_header_t *)AmlCode_ssdt)->length;
-	memcpy((void *)ssdt, (void *)AmlCode_ssdt, ((acpi_header_t *)AmlCode_ssdt)->length);
-	update_ssdt((void*)ssdt);
-        /* recalculate checksum */
-        ssdt->checksum = 0;
-        ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
-	acpi_add_table(rsdt,ssdt);
 
+	acpi_create_ssdt_generator(ssdt, "DYNADATA");
+	current += ssdt->length;
+	acpi_add_table(rsdt, ssdt);
+
 	printk_info("ACPI: done.\n");
 	return current;
 }

Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c	2009-01-30 02:05:20 UTC (rev 3924)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c	2009-02-01 18:35:15 UTC (rev 3925)
@@ -226,7 +226,6 @@
 				p[i*nodes+j] = hops_8[i*nodes+j] * 2 + 10;
 #endif
 
-
 			}
 		}
 	}
@@ -236,6 +235,80 @@
 	return current;
 }
 
+static int k8acpi_write_HT(void) {
+	device_t dev;
+	uint32_t dword;
+	int len, lenp, i;
+
+	len = acpigen_write_name("HCLK");
+	lenp = acpigen_write_package(HC_POSSIBLE_NUM);
+
+	for(i=0;i<sysconf.hc_possible_num;i++) {
+		lenp += acpigen_write_dword(sysconf.pci1234[i]);
+	}
+	for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
+		lenp += acpigen_write_dword(0x0);
+	}
+
+	acpigen_patch_len(lenp - 1);
+	len += lenp;
+
+	len += acpigen_write_name("HCDN");
+	lenp = acpigen_write_package(HC_POSSIBLE_NUM);
+
+	for(i=0;i<sysconf.hc_possible_num;i++) {
+		lenp += acpigen_write_dword(sysconf.hcdn[i]);
+	}
+	for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
+		lenp += acpigen_write_dword(0x20202020);
+	}
+	acpigen_patch_len(lenp - 1);
+	len += lenp;
+
+	return len;
+}
+
+static int k8acpi_write_pci_data(int dlen, char *name, int offset) {
+	device_t dev;
+	uint32_t dword;
+	int len, lenp, i;
+
+	dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
+
+	len = acpigen_write_name(name);
+	lenp = acpigen_write_package(dlen);
+	for(i=0; i<dlen; i++) {
+		dword = pci_read_config32(dev, offset+i*4);
+		lenp += acpigen_write_dword(dword);
+	}
+	// minus the opcode
+	acpigen_patch_len(lenp - 1);
+	return len + lenp;
+}
+
+int k8acpi_write_vars(void)
+{
+	int lens;
+	msr_t msr;
+	char pscope[] = "\\._SB_PCI0";
+
+	lens = acpigen_write_scope(pscope);
+	lens += k8acpi_write_pci_data(4, "BUSN", 0xe0);
+	lens += k8acpi_write_pci_data(8, "PCIO", 0xc0);
+	lens += k8acpi_write_pci_data(16, "MMIO", 0x80);
+	lens += acpigen_write_name_byte("SBLK", sysconf.sblk);
+	lens += acpigen_write_name_byte("CBST",
+	    ((sysconf.pci1234[0] >> 12) & 0xff) ? 0xf : 0x0);
+	lens += acpigen_write_name_dword("SBDN", sysconf.sbdn);
+	msr = rdmsr(TOP_MEM);
+	lens += acpigen_write_name_dword("TOM1", msr.lo);
+
+	lens += k8acpi_write_HT();
+	//minus opcode
+	acpigen_patch_len(lens - 1);
+	return lens;
+}
+
 // moved from mb acpi_tables.c
 static void intx_to_stream(u32 val, u32 len, u8 *dest)
 {

Added: trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.h
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.h	                        (rev 0)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.h	2009-02-01 18:35:15 UTC (rev 3925)
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2009 Rudolf Marek <r.marek at assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License v2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+#ifndef AMDK8_ACPI_H
+#define AMDK8_ACPI_H
+#include <arch/acpigen.h>
+
+int k8acpi_write_vars(void);
+
+#endif




From r.marek at assembler.cz  Sun Feb  1 19:36:49 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 01 Feb 2009 19:36:49 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime	code
 generation
In-Reply-To: <20090201171636.25167.qmail@stuge.se>
References: <4985C7AE.4070609@assembler.cz>
	<20090201171636.25167.qmail@stuge.se>
Message-ID: <4985EBC1.9050208@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Commited as Committed revision 3925.

Thanks,
Rudolf
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From svn at coreboot.org  Sun Feb  1 19:40:51 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Sun,  1 Feb 2009 19:40:51 +0100
Subject: [coreboot] r3926 - trunk/util/flashrom
Message-ID: <mailman.2746.1355071478.16123.coreboot@coreboot.org>

Author: ruik
Date: 2009-02-01 19:40:50 +0100 (Sun, 01 Feb 2009)
New Revision: 3926

Modified:
   trunk/util/flashrom/chipset_enable.c
Log:
 Following patch fixes VIA SPI (VT8237S). It needs to have opcodes
 initialized same way as ICH7.

 Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
 Acked-by: Peter Stuge <peter at stuge.se>



Modified: trunk/util/flashrom/chipset_enable.c
===================================================================
--- trunk/util/flashrom/chipset_enable.c	2009-02-01 18:35:15 UTC (rev 3925)
+++ trunk/util/flashrom/chipset_enable.c	2009-02-01 18:40:50 UTC (rev 3926)
@@ -221,6 +221,7 @@
 		     *(uint16_t *) (spibar + 0x6c));
 
 	flashbus = BUS_TYPE_VIA_SPI;
+	ich_init_opcodes();
 
 	return 0;
 }




From r.marek at assembler.cz  Sun Feb  1 19:42:28 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 01 Feb 2009 19:42:28 +0100
Subject: [coreboot] [PATCH] Fix flashrom init for VT8237S
In-Reply-To: <20090107173423.31732.qmail@stuge.se>
References: <4954C723.5060608@assembler.cz>
	<20090107173423.31732.qmail@stuge.se>
Message-ID: <4985ED14.8030303@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Committed revision 3926

Although the just erase dont work... its better then nothing. Is there some
consensus how to fix that while I was away?

Thanks,
Rudolf
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From peter at stuge.se  Sun Feb  1 21:30:00 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 1 Feb 2009 21:30:00 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4985E3C9.4060702@coresystems.de>
References: <4985CA91.4040500@assembler.cz>
	<20090201171820.25740.qmail@stuge.se>
	<4985E3C9.4060702@coresystems.de>
Message-ID: <20090201203000.12048.qmail@stuge.se>

Stefan Reinauer wrote:
> >> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
> >
> > ../../../ that can't be right. Maybe the .h should go into
> > include/ somewhere instead?
> 
> I don't think I can agree... northbridge specific code should
> really really live under northbridge.

Code no question - but headers that are for use elsewhere?

I realize this is v2, but maybe want to improve that anyway?


//Peter



From r.marek at assembler.cz  Sun Feb  1 22:08:45 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Sun, 01 Feb 2009 22:08:45 +0100
Subject: [coreboot] [PATCH] Add more AMD CPU names
Message-ID: <49860F5D.6070401@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hello,

Following patch adds missing CPU names. Please check
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
if I did not made any mistake.

Works for mine CPU ;)

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Thanks,
Rudolf

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From stepan at coresystems.de  Mon Feb  2 01:46:29 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 02 Feb 2009 01:46:29 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <20090201203000.12048.qmail@stuge.se>
References: <4985CA91.4040500@assembler.cz>	<20090201171820.25740.qmail@stuge.se>	<4985E3C9.4060702@coresystems.de>
	<20090201203000.12048.qmail@stuge.se>
Message-ID: <49864265.2020306@coresystems.de>

Peter Stuge wrote:
> Stefan Reinauer wrote:
>   
>>>> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
>>>>         
>>> ../../../ that can't be right. Maybe the .h should go into
>>> include/ somewhere instead?
>>>       
>> I don't think I can agree... northbridge specific code should
>> really really live under northbridge.
>>     
>
> Code no question - but headers that are for use elsewhere?
>   

Absolutely. If a component uses headers from another component, it
should get them from there. A clean design demands we do not mix generic
code and component code.
> I realize this is v2, but maybe want to improve that anyway?
>
>   
Which is why I wrote the suggestion to begin with. Breaking the
component design is very far from what the more modular v3 design ever
tried to achieve. If we broke v3 in this matter, we must fix it too.  As
Ron said. It can be done with a simple -I flag. No component
code/headers under /include, it just doesn't make sense from a design
perspective, and breaking the design for syntactic sugar is not a good
approach.

Stefan

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From stepan at coresystems.de  Mon Feb  2 01:52:26 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 02 Feb 2009 01:52:26 +0100
Subject: [coreboot] Bridge Mem Window/Prefetch Window
In-Reply-To: <347511.79954.qm@web57008.mail.re3.yahoo.com>
References: <347511.79954.qm@web57008.mail.re3.yahoo.com>
Message-ID: <498643CA.2080101@coresystems.de>

Dan Lykowski wrote:
> Can anyone point me in the right direction as to where the Bridge Mem
> Window/Prefetch Window PCI configurations are defined/setup/used/etc.
> Coreboot does not set these correctly in my case. ( As compared to the
> standard BIOS )
>
What's the difference?

Stefan


-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb  2 02:30:24 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 02 Feb 2009 02:30:24 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <4985C7AE.4070609@assembler.cz>
References: <4985C7AE.4070609@assembler.cz>
Message-ID: <49864CB0.1010903@gmx.net>

Hi Rudolf,

that's an impressive piece of code!

On 01.02.2009 17:02, Rudolf Marek wrote:
> Hello,
>
> Following patch adds dynamic ACPI AML code generator which can be used to
> generate run-time ACPI ASL code like this:
>
> Name (XXX, 0xXX)
>
> Or:
>
>     Scope (\_SB.PCI0)
>     {
>  Name (BUSN, Package (0x04)
> {
>     0x11111111,
>     0x22222222,
>     0x33333333,
>     0x44444444
> })
>
> Moreover it demonstrates its use on Asus M2V-MX SE where the SSDT table is
> generated by new function k8acpi_write_vars (technically similar to
> update_ssdt). But lot of nicer ;)
>
> The ACPI binary code generator will be also useful for P-states
> generation,
> without ugly run-time patching of DSDT.
>
> The old SSDT of K8 will be removed and rest of boards converted in
> next patch.
>
> Tested on that board. It generates same table as the static SSDT
> patched by
> amdk8_acpi. Windows still boots too ;)
>
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

The following review is rather short and to-the-point. No offense intended.

A few comments about the general design:
The global variable gencurrent is a bit irritating. How do you handle
running on multiple cores?
Same for len_stack. Besides that, both variables are in the global
namespace and could use some acpi_ prefix or suffix.

> Index: coreboot-v2/src/arch/i386/boot/acpi.c
> ===================================================================
> --- coreboot-v2.orig/src/arch/i386/boot/acpi.c	2008-12-23 17:31:37.000000000 +0100
> +++ coreboot-v2/src/arch/i386/boot/acpi.c	2009-02-01 11:05:03.171807310 +0100
> @@ -24,6 +24,7 @@
>  #include <console/console.h>
>  #include <string.h>
>  #include <arch/acpi.h>
> +#include <arch/acpigen.h>
>  #include <device/pci.h>
>  
>  u8 acpi_checksum(u8 *table, u32 length)
> @@ -180,6 +181,34 @@
>  	header->checksum	= acpi_checksum((void *)mcfg, header->length);
>  }
>  
> +/* this can be overriden by platform ACPI setup code,
> +   if it calls acpi_create_ssdt_generator */
> +unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(unsigned long current,
>   

I think weak symbols are something that makes code harder to follow.

> +						    char *oem_table_id) {
>   

The { belongs on another line.

> +	return current;
> +}
> +
> +void acpi_create_ssdt_generator(acpi_header_t *ssdt, char *oem_table_id)
>   

Strange function name.

> +{
> +	unsigned long current=(unsigned long)ssdt+sizeof(acpi_header_t);
> +	memset((void *)ssdt, 0, sizeof(acpi_header_t));
> +	memcpy(&ssdt->signature, SSDT_NAME, 4);
>   

Maybe strncpy instead?

> +	ssdt->revision = 2;
> +	memcpy(&ssdt->oem_id, OEM_ID, 6);
> +	memcpy(&ssdt->oem_table_id, oem_table_id, 8);
> +	ssdt->oem_revision = 42;
> +	memcpy(&ssdt->asl_compiler_id, "GENAML", 4);
> +	ssdt->asl_compiler_revision = 42;
>   

Heh.

> +	ssdt->length = sizeof(acpi_header_t);
> +
> +	acpigen_set_current((unsigned char *) current);
> +	current = acpi_fill_ssdt_generator(current, oem_table_id);
> +
> +	/* recalculate length */
> +	ssdt->length = current - (unsigned long)ssdt;
> +	ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length);
> +}
> +
>  int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic)
>  {
>          lapic->type=0;
> Index: coreboot-v2/src/arch/i386/boot/acpigen.c
> ===================================================================
> --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> +++ coreboot-v2/src/arch/i386/boot/acpigen.c	2009-02-01 11:04:09.927808334 +0100
> @@ -0,0 +1,138 @@
> +/*
> + * This file is part of the coreboot project.
> + *
> + * Copyright (C) 2009 Rudolf Marek <r.marek at assembler.cz>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License v2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> + */
> +
> +/* how many nesting we support */
>   

"how many nesting levels do we support"


> +#define ACPIGEN_LENSTACK_SIZE 10
> +
> +/* if you need to change this, change the acpigen_write_f and
> +   acpigen_patch_len */
> +
>   

Can you remove the empty line above?

> +#define ACPIGEN_MAXLEN 0xfff
> +
> +#include <string.h>
> +#include <arch/acpigen.h>
> +#include <console/console.h>
> +
> +static char *gencurrent;
> +
> +char *len_stack[ACPIGEN_LENSTACK_SIZE];
> +int ltop = 0;
>   

These global variables need better names and some comments explaining
what they do.

> +
> +static int acpigen_write_len_f()
>   

Needs a doxygen comment.

> +{
> +	ASSERT(ltop < (ACPIGEN_LENSTACK_SIZE - 1))
> +	len_stack[ltop++] = gencurrent;
> +	acpigen_emit_byte(0);
> +	acpigen_emit_byte(0);
> +	return 2;
> +}
> +
> +void acpigen_patch_len(int len)
>   

Needs a doxygen comment.

> +{
> +	ASSERT(len <= ACPIGEN_MAXLEN)
> +	ASSERT(ltop > 0)
> +	char *p = len_stack[--ltop];
> +	/* generate store length for 0xfff max */
> +	p[0] = (0x40 | (len & 0xf));
> +	p[1] = (len >> 4 & 0xff);
> +
> +}
> +
> +void acpigen_set_current(char *curr) {
>   

Needs a doxygen comment.

> +    gencurrent = curr;
> +}
> +
> +char *acpigen_get_current(void) {
>   

Needs a doxygen comment.

> +    return gencurrent;
> +}
> +
> +int acpigen_emit_byte(unsigned char b)
> +{
> +	(*gencurrent++) = b;
> +	return 1;
> +}
> +
> +int acpigen_write_package(int nr_el)
> +{
> +	int len;
> +	/* package op */
> +	acpigen_emit_byte(0x12);
> +	len = acpigen_write_len_f();
> +	acpigen_emit_byte(nr_el);
> +	return len + 2;
> +}
> +
> +int acpigen_write_byte(unsigned int data)
> +{
> +	/* byte op */
> +	acpigen_emit_byte(0xa);
> +	acpigen_emit_byte(data & 0xff);
> +	return 2;
> +}
> +
> +int acpigen_write_dword(unsigned int data)
> +{
> +	/* dword op */
> +	acpigen_emit_byte(0xc);
> +	acpigen_emit_byte(data & 0xff);
> +	acpigen_emit_byte((data >> 8) & 0xff);
> +	acpigen_emit_byte((data >> 16) & 0xff);
> +	acpigen_emit_byte((data >> 24) & 0xff);
> +	return 5;
> +}
> +
> +int acpigen_write_name_byte(char *name, uint8_t val) {
> +	int len;
> +	len = acpigen_write_name(name);
> +	len += acpigen_write_byte(val);
> +	return len;
> +}
> +
> +int acpigen_write_name_dword(char *name, uint32_t val) {
> +	int len;
> +	len = acpigen_write_name(name);
> +	len += acpigen_write_dword(val);
> +	return len;
> +}
> +
> +int acpigen_emit_stream(char *data, int size) {
> +	int i;
> +	for (i = 0; i < size; i++) {
> +		acpigen_emit_byte(data[i]);
> +	}
> +	return size;
> +}
> +
> +int acpigen_write_name(char *name)
> +{
> +	int len = strlen(name);
> +	/* name op */
> +	acpigen_emit_byte(0x8);
> +	acpigen_emit_stream(name, len);
> +	return len + 1;
> +}
> +
> +int acpigen_write_scope(char *name)
> +{
> +	int len;
> +	/* scope op */
> +	acpigen_emit_byte(0x10);
> +	len = acpigen_write_len_f();
> +	return len + acpigen_emit_stream(name, strlen(name)) + 1;
> +}
> Index: coreboot-v2/src/arch/i386/boot/Config.lb
> ===================================================================
> --- coreboot-v2.orig/src/arch/i386/boot/Config.lb	2009-02-01 10:25:41.491806925 +0100
> +++ coreboot-v2/src/arch/i386/boot/Config.lb	2009-02-01 10:30:56.756876765 +0100
> @@ -13,5 +13,5 @@
>  end
>  if HAVE_ACPI_TABLES
>  object acpi.o
> +object acpigen.o
>  end
> -
> Index: coreboot-v2/src/arch/i386/include/arch/acpigen.h
> ===================================================================
> --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> +++ coreboot-v2/src/arch/i386/include/arch/acpigen.h	2009-02-01 10:30:56.758807179 +0100
> @@ -0,0 +1,37 @@
> +/*
> + * This file is part of the coreboot project.
> + *
> + * Copyright (C) 2009 Rudolf Marek <r.marek at assembler.cz>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License v2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> + */
> +#ifndef LIBACPI_H
> +#define LIBACPI_H
> +#include <assert.h>
> +#include <stdlib.h>
> +#include <stdint.h>
> +
> +void acpigen_patch_len(int len);
> +void acpigen_set_current(char *curr);
> +char *acpigen_get_current(void);
> +int acpigen_write_package(int nr_el);
> +int acpigen_write_byte(unsigned int data);
> +int acpigen_emit_byte(unsigned char data);
> +int acpigen_emit_stream(char *data, int size);
> +int acpigen_write_dword(unsigned int data);
> +int acpigen_write_name(char *name);
> +int acpigen_write_name_dword(char *name, uint32_t val);
> +int acpigen_write_name_byte(char *name, uint8_t val);
> +int acpigen_write_scope(char *name);
> +#endif
> Index: coreboot-v2/src/arch/i386/include/arch/acpi.h
> ===================================================================
> --- coreboot-v2.orig/src/arch/i386/include/arch/acpi.h	2008-12-23 17:38:41.000000000 +0100
> +++ coreboot-v2/src/arch/i386/include/arch/acpi.h	2009-02-01 10:52:25.478808600 +0100
> @@ -29,6 +29,7 @@
>  #define MCFG_NAME             "MCFG"
>  #define SRAT_NAME             "SRAT"
>  #define SLIT_NAME	      "SLIT"
> +#define SSDT_NAME	      "SSDT"
>  
>  #define RSDT_TABLE            "RSDT    "
>  #define HPET_TABLE            "AMD64   "
> @@ -293,6 +294,8 @@
>  unsigned long acpi_fill_madt(unsigned long current);
>  unsigned long acpi_fill_mcfg(unsigned long current);
>  unsigned long acpi_fill_srat(unsigned long current); 
> +unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id);
> +void acpi_create_ssdt_generator(acpi_header_t *ssdt, char *oem_table_id);
>   

The two functions above have rather similar names and it's not
immedately ofvious how they differ.

>  void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt);
>  
>  /* These can be used by the target port */
> Index: coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c
> ===================================================================
> --- coreboot-v2.orig/src/mainboard/asus/m2v-mx_se/acpi_tables.c	2008-12-23 17:46:56.000000000 +0100
> +++ coreboot-v2/src/mainboard/asus/m2v-mx_se/acpi_tables.c	2009-02-01 11:23:05.142807423 +0100
> @@ -30,9 +30,9 @@
>  #include <device/pci_ids.h>
>  #include <../../../southbridge/via/vt8237r/vt8237r.h>
>  #include <../../../southbridge/via/k8t890/k8t890.h>
> +#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
>  
>  extern unsigned char AmlCode[];
> -extern unsigned char AmlCode_ssdt[];
>  
>  unsigned long acpi_fill_mcfg(unsigned long current)
>  {
> @@ -81,6 +81,12 @@
>  	return current;
>  }
>  
> +unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
> +	k8acpi_write_vars();
> +	/* put PSTATES generator call here */
> +	return (unsigned long) (acpigen_get_current());
>   

acpigen_get_current is a really confusingly named function.

> +}
> +
>  unsigned long write_acpi_tables(unsigned long start)
>  {
>  	unsigned long current;
> @@ -175,13 +181,10 @@
>  	/* SSDT */
>  	printk_debug("ACPI:    * SSDT\n");
>  	ssdt = (acpi_header_t *)current;
> -	current += ((acpi_header_t *)AmlCode_ssdt)->length;
> -	memcpy((void *)ssdt, (void *)AmlCode_ssdt, ((acpi_header_t *)AmlCode_ssdt)->length);
> -	update_ssdt((void*)ssdt);
> -        /* recalculate checksum */
> -        ssdt->checksum = 0;
> -        ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
> -	acpi_add_table(rsdt,ssdt);
> +
> +	acpi_create_ssdt_generator(ssdt, "DYNADATA");
>   

"COREBOOT" please. That way, people can actually find out where the
table came from. The fact that the data are generated dynamically is
already visible from the compiler ID.

> +	current += ssdt->length;
> +	acpi_add_table(rsdt, ssdt);
>  
>  	printk_info("ACPI: done.\n");
>  	return current;
> Index: coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
> ===================================================================
> --- coreboot-v2.orig/src/northbridge/amd/amdk8/amdk8_acpi.c	2008-12-23 17:31:36.000000000 +0100
> +++ coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c	2009-02-01 11:26:00.102959065 +0100
> @@ -259,6 +259,80 @@
>  	}
>  }
>  
> +static int k8acpi_write_HT(void) {
> +	device_t dev;
> +	uint32_t dword;
> +	int len, lenp, i;
> +
> +	len = acpigen_write_name("HCLK");
> +	lenp = acpigen_write_package(HC_POSSIBLE_NUM);
> +
> +	for(i=0;i<sysconf.hc_possible_num;i++) {
> +		lenp += acpigen_write_dword(sysconf.pci1234[i]);
> +	}
> +	for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
>   

Comment on a separate line, please.

> +		lenp += acpigen_write_dword(0x0);
> +	}
> +
> +	acpigen_patch_len(lenp - 1);
>   

acpigen_patch_len is a name which does not really reveal function purpose.

> +	len += lenp;
> +
> +	len += acpigen_write_name("HCDN");
> +	lenp = acpigen_write_package(HC_POSSIBLE_NUM);
> +
> +	for(i=0;i<sysconf.hc_possible_num;i++) {
> +		lenp += acpigen_write_dword(sysconf.hcdn[i]);
> +	}
> +	for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
> +		lenp += acpigen_write_dword(0x20202020);
> +	}
> +	acpigen_patch_len(lenp - 1);
> +	len += lenp;
> +
> +	return len;
> +}
> +
> +static int k8acpi_write_pci_data(int dlen, char *name, int offset) {
> +	device_t dev;
> +	uint32_t dword;
> +	int len, lenp, i;
> +
> +	dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
> +
> +	len = acpigen_write_name(name);
> +	lenp = acpigen_write_package(dlen);
> +	for(i=0; i<dlen; i++) {
> +		dword = pci_read_config32(dev, offset+i*4);
> +		lenp += acpigen_write_dword(dword);
> +	}
> +	// minus the opcode
> +	acpigen_patch_len(lenp - 1);
> +	return len + lenp;
> +}
> +
> +
> +int k8acpi_write_vars(void)
> +{
> +	int lens;
>   

Maybe use len instead of lens?

> +	msr_t msr;
> +	char pscope[] = "\\._SB_PCI0";
> +
> +	lens = acpigen_write_scope(pscope);
> +	lens += k8acpi_write_pci_data(4, "BUSN", 0xe0);
> +	lens += k8acpi_write_pci_data(8, "PCIO", 0xc0);
> +	lens += k8acpi_write_pci_data(16, "MMIO", 0x80);
> +	lens += acpigen_write_name_byte("SBLK", sysconf.sblk);
> +	lens += acpigen_write_name_byte("CBST",
> +	    ((sysconf.pci1234[0] >> 12) & 0xff) ? 0xf : 0x0);
> +	lens += acpigen_write_name_dword("SBDN", sysconf.sbdn);
> +	msr = rdmsr(TOP_MEM);
> +	lens += acpigen_write_name_dword("TOM1", msr.lo);
>   

I know the original code did not have it, but can you please add TOM2?

> +
> +	lens += k8acpi_write_HT();
> +	//minus opcode
> +	acpigen_patch_len(lens - 1);
> +	return lens;
> +}
>  
>  // used by acpi_tables.h
>  
> Index: coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.h
> ===================================================================
> --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> +++ coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.h	2009-02-01 11:28:13.236202005 +0100
> @@ -0,0 +1,25 @@
> +/*
> + * This file is part of the coreboot project.
> + *
> + * Copyright (C) 2009 Rudolf Marek <r.marek at assembler.cz>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License v2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> + */
> +#ifndef AMDK8_ACPI_H
> +#define AMDK8_ACPI_H
> +#include <arch/acpigen.h>
> +
> +int k8acpi_write_vars(void);
> +
> +#endif
>   

Regards,
Carl-Daniel
-- 
http://www.hailfinger.org/




From Maggie.Li at amd.com  Mon Feb  2 02:48:54 2009
From: Maggie.Li at amd.com (Li, Maggie)
Date: Mon, 2 Feb 2009 09:48:54 +0800
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <896647.56888.qm@web57005.mail.re3.yahoo.com>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD36B@sbjgexmb1.amd.com>

Dan,

 

I read the RRG spec, just as you said, you should use 0xF in file sb600_hda.c to get the current audio codec, that is to say, 

dword &= 0xF;
    if (!dword)  
        goto no_codec;

 

pci_locate_device is really should be used in early setup. Device_t is the type of u32 at that time. After this stage, you should use dev_find_slot. In file sb600_sata.c, ?/* sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ ? gives you misunderstanding about how to get the SMBus and it should be removed. You can submit a patch about sata and I will ack it. Thanks.

Best regards 
Maggie li

________________________________

From: Dan Lykowski [mailto:engineerguy3737 at yahoo.com] 
Sent: Sunday, February 01, 2009 6:51 PM
To: Li, Maggie
Cc: Marc Jones; Carl-Daniel Hailfinger; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

 

Maggie,
 Oops, I can't convert binary to hex.. 
7 should have been 15. and it should have been bits [3..0].
Is this what you are referring to?

I don't understand what you mean by pci_locate_device is only used during early setup. I see it called in the SATA driver to find the SMBus. Is this incorrect also? What would be the best way to get the SMBus? Is the device being stored somewhere that I don't currently see?

Thanks,
Dan Lykowski 


--- On Sun, 2/1/09, Li, Maggie <Maggie.Li at amd.com> wrote:


From: Li, Maggie <Maggie.Li at amd.com>
Subject: Re: [coreboot] SB600 HDA can't find codec fix
To: "Dan Lykowski" <engineerguy3737 at yahoo.com>
Cc: "Marc Jones" <marcj303 at gmail.com>, "Carl-Daniel Hailfinger" <c-d.hailfinger.devel.2006 at gmx.net>, coreboot at coreboot.org
Date: Sunday, February 1, 2009, 3:28 AM

Hi, Dan

I have tested your patch on my dbm690t (ALC882) and pistachio (ALC885) board. It really works. However, I have a suggestion for you.

/* Read in Codec location (BAR + 0xe)[2..0]*/
    dword = readl(base + 0xe);
    dword &= 7;
    if (!dword)  
        goto no_codec;
The above phrase is not correct all the time, at lease to my pistachio board. It will give me the wrong msg "No codec!".

I would appreciate and ack the patch if you can modify it.

BTW, pci_locate_device is only used in early setup stage. So, you can remove it.

Best regards
Maggie li

-----Original Message-----
From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org] On Behalf Of Marc Jones
Sent: Thursday, January 29, 2009 1:10 PM
To: Dan Lykowski
Cc: Carl-Daniel Hailfinger; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

On Tue, Jan 27, 2009 at 11:07 AM, Dan Lykowski
<engineerguy3737 at yahoo.com> wrote:
> Diff was being silly and I wanted to get the patch posted before I left work
> for the day. I've cleaned up the patch and included it.
>
> I wasn't able to find where INTA was used so I used what the RPR lists as
> default. INTG. After looking at the mptable, I agree INTA is the correct
> answer. I've corrected it. I used dev_find_slot because I copied from the
> SATA driver. I've added the comment just like the SATA driver has. I don't
> know what the difference is, or why the SATA driver did this.
>
> The reordering was based on what order things happen in the BIOS Developers
> guide, RPR, and SATA driver. I fixed the order of the devices that didn't
> matter to clean up the change log.
> 1. Enable the Chip
> 2. Setup the SMBus registers
> 3. Setup the Device Registers
> 4. Look for Codec
> 5. Init Codec
>
> The codec init was changed to match the description in the RRG pg 235.
> Mem Reg: Base + 08h Bit 0. There were unneeded things happening.
> So here is the second try.
>
> Thanks,
> Dan Lykowski
>
> Signed-off-by: Dan Lykowski <lykowdk at gmail.com>

This looks good to me. The hda_init looks like it was writing to the
wrong device for the interrupt line setup. It would be good if the the
AMD guys or Carl-Daniel can test and ack it.

Marc

--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

 

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From stepan at coresystems.de  Mon Feb  2 03:17:31 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 02 Feb 2009 03:17:31 +0100
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD36B@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD36B@sbjgexmb1.amd.com>
Message-ID: <498657BB.2000900@coresystems.de>

Li, Maggie wrote:
>
> Dan,
>
>  
>
> I read the RRG spec, just as you said, you should use 0xF in file
> sb600_hda.c to get the current audio codec, that is to say,
>
> dword &= 0xF;
>     if (!dword) 
>         goto no_codec;
>
>  
>
> pci_locate_device is really should be used in early setup. Device_t is
> the type of u32 at that time. After this stage, you should use
> dev_find_slot. In file sb600_sata.c, ?/* sm_dev =
> pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ ? gives you
> misunderstanding about how to get the SMBus and it should be removed.
> You can submit a patch about sata and I will ack it. Thanks.
>

Somewhat related, I think the
        device_t azalia_dev = dev_find_slot(0, PCI_DEVFN(0x14, 2));

should be passed from hda_init() instead, because the device is already
known there.

Stefan

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From Maggie.Li at amd.com  Mon Feb  2 03:22:35 2009
From: Maggie.Li at amd.com (Li, Maggie)
Date: Mon, 2 Feb 2009 10:22:35 +0800
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <498657BB.2000900@coresystems.de>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD398@sbjgexmb1.amd.com>

Stefan

I agree with you.

Best regards
Maggie li

-----Original Message-----
From: Stefan Reinauer [mailto:stepan at coresystems.de] 
Sent: Monday, February 02, 2009 10:18 AM
To: Li, Maggie
Cc: Dan Lykowski; Marc Jones; Carl-Daniel Hailfinger; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

Li, Maggie wrote:
>
> Dan,
>
>  
>
> I read the RRG spec, just as you said, you should use 0xF in file
> sb600_hda.c to get the current audio codec, that is to say,
>
> dword &= 0xF;
>     if (!dword) 
>         goto no_codec;
>
>  
>
> pci_locate_device is really should be used in early setup. Device_t is
> the type of u32 at that time. After this stage, you should use
> dev_find_slot. In file sb600_sata.c, ?/* sm_dev =
> pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ ? gives you
> misunderstanding about how to get the SMBus and it should be removed.
> You can submit a patch about sata and I will ack it. Thanks.
>

Somewhat related, I think the
        device_t azalia_dev = dev_find_slot(0, PCI_DEVFN(0x14, 2));

should be passed from hda_init() instead, because the device is already
known there.

Stefan

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866



From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb  2 03:26:28 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 02 Feb 2009 03:26:28 +0100
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD36B@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD36B@sbjgexmb1.amd.com>
Message-ID: <498659D4.3010700@gmx.net>

Hi Maggie,

while your point about pci_find_device is valid, I think that
dev_find_device is the function Dan should choose. It allows us to
address the PCI devices even if their bus locations are shifted which is
possible with some AMD chipsets and may also be true for boards with
multiple chipsets.
In general, we want to use functions which can deal with non-default bus
topologies.

On 02.02.2009 02:48, Li, Maggie wrote:
> Dan,
>
>  
>
> I read the RRG spec, just as you said, you should use 0xF in file sb600_hda.c to get the current audio codec, that is to say, 
>
> dword &= 0xF;
>     if (!dword)  
>         goto no_codec;
>
>  
>
> pci_locate_device is really should be used in early setup. Device_t is the type of u32 at that time. After this stage, you should use dev_find_slot. In file sb600_sata.c, ?/* sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ ? gives you misunderstanding about how to get the SMBus and it should be removed. You can submit a patch about sata and I will ack it. Thanks.
>   

I'd prefer to use dev_find_device there as well.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From rminnich at gmail.com  Mon Feb  2 04:16:53 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 1 Feb 2009 19:16:53 -0800
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
	generation
In-Reply-To: <49864CB0.1010903@gmx.net>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
Message-ID: <13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>

In general I'd like to avoid weak symbols, what purpose is being
served by them here?

ron



From Maggie.Li at amd.com  Mon Feb  2 04:47:15 2009
From: Maggie.Li at amd.com (Li, Maggie)
Date: Mon, 2 Feb 2009 11:47:15 +0800
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <498659D4.3010700@gmx.net>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD406@sbjgexmb1.amd.com>

Carl, 

I see. Pci_find_device is more reliable than dev_find_slot. However, we didn't use the former in our SB600 and RS690 code. There are many places to be modified if needed.

Best regards
Maggie li

-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
Sent: Monday, February 02, 2009 10:26 AM
To: Li, Maggie
Cc: Dan Lykowski; Marc Jones; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

Hi Maggie,

while your point about pci_find_device is valid, I think that
dev_find_device is the function Dan should choose. It allows us to
address the PCI devices even if their bus locations are shifted which is
possible with some AMD chipsets and may also be true for boards with
multiple chipsets.
In general, we want to use functions which can deal with non-default bus
topologies.

On 02.02.2009 02:48, Li, Maggie wrote:
> Dan,
>
>  
>
> I read the RRG spec, just as you said, you should use 0xF in file sb600_hda.c to get the current audio codec, that is to say, 
>
> dword &= 0xF;
>     if (!dword)  
>         goto no_codec;
>
>  
>
> pci_locate_device is really should be used in early setup. Device_t is the type of u32 at that time. After this stage, you should use dev_find_slot. In file sb600_sata.c, ?/* sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ ? gives you misunderstanding about how to get the SMBus and it should be removed. You can submit a patch about sata and I will ack it. Thanks.
>   

I'd prefer to use dev_find_device there as well.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From Zheng.Bao at amd.com  Mon Feb  2 05:12:17 2009
From: Zheng.Bao at amd.com (Bao, Zheng)
Date: Mon, 2 Feb 2009 12:12:17 +0800
Subject: [coreboot] [patch] flashrom: resending my patch about SPI/LPC
	conflicts
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>

Signed-off-by: Zheng Bao <zheng.bao at amd.com>

This patch is about flashrom running on dbm690t. It was sent several
months ago and hasn't got any response yet. Now it deals with 3
problems.
1. Fix the bug that the flashrom would hang if there is not SPI chip. A
timeout detection was added.
2. We only access LPC ROM if we boot via LPC ROM. And only SPI ROM if we
boot via SPI ROM. Doing crossly is not allowed. Anybody has better idea?
3. When we read/write SPI, we use memory read/write instead of sending
SPI command.

Joe
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From dchmelik at gmail.com  Mon Feb  2 06:41:41 2009
From: dchmelik at gmail.com (David Melik)
Date: Sun, 01 Feb 2009 21:41:41 -0800
Subject: [coreboot] making coreboot for Tyan s4882?
Message-ID: <49868795.3030105@gmail.com>

I recompiled a kernel that enables flashrom (normal kernels do, which is 
I guess why no one told me after I was asked about mine,) but I have had 
further problems.

I compiled grub2 for coreboot, and it says zelf payloads did not exist 
(I have read many posts on gmane that said that such zelf files 
specified in the make process are not even in the source: I saw none 
there.)  Then I replaced those with "payload 
/root/coreboot-v2-3923/coreboot.elf" in
/root/coreboot-v2-3923/targets/tyan/s4882/Config.lb.  Then at 
"/root/coreboot-v2-3923/targets/tyan/s4882/s4882#" make said:

"cp: missing destination file operand after `payload'."

I changed it to "payload ../../../coreboot.elf" in Config.lb (and copied 
that '.elf' to that path,) and it said:

...
objcopy --gap-fill 0xff -O binary coreboot coreboot.strip
make[1]: *** No rule to make target `../../../coreboot.elf', needed by 
`payload'.  Stop.
make[1]: Leaving directory 
`/root/coreboot-v2-3923/targets/tyan/s4882/s4882/normal'
make: *** [normal/coreboot.rom] Error 1


--David



From stepan at coresystems.de  Mon Feb  2 09:38:52 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 02 Feb 2009 09:38:52 +0100
Subject: [coreboot] [PATCH] Add more AMD CPU names
In-Reply-To: <49860F5D.6070401@assembler.cz>
References: <49860F5D.6070401@assembler.cz>
Message-ID: <4986B11C.3090308@coresystems.de>

Rudolf Marek wrote:
> Hello,
>
> Following patch adds missing CPU names. Please check
> http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
> if I did not made any mistake.
>
> Works for mine CPU ;)
>
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Acked-by: Stefan Reinauer <stepan at coresystems.de>



-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866





From stepan at coresystems.de  Mon Feb  2 09:53:33 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 02 Feb 2009 09:53:33 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
Message-ID: <4986B48D.9070001@coresystems.de>

ron minnich wrote:
> In general I'd like to avoid weak symbols, what purpose is being
> served by them here?
>
> ron
>   
It avoids the need to add an empty function to every single mainboard
not supporting the feature yet, in order to avoid compilation breakage
of those boards.

Carl-Daniel mentioned that weak symbols make the code harder to follow.
In a classic C sense that may not wrong, but since we're modelling
components, what happens is that we have a slightly object oriented
approach and some "constructors" are being overloaded, while others stay
empty.

We do a similar thing with the device functions in many places.. "If
there's a subsystem vendor/device id function for that device, execute
it, otherwise execute the default function" is harder to follow than
just "If there's an ACPI create function for that board, execute it"

To show an example, look at this:

What we have today:

        /* Set the subsystem vendor and device id for mainboard devices */
        ops = ops_pci(dev);
        if (dev->on_mainboard && ops && ops->set_subsystem) {
                ops->set_subsystem(dev,
                        MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
                        MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
        }

Here's on the other hand, how filo uses weak symbols:
        void __attribute__((weak)) platform_reboot(void);

        if (platform_reboot)
                platform_reboot();
        else
                printf("Rebooting not supported.\n");

which looks very familiar, does it? Oh, and a fix of the else case/error
message would potentially fix 50 boards without requiring 50 small hunks
of patches.

I'm no big fan of empty dummy function for everyone to fix compilation.
Are they considered better than weak symbols as a method of controlling
code flow and readability? They're sure not some overly clever code, so
it hopefully won't become dangerous.

"Debugging is twice as hard as writing the code in the first place.
Therefore, if you write the code as cleverly as possible, you are, by
definition, not smart enough to debug it." ? Brian W. Kernighan

One thing I wonder though, do we want to call weak symbols
unconditionally, as in Rudolf's code? No if() clause catches the case
that the symbol isn't there. In a test program that call would segfault
a user space program here.

Stefan


-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From avg at icyb.net.ua  Mon Feb  2 12:42:09 2009
From: avg at icyb.net.ua (Andriy Gapon)
Date: Mon, 02 Feb 2009 13:42:09 +0200
Subject: [coreboot] flashrom on intel dg33tl
In-Reply-To: <49824C54.9000403@gmx.net>
References: <491D8D71.3020504@icyb.net.ua> <491D9708.40506@gmx.net>
	<491D9D45.5080903@icyb.net.ua> <4981A4E1.70401@icyb.net.ua>
	<49824C54.9000403@gmx.net>
Message-ID: <4986DC11.1000003@icyb.net.ua>

on 30/01/2009 02:39 Carl-Daniel Hailfinger said the following:
> On 29.01.2009 13:45, Andriy Gapon wrote:
>> Sorry for top posting.
>> flashrom stopped working for me on intel DG33TL motherboard since I
>> reported success.
>> In the quoted older message below you can find what flashrom reported
>> then, here is what it reports now:
>>   
> 
> Ah yes. You're hitting the problem that the "read" opcode is prohibited
> by the BIOS. Older flashrom versions ignored that and simply read the
> memory-mapped contents near the top of the address space. These dumps
> were incomplete, though, so in a way claiming to have dumped the ROM was
> a bug. The new code tries to get it right and hits the roadblock erected
> by the BIOS.
> 
> There's nothing we can do to fix it unless we discover a bug in the
> hardware (or implement the descriptor mode driver for ICH).

Thank you for the information.
I noticed that the image that older flashrom produced was less than half
a size of Intel's rescue image.
I think that it still should be possible to unlock the hardware via
software (or something like that), because Intel has a tool that updates
BIOS from within OS (you guessed it right - available only for Windows).

-- 
Andriy Gapon



From avg at icyb.net.ua  Mon Feb  2 12:42:52 2009
From: avg at icyb.net.ua (Andriy Gapon)
Date: Mon, 02 Feb 2009 13:42:52 +0200
Subject: [coreboot] flashrom on intel dg33tl
In-Reply-To: <4982CBC7.7010200@coresystems.de>
References: <491D8D71.3020504@icyb.net.ua>
	<491D9708.40506@gmx.net>	<491D9D45.5080903@icyb.net.ua>
	<4981A4E1.70401@icyb.net.ua> <4982CBC7.7010200@coresystems.de>
Message-ID: <4986DC3C.4080103@icyb.net.ua>

on 30/01/2009 11:43 Stefan Reinauer said the following:
> On 29.01.2009 13:45 Uhr, Andriy Gapon wrote:
>> Sorry for top posting.
>> flashrom stopped working for me on intel DG33TL motherboard since I
>> reported success.
>> In the quoted older message below you can find what flashrom reported
>> then, here is what it reports now:
>>
>>   
> What did you change? Update your BIOS? Update flashrom?
> 
Only flashrom was updated.
I think that Carl-Daniel has already explained the situation to me.


-- 
Andriy Gapon



From p.brostovski at levigo.de  Mon Feb  2 16:12:44 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Mon, 02 Feb 2009 16:12:44 +0100
Subject: [coreboot] CoreBoot and Payloads
Message-ID: <49870D6C.3040608@levigo.de>

Hello,

i have a strange problem with executing payloads under coreboot.

What *do* work:

- CoreBoot-V2 from SVN repository + Tint Payload
or
- CoreBoot-V2 from SVN repository + EtherBoot 5.2.6 or 5.4.4 Payload
or
- CoreBoot-V2 from SVN repository + coreinfo Payload


I can even use the coreinfo.elf or tint.elf as bootfile with "normal" clients which only
have a gPXE rom.


But i can't use a linux kernel as a NBI or ELF image with etherboot 5.2.6 or 5.4.4.



I used the tools mknbi and wraplinux for making an NBI or elf image from the kernel.
I also tried to make an NBI image from a working gPXE.lkrn image.


I make everything exactly as described here:
http://markmail.org/message/ncdrofxylpofgl5m?q=nbi+gpxe
especially -> wraplinux -N gpxe.lkrn > gpxe.nbi


Neither a kernel NBI image or a gpxe NBI image do work.
The gpxe.lkrn works perfectly from grub or PXE Bootmenu.



As current gpxe version doesn't compile as a compatible payload for coreboot i have to use
etherboot 5.4.4 which can only load NBI or ELF images.


So i wanted to use the etherboot payload in coreboot as a chainloader for a gpxe elf/nbi
image.
But, it doesn't work.

The gpxe.nbi image doesn't work as a coreboot payload, neither as a loadable image for a
normal client with a gpxe rom loader, like tint.elf or coreinfo.elf do.


Coreboot and gPXE loads the NBI file, printing "... ok, rhine disable" - and hang - no
further output on screen or serial console.


The Hardware is a bcom-winnet-p680. (Via C7 CPU and Chipset + Via VT6102 [Rhine-II] 1106:3065



Do anyone have an idea why this doesn't work?



-- 
Regards,
Piotr



From peter at stuge.se  Mon Feb  2 16:26:15 2009
From: peter at stuge.se (Peter Stuge)
Date: Mon, 2 Feb 2009 16:26:15 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <49870D6C.3040608@levigo.de>
References: <49870D6C.3040608@levigo.de>
Message-ID: <20090202152615.29495.qmail@stuge.se>

Hi Piotr,

Piotr Brostovski wrote:
> I used the tools mknbi and wraplinux for making an NBI or elf image
> from the kernel.
..
> Do anyone have an idea why this doesn't work?

Yes.

As you know, both mknbi and wraplinux add some glue to the Linux
kernel binary to turn it into a "boot image."

That glue relies on BIOS interrupt services however, and coreboot
does not provide any such services by design.

Instead, you can use mkelfImage. It isn't really maintained anymore
but we're making it available from the coreboot.org repo.

The glue added by mkelfImage does not rely on BIOS interrupt services
and it is indeed the old-and-tried way of starting Linux from coreboot.

http://coreboot.org/Mkelfimage

Note the comment on that page about using vmlinux as payload
directly. If you have a chance to test that, please let us know
the result!


//Peter



From engineerguy3737 at yahoo.com  Mon Feb  2 17:01:55 2009
From: engineerguy3737 at yahoo.com (Dan Lykowski)
Date: Mon, 2 Feb 2009 08:01:55 -0800 (PST)
Subject: [coreboot] Bridge Mem Window/Prefetch Window
References: <347511.79954.qm@web57008.mail.re3.yahoo.com>
	<498643CA.2080101@coresystems.de>
Message-ID: <875545.29478.qm@web57007.mail.re3.yahoo.com>

CoreBoot Kernel Log:
[    0.412025] PCI: Bridge: 0000:00:01.0
[    0.416027]   IO window: 1000-1fff
[    0.420032]   MEM window: 0xfc500000-0xfc6fffff
[    0.427975]   PREFETCH window: 0x00000000f0000000- 0x00000000f7ffffff
[    0.440718] PCI: Bridge: 0000:00:04.0
[    0.448082]   IO window: 2000-2fff
[    0.454929]   MEM window: 0xfc700000-0xfc7fffff
[    0.464029]   PREFETCH window: disabled.
[    0.471919] PCI: Bridge: 0000:00:07.0
[    0.479285]   IO window: 3000-3fff
[    0.486133]   MEM window: 0xfc000000-0xfc4fffff
[    0.495233]   PREFETCH window: disabled.
[    0.503122] PCI: Bridge: 0000:00:14.4
[    0.510485]   IO window: disabled.
[    0.517322]   MEM window: disabled.
[    0.524338]   PREFETCH window: disabled.

Closed BIOS:
[    0.412025] PCI: Bridge: 0000:00:01.0
[    0.416027]   IO window: c000-cfff
[    0.420032]   MEM window: 0xfdd00000-0xfdefffff
[    0.427975]   PREFETCH window: 0x00000000d0000000- 0x00000000dfffffff
[    0.440718] PCI: Bridge: 0000:00:04.0
[    0.448082]   IO window: e000-efff
[    0.454929]   MEM window: 0xfda00000-0xfdafffff
[    0.464029]   PREFETCH window: 0x00000000fd900000 - 0x00000000fd9fffff
[    0.471919] PCI: Bridge: 0000:00:07.0
[    0.479285]   IO window: d000-dfff
[    0.486133]   MEM window: 0xfd000000-0xfd7fffff
[    0.495233]   PREFETCH window: 0x00000000fdf00000-0x00000000fdffffff
[    0.503122] PCI: Bridge: 0000:00:14.4
[    0.510485]   IO window: b000-bffff
[    0.517322]   MEM window: 0xfdc00000-0xfdcfffff
[    0.524338]   PREFETCH window: 0x00000000fdb00000-0x00000000fdbfffff

There are some pretty big differences. If we can explain them away great! if not, it would seem we have an allocation problem somewhere.

Thanks,
Dan Lykowski




________________________________
From: Stefan Reinauer <stepan at coresystems.de>
To: Dan Lykowski <engineerguy3737 at yahoo.com>
Cc: coreboot at coreboot.org
Sent: Sunday, February 1, 2009 4:52:26 PM
Subject: Re: [coreboot] Bridge Mem Window/Prefetch Window

Dan Lykowski wrote:
> Can anyone point me in the right direction as to where the Bridge Mem
> Window/Prefetch Window PCI configurations are defined/setup/used/etc.
> Coreboot does not set these correctly in my case. ( As compared to the
> standard BIOS )
>
What's the difference?

Stefan


-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866


      
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From mylesgw at gmail.com  Mon Feb  2 17:06:38 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 2 Feb 2009 09:06:38 -0700
Subject: [coreboot] making coreboot for Tyan s4882?
In-Reply-To: <49868795.3030105@gmail.com>
References: <49868795.3030105@gmail.com>
Message-ID: <C1C3344636BB4071B1F195BBD4B2C3D1@chimp>



> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of David Melik
> Sent: Sunday, February 01, 2009 10:42 PM
> To: coreboot at coreboot.org
> Subject: Re: [coreboot] making coreboot for Tyan s4882?
> 
> I recompiled a kernel that enables flashrom (normal kernels do, which is
> I guess why no one told me after I was asked about mine,) but I have had
> further problems.
> 
> I compiled grub2 for coreboot, and it says zelf payloads did not exist
> (I have read many posts on gmane that said that such zelf files
> specified in the make process are not even in the source: I saw none
> there.)  Then I replaced those with "payload
> /root/coreboot-v2-3923/coreboot.elf" in
> /root/coreboot-v2-3923/targets/tyan/s4882/Config.lb.  Then at
> "/root/coreboot-v2-3923/targets/tyan/s4882/s4882#" make said:
> 
> "cp: missing destination file operand after `payload'."
> 
> I changed it to "payload ../../../coreboot.elf" in Config.lb (and copied
> that '.elf' to that path,) and it said:

Can you try copying your payload (grub2) to targets/tyan/s4882/grub2.elf and
using "payload ../grub2.elf" in your Config.lb?

Thanks,
Myles




From p.brostovski at levigo.de  Mon Feb  2 17:18:17 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Mon, 02 Feb 2009 17:18:17 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <20090202152615.29495.qmail@stuge.se>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
Message-ID: <49871CC9.8010907@levigo.de>

Hi, Peter!

Peter Stuge schrieb:
> Piotr Brostovski wrote:
>> Do anyone have an idea why this doesn't work?
> 
> Yes.
> 
> As you know, both mknbi and wraplinux add some glue to the Linux
> kernel binary to turn it into a "boot image."
> 
> That glue relies on BIOS interrupt services however, and coreboot
> does not provide any such services by design.

Thank you for this information! :-)

> Instead, you can use mkelfImage. It isn't really maintained anymore
> but we're making it available from the coreboot.org repo.
> 
> The glue added by mkelfImage does not rely on BIOS interrupt services
> and it is indeed the old-and-tried way of starting Linux from coreboot.

Ok, i tried to make an image with the gpxe.lkrn file first.
The result is:

file gpxe.lkrn
gpxe.lkrn: Linux/i386 Kernel, Setup Version 0x207, zImage

mkelfImage --kernel=gpxe.lkrn --output=gpxe.elf

file gpxe.elf
gpxe.elf: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically linkedfile:
corrupted section header size.


compiled and bootet, but coreboot says also corrupted header:

elfboot: Attempting to load payload.
rom_stream: 0xfffa0000 - 0xfffeffff
Found ELF candidate at offset 0
header_offset is 0
Try to load at offset 0x0
Dropping non PT_LOAD segment
New segment addr 0x10000 size 0x5544 offset 0x104 filesize 0x12a8
(cleaned up) New segment addr 0x10000 size 0x5544 offset 0x104 filesize 0x12a8
New segment addr 0x20000 size 0x1070 offset 0x13ac filesize 0x0
(cleaned up) New segment addr 0x20000 size 0x1070 offset 0x13ac filesize 0x0
New segment addr 0x100000 size 0x700000 offset 0x13ac filesize 0xcff9
(cleaned up) New segment addr 0x100000 size 0x700000 offset 0x13ac filesize 0xcff9
Loading Segment: addr: 0x000000001dfd0000 memsz: 0x0000000000005544 filesz: 0x00000000000012a8
Clearing Segment: addr: 0x000000001dfd12a8 memsz: 0x000000000000429c
Loading Segment: addr: 0x000000001dfe0000 memsz: 0x0000000000001070 filesz: 0x0000000000000000
Clearing Segment: addr: 0x000000001dfe0000 memsz: 0x0000000000001070
Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000700000 filesz: 0x000000000000cff9
Clearing Segment: addr: 0x000000000010cff9 memsz: 0x00000000006f3007
Image checksum: 2f79 != computed checksum: 8562
Can not load ELF Image.


then the kernel:
file vmlinuz
vmlinuz: Linux/i386 Kernel, Setup Version 0x203, bzImage

mkelfImage -t bzImage-i386 --append="root=/dev/nfs nfsroot=/srv/ceptix.auslieferung
vga=785 initrd=initrd.splash ide=nodma splash=silent" --initrd=initrd.splash
--kernel=vmlinuz --output=vmlinuz2.4.28.elf

file vmlinuz2.4.28.elf vmlinuz2.4.28.elf: ELF 32-bit LSB executable, Intel 80386, version
1 (SYSV), statically linkedfile: corrupted section header size.

But it also have a corrupted section header?

> 
> http://coreboot.org/Mkelfimage
> 
> Note the comment on that page about using vmlinux as payload
> directly. If you have a chance to test that, please let us know
> the result!
> 

sadly my kernel for testing is too big to fit in the eeprom (512K - coreboot), but i test
it if i can make him small enough.


--
Regards,
Piotr



From rminnich at gmail.com  Mon Feb  2 17:24:23 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 2 Feb 2009 08:24:23 -0800
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
	generation
In-Reply-To: <4986B48D.9070001@coresystems.de>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
	<4986B48D.9070001@coresystems.de>
Message-ID: <13426df10902020824t4f73558bpe7f1b7c162ccec93@mail.gmail.com>

On Mon, Feb 2, 2009 at 12:53 AM, Stefan Reinauer <stepan at coresystems.de> wrote:

> One thing I wonder though, do we want to call weak symbols
> unconditionally, as in Rudolf's code? No if() clause catches the case
> that the symbol isn't there. In a test program that call would segfault
> a user space program here.

if you're going to have a weak symbol I can't see any reason NOT to
call it unconditionally. The symbol is always defined.

If you're going to call it unconditionally then you might as well put
it in a file by itself, and either compile that file in or compile in
code that has a different definition of the function. That way, if you
know which files are used to build a mainboard, you also know exactly
which functions are used -- the ones in the files.

Weak symbols can be frustrating when you're using code management
tools like kscope or eclipse. You've to two symbols defined in the
source code base -- which do you  use? (yes, I know we can tell people
'just ignore the weak one' but the code analysis tools are not always
that smart).

I'm still not convinced we need them. We can get the same capability
(in v3 anyway) just by carefully selecting which files to build into a
project.

Weak symbols can make sense in a project (like glibc) where one can
never know what files are being compiled in as part of a program (by
definition, it's a library), but that logic does not apply to
coreboot, which is not a library.

ron



From rminnich at gmail.com  Mon Feb  2 17:29:02 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 2 Feb 2009 08:29:02 -0800
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <49871CC9.8010907@levigo.de>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<49871CC9.8010907@levigo.de>
Message-ID: <13426df10902020829u45e571edk848d693edf84cada@mail.gmail.com>

On Mon, Feb 2, 2009 at 8:18 AM, Piotr Brostovski <p.brostovski at levigo.de> wrote:

> Ok, i tried to make an image with the gpxe.lkrn file first.
> The result is:
>
> file gpxe.lkrn
> gpxe.lkrn: Linux/i386 Kernel, Setup Version 0x207, zImage
>
> mkelfImage --kernel=gpxe.lkrn --output=gpxe.elf
>
> file gpxe.elf
> gpxe.elf: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically linkedfile:
> corrupted section header size.

use readelf. Most (bfd-derived) ELF tools have a bug w.r.t. elf files
that has been there for 10 years.

> Image checksum: 2f79 != computed checksum: 8562
> Can not load ELF Image.

This is actually a different error I believe.

I'll be working with this later this week possibly and will let you
know how it goes.

ron



From peter at stuge.se  Mon Feb  2 17:42:29 2009
From: peter at stuge.se (Peter Stuge)
Date: Mon, 2 Feb 2009 17:42:29 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <49871CC9.8010907@levigo.de>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<49871CC9.8010907@levigo.de>
Message-ID: <20090202164229.23050.qmail@stuge.se>

Piotr Brostovski wrote:
> file gpxe.lkrn
> gpxe.lkrn: Linux/i386 Kernel, Setup Version 0x207, zImage

zImage is not supported by mkelfImage AFAIK.


> then the kernel:
> file vmlinuz
> vmlinuz: Linux/i386 Kernel, Setup Version 0x203, bzImage

Is this really bzImage? Please use either vmlinux (in kernel root dir)
or bzImage (in arch/i386/boot/) from the kernel build with mkelfImage.


> mkelfImage -t bzImage-i386 --append="root=/dev/nfs nfsroot=/srv/ceptix.auslieferung
> vga=785 initrd=initrd.splash ide=nodma splash=silent" --initrd=initrd.splash
> --kernel=vmlinuz --output=vmlinuz2.4.28.elf

Although 2.4 should work it might be nice to build a recent 2.6
kernel, which has been used with mkelfImage recently, just to check
that mkelfImage actually works.


> sadly my kernel for testing is too big to fit in the eeprom
> (512K - coreboot), but i test it if i can make him small enough.

One other option is to find a larger flash chip. Which chip is your
board using now?


//Peter



From rminnich at gmail.com  Mon Feb  2 17:50:37 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 2 Feb 2009 08:50:37 -0800
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <20090202164229.23050.qmail@stuge.se>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<49871CC9.8010907@levigo.de> <20090202164229.23050.qmail@stuge.se>
Message-ID: <13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>

actually, the argument in  favor of a 2.4 series is that it might
actually fit :-)

ron



From p.brostovski at levigo.de  Mon Feb  2 18:18:30 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Mon, 02 Feb 2009 18:18:30 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <20090202164229.23050.qmail@stuge.se>
References: <49870D6C.3040608@levigo.de>
	<20090202152615.29495.qmail@stuge.se>	<49871CC9.8010907@levigo.de>
	<20090202164229.23050.qmail@stuge.se>
Message-ID: <49872AE6.5040201@levigo.de>

Hi,

Peter Stuge schrieb:
> Piotr Brostovski wrote:
>> file gpxe.lkrn
>> gpxe.lkrn: Linux/i386 Kernel, Setup Version 0x207, zImage
> 
> zImage is not supported by mkelfImage AFAIK.

is a zImage not an vmlinux-i386?
Is there a possibility to build a gpxe rom as a bzImage?

or can be one of the following targets somehow be used to make directly an executable elf
image or something that can be handled by mkelfImage?

bin/deps/arch/i386/prefix/bImageprefix.S.d
bin/deps/arch/i386/prefix/bootpart.S.d
bin/deps/arch/i386/prefix/comprefix.S.d
bin/deps/arch/i386/prefix/dskprefix.S.d
bin/deps/arch/i386/prefix/elf_dprefix.S.d
bin/deps/arch/i386/prefix/elfprefix.S.d
bin/deps/arch/i386/prefix/exeprefix.S.d
bin/deps/arch/i386/prefix/hdprefix.S.d
bin/deps/arch/i386/prefix/kpxeprefix.S.d
bin/deps/arch/i386/prefix/libprefix.S.d
bin/deps/arch/i386/prefix/lkrnprefix.S.d
bin/deps/arch/i386/prefix/lmelf_dprefix.S.d
bin/deps/arch/i386/prefix/lmelf_prefix.S.d
bin/deps/arch/i386/prefix/mbr.S.d
bin/deps/arch/i386/prefix/nbiprefix.S.d
bin/deps/arch/i386/prefix/nullprefix.S.d
bin/deps/arch/i386/prefix/pxeprefix.S.d
bin/deps/arch/i386/prefix/romprefix.S.d
bin/deps/arch/i386/prefix/unnrv2b.S.d
bin/deps/arch/i386/prefix/usbdisk.S.d

> 
> 
> Although 2.4 should work it might be nice to build a recent 2.6
> kernel, which has been used with mkelfImage recently, just to check
> that mkelfImage actually works.

i try to throw everything out that isn't needed t boot, we'll see how small it get.

> 
> One other option is to find a larger flash chip. Which chip is your
> board using now?
> 

only 4MBit Chips
SST 39SF040
AMIC A29040A


--
Regards,
Piotr



From popkonserve at gmx.de  Mon Feb  2 18:36:29 2009
From: popkonserve at gmx.de (Holger Hesselbarth)
Date: Mon, 02 Feb 2009 18:36:29 +0100
Subject: [coreboot] generic cpu detection proposal
In-Reply-To: <20090201170313.21455.qmail@stuge.se>
References: <49847B06.6090408@gmx.de>
	<20090201013208.28928.qmail@stuge.se>	<8A81AC62-C18E-47DD-B76C-FC386755FCD8@coresystems.de>
	<20090201170313.21455.qmail@stuge.se>
Message-ID: <49872F1D.9000403@gmx.de>

> Ok. Maybe you can send a patch to add those MSRs to msrtool Holger?
> 
> Have a look at http://stuge.se/mt.cs5536_pic_divil3.patch for one way
> to note references in the source files.

Hi Peter,
no problem, i'll set up a file for the P6 cores as soon as possible. i saw your 
presentation at the 25C3 so i knew that there's something like a register 
dumping tool. is there a svn repository to get the tool and creating patches 
against?

at the moment i can not test if any of my code is really working. i'm in vienna 
right now and i have to stay a month or two. i had to leave all my linux 
machines in germany and i don't want to install too much non-work related stuff 
on my employer's laptop. all i can check is if the code compiles to objects 
(e.g. is free of syntax errors). but still i won't stop suppling code and hoping 
that Uwe (or someone else!) will compile and test some it before i can :)



From rminnich at gmail.com  Mon Feb  2 18:47:15 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 2 Feb 2009 09:47:15 -0800
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
	generation
In-Reply-To: <4986B48D.9070001@coresystems.de>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
	<4986B48D.9070001@coresystems.de>
Message-ID: <13426df10902020947j704aa02aq5416d251c1e3ee6d@mail.gmail.com>

Another question.

Were we to follow the device object model, isn't it more proper to add
a new device_operations struct member to devices to generate ACPI?
Then we add another pass to the device code which walks the tree and
each device can optionally create ACPI as it needs to. The first
object is the mainboard, and this could do all the initial setup for
the AML code generation.

If we had this I think the weak symbol would not be needed. This would
drop very nicely in to v3: I would add a phase7_acpi struct member to
device_operations.

ron



From r.marek at assembler.cz  Mon Feb  2 19:02:58 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Mon, 02 Feb 2009 19:02:58 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <49864CB0.1010903@gmx.net>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
Message-ID: <49873552.40208@assembler.cz>

Hi,

> that's an impressive piece of code!
>   
Heh nice.

> The following review is rather short and to-the-point. No offense intended.
>   
Well yes as always ;)
> A few comments about the general design:
> The global variable gencurrent is a bit irritating. How do you handle
> running on multiple cores?
>   
The idea is that the create_acpi_tables always run on BSP. FOr the 
powernow I admin we will need to run get/set MSR on each CPU.
I have in plan to move the powernow from the AMD board to more general 
place. For multi cores, they have same MSR so we dont need to solve that.
> Same for len_stack. Besides that, both variables are in the global
> namespace and could use some acpi_ prefix or suffix.
>   
Well I was quite hesitating if to use a global variable or introduce 
some pointer parameter to every function. Then I choose to have the 
global (and static) var
for this.  The reason is that the pointer propagation would be needed 
through all functions. Also I was not considering the multi thread 
support, because ACPI
tables are always build by BSP. All pointers and stack is encapsulated, 
therefore not visible from outside. It should work fine.

>
> I think weak symbols are something that makes code harder to follow.
>   
Yes, and I have read all mails until now. I decided to put here empty 
dummy routine with weak symbol. This routine will be hidden if someone 
creates
"strong" version of same function in some other object file. The reason 
for this is to avoid having #ifdefs and dummy empty functions for all boards
which don't need this.

The second possibility is to have just exactly one weak function and 
test its presence with if (name_fn) { name_fn)() } The linux kernel uses 
first case
and I decided that this nicer, because if someone accidentally manages 
to create another weak function, it depends on luck which one will be 
called.
The used scheme above assures that either the weak fn will be called or 
the strong one.

> The { belongs on another line.
>   
Hmm I already commit that, maybe I can fix it as trivial commit.

>   
>> +	return current;
>> +}
>> +
>> +void acpi_create_ssdt_generator(acpi_header_t *ssdt, char *oem_table_id)
>>   
>>     
>
> Strange function name.
>   

I have in plan to introduce acpi_create_ssdt which will link up the 
ssdt.aml code to this. This is the reason for this strange name.

>   
>> +{
>> +	unsigned long current=(unsigned long)ssdt+sizeof(acpi_header_t);
>> +	memset((void *)ssdt, 0, sizeof(acpi_header_t));
>> +	memcpy(&ssdt->signature, SSDT_NAME, 4);
>>   
>>     
>
> Maybe strncpy instead?
>   
Here it is still OK. because it is static. I think it would be better 
for oem_table_name.

> "how many nesting levels do we support"

Hmm true maybe trival fix too.
>
>> +#define ACPIGEN_LENSTACK_SIZE 10
>> +
>> +/* if you need to change this, change the acpigen_write_f and
>> +   acpigen_patch_len */
>> +
>>   
>>     
>
> Can you remove the empty line above?
>   

I like them, you dont?
>   
>> +#define ACPIGEN_MAXLEN 0xfff
>> +
>> +#include <string.h>
>> +#include <arch/acpigen.h>
>> +#include <console/console.h>
>> +
>> +static char *gencurrent;
>> +
>> +char *len_stack[ACPIGEN_LENSTACK_SIZE];
>> +int ltop = 0;
>>   
>>     
>
> These global variables need better names and some comments explaining
> what they do.
>   

Whoops they should be static. Sorry about that. For this reason they 
have just names like this, because they should be static and not visible.
I will fix them.


>   
>> +
>> +static int acpigen_write_len_f()
>>   
>>     
>
> Needs a doxygen comment.
>   

Yes in Alps I did not have doxygen installed. I will try to write some 
patch addressing the issues and also document this a bit.
Also some words to ACPI wiki would be good...
>   
>> +{
>> +	ASSERT(ltop < (ACPIGEN_LENSTACK_SIZE - 1))
>> +	len_stack[ltop++] = gencurrent;
>> +	acpigen_emit_byte(0);
>> +	acpigen_emit_byte(0);
>> +	return 2;
>> +}
>> +
>> +void acpigen_patch_len(int len)
>>   
>>     
>
> Needs a doxygen comment.
>
>   
>> +{
>> +	ASSERT(len <= ACPIGEN_MAXLEN)
>> +	ASSERT(ltop > 0)
>> +	char *p = len_stack[--ltop];
>> +	/* generate store length for 0xfff max */
>> +	p[0] = (0x40 | (len & 0xf));
>> +	p[1] = (len >> 4 & 0xff);
>> +
>> +}
>> +
>> +void acpigen_set_current(char *curr) {
>>   
>>     
>
> Needs a doxygen comment.
>
>   
>> +    gencurrent = curr;
>> +}
>> +
>> +char *acpigen_get_current(void) {
>>   
>>     
>
> Needs a doxygen comment.
>   
Yes its true.

>>  unsigned long acpi_fill_srat(unsigned long current); 
>> +unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id);
>> +void acpi_create_ssdt_generator(acpi_header_t *ssdt, char *oem_table_id);
>>   
>>     
>
> The two functions above have rather similar names and it's not
> immedately ofvious how they differ.
>   

It follows the scheme we have right now. Create creates, fill is callback.

> acpigen_get_current is a really confusingly named function.
>   
Hmm any idea of better name? it gets "current" which is used in all acpi 
code as current data pointer.

> "COREBOOT" please. That way, people can actually find out where the
> table came from. The fact that the data are generated dynamically is
> already visible from the compiler ID.
>   
Here is small catch. The ACPI specs says that the OEM_TABLE_ID should 
have unique name, please note that the OEM_ID is set to coreboot.


>> +	for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
>>   
>>     
>
> Comment on a separate line, please.
>   
Aha this is cut and paste from old code.



>   
>> +		lenp += acpigen_write_dword(0x0);
>> +	}
>> +
>> +	acpigen_patch_len(lenp - 1);
>>   
>>     
>
> acpigen_patch_len is a name which does not really reveal function purpose.
>   
Give me better one please, what it does its a patching of size when the 
size of the object is known.

>> +int k8acpi_write_vars(void)
>> +{
>> +	int lens;
>>   
>>     
>
> Maybe use len instead of lens?
>   

Lens because its a Scope. lenp is for Package.
> I know the original code did not have it, but can you please add TOM2?
>   
Yes I was also thinking about this one. What is cool now, that we can 
easily add new stuff without worring to break the binary
offset dependent patching ;)

I will try to address most of the issues also depending on your answers,

Thanks,
Rudolf



From r.marek at assembler.cz  Mon Feb  2 19:04:11 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Mon, 02 Feb 2009 19:04:11 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
Message-ID: <4987359B.3080904@assembler.cz>

ron minnich wrote:
> In general I'd like to avoid weak symbols, what purpose is being
> served by them here?
>   
To support boards which dont need this callback. And avoids the #ifdefs 
or dummy functions.

Rudolf



From p.brostovski at levigo.de  Mon Feb  2 19:08:54 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Mon, 02 Feb 2009 19:08:54 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>
References: <49870D6C.3040608@levigo.de>
	<20090202152615.29495.qmail@stuge.se>	<49871CC9.8010907@levigo.de>
	<20090202164229.23050.qmail@stuge.se>
	<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>
Message-ID: <498736B6.1000704@levigo.de>

hi,

sadly the smallest 2.4.28 bzImage i could build is still around ~670kb big
... too big for a 4MBit bios chip :/


ron minnich schrieb:
> actually, the argument in  favor of a 2.4 series is that it might
> actually fit :-)
> 
> ron
> 




From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb  2 19:11:33 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 02 Feb 2009 19:11:33 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <13426df10902020947j704aa02aq5416d251c1e3ee6d@mail.gmail.com>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>	
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>	
	<4986B48D.9070001@coresystems.de>
	<13426df10902020947j704aa02aq5416d251c1e3ee6d@mail.gmail.com>
Message-ID: <49873755.9030008@gmx.net>

On 02.02.2009 18:47, ron minnich wrote:
> Another question.
>
> Were we to follow the device object model, isn't it more proper to add
> a new device_operations struct member to devices to generate ACPI?
> Then we add another pass to the device code which walks the tree and
> each device can optionally create ACPI as it needs to. The first
> object is the mainboard, and this could do all the initial setup for
> the AML code generation.
>
> If we had this I think the weak symbol would not be needed. This would
> drop very nicely in to v3: I would add a phase7_acpi struct member to
> device_operations.
>   

That idea is really awesome.

However, it is rather inconvenient to generate all the ACPI code at
runtime. Of course, we need ACPI code generation for exchangeable
devices like the CPU. But tables which are static anyway should not need
code generation. What do you think about a solution which simply
references the externally compiled AML for static table parts? That way,
we have one common interface and only the minimum needed complexity.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From mylesgw at gmail.com  Mon Feb  2 19:22:30 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 2 Feb 2009 11:22:30 -0700
Subject: [coreboot] making coreboot for Tyan s4882?
In-Reply-To: <C1C3344636BB4071B1F195BBD4B2C3D1@chimp>
References: <49868795.3030105@gmail.com>
	<C1C3344636BB4071B1F195BBD4B2C3D1@chimp>
Message-ID: <2831fecf0902021022h2fce8085j6e1803d4412ee1e5@mail.gmail.com>

On Mon, Feb 2, 2009 at 9:06 AM, Myles Watson <mylesgw at gmail.com> wrote:
>
>
>> -----Original Message-----
>> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
>> On Behalf Of David Melik
>> Sent: Sunday, February 01, 2009 10:42 PM
>> To: coreboot at coreboot.org
>> Subject: Re: [coreboot] making coreboot for Tyan s4882?
>>
>> I recompiled a kernel that enables flashrom (normal kernels do, which is
>> I guess why no one told me after I was asked about mine,) but I have had
>> further problems.
>>
>> I compiled grub2 for coreboot, and it says zelf payloads did not exist
>> (I have read many posts on gmane that said that such zelf files
>> specified in the make process are not even in the source: I saw none
>> there.)  Then I replaced those with "payload
>> /root/coreboot-v2-3923/coreboot.elf" in
>> /root/coreboot-v2-3923/targets/tyan/s4882/Config.lb.  Then at
>> "/root/coreboot-v2-3923/targets/tyan/s4882/s4882#" make said:
>>
>> "cp: missing destination file operand after `payload'."
>>
>> I changed it to "payload ../../../coreboot.elf" in Config.lb (and copied
>> that '.elf' to that path,) and it said:
>
> Can you try copying your payload (grub2) to targets/tyan/s4882/grub2.elf and

I meant targets/tyan/s4882/s4882/grub2.elf.  Sorry.

Myles

> using "payload ../grub2.elf" in your Config.lb?
>
> Thanks,
> Myles
>
>



From rminnich at gmail.com  Mon Feb  2 19:58:50 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 2 Feb 2009 10:58:50 -0800
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <498736B6.1000704@levigo.de>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<49871CC9.8010907@levigo.de> <20090202164229.23050.qmail@stuge.se>
	<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>
	<498736B6.1000704@levigo.de>
Message-ID: <13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>

On Mon, Feb 2, 2009 at 10:08 AM, Piotr Brostovski
<p.brostovski at levigo.de> wrote:
> hi,
>
> sadly the smallest 2.4.28 bzImage i could build is still around ~670kb big
> ... too big for a 4MBit bios chip :/
>

This is where you need better compression and a tiny kernel. Plus, the
bzimage includes its own decompressor ... let coreboot decompress the
payload.

on olpc we always started from a vmlinux and lzma encoded it.

ron



From p.brostovski at levigo.de  Mon Feb  2 20:14:42 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Mon, 02 Feb 2009 20:14:42 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>	
	<49871CC9.8010907@levigo.de> <20090202164229.23050.qmail@stuge.se>	
	<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>	
	<498736B6.1000704@levigo.de>
	<13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>
Message-ID: <49874622.2010900@levigo.de>

Hi ron,

i didn't say it wouldn't be possible.
But - a working gPXE payload offer much more possibilities.

So i hope that it will be somehow possible to re)unite core- and etherboot(gPXE)


ron minnich schrieb:
> On Mon, Feb 2, 2009 at 10:08 AM, Piotr Brostovski
> <p.brostovski at levigo.de> wrote:
>> hi,
>>
>> sadly the smallest 2.4.28 bzImage i could build is still around ~670kb big
>> ... too big for a 4MBit bios chip :/
>>
> 
> This is where you need better compression and a tiny kernel. Plus, the
> bzimage includes its own decompressor ... let coreboot decompress the
> payload.
> 
> on olpc we always started from a vmlinux and lzma encoded it.
> 
> ron
> 



--
Regards,
Piotr



From rminnich at gmail.com  Mon Feb  2 20:28:55 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 2 Feb 2009 11:28:55 -0800
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
	generation
In-Reply-To: <49873755.9030008@gmx.net>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
	<4986B48D.9070001@coresystems.de>
	<13426df10902020947j704aa02aq5416d251c1e3ee6d@mail.gmail.com>
	<49873755.9030008@gmx.net>
Message-ID: <13426df10902021128q6b2548ccjd746ec0b989e9f41@mail.gmail.com>

On Mon, Feb 2, 2009 at 10:11 AM, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:

> However, it is rather inconvenient to generate all the ACPI code at
> runtime. Of course, we need ACPI code generation for exchangeable
> devices like the CPU. But tables which are static anyway should not need
> code generation. What do you think about a solution which simply
> references the externally compiled AML for static table parts? That way,
> we have one common interface and only the minimum needed complexity.

So what we need in the general case are static tables that can be
extended at runtime as we gather more info. The static tables are
'attached'
ot the mainboard during (in v3 terms) phase 7 so, yes, I like this a lot.

I think it ought to be possible to use our object model to remove the
weak symbol and add this kind of functionality.

that said, Rudolf's code doesn't rule this idea out since his code is
v2; I certainly don't want to block progress, so let's leave it as a
suggestion for v3 and, if you want, we can try to do this in v2.

ron



From stepan at coresystems.de  Mon Feb  2 21:40:32 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 02 Feb 2009 21:40:32 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <49873755.9030008@gmx.net>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>	
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>	
	<4986B48D.9070001@coresystems.de>
	<13426df10902020947j704aa02aq5416d251c1e3ee6d@mail.gmail.com>
	<49873755.9030008@gmx.net>
Message-ID: <49875A40.9080704@coresystems.de>

Carl-Daniel Hailfinger wrote:
> However, it is rather inconvenient to generate all the ACPI code at
> runtime. 
We simply can't do it. I am tempted to add a "yet".

> Of course, we need ACPI code generation for exchangeable
> devices like the CPU. But tables which are static anyway should not need
> code generation. What do you think about a solution which simply
> references the externally compiled AML for static table parts? 
That's what the SSDT is for. It's loaded in addition to the DSDT to
enhance it.

Stefan

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866


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From stepan at coresystems.de  Mon Feb  2 21:47:44 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 02 Feb 2009 21:47:44 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <13426df10902020947j704aa02aq5416d251c1e3ee6d@mail.gmail.com>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>	
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>	
	<4986B48D.9070001@coresystems.de>
	<13426df10902020947j704aa02aq5416d251c1e3ee6d@mail.gmail.com>
Message-ID: <49875BF0.1050302@coresystems.de>

ron minnich wrote:
> Another question.
>
> Were we to follow the device object model, isn't it more proper to add
> a new device_operations struct member to devices to generate ACPI?
> Then we add another pass to the device code which walks the tree and
> each device can optionally create ACPI as it needs to. The first
> object is the mainboard, and this could do all the initial setup for
> the AML code generation.
>   
The idea is definitely sound. But we're many steps before that, still.
With our device model, and with our ACPI support.

There are large portions of a DSDT that are "not just the device tree",
but a lot more. We can start feeding that stuff into our device tree.
That's a thing I was yelling about already, too. But then we have a
complicated device tree and a complicated generator. Seeing the
complexity of ACPI in all its shades, I am slightly, temporarily scared

> If we had this I think the weak symbol would not be needed. 

Absolutely. But it means creating a new framework that is much more
enhanced than what we have today.

> This would
> drop very nicely in to v3: I would add a phase7_acpi struct member to
> device_operations.
>   
It does sound a bit like v4. This is why it is so good.


-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866


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From mylesgw at gmail.com  Mon Feb  2 22:31:38 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 2 Feb 2009 14:31:38 -0700
Subject: [coreboot] SeaBIOS and noisy irqs
Message-ID: <2831fecf0902021331w19d8d221k86ce2eca5b3d5513@mail.gmail.com>

Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
Got noisy pic1 irq 00000000
...

I'm trying to get Coreboot+SeaBIOS to boot the grub installed on my
hard drive.  I have a Tyan s2895.

Sometimes it gets past this, sometimes it doesn't.  Is there a workaround?

I didn't see anything that seemed related to this in the logs, so I
didn't include the full log.

Thanks,
Myles



From svn at coreboot.org  Mon Feb  2 23:55:27 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Mon,  2 Feb 2009 23:55:27 +0100
Subject: [coreboot] r3927 - trunk/util/flashrom
Message-ID: <mailman.2747.1355071478.16123.coreboot@coreboot.org>

Author: stuge
Date: 2009-02-02 23:55:26 +0100 (Mon, 02 Feb 2009)
New Revision: 3927

Modified:
   trunk/util/flashrom/board_enable.c
Log:
flashrom: MSI MS-7046 board enable

Signed-off-by: Peter Stuge <peter at stuge.se>
Acked-by: David Tiemann <davidtiemann at gmail.com>


Modified: trunk/util/flashrom/board_enable.c
===================================================================
--- trunk/util/flashrom/board_enable.c	2009-02-01 18:40:50 UTC (rev 3926)
+++ trunk/util/flashrom/board_enable.c	2009-02-02 22:55:26 UTC (rev 3927)
@@ -484,6 +484,14 @@
 	return ich_gpio_raise(name, 0x8086, 0x2440, 0x58, 0x0c, 0xffc0, 22);
 }
 
+/**
+ * Suited for MSI MS-7046.
+ */
+static int ich6_gpio19_raise(const char *name)
+{
+	return ich_gpio_raise(name, 0x8086, 0x2640, 0x48, 0x0c, 0xffc0, 19);
+}
+
 static int board_kontron_986lcd_m(const char *name)
 {
 	struct pci_dev *dev;
@@ -992,6 +1000,20 @@
 		.enable			= wbsio_check_for_spi,
 	},
 	{
+		.first_vendor		= 0x8086,
+		.first_device		= 0x2658,
+		.first_card_vendor	= 0x1462,
+		.first_card_device	= 0x7046,
+		.second_vendor		= 0x1106,
+		.second_device		= 0x3044,
+		.second_card_vendor	= 0x1462,
+		.second_card_device	= 0x046d,
+		.lb_vendor		= NULL,
+		.lb_part		= NULL,
+		.name			= "MSI MS-7046",
+		.enable			= ich6_gpio19_raise,
+	},
+	{
 		.first_vendor		= 0,
 		.first_device		= 0,
 		.first_card_vendor	= 0,




From peter at stuge.se  Tue Feb  3 00:00:37 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 3 Feb 2009 00:00:37 +0100
Subject: [coreboot] r3927 - trunk/util/flashrom
Message-ID: <20090202230037.433.qmail@stuge.se>

svn at coreboot.org wrote:
> flashrom: MSI MS-7046 board enable
> 
> Signed-off-by: Peter Stuge <peter at stuge.se>
> Acked-by: David Tiemann <davidtiemann at gmail.com>

Thanks to Rudolf and eightdot for finding the right GPIO, and David
for testing.


//Peter



From kevin at koconnor.net  Tue Feb  3 00:11:13 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Mon, 2 Feb 2009 18:11:13 -0500
Subject: [coreboot] SeaBIOS and noisy irqs
In-Reply-To: <2831fecf0902021331w19d8d221k86ce2eca5b3d5513@mail.gmail.com>
References: <2831fecf0902021331w19d8d221k86ce2eca5b3d5513@mail.gmail.com>
Message-ID: <20090202231113.GA28914@morn.localdomain>

On Mon, Feb 02, 2009 at 02:31:38PM -0700, Myles Watson wrote:
> Got noisy pic1 irq 00000000
> ...
> 
> I'm trying to get Coreboot+SeaBIOS to boot the grub installed on my
> hard drive.  I have a Tyan s2895.
> 
> Sometimes it gets past this, sometimes it doesn't.  Is there a workaround?

This looks like there is something wrong with the irq routing in
coreboot.  A hardware irq handler is being called, but the pic doesn't
report any irqs pending.

Technically, seabios shouldn't be masking irqs - so, it is possible
that is causing a problem if your board is also running option roms
(eg, network or disk).

We've also seen issues with option roms getting confused by coreboot
not setting the PCI_INTERRUPT_LINE setting.

Finally, if the failures are sporadic, I guess it could be the
reporting itself that is causing a problem.  You could try the patch
below (which also disables masking).

-Kevin


--- a/src/pic.c
+++ b/src/pic.c
@@ -34,20 +34,24 @@ pic_setup()
 void VISIBLE16
 handle_hwpic1(struct bregs *regs)
 {
+#if 0
     u8 isr = get_pic1_isr();
     dprintf(DEBUG_ISR_hwpic1, "Got noisy pic1 irq %x\n", isr);
     isr &= ~PIC1_IRQ2; // don't ever mask the cascaded irq
     if (isr)
         mask_pic1(isr);
+#endif
     eoi_pic1();
 }
 
 void VISIBLE16
 handle_hwpic2(struct bregs *regs)
 {
+#if 0
     u8 isr = get_pic2_isr();
     dprintf(DEBUG_ISR_hwpic2, "Got noisy pic2 irq %x\n", isr);
     if (isr)
         mask_pic2(isr);
+#endif
     eoi_pic2();
 }



From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb  3 00:26:03 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 03 Feb 2009 00:26:03 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <49873552.40208@assembler.cz>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
	<49873552.40208@assembler.cz>
Message-ID: <4987810B.5000909@gmx.net>

On 02.02.2009 19:02, Rudolf Marek wrote:
> Hi,
>
>> that's an impressive piece of code!
>>   
> Heh nice.
>
>> The following review is rather short and to-the-point. No offense
>> intended.
>>   
> Well yes as always ;)
>> A few comments about the general design:
>> The global variable gencurrent is a bit irritating. How do you handle
>> running on multiple cores?
>>   
> The idea is that the create_acpi_tables always run on BSP. FOr the
> powernow I admin we will need to run get/set MSR on each CPU.
> I have in plan to move the powernow from the AMD board to more general
> place. For multi cores, they have same MSR so we dont need to solve that.

OK.

>> Same for len_stack. Besides that, both variables are in the global
>> namespace and could use some acpi_ prefix or suffix.
>>   
> Well I was quite hesitating if to use a global variable or introduce
> some pointer parameter to every function. Then I choose to have the
> global (and static) var
> for this.  The reason is that the pointer propagation would be needed
> through all functions. Also I was not considering the multi thread
> support, because ACPI
> tables are always build by BSP. All pointers and stack is
> encapsulated, therefore not visible from outside. It should work fine.

Maybe add a comment that all these functions should not run on APs?

>> I think weak symbols are something that makes code harder to follow.
>>   
> Yes, and I have read all mails until now. I decided to put here empty
> dummy routine with weak symbol. This routine will be hidden if someone
> creates
> "strong" version of same function in some other object file. The
> reason for this is to avoid having #ifdefs and dummy empty functions
> for all boards
> which don't need this.
>
> The second possibility is to have just exactly one weak function and
> test its presence with if (name_fn) { name_fn)() } The linux kernel
> uses first case
> and I decided that this nicer, because if someone accidentally manages
> to create another weak function, it depends on luck which one will be
> called.
> The used scheme above assures that either the weak fn will be called
> or the strong one.

Hm. What about having boards #define HAVE_ACPI_SOME_FUNCTION


>> The { belongs on another line.
>>   
> Hmm I already commit that, maybe I can fix it as trivial commit.

Yes please.
 
>>> +    return current;
>>> +}
>>> +
>>> +void acpi_create_ssdt_generator(acpi_header_t *ssdt, char
>>> *oem_table_id)
>>>       
>>
>> Strange function name.
>>   
>
> I have in plan to introduce acpi_create_ssdt which will link up the
> ssdt.aml code to this. This is the reason for this strange name.

OK.
 
>>> +{
>>> +    unsigned long current=(unsigned long)ssdt+sizeof(acpi_header_t);
>>> +    memset((void *)ssdt, 0, sizeof(acpi_header_t));
>>> +    memcpy(&ssdt->signature, SSDT_NAME, 4);
>>>       
>>
>> Maybe strncpy instead?
>>   
> Here it is still OK. because it is static. I think it would be better
> for oem_table_name.
>
>> "how many nesting levels do we support"
>
> Hmm true maybe trival fix too.

Yes.

>>
>>> +#define ACPIGEN_LENSTACK_SIZE 10
>>> +
>>> +/* if you need to change this, change the acpigen_write_f and
>>> +   acpigen_patch_len */
>>> +
>>>       
>>
>> Can you remove the empty line above?
>>   
>
> I like them, you dont?

It is not clear if the comment belongs to the #define if there is an
empty line in between.

>>  
>>> +#define ACPIGEN_MAXLEN 0xfff
>>> +
>>> +#include <string.h>
>>> +#include <arch/acpigen.h>
>>> +#include <console/console.h>
>>> +
>>> +static char *gencurrent;
>>> +
>>> +char *len_stack[ACPIGEN_LENSTACK_SIZE];
>>> +int ltop = 0;
>>>       
>>
>> These global variables need better names and some comments explaining
>> what they do.
>>   
>
> Whoops they should be static. Sorry about that. For this reason they
> have just names like this, because they should be static and not visible.
> I will fix them.

Grepping (and cscope) is easier if they have that prefix. It also avoids
collisions if we ever change to unit-at-a-time compilation (like in v3).

>>> +
>>> +static int acpigen_write_len_f()
>>>       
>>
>> Needs a doxygen comment.
>>   
>
> Yes in Alps I did not have doxygen installed. I will try to write some
> patch addressing the issues and also document this a bit.
> Also some words to ACPI wiki would be good...

Yes please. You know a lot about ACPI.

>>  
>>> +{
>>> +    ASSERT(ltop < (ACPIGEN_LENSTACK_SIZE - 1))
>>> +    len_stack[ltop++] = gencurrent;
>>> +    acpigen_emit_byte(0);
>>> +    acpigen_emit_byte(0);
>>> +    return 2;
>>> +}
>>> +
>>> +void acpigen_patch_len(int len)
>>>       
>>
>> Needs a doxygen comment.
>>
>>  
>>> +{
>>> +    ASSERT(len <= ACPIGEN_MAXLEN)
>>> +    ASSERT(ltop > 0)
>>> +    char *p = len_stack[--ltop];
>>> +    /* generate store length for 0xfff max */
>>> +    p[0] = (0x40 | (len & 0xf));
>>> +    p[1] = (len >> 4 & 0xff);
>>> +
>>> +}
>>> +
>>> +void acpigen_set_current(char *curr) {
>>>       
>>
>> Needs a doxygen comment.
>>
>>  
>>> +    gencurrent = curr;
>>> +}
>>> +
>>> +char *acpigen_get_current(void) {
>>>       
>>
>> Needs a doxygen comment.
>>   
> Yes its true.
>
>>>  unsigned long acpi_fill_srat(unsigned long current); +unsigned long
>>> acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id);
>>> +void acpi_create_ssdt_generator(acpi_header_t *ssdt, char
>>> *oem_table_id);
>>>       
>>
>> The two functions above have rather similar names and it's not
>> immedately ofvious how they differ.
>>   
>
> It follows the scheme we have right now. Create creates, fill is
> callback.

I didn't know that. OK.

>> acpigen_get_current is a really confusingly named function.
>>   
> Hmm any idea of better name? it gets "current" which is used in all
> acpi code as current data pointer.

Is it really the current data pointer? The code seems to treat it as
end-of-data pointer, not current data pointer.

>> "COREBOOT" please. That way, people can actually find out where the
>> table came from. The fact that the data are generated dynamically is
>> already visible from the compiler ID.
>>   
> Here is small catch. The ACPI specs says that the OEM_TABLE_ID should
> have unique name, please note that the OEM_ID is set to coreboot.

Hm yes. Which OEM table ID is used by factory BIOS?

>>> +    for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in
>>> case we set array size to other than 8
>>>       
>>
>> Comment on a separate line, please.
>>   
> Aha this is cut and paste from old code.

-> maybe fix it in the trivial patch with the other whitespace etc?
 
>>> +        lenp += acpigen_write_dword(0x0);
>>> +    }
>>> +
>>> +    acpigen_patch_len(lenp - 1);
>>>       
>>
>> acpigen_patch_len is a name which does not really reveal function
>> purpose.
>>   
> Give me better one please, what it does its a patching of size when
> the size of the object is known.

Ah. I thought is is the length of the patch. Maybe acpigen_modify_len or
acpigen_adjust_len (preferred)?

>>> +int k8acpi_write_vars(void)
>>> +{
>>> +    int lens;
>>>       
>>
>> Maybe use len instead of lens?
>>   
>
> Lens because its a Scope. lenp is for Package.

Ah. I thought it was the plural of len. Maybe use scopelen and packlen?

>> I know the original code did not have it, but can you please add TOM2?
>>   
> Yes I was also thinking about this one. What is cool now, that we can
> easily add new stuff without worring to break the binary
> offset dependent patching ;)

Yes absolutely. That's what I thought.

> I will try to address most of the issues also depending on your answers,

Thanks!

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb  3 01:30:36 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 03 Feb 2009 01:30:36 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4985CA91.4040500@assembler.cz>
References: <4985CA91.4040500@assembler.cz>
Message-ID: <4987902C.8040806@gmx.net>

On 01.02.2009 17:15, Rudolf Marek wrote:
> Hello,
>
> Following patch converts the run-time SSDT patching via update_ssdt
> funtion to
> new AML code generator. Compile-tested on all changed targets. I think
> it should
> work because it works for Asus M2V-MX SE.
>
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
>
> Perhaps also some private SSDTs of each MB could be also somehow
> converted. Its
> quite complicated and I dont own any board to test, so lets just
> convert the
> generic stuff.

Some comments on the patch:
It does not apply cleanly against the latest tree, but that's probably
just minor.
./mainboard/amd/dbm690t/acpi_tables.c still has AmlCode_ssdt somewhere
in there.
iwill/dk8_htx and agami/aruma still reference the old ssdt code in their
Config.lb.

Having the same code for Fam10h would be great and probably shrink the
differences between K8 and Fam10 even further. We need to merge that
code anyway.

Overall, I like the patch. I'll boot the old and the new code and dump
my ACPI tables so you can take a look.

Regards,
Carl-Daniel
-- 
http://www.hailfinger.org/




From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb  3 05:10:53 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 03 Feb 2009 05:10:53 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4987902C.8040806@gmx.net>
References: <4985CA91.4040500@assembler.cz> <4987902C.8040806@gmx.net>
Message-ID: <4987C3CD.1040602@gmx.net>

On 03.02.2009 01:30, Carl-Daniel Hailfinger wrote:
> On 01.02.2009 17:15, Rudolf Marek wrote:
>   
>> Hello,
>>
>> Following patch converts the run-time SSDT patching via update_ssdt
>> funtion to
>> new AML code generator. Compile-tested on all changed targets. I think
>> it should
>> work because it works for Asus M2V-MX SE.
>>
>> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
>>
>> Perhaps also some private SSDTs of each MB could be also somehow
>> converted. Its
>> quite complicated and I dont own any board to test, so lets just
>> convert the
>> generic stuff.
>>     
>
> Some comments on the patch:
> It does not apply cleanly against the latest tree, but that's probably
> just minor.
> mainboard/amd/dbm690t/acpi_tables.c still has AmlCode_ssdt somewhere
> in there.
> iwill/dk8_htx and agami/aruma still reference the old ssdt code in their
> Config.lb.
>
> Having the same code for Fam10h would be great and probably shrink the
> differences between K8 and Fam10 even further. We need to merge that
> code anyway.
>
> Overall, I like the patch. I'll boot the old and the new code and dump
> my ACPI tables so you can take a look.
>   

Old and new ACPI tables are attached. Please ignore the TOM and TOM2
values in the DSDT. They are wrong (mainboard code bug).
Unless I'm missing something, your code produces a SSDT which is
identical to the previous one on my Asus M2A-VM (690G/SB600) board.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,

Carl-Daniel

-- 
http://www.hailfinger.org/

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From dchmelik at gmail.com  Tue Feb  3 08:13:42 2009
From: dchmelik at gmail.com (David Melik)
Date: Mon, 02 Feb 2009 23:13:42 -0800
Subject: [coreboot] making coreboot for Tyan s4882?
In-Reply-To: <2831fecf0902021022h2fce8085j6e1803d4412ee1e5@mail.gmail.com>
References: <49868795.3030105@gmail.com>	
	<C1C3344636BB4071B1F195BBD4B2C3D1@chimp>
	<2831fecf0902021022h2fce8085j6e1803d4412ee1e5@mail.gmail.com>
Message-ID: <4987EEA6.7030501@gmail.com>

>>The make error for s4882 being discussed:
>>
>>objcopy --gap-fill 0xff -O binary coreboot coreboot.strip
>>make[1]: *** No rule to make target `grub2', needed by `payload'.  Stop.
>>make[1]: Leaving directory `/root/coreboot-v2-3923/targets/tyan/s4882/s4882/normal'
>>make: *** [normal/coreboot.rom] Error 1


>
> I meant targets/tyan/s4882/s4882/grub2.elf.  Sorry.
>
> Myles

(Perhaps 'payload' should be in $target in the first place.)  I did that 
and got the exact same results (I tried payload 'grub2' and './grub2,' 
and also put it in 'fallback.')  I wrote a longer letter this afternoon, 
but Thunderbird did not send it or save a copy, so this will be short.  
I will still say I noticed this funny line in s4882: 'cp -f 
$TYANMB"_coreboot.rom" /home/yhlu/.'  Since make says it has no rule for 
'target 'grub2,' needed by payload,' I searched through config.py for 
'target,' 'image,' etc. and I do not see how it works.


--David





From peter at stuge.se  Tue Feb  3 08:39:48 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 3 Feb 2009 08:39:48 +0100
Subject: [coreboot] making coreboot for Tyan s4882?
In-Reply-To: <4987EEA6.7030501@gmail.com>
References: <49868795.3030105@gmail.com>
	<C1C3344636BB4071B1F195BBD4B2C3D1@chimp>
	<2831fecf0902021022h2fce8085j6e1803d4412ee1e5@mail.gmail.com>
	<4987EEA6.7030501@gmail.com>
Message-ID: <20090203073948.24534.qmail@stuge.se>

David Melik wrote:
> (Perhaps 'payload' should be in $target in the first place.)

Config.lb is used to build several Makefiles and they are in
further subdirectories of target/vendor/board/dir/

It is easy and reliable to use an absolute path to the payload.

v2 is like this. v3 uses Kconfig for configuration and a special file
format (LAR) with a tool (lar) for adding files into the final
coreboot.rom file.


//Peter



From dchmelik at gmail.com  Tue Feb  3 09:11:45 2009
From: dchmelik at gmail.com (David Melik)
Date: Tue, 03 Feb 2009 00:11:45 -0800
Subject: [coreboot] making coreboot for Tyan s4882?
In-Reply-To: <E41FB7285607470AA84BF6FF778EEDC2@chimp>
References: <49868795.3030105@gmail.com>	
	<C1C3344636BB4071B1F195BBD4B2C3D1@chimp>
	<2831fecf0902021022h2fce8085j6e1803d4412ee1e5@mail.gmail.com>
	<49877BFA.8080205@gmail.com>
	<E41FB7285607470AA84BF6FF778EEDC2@chimp>
Message-ID: <4987FC41.1050104@gmail.com>

Myles Watson wrote:
>
> I've never actually built s4882, but it should have worked.  Can you build
> Coreboot for any other boards?
I have not tried, but I have no other computers I want to run 
continuously for main use in the next few months.

>
> you could try buildrom if you want a simple way of trying a different build.
> svn co svn://svn.coreboot.org/buildrom/buildrom-devel
> make menuconfig 
> make

I did that, then did not see Opterons listed in it or on 
coreboot.org/buildrom/.

>
> Configure it for platform tyan s2892 and payload grub2.
>
> If that doesn't work, or if that works and you still can't build for the
> s4882, we'll have to figure something else out
I thought I read in the archives that someone patched coreboot for s4882 
when it was (nearly) new (2005) and said that it worked for it and many 
other boards.

--David


(PS. the error being discussed:

~/coreboot-v2-3923/targets/tyan/s4882/s4882# make

...
objcopy --gap-fill 0xff -O binary coreboot coreboot.strip
make[1]: *** No rule to make target `../grub2.elf', needed by
`payload'.  Stop.
make[1]: Leaving directory
`/root/coreboot-v2-3923/targets/tyan/s4882/s4882/normal'
make: *** [normal/coreboot.rom] Error 1) 

~/coreboot-v2-3923/targets/tyan/s4882/s4882#/ls -l grub2:
-rw-r--r-- 1 root root 18973 2009-02-02 14:15 grub2.elf






From stepan at coresystems.de  Tue Feb  3 11:36:56 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Tue, 03 Feb 2009 11:36:56 +0100
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
 generation
In-Reply-To: <13426df10902020824t4f73558bpe7f1b7c162ccec93@mail.gmail.com>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>	
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>	
	<4986B48D.9070001@coresystems.de>
	<13426df10902020824t4f73558bpe7f1b7c162ccec93@mail.gmail.com>
Message-ID: <49881E48.9060307@coresystems.de>

ron minnich wrote:
> On Mon, Feb 2, 2009 at 12:53 AM, Stefan Reinauer <stepan at coresystems.de> wrote:
>
>   
>> One thing I wonder though, do we want to call weak symbols
>> unconditionally, as in Rudolf's code? No if() clause catches the case
>> that the symbol isn't there. In a test program that call would segfault
>> a user space program here.
>>     
>
> if you're going to have a weak symbol I can't see any reason NOT to
> call it unconditionally. The symbol is always defined.
>   
A weak function is like a function pointer. The linker does not choke
when it is encountered, but it might still not have a value. So before
calling that function, you need to check if the function pointer is NULL
or your code crashes.

You are correct, if a symbol is weak, you don't have to compile
conditional as we "normally" do:
 
#ifdef CONFIG_ACPI_TABLEDUMPER
...
#endif

uses CONFIG_ACPI_TABLEDUMPER
default CONFIG_ACPI_TABLEDUMPER=1

and some minor bits in Config/Options.lb

But, frankly. This is not an _option_. We're just treating it as one
because that's a cheap way for us to get a #define on a single mainboard.

With a weak symbol, execution still has to be conditional:

if (function_to_call)
       function_to_call(params);
else
       printk_debug("No function_to_call for this mainboard");


I think the above is pretty beautiful and creates code that is a lot
better understandable than code that is marbled with preprocessor macros
to achieve the same thing.

> If you're going to call it unconditionally then you might as well put
> it in a file by itself, and either compile that file in or compile in
> code that has a different definition of the function. That way, if you
> know which files are used to build a mainboard, you also know exactly
> which functions are used -- the ones in the files.
>   
This is not about the function itself. That lives in an extra file
already, as you suggested. And that is exactly the problem.
The question is: How does the code that calls the function in that file
find out if it (the file or the function) is there or not.
- Either it is there on all mainboards (dummy functions)
- or the _call_ is guarded by preprocessor crap
- or the function prototype is defined weak

> Weak symbols can be frustrating when you're using code management
> tools like kscope or eclipse. You've to two symbols defined in the
> source code base -- which do you  use? (yes, I know we can tell people
> 'just ignore the weak one' but the code analysis tools are not always
> that smart).
>   
Wait. That problem is completely unrelated to weak symbols, and we will
continue to have it, with weak symbols or without. Even more if we
continue without weak symbols.

The reason for that is, we call functions the same. 10 mainboards have
write_pirq_routing_table() ... all mainboards have "main" or "amd64_main".

Of course kscope, eclipse, or doxygen choke on that. But not using weak
symbols means:
- we have more preprocessor macros
or
- we have more duplicate dummy functions

and both options are even worse for kscope, eclipse or doxygen.

> I'm still not convinced we need them. We can get the same capability
> (in v3 anyway) just by carefully selecting which files to build into a
> project.
>   
No. The problem arises through this careful selection. If we don't solve
it in v2, we will see the problem in v3 even more.

Stefan

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866


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From dchmelik at gmail.com  Tue Feb  3 12:31:56 2009
From: dchmelik at gmail.com (David Melik)
Date: Tue, 03 Feb 2009 03:31:56 -0800
Subject: [coreboot] coreboot Digest, Vol 48, Issue 12
In-Reply-To: <mailman.1.1233658801.2210.coreboot@coreboot.org>
References: <mailman.1.1233658801.2210.coreboot@coreboot.org>
Message-ID: <49882B2C.5050006@gmail.com>


>> (Perhaps 'payload' should be in $target in the first place.)
>>     
>
> Config.lb is used to build several Makefiles and they are in
> further subdirectories of target/vendor/board/dir/
>
> It is easy and reliable to use an absolute path to the payload.
>   

Apparently that (in targets/tyan/s4882/Config.lb) is unreliable: I tried 
payload 'grub2' and './grub2' (see below) and if it is this hard for me 
(with 14 years programming experience on mostly Linux) because it is 
undocumented, I would call it easy for few people.  Of course it seems 
like there is also much great work on the project....

--David


PS. I tried the following Config.lb payload paths with 'payload ./grub2' 
and 'payload grub2' (and left out 'fallback' one time for each.)

# Sample config file for
# the Tyan s4882
# This will make a target directory of ./s4882

target s4882
mainboard tyan/s4882

# Tyan s4882
romimage "normal"
#       48K for SCSI FW or ATI ROM
        option ROM_SIZE = 512*1024-48*1024
#       48K for SCSI FW and 48K for ATI ROM
#       option ROM_SIZE = 512*1024-48*1024-48*1024
#       64K for Etherboot
#        option ROM_SIZE = 512*1024-64*1024
        option USE_FALLBACK_IMAGE=0
#       option ROM_IMAGE_SIZE=0x19000
#       option ROM_IMAGE_SIZE=0x19c00
#       option ROM_IMAGE_SIZE=0x18800
#       option ROM_IMAGE_SIZE=0x16200
        option ROM_IMAGE_SIZE=0x20000
        option XIP_ROM_SIZE=0x20000
        option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
payload grub2

#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#       payload ../../../payloads/filo.zelf
#       payload ../../../payloads/tg3.zelf
#       payload ../../../payloads/tg3_vga.zelf
#       payload ../../../payloads/filo_vga_memtest.zelf
#       payload ../../../../payloads/tg3--filo_hda2_vga.zelf
#        payload ../../../payloads/tg3--filo_hda2.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
#        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
end

romimage "fallback"
        option USE_FALLBACK_IMAGE=1
#       option ROM_IMAGE_SIZE=0x19000
#       option ROM_IMAGE_SIZE=0x19c00
#       option ROM_IMAGE_SIZE=0x18800
#       option ROM_IMAGE_SIZE=0x16200
        option ROM_IMAGE_SIZE=0x20000
        option XIP_ROM_SIZE=0x20000
        option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
payload fallback/grub2

#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#       payload ../../../payloads/filo.zelf
#       payload ../../../payloads/tg3.zelf
#       payload ../../../payloads/tg3_vga.zelf
#       payload ../../../payloads/filo_vga_kernel.zelf
#       payload ../../../../payloads/tg3--filo_hda2_vga.zelf
#        payload ../../../payloads/tg3--filo_hda2.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
#        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
end

buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"

----------------------------------------------------------------

Myles asked:
~/coreboot-v2-3923/targets/tyan/s4882/s4882# ls -l grub2.elf
-rw-r--r-- 1 root root 18973 2009-02-02 14:15 grub2.elf






From p.brostovski at levigo.de  Tue Feb  3 16:26:06 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Tue, 03 Feb 2009 16:26:06 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <20090202152615.29495.qmail@stuge.se>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
Message-ID: <4988620E.8050308@levigo.de>

Hi Peter,

Peter Stuge schrieb:
> Hi Piotr,
> Piotr Brostovski wrote:
> ..
>> Do anyone have an idea why this doesn't work?
> 
> Yes.
> 
> Instead, you can use mkelfImage. It isn't really maintained anymore
> but we're making it available from the coreboot.org repo.
> 

Refer to my other discussion:
http://sourceforge.net/mailarchive/message.php?msg_name=49885F5C.6060309%40levigo.de

I'm asking myself if it is possible that mkelfImage simply isn't compatible with current
gPXE releases?

Or is it an other problem?

--
Regards,
Piotr



From tsylla at gmail.com  Tue Feb  3 16:30:39 2009
From: tsylla at gmail.com (Tom Sylla)
Date: Tue, 3 Feb 2009 10:30:39 -0500
Subject: [coreboot] msrtool CS5536 interrupt and DIVIL LBAR MSRs
In-Reply-To: <20090130161642.9391.qmail@stuge.se>
References: <20090126041442.14272.qmail@stuge.se>
	<20090130161642.9391.qmail@stuge.se>
Message-ID: <57947bf80902030730s224c781al99fcff636bfa8385@mail.gmail.com>

2009/1/30 Peter Stuge <peter at stuge.se>:
> Peter Stuge wrote:
>> Can someone please review these register definitions? Thank you!
>
> Attaching latest version also available at
> http://stuge.se/mt.cs5536_pic_divil3.patch

 const struct msrdef cs5536_msrs[] = {
+	/* 0x51400008-0x5140000f per 33238G pages 356-361 */
+	/* 0x51400015 per 33238G pages 365-366 */
+	/* 0x51400020-0x51400027 per 33238G pages 379-385 */
+	{ 0x51400008, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_IRQ", "Local BAR
- IRQ Mapper", {
+		{ 63, 15, RESERVED },
+		{ 48, 1, RESERVED },

I'm sure there is some reason, but why isn't this just "{ 63, 16, RESERVED }," ?

+		{ 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {

The masks are probably most readable as hex, especially to match the
display type of the BAR.

+	{ 0x51400009, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_KEL", "Local BAR
- KEL from USB OHC Host Controller", {

Copied directly from the spec, but just "Local BAR - KEL from USB OHC"
wouldn't propagate RAS Syndrome.

+	{ 0x51400020, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_LOW", "IRQ Mapper
Unrestricted Y Select Low", {
+		{ 63, 32, RESERVED },
+		{ 31, 4, "MAP_Y7", "Map Unrestricted Y Input 7", PRESENT_BIN, {

HEX is maybe more readable for all of these selects?

+		{ 0, 1, "IG8_STS_PRIM", "Primary Input 8", PRESENT_BIN, {
+			{ MSR1(0), "No interrupt." },
+			{ MSR1(1), "Interrupt status." },

Like Myles said, "Interrupt set" or maybe "Interrupt requested" for value '1'



From peter at stuge.se  Tue Feb  3 16:49:58 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 3 Feb 2009 16:49:58 +0100
Subject: [coreboot] coreboot Digest, Vol 48, Issue 12
In-Reply-To: <49882B2C.5050006@gmail.com>
References: <mailman.1.1233658801.2210.coreboot@coreboot.org>
	<49882B2C.5050006@gmail.com>
Message-ID: <20090203154958.24929.qmail@stuge.se>

David Melik wrote:
>> It is easy and reliable to use an absolute path to the payload.
>
> I tried payload 'grub2' and './grub2'

Those are both relative paths, and because the v2 build system is
less than transparent I recommend using an absolute path to begin
with.


> payload grub2

So here I would suggest an absolute path. Something like:
payload /home/user/where/you/have/grub2/grub2.elf


//Peter



From peter at stuge.se  Tue Feb  3 16:55:35 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 3 Feb 2009 16:55:35 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <4988620E.8050308@levigo.de>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<4988620E.8050308@levigo.de>
Message-ID: <20090203155535.26595.qmail@stuge.se>

Piotr Brostovski wrote:
> I'm asking myself if it is possible that mkelfImage simply isn't
> compatible with current gPXE releases?

mkelfImage is strictly for Linux.

Upstream gPXE can not be built for coreboot, but here is a web page
with some information that may still be useful:

http://whiterocker.com/gpxe/


//Peter



From rminnich at gmail.com  Tue Feb  3 17:01:44 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 3 Feb 2009 08:01:44 -0800
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <20090203155535.26595.qmail@stuge.se>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<4988620E.8050308@levigo.de> <20090203155535.26595.qmail@stuge.se>
Message-ID: <13426df10902030801w21d1e7adh51d4a1b8e96bd986@mail.gmail.com>

On Tue, Feb 3, 2009 at 7:55 AM, Peter Stuge <peter at stuge.se> wrote:
> Piotr Brostovski wrote:
>> I'm asking myself if it is possible that mkelfImage simply isn't
>> compatible with current gPXE releases?
>
> mkelfImage is strictly for Linux.
>
> Upstream gPXE can not be built for coreboot, but here is a web page
> with some information that may still be useful:
>

I'm puzzled about that. Was gPXE derived from etherboot and, if so,
why did they drop support? If not, how bad does it look to add
coreboot support the way Eric added it for etherboot?

ron



From p.brostovski at levigo.de  Tue Feb  3 17:05:27 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Tue, 03 Feb 2009 17:05:27 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <20090203155535.26595.qmail@stuge.se>
References: <49870D6C.3040608@levigo.de>
	<20090202152615.29495.qmail@stuge.se>	<4988620E.8050308@levigo.de>
	<20090203155535.26595.qmail@stuge.se>
Message-ID: <49886B47.9050608@levigo.de>

Hi Peter,

Peter Stuge schrieb:
> Piotr Brostovski wrote:
>> I'm asking myself if it is possible that mkelfImage simply isn't
>> compatible with current gPXE releases?
> 
> mkelfImage is strictly for Linux.

ok, then i think we're kind of stuck ...

> 
> Upstream gPXE can not be built for coreboot, but here is a web page
> with some information that may still be useful:
> 
> http://whiterocker.com/gpxe/

i know the site, i made also an updated patch which works with current gpxe and coreboot
release.

But neither the new one, or the old do work on a bcom winnet p680 (corrupted vga output)

--
Regards,
Piotr



From ward at gnu.org  Tue Feb  3 17:04:41 2009
From: ward at gnu.org (Ward Vandewege)
Date: Tue, 3 Feb 2009 11:04:41 -0500
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <13426df10902030801w21d1e7adh51d4a1b8e96bd986@mail.gmail.com>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<4988620E.8050308@levigo.de> <20090203155535.26595.qmail@stuge.se>
	<13426df10902030801w21d1e7adh51d4a1b8e96bd986@mail.gmail.com>
Message-ID: <20090203160441.GA14498@localdomain>

On Tue, Feb 03, 2009 at 08:01:44AM -0800, ron minnich wrote:
> On Tue, Feb 3, 2009 at 7:55 AM, Peter Stuge <peter at stuge.se> wrote:
> > Piotr Brostovski wrote:
> >> I'm asking myself if it is possible that mkelfImage simply isn't
> >> compatible with current gPXE releases?
> >
> > mkelfImage is strictly for Linux.
> >
> > Upstream gPXE can not be built for coreboot, but here is a web page
> > with some information that may still be useful:
> >
> 
> I'm puzzled about that. Was gPXE derived from etherboot and, if so,
> why did they drop support? If not, how bad does it look to add
> coreboot support the way Eric added it for etherboot?


From rminnich at gmail.com  Tue Feb  3 17:40:47 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 3 Feb 2009 08:40:47 -0800
Subject: [coreboot] [PATCH] Add the AML code generator for runtime code
	generation
In-Reply-To: <49881E48.9060307@coresystems.de>
References: <4985C7AE.4070609@assembler.cz> <49864CB0.1010903@gmx.net>
	<13426df10902011916m41c8abfdt9dfe5c3c9e250040@mail.gmail.com>
	<4986B48D.9070001@coresystems.de>
	<13426df10902020824t4f73558bpe7f1b7c162ccec93@mail.gmail.com>
	<49881E48.9060307@coresystems.de>
Message-ID: <13426df10902030840m24dbfe7fxe24af2fbecf96c80@mail.gmail.com>

On Tue, Feb 3, 2009 at 2:36 AM, Stefan Reinauer <stepan at coresystems.de> wrote:

> With a weak symbol, execution still has to be conditional:
>
> if (function_to_call)
>       function_to_call(params);
> else
>       printk_debug("No function_to_call for this mainboard");
>
>

You're right, I did not realize this:
[rminnich at 192 tmp]$ cat weak2.c
extern unsigned long __attribute__((weak)) strong(void);
main(){strong();}
[rminnich at 192 tmp]$ cc weak2.c
[rminnich at 192 tmp]$ ./a.out
Segmentation fault
[rminnich at 192 tmp]$

I've used weak symbols for a long time but only as a way to easily
allow code to override "default" functions. This is not a usage that
would have crossed my mind. :-)

>
>> Weak symbols can be frustrating when you're using code management
>> tools like kscope or eclipse. You've to two symbols defined in the
>> source code base -- which do you  use? (yes, I know we can tell people
>> 'just ignore the weak one' but the code analysis tools are not always
>> that smart).
>>
> Wait. That problem is completely unrelated to weak symbols, and we will
> continue to have it, with weak symbols or without. Even more if we
> continue without weak symbols.
>
> The reason for that is, we call functions the same. 10 mainboards have
> write_pirq_routing_table() ... all mainboards have "main" or "amd64_main".


Ah, I can not get anyone to try make kscope eh? :-)

because if you make kscope in v3, and you look for
write_pirq_routing_table, you only see the one copy for the mainboard
you are using. I'll be doing the same for eclipse. It's a simple
trick: I use the makefile SOURCES variable to create the kscope
project file. I did this in part because I want to easily fine the
version of a function for the mainboard I am working on.

But now that I understand your point about weak symbols I guess we're
ok. I still would like, long term, to put this kind of thing into the
device operations as a phase 7.

Anyway, thanks for clearing me up on this question.

ron



From mylesgw at gmail.com  Tue Feb  3 17:43:25 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Tue, 3 Feb 2009 09:43:25 -0700
Subject: [coreboot] making coreboot for Tyan s4882?
In-Reply-To: <4987FC41.1050104@gmail.com>
References: <49868795.3030105@gmail.com>	<C1C3344636BB4071B1F195BBD4B2C3D1@chimp><2831fecf0902021022h2fce8085j6e1803d4412ee1e5@mail.gmail.com><49877BFA.8080205@gmail.com><E41FB7285607470AA84BF6FF778EEDC2@chimp>
	<4987FC41.1050104@gmail.com>
Message-ID: <C42E43888C7B4B99ADD544C81FD4AB20@chimp>



> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of David Melik
> Sent: Tuesday, February 03, 2009 1:12 AM
> To: coreboot at coreboot.org
> Subject: Re: [coreboot] making coreboot for Tyan s4882?
> 
> Myles Watson wrote:
> >
> > I've never actually built s4882, but it should have worked.  Can you
> build
> > Coreboot for any other boards?
> I have not tried, but I have no other computers I want to run
> continuously for main use in the next few months.

I just wanted to see if it was a s4882-specific problem.  It doesn't look
like it is, since I can build it here.
 
> >
> > you could try buildrom if you want a simple way of trying a different
> build.
> > svn co svn://svn.coreboot.org/buildrom/buildrom-devel
> > make menuconfig
> > make
> 
> I did that, then did not see Opterons listed in it or on
> coreboot.org/buildrom/.

?

> > Configure it for platform tyan s2892 and payload grub2.


> > If that doesn't work, or if that works and you still can't build for the
> > s4882, we'll have to figure something else out
> I thought I read in the archives that someone patched coreboot for s4882
> when it was (nearly) new (2005) and said that it worked for it and many
> other boards.

It should still work.  Here's what I did.

cd coreboot/svn/targets
./buildtarget tyan/s4882/
make -C tyan/s4882/s4882/
     
  make[1]: *** No rule to make target
`../../../../payloads/tg3--filo_hda2_vga.zelf', needed by `payload'.  Stop.

// Same error you got.

gvim tyan/s4882/Config.lb
   change ../../../../payloads/tg3--filo_hda2_vga.zelf to ../grub2.elf

cp ../../../../deploy/grub2-payload.elf tyan/s4882/s4882/grub2.elf
make -C tyan/s4882/s4882/

ERROR: payload (206476) + coreboot (131072) - Size is 124556 bytes larger
than ROM size (212992).
make[1]: *** [coreboot.rom] Error 1

// Different error, but important.
/* It's configured to have two images in the ROM and there isn't enough
space for two copies of grub2+coreboot.  If fallback is really important to
you, you can start using compression, but lets get something working for you
first. */

gvim tyan/s4882/Config.lb

gvim tyan/s4882/Config.lb

-------------SNIP ----------------
# Sample config file for 
# the Tyan s4882
# This will make a target directory of ./s4882

target s4882
mainboard tyan/s4882

romimage "fallback" 
	option USE_FALLBACK_IMAGE=1
	option FALLBACK_SIZE=ROM_SIZE
	option ROM_IMAGE_SIZE=0x20000
	option XIP_ROM_SIZE=0x20000
	option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
	payload ../grub2.elf
end

buildrom ./coreboot.rom ROM_SIZE "fallback"

-------------SNIP ----------------

make -C tyan/s4882/s4882/

That should work.  Let me know.  Exact error messages and what you type will
help us help you.

Thanks,
Myles




From stepan at coresystems.de  Tue Feb  3 18:17:39 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Tue, 03 Feb 2009 18:17:39 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <20090203155535.26595.qmail@stuge.se>
References: <49870D6C.3040608@levigo.de>
	<20090202152615.29495.qmail@stuge.se>	<4988620E.8050308@levigo.de>
	<20090203155535.26595.qmail@stuge.se>
Message-ID: <49887C33.9000805@coresystems.de>

On 03.02.2009 16:55 Uhr, Peter Stuge wrote:
> Piotr Brostovski wrote:
>   
>> I'm asking myself if it is possible that mkelfImage simply isn't
>> compatible with current gPXE releases?
>>     
>
> mkelfImage is strictly for Linux.
>
> Upstream gPXE can not be built for coreboot, but here is a web page
> with some information that may still be useful:
>
> http://whiterocker.com/gpxe/
>   
Can that stuff be merged upstream?



-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From rminnich at gmail.com  Tue Feb  3 18:28:24 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 3 Feb 2009 09:28:24 -0800
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <49887C33.9000805@coresystems.de>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<4988620E.8050308@levigo.de> <20090203155535.26595.qmail@stuge.se>
	<49887C33.9000805@coresystems.de>
Message-ID: <13426df10902030928p2c6dcc02xce7f9ff98b05b1ae@mail.gmail.com>

On Tue, Feb 3, 2009 at 9:17 AM, Stefan Reinauer <stepan at coresystems.de> wrote:
> On 03.02.2009 16:55 Uhr, Peter Stuge wrote:
>> Piotr Brostovski wrote:
>>
>>> I'm asking myself if it is possible that mkelfImage simply isn't
>>> compatible with current gPXE releases?
>>>
>>
>> mkelfImage is strictly for Linux.
>>
>> Upstream gPXE can not be built for coreboot, but here is a web page
>> with some information that may still be useful:
>>
>> http://whiterocker.com/gpxe/
>>
> Can that stuff be merged upstream?

It would be great if someone would take this on. The etherboot guys
have always been receptive to new code :-)

ron



From info at coresystems.de  Tue Feb  3 21:10:03 2009
From: info at coresystems.de (coreboot information)
Date: Tue, 03 Feb 2009 21:10:03 +0100
Subject: [coreboot] r3926 build service
Message-ID: <E1LURat-00005v-7J@ra.coresystems.de>

Dear coreboot readers!

This is the automated build check service of coreboot.

The developer "ruik" checked in revision 3926 to
the coreboot source repository and caused the following 
changes:

Change Log:
 Following patch fixes VIA SPI (VT8237S). It needs to have opcodes
 initialized same way as ICH7.

 Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
 Acked-by: Peter Stuge <peter at stuge.se>



Build Log:
Compilation of agami:aruma is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3926&device=aruma&vendor=agami


If something broke during this checkin please be a pain 
in ruik's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

   Best regards,
     coreboot automatic build system





From techie at whiterocker.com  Tue Feb  3 21:27:11 2009
From: techie at whiterocker.com (Chris Kilgour)
Date: Tue, 03 Feb 2009 12:27:11 -0800
Subject: [coreboot] Workaround: AMD Geode LX crash at do_vsmbios
Message-ID: <4988A89F.8080207@whiterocker.com>

I recently encountered a coreboot-v2 on Geode-LX issue similar to this 
post: http://www.mail-archive.com/linuxbios at linuxbios.org/msg12055.html

The germane portion of that thread's serial dump is:

Unexpected Exception: 13 @ 10:00016765 - Halting

In the posted case, the code of real_mode_switch_call_vsm( ) from 
vsmsetup.c gets located around address 0x00016765.  In my case is was 
located around 0x1041b.  However, the vsmsetup.c code is written such 
that it must be entirely located within the first 64k of RAM, which 
means the link address for the text of vsmsetup.c must be less than 0x10000.

My workaround was to force vsmsetup.o to be treated as a "driver" rather 
than an "object", to move it up in link order.

I did not have time to implement a more general solution (so that 
vsmsetup's local GDT can be guaranteed to be able to address its own 
code in real mode, regardless of link location).  This info is posted to 
the mailing list in the hopes it might help someone in the future.

Chris.





From info at coresystems.de  Tue Feb  3 21:30:26 2009
From: info at coresystems.de (coreboot information)
Date: Tue, 03 Feb 2009 21:30:26 +0100
Subject: [coreboot] r3927 build service
Message-ID: <E1LURuc-0004ak-Fm@ra.coresystems.de>

Dear coreboot readers!

This is the automated build check service of coreboot.

The developer "stuge" checked in revision 3927 to
the coreboot source repository and caused the following 
changes:

Change Log:
flashrom: MSI MS-7046 board enable

Signed-off-by: Peter Stuge <peter at stuge.se>
Acked-by: David Tiemann <davidtiemann at gmail.com>


Build Log:
Compilation of agami:aruma is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3927&device=aruma&vendor=agami


If something broke during this checkin please be a pain 
in stuge's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

   Best regards,
     coreboot automatic build system





From svn at coreboot.org  Tue Feb  3 23:25:51 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue,  3 Feb 2009 23:25:51 +0100
Subject: [coreboot] r3928 - trunk/coreboot-v2/src/cpu/amd/model_fxx
Message-ID: <mailman.2749.1355071478.16123.coreboot@coreboot.org>

Author: ruik
Date: 2009-02-03 23:25:51 +0100 (Tue, 03 Feb 2009)
New Revision: 3928

Modified:
   trunk/coreboot-v2/src/cpu/amd/model_fxx/processor_name.c
Log:
Following patch adds missing CPU names. Please check
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
if I did not made any mistake.

Works for mine CPU  ;) 

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
Acked-by: Stefan Reinauer <stepan at coresystems.de>



Modified: trunk/coreboot-v2/src/cpu/amd/model_fxx/processor_name.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/model_fxx/processor_name.c	2009-02-02 22:55:26 UTC (rev 3927)
+++ trunk/coreboot-v2/src/cpu/amd/model_fxx/processor_name.c	2009-02-03 22:25:51 UTC (rev 3928)
@@ -207,6 +207,18 @@
 		switch ((Socket << 16) | (CmpCap << 12) | (BrandTableIndex << 4)
 			| PwrLmt) {
 		/* Socket F */
+		case 0x11002:
+			processor_name_string =
+			    "Dual-Core AMD Opteron(tm) Processor 12RR EE";
+			break;
+		case 0x11006:
+			processor_name_string =
+			    "Dual-Core AMD Opteron(tm) Processor 12RR HE";
+			break;
+		case 0x11012:
+			processor_name_string =
+			    "Dual-Core AMD Opteron(tm) Processor 22RR EE";
+			break;
 		case 0x11016:
 			processor_name_string =
 			    "Dual-Core AMD Opteron(tm) Processor 22RR HE";
@@ -219,6 +231,10 @@
 			processor_name_string =
 			    "Dual-Core AMD Opteron(tm) Processor 22RR SE";
 			break;
+		case 0x11042:
+			processor_name_string =
+			    "Dual-Core AMD Opteron(tm) Processor 82RR EE";
+			break;
 		case 0x11046:
 			processor_name_string =
 			    "Dual-Core AMD Opteron(tm) Processor 82RR HE";
@@ -231,8 +247,24 @@
 			processor_name_string =
 			    "Dual-Core AMD Opteron(tm) Processor 82RR SE";
 			break;
+		case 0x1106e:
+			processor_name_string =
+			    "AMD Athlon(tm) 64 Processor FX-ZZ Processor";
+			break;
 		/* Socket AM2 */
+		case 0x30015:
+			processor_name_string =
+			    "AMD Sempron(tm) Processor LE-1RR0";
+			break;
+		case 0x30026:
+			processor_name_string =
+			    "AMD Athlon(tm) Processor LE-1ZZ0";
+			break;
+		case 0x30041:
+		case 0x30042:
+		case 0x30043:
 		case 0x30044:
+		case 0x30045:
 		case 0x30048:
 			processor_name_string =
 			    "AMD Athlon(tm) 64 Processor TT00+";
@@ -242,6 +274,10 @@
 			processor_name_string =
 			    "AMD Sempron(tm) Processor TT00+";
 			break;
+		case 0x31016:
+			processor_name_string =
+			    "Dual-Core AMD Opteron(tm) Processor 12RR HE";
+			break;
 		case 0x3101a:
 			processor_name_string =
 			    "Dual-Core AMD Opteron(tm) Processor 12RR";
@@ -250,6 +286,10 @@
 			processor_name_string =
 			    "Dual-Core AMD Opteron(tm) Processor 12RR SE";
 			break;
+		case 0x31033:
+			processor_name_string =
+			    "AMD Athlon(tm) X2 Dual Core Processor BE-2TT0";
+			break;
 		case 0x31042:
 		case 0x31046:
 		case 0x31048:
@@ -262,10 +302,30 @@
 			    "AMD Athlon(tm) 64 FX-ZZ Dual Core Processor";
 			break;
 		/* Socket S1g1 */
+		case 0x00012:
+			processor_name_string =
+			    "AMD Athlon(tm) 64 Processor TT00+";
+			break;
+		case 0x00031:
+			processor_name_string =
+			    "Mobile AMD Sempron(tm) Processor TT00+";
+			break;
+		case 0x00036:
+			processor_name_string =
+			    "Mobile AMD Sempron(tm) Processor PP00+";
+			break;
+		case 0x00042:
+			processor_name_string =
+			    "AMD Sempron(tm) Processor TT00+";
+			break;
 		case 0x0102c:
 			processor_name_string =
 			    "AMD Turion(tm) 64 X2 Mobile Technology TL-YY";
 			break;
+		case 0x01054:
+			processor_name_string =
+			    "AMD Athlon(tm) 64 X2 Dual Core Processor TT00+";
+			break;
 		default:
 			processor_name_string = "AMD Processor model unknown";
 		}




From r.marek at assembler.cz  Tue Feb  3 23:27:10 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Tue, 03 Feb 2009 23:27:10 +0100
Subject: [coreboot] [PATCH] Add more AMD CPU names
In-Reply-To: <4986B11C.3090308@coresystems.de>
References: <49860F5D.6070401@assembler.cz> <4986B11C.3090308@coresystems.de>
Message-ID: <4988C4BE.3040703@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi,

Committed revision 3928.

Thanks,
Rudolf
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAkmIxLwACgkQ3J9wPJqZRNU+AwCgqcdQbmH9s97Og7nrwY0YuLyP
R+8An1p5P5DCD3SpKYcI1WTAvuw3biw4
=WC9B
-----END PGP SIGNATURE-----



From peter at stuge.se  Tue Feb  3 23:37:02 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 3 Feb 2009 23:37:02 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <49886B47.9050608@levigo.de>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<4988620E.8050308@levigo.de> <20090203155535.26595.qmail@stuge.se>
	<49886B47.9050608@levigo.de>
Message-ID: <20090203223702.25391.qmail@stuge.se>

Piotr Brostovski wrote:
> > http://whiterocker.com/gpxe/
> 
> i know the site, i made also an updated patch which works with
> current gpxe and coreboot release.
> 
> But neither the new one, or the old do work on a bcom winnet p680
> (corrupted vga output)

Getting graphics to work is the single most difficult task for PC
firmware. Please always try to use a serial console at least for
debugging. :)


//Peter



From svn at coreboot.org  Tue Feb  3 23:37:22 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue,  3 Feb 2009 23:37:22 +0100
Subject: [coreboot] r3929 - in trunk/coreboot-v2/src: mainboard/agami/aruma
	mainboard/amd/dbm690t mainboard/amd/pistachio
	mainboard/amd/serengeti_cheetah mainboard/iwill/dk8_htx
	northbridge/amd/amdk8
Message-ID: <mailman.2750.1355071478.16123.coreboot@coreboot.org>

Author: ruik
Date: 2009-02-03 23:37:22 +0100 (Tue, 03 Feb 2009)
New Revision: 3929

Removed:
   trunk/coreboot-v2/src/northbridge/amd/amdk8/ssdt.dsl
Modified:
   trunk/coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c
   trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c
   trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c
   trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/acpi_tables.c
   trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/acpi_tables.c
   trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb
   trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
Log:
Following patch converts the run-time SSDT patching via update_ssdt funtion to
new AML code generator. Compile-tested on all changed targets. I think it should
work because it works for Asus M2V-MX SE.

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>




Modified: trunk/coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/mainboard/agami/aruma/acpi_tables.c	2009-02-03 22:37:22 UTC (rev 3929)
@@ -15,6 +15,7 @@
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
 
 #define DUMP_ACPI_TABLES 0
 
@@ -37,8 +38,6 @@
 
 #define HC_POSSIBLE_NUM 8
 extern unsigned char AmlCode[];
-extern unsigned char AmlCode_ssdt[];
-
 #if ACPI_SSDTX_NUM >= 1
 extern unsigned char AmlCode_ssdt2[];
 extern unsigned char AmlCode_ssdt3[];
@@ -187,78 +186,11 @@
 	return current;
 }
 
-//FIXME: next could be moved to northbridge/amd/amdk8/amdk8_acpi.c or cpu/amd/k8/k8_acpi.c begin
-static void int_to_stream(uint32_t val, uint8_t * dest)
-{
-	int i;
-	for (i = 0; i < 4; i++) {
-		*(dest + i) = (val >> (8 * i)) & 0xff;
-	}
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+	k8acpi_write_vars();
+	return (unsigned long) (acpigen_get_current());
 }
 
-extern void get_bus_conf(void);
-
-static void update_ssdt(void *ssdt)
-{
-	uint8_t *BUSN;
-	uint8_t *MMIO;
-	uint8_t *PCIO;
-	uint8_t *SBLK;
-	uint8_t *TOM1;
-	uint8_t *HCLK;
-	uint8_t *SBDN;
-	uint8_t *HCDN;
-	int i;
-	device_t dev;
-	uint32_t dword;
-	msr_t msr;
-
-	BUSN = ssdt + 0x3a;	//+5 will be next BUSN
-	MMIO = ssdt + 0x57;	//+5 will be next MMIO
-	PCIO = ssdt + 0xaf;	//+5 will be next PCIO
-	SBLK = ssdt + 0xdc;	// one byte
-	TOM1 = ssdt + 0xe3;	//
-	HCLK = ssdt + 0xfa;	//+5 will be next HCLK
-	SBDN = ssdt + 0xed;	//
-	HCDN = ssdt + 0x12a;	//+5 will be next HCDN
-
-	dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
-
-	for (i = 0; i < 4; i++) {
-		dword = pci_read_config32(dev, 0xe0 + i * 4);
-		int_to_stream(dword, BUSN + i * 5);
-	}
-
-	for (i = 0; i < 0x10; i++) {
-		dword = pci_read_config32(dev, 0x80 + i * 4);
-		int_to_stream(dword, MMIO + i * 5);
-	}
-
-	for (i = 0; i < 0x08; i++) {
-		dword = pci_read_config32(dev, 0xc0 + i * 4);
-		int_to_stream(dword, PCIO + i * 5);
-	}
-
-	*SBLK = (uint8_t) (sblk);
-
-	msr = rdmsr(TOP_MEM);
-	int_to_stream(msr.lo, TOM1);
-
-	for (i = 0; i < hc_possible_num; i++) {
-		int_to_stream(pci1234[i], HCLK + i * 5);
-		int_to_stream(hcdn[i], HCDN + i * 5);
-	}
-	for (i = hc_possible_num; i < HC_POSSIBLE_NUM; i++) {	// in case we set array size to other than 8
-		int_to_stream(0x00000000, HCLK + i * 5);
-		int_to_stream(hcdn[i], HCDN + i * 5);
-	}
-
-	int_to_stream(sbdn, SBDN);
-
-}
-
-//end
-
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
@@ -322,16 +254,10 @@
 
 	/* SSDT */
 	printk_debug("ACPI:    * SSDT\n");
-	ssdt = (acpi_header_t *) current;
-	current += ((acpi_header_t *) AmlCode_ssdt)->length;
-	memcpy((void *) ssdt, (void *) AmlCode_ssdt,
-	       ((acpi_header_t *) AmlCode_ssdt)->length);
-	//Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
-	update_ssdt((void *) ssdt);
-	/* recalculate checksum */
-	ssdt->checksum = 0;
-	ssdt->checksum =
-	    acpi_checksum((unsigned char *) ssdt, ssdt->length);
+	ssdt = (acpi_header_t *)current;
+
+	acpi_create_ssdt_generator(ssdt, "DYNADATA");
+	current += ssdt->length;
 	acpi_add_table(rsdt, ssdt);
 
 #if ACPI_SSDTX_NUM >= 1

Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c	2009-02-03 22:37:22 UTC (rev 3929)
@@ -25,7 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdk8_sysconf.h>
-
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
 #include <arch/cpu.h>
 
 #define DUMP_ACPI_TABLES 0
@@ -99,8 +99,6 @@
 
 extern void get_bus_conf(void);
 
-extern void update_ssdt(void *ssdt);
-
 void update_ssdtx(void *ssdtx, int i)
 {
 	uint8_t *PCI;
@@ -591,6 +589,11 @@
 
 }
 
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+	k8acpi_write_vars();
+	return (unsigned long) (acpigen_get_current());
+}
+
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
@@ -657,15 +660,10 @@
 
 	/* SSDT */
 	printk_debug("ACPI:    * SSDT\n");
-	ssdt = (acpi_header_t *) current;
-	current += ((acpi_header_t *) AmlCode_ssdt)->length;
-	memcpy((void *)ssdt, (void *)AmlCode_ssdt,
-	       ((acpi_header_t *) AmlCode_ssdt)->length);
-	/* Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c */
-	update_ssdt((void *)ssdt);
-	/* recalculate checksum */
-	ssdt->checksum = 0;
-	ssdt->checksum = acpi_checksum((u8 *)ssdt, ssdt->length);
+	ssdt = (acpi_header_t *)current;
+
+	acpi_create_ssdt_generator(ssdt, "DYNADATA");
+	current += ssdt->length;
 	acpi_add_table(rsdt, ssdt);
 
 #if ACPI_SSDTX_NUM >= 1

Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/mainboard/amd/pistachio/acpi_tables.c	2009-02-03 22:37:22 UTC (rev 3929)
@@ -25,7 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdk8_sysconf.h>
-
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
 #include <arch/cpu.h>
 
 #define DUMP_ACPI_TABLES 0
@@ -55,7 +55,6 @@
 #endif
 
 extern u8 AmlCode[];
-extern u8 AmlCode_ssdt[];
 
 #if ACPI_SSDTX_NUM >= 1
 extern u8 AmlCode_ssdt2[];
@@ -99,8 +98,6 @@
 
 extern void get_bus_conf(void);
 
-extern void update_ssdt(void *ssdt);
-
 void update_ssdtx(void *ssdtx, int i)
 {
 	uint8_t *PCI;
@@ -591,6 +588,11 @@
 
 }
 
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+	k8acpi_write_vars();
+	return (unsigned long) (acpigen_get_current());
+}
+
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
@@ -657,15 +659,10 @@
 
 	/* SSDT */
 	printk_debug("ACPI:    * SSDT\n");
-	ssdt = (acpi_header_t *) current;
-	current += ((acpi_header_t *) AmlCode_ssdt)->length;
-	memcpy((void *)ssdt, (void *)AmlCode_ssdt,
-	       ((acpi_header_t *) AmlCode_ssdt)->length);
-	/* Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c */
-	update_ssdt((void *)ssdt);
-	/* recalculate checksum */
-	ssdt->checksum = 0;
-	ssdt->checksum = acpi_checksum((u8 *)ssdt, ssdt->length);
+	ssdt = (acpi_header_t *)current;
+
+	acpi_create_ssdt_generator(ssdt, "DYNADATA");
+	current += ssdt->length;
 	acpi_add_table(rsdt, ssdt);
 
 #if ACPI_SSDTX_NUM >= 1

Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/acpi_tables.c	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/acpi_tables.c	2009-02-03 22:37:22 UTC (rev 3929)
@@ -16,6 +16,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdk8_sysconf.h>
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
 
 #include "mb_sysconf.h"
 
@@ -38,8 +39,6 @@
 #endif
 
 extern unsigned char AmlCode[];
-extern unsigned char AmlCode_ssdt[];
-
 #if ACPI_SSDTX_NUM >= 1
 extern unsigned char AmlCode_ssdt2[];
 extern unsigned char AmlCode_ssdt3[];
@@ -157,8 +156,6 @@
 
 extern void get_bus_conf(void);
 
-extern void update_ssdt(void *ssdt);
-
 void update_ssdtx(void *ssdtx, int i)
 {
         uint8_t *PCI;
@@ -182,6 +179,11 @@
 
 }
 
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+	k8acpi_write_vars();
+	return (unsigned long) (acpigen_get_current());
+}
+
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
@@ -256,15 +258,11 @@
 	/* SSDT */
 	printk_debug("ACPI:    * SSDT\n");
 	ssdt = (acpi_header_t *)current;
-	current += ((acpi_header_t *)AmlCode_ssdt)->length;
-	memcpy((void *)ssdt, (void *)AmlCode_ssdt, ((acpi_header_t *)AmlCode_ssdt)->length);
-	//Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
-	update_ssdt((void*)ssdt);
-        /* recalculate checksum */
-        ssdt->checksum = 0;
-        ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
-	acpi_add_table(rsdt,ssdt);
 
+	acpi_create_ssdt_generator(ssdt, "DYNADATA");
+	current += ssdt->length;
+	acpi_add_table(rsdt, ssdt);
+
 #if ACPI_SSDTX_NUM >= 1
 
         //same htio, but different position? We may have to copy, change HCIN, and recalculate the checknum and add_table

Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/acpi_tables.c	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/acpi_tables.c	2009-02-03 22:37:22 UTC (rev 3929)
@@ -16,6 +16,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdk8_sysconf.h>
+#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
 
 #include "mb_sysconf.h"
 
@@ -38,7 +39,6 @@
 #endif
 
 extern unsigned char AmlCode[];
-extern unsigned char AmlCode_ssdt[];
 
 #if ACPI_SSDTX_NUM >= 1
 extern unsigned char AmlCode_ssdt2[];
@@ -159,8 +159,6 @@
 
 extern void get_bus_conf(void);
 
-extern void update_ssdt(void *ssdt);
-
 void update_ssdtx(void *ssdtx, int i)
 {
         uint8_t *PCI;
@@ -184,6 +182,11 @@
 
 }
 
+unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id) {
+	k8acpi_write_vars();
+	return (unsigned long) (acpigen_get_current());
+}
+
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
@@ -258,15 +261,11 @@
 	/* SSDT */
 	printk_debug("ACPI:    * SSDT\n");
 	ssdt = (acpi_header_t *)current;
-	current += ((acpi_header_t *)AmlCode_ssdt)->length;
-	memcpy((void *)ssdt, (void *)AmlCode_ssdt, ((acpi_header_t *)AmlCode_ssdt)->length);
-	//Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
-	update_ssdt((void*)ssdt);
-        /* recalculate checksum */
-        ssdt->checksum = 0;
-        ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
-	acpi_add_table(rsdt,ssdt);
 
+	acpi_create_ssdt_generator(ssdt, "DYNADATA");
+	current += ssdt->length;
+	acpi_add_table(rsdt, ssdt);
+
 #if ACPI_SSDTX_NUM >= 1
 
         //same htio, but different position? We may have to copy, change HCIN, and recalculate the checknum and add_table

Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb	2009-02-03 22:37:22 UTC (rev 3929)
@@ -19,13 +19,6 @@
 
 if HAVE_ACPI_TABLES
 	object amdk8_acpi.o
-	makerule ssdt.c
-		depends "$(TOP)/src/northbridge/amd/amdk8/ssdt.dsl"
-		action  "iasl -p $(PWD)/ssdt -tc $(TOP)/src/northbridge/amd/amdk8/ssdt.dsl"
-		action  "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex"
-		action  "mv ssdt.hex ssdt.c"
-	end
-	object ./ssdt.o
 end
 
 

Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c	2009-02-03 22:37:22 UTC (rev 3929)
@@ -308,86 +308,3 @@
 	acpigen_patch_len(lens - 1);
 	return lens;
 }
-
-// moved from mb acpi_tables.c
-static void intx_to_stream(u32 val, u32 len, u8 *dest)
-{
-	int i;
-	for(i=0;i<len;i++) {
-		*(dest+i) = (val >> (8*i)) & 0xff;
-	}
-}
-
-static void int_to_stream(u32 val, u8 *dest)
-{
-	return intx_to_stream(val, 4, dest);
-}
-
-// used by acpi_tables.h
-void update_ssdt(void *ssdt)
-{
-	u8 *BUSN;
-	u8 *MMIO;
-	u8 *PCIO;
-	u8 *SBLK;
-	u8 *TOM1;
-	u8 *SBDN;
-	u8 *HCLK;
-	u8 *HCDN;
-	u8 *CBST;
-
-	int i;
-	device_t dev;
-	u32 dword;
-	msr_t msr;
-
-	BUSN = ssdt+0x3a; //+5 will be next BUSN
-	MMIO = ssdt+0x57; //+5 will be next MMIO
-	PCIO = ssdt+0xaf; //+5 will be next PCIO
-	SBLK = ssdt+0xdc; // one byte
-	TOM1 = ssdt+0xe3; //
-	SBDN = ssdt+0xed; //
-	HCLK = ssdt+0xfa; //+5 will be next HCLK
-	HCDN = ssdt+0x12a; //+5 will be next HCDN
-	CBST = ssdt+0x157; //
-
-	dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
-	for(i=0;i<4;i++) {
-		dword = pci_read_config32(dev, 0xe0+i*4);
-		int_to_stream(dword, BUSN+i*5);
-	}
-	for(i=0;i<0x10;i++) {
-		dword = pci_read_config32(dev, 0x80+i*4);
-		int_to_stream(dword, MMIO+i*5);
-	}
-	for(i=0;i<0x08;i++) {
-		dword = pci_read_config32(dev, 0xc0+i*4);
-		int_to_stream(dword, PCIO+i*5);
-	}
-
-	*SBLK = (u8)(sysconf.sblk);
-
-	msr = rdmsr(TOP_MEM);
-	int_to_stream(msr.lo, TOM1);
-
-	for(i=0;i<sysconf.hc_possible_num;i++) {
-		int_to_stream(sysconf.pci1234[i], HCLK + i*5);
-		int_to_stream(sysconf.hcdn[i],    HCDN + i*5);
-	}
-	for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
-		int_to_stream(0x00000000, HCLK + i*5);
-		int_to_stream(0x20202020, HCDN + i*5);
-	}
-
-	int_to_stream(sysconf.sbdn, SBDN);
-
-	if((sysconf.pci1234[0] >> 12) & 0xff) { //sb chain on  other than bus 0
-		*CBST = (u8) (0x0f);
-	}
-	else {
-		*CBST = (u8) (0x00);
-	}
-
-}
-
-//end

Deleted: trunk/coreboot-v2/src/northbridge/amd/amdk8/ssdt.dsl
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/ssdt.dsl	2009-02-03 22:25:51 UTC (rev 3928)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/ssdt.dsl	2009-02-03 22:37:22 UTC (rev 3929)
@@ -1,78 +0,0 @@
-/*
- * Copyright 2005 AMD
- */
-DefinitionBlock ("SSDT.aml", "SSDT", 1, "AMD-K8", "AMD-ACPI", 100925440)
-{
-    /*
-     * These objects were referenced but not defined in this table
-     */
-    External (\_SB_.PCI0, DeviceObj)
-
-    Scope (\_SB.PCI0)
-    {
-	 Name (BUSN, Package (0x04)
-	{
-	    0x11111111,
-	    0x22222222,
-	    0x33333333,
-	    0x44444444
-	})
-	Name (MMIO, Package (0x10)
-	{
-	    0x11111111,
-	    0x22222222,
-	    0x33333333,
-	    0x44444444,
-	    0x55555555,
-	    0x66666666,
-	    0x77777777,
-	    0x88888888,
-	    0x99999999,
-	    0xaaaaaaaa,
-	    0xbbbbbbbb,
-	    0xcccccccc,
-	    0xdddddddd,
-	    0xeeeeeeee,
-	    0x11111111,
-	    0x22222222
-	})
-	Name (PCIO, Package (0x08)
-	{
-	    0x77777777,
-	    0x88888888,
-	    0x99999999,
-	    0xaaaaaaaa,
-	    0xbbbbbbbb,
-	    0xcccccccc,
-	    0xdddddddd,
-	    0xeeeeeeee
-	})
-	Name (SBLK, 0x11)
-	Name (TOM1, 0xaaaaaaaa)
-	Name (SBDN, 0xbbbbbbbb)
-	Name (HCLK, Package (0x08)
-	{
-	    0x11111111,
-	    0x22222222,
-	    0x33333333,
-	    0x44444444,
-	    0x55555555,
-	    0x66666666,
-	    0x77777777,
-	    0x88888888
-	})
-	Name (HCDN, Package (0x08)
-	{
-	    0x11111111,
-	    0x22222222,
-	    0x33333333,
-	    0x44444444,
-	    0x55555555,
-	    0x66666666,
-	    0x77777777,
-	    0x88888888
-	})
-	Name (CBST, 0x88)
-    }
-}
-




From r.marek at assembler.cz  Tue Feb  3 23:38:56 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Tue, 03 Feb 2009 23:38:56 +0100
Subject: [coreboot] [PATCH] Cleanup/remove update_ssdt
In-Reply-To: <4987C3CD.1040602@gmx.net>
References: <4985CA91.4040500@assembler.cz> <4987902C.8040806@gmx.net>
	<4987C3CD.1040602@gmx.net>
Message-ID: <4988C780.10106@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi all,

Its in.
Committed revision 3929.

I wont have time for this until next Tuesday. I have in plan to tune up the
first patch as I discussed this with Carl-Daniel. If someone has time please do
that so.

Thanks,


Rudolf
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAkmIx4AACgkQ3J9wPJqZRNVQngCgvo9UTDyYyFtMYWSB2beOXoqs
sLUAn3dhsNumQSxoeqkb5jAUHZcsdxKd
=/htu
-----END PGP SIGNATURE-----



From info at coresystems.de  Tue Feb  3 23:43:45 2009
From: info at coresystems.de (coreboot information)
Date: Tue, 03 Feb 2009 23:43:45 +0100
Subject: [coreboot] r3928 build service
Message-ID: <E1LUTzd-0003uG-Gq@ra.coresystems.de>

Dear coreboot readers!

This is the automated build check service of coreboot.

The developer "ruik" checked in revision 3928 to
the coreboot source repository and caused the following 
changes:

Change Log:
Following patch adds missing CPU names. Please check
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
if I did not made any mistake.

Works for mine CPU  ;)

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
Acked-by: Stefan Reinauer <stepan at coresystems.de>



Build Log:
Compilation of agami:aruma is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3928&device=aruma&vendor=agami


If something broke during this checkin please be a pain 
in ruik's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

   Best regards,
     coreboot automatic build system





From info at coresystems.de  Wed Feb  4 00:05:13 2009
From: info at coresystems.de (coreboot information)
Date: Wed, 04 Feb 2009 00:05:13 +0100
Subject: [coreboot] r3929 build service
Message-ID: <E1LUUKP-0000Bi-Vv@ra.coresystems.de>

Dear coreboot readers!

This is the automated build check service of coreboot.

The developer "ruik" checked in revision 3929 to
the coreboot source repository and caused the following 
changes:

Change Log:
Following patch converts the run-time SSDT patching via update_ssdt funtion to
new AML code generator. Compile-tested on all changed targets. I think it should
work because it works for Asus M2V-MX SE.

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>




Build Log:
Compilation of agami:aruma has been fixed


If something broke during this checkin please be a pain 
in ruik's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

   Best regards,
     coreboot automatic build system





From r.marek at assembler.cz  Wed Feb  4 00:27:40 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Wed, 04 Feb 2009 00:27:40 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <49874622.2010900@levigo.de>
References: <49870D6C.3040608@levigo.de>
	<20090202152615.29495.qmail@stuge.se>		<49871CC9.8010907@levigo.de>
	<20090202164229.23050.qmail@stuge.se>		<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>		<498736B6.1000704@levigo.de>	<13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>
	<49874622.2010900@levigo.de>
Message-ID: <4988D2EC.1010200@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi,

I think gpxe works with following combination
Coreboot + SeaBIOS + gpxe.

Rudolf
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAkmI0uwACgkQ3J9wPJqZRNU73QCgq49TXUj5lnkO9RIUqP+f8Hz0
FCoAnRRprju4RTiIfE/2kH6MBs37y9gS
=/lNP
-----END PGP SIGNATURE-----



From dchmelik at gmail.com  Wed Feb  4 00:56:58 2009
From: dchmelik at gmail.com (David Melik)
Date: Tue, 03 Feb 2009 15:56:58 -0800
Subject: [coreboot] coreboot Digest, Vol 48, Issue 13
In-Reply-To: <mailman.62.1233679417.23928.coreboot@coreboot.org>
References: <mailman.62.1233679417.23928.coreboot@coreboot.org>
Message-ID: <4988D9CA.90906@gmail.com>


> > > I did that, then did not see Opterons listed in it or on
> > > coreboot.org/buildrom/.
>
> ?
>   

The current buildrom just
seems to omit Opteron 800 (or any) series, and that link omits s4882 
from 'supported boards.'

> > > I thought I read in the archives that someone patched coreboot for s4882[...]
>
> It should still work.  Here's what I did.
>  
> cd coreboot/svn/targets
> ./buildtarget tyan/s4882/
> make -C tyan/s4882/s4882/
>      
>   make[1]: *** No rule to make target
> `../../../../payloads/tg3--filo_hda2_vga.zelf', needed by `payload'.  Stop.
>
> // Same error you got.
>
> gvim tyan/s4882/Config.lb
>    change ../../../../payloads/tg3--filo_hda2_vga.zelf to ../grub2.elf
>
> cp ../../../../deploy/grub2-payload.elf tyan/s4882/s4882/grub2.elf
> make -C tyan/s4882/s4882/
>
> ERROR: payload (206476) + coreboot (131072) - Size is 124556 bytes larger
> than ROM size (212992).
> make[1]: *** [coreboot.rom] Error 1
>
> // Different error, but important.
> /* It's configured to have two images in the ROM and there isn't enough
> space for two copies of grub2+coreboot.  If fallback is really important to
> you, you can start using compression, but lets get something working for you
> first. */
>
> gvim tyan/s4882/Config.lb
>
> gvim tyan/s4882/Config.lb
>
> -------------SNIP ----------------
> # Sample config file for 
> # the Tyan s4882
> # This will make a target directory of ./s4882
>
> target s4882
> mainboard tyan/s4882
>
> romimage "fallback" 
> 	option USE_FALLBACK_IMAGE=1
> 	option FALLBACK_SIZE=ROM_SIZE
> 	option ROM_IMAGE_SIZE=0x20000
> 	option XIP_ROM_SIZE=0x20000
> 	option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
> 	payload ../grub2.elf
> end
>
> buildrom ./coreboot.rom ROM_SIZE "fallback"
>
> -------------SNIP ----------------
>
> make -C tyan/s4882/s4882/
>
> That should work.  Let me know.  Exact error messages and what you type will
> help us help you.
>
> Thanks,
> Myles

Great!  It appeared to work, but I am unsure if I will test it today or 
in few/one day(s) after
I upgrade with slamd64-12.2-dvd.iso (downloading.)

So, how hard is it to build coreboot for unsupported boards?  I have 15 
- 20 boards around, incl. a few working (mostly '90s:) perhaps I should 
try others if I wait for my OS download....

--David




From Zheng.Bao at amd.com  Wed Feb  4 02:28:44 2009
From: Zheng.Bao at amd.com (Bao, Zheng)
Date: Wed, 4 Feb 2009 09:28:44 +0800
Subject: [coreboot] [patch] flashrom: resending my patch about
	SPI/LPCconflicts
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD892@sbjgexmb1.amd.com>

Does anybody give some comments?

Joe

-----Original Message-----
From: coreboot-bounces at coreboot.org
[mailto:coreboot-bounces at coreboot.org] On Behalf Of Bao, Zheng
Sent: Monday, February 02, 2009 12:12 PM
To: Coreboot
Subject: [coreboot] [patch] flashrom: resending my patch about
SPI/LPCconflicts

Signed-off-by: Zheng Bao <zheng.bao at amd.com>

This patch is about flashrom running on dbm690t. It was sent several
months ago and hasn't got any response yet. Now it deals with 3
problems.
1. Fix the bug that the flashrom would hang if there is not SPI chip. A
timeout detection was added.
2. We only access LPC ROM if we boot via LPC ROM. And only SPI ROM if we
boot via SPI ROM. Doing crossly is not allowed. Anybody has better idea?
3. When we read/write SPI, we use memory read/write instead of sending
SPI command.

Joe




From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb  4 02:42:07 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 04 Feb 2009 02:42:07 +0100
Subject: [coreboot]  [PATCH] Fix and clean up DBM690T/Pistachio DSDT
Message-ID: <4988F26F.6050709@gmx.net>

The DBM690T/Pistachio DSDT has some issues in the memory management code:
- TOM is hardcoded to a fixed value and not updated.
- TOM2 is hardcoded as well.
- The TOM2!=0 case is commented out.

Fixes in this patch:
- Rename TOM to TOM1 and refer to the SSDT value with an External(TOM1)
clause.
- An ITE87427 Super I/O does not exist. Use the real name (IT8712F) of
the chip on the DBM690T board.
- Use decimal values for KELV, THOT and TCRT on the Pistachio board for
better readability.

Remaining questions/problems:
- The TOM2 hardcode can't be fixed until the generic K8/Fam10 SSDT
contains TOM2.
- I don't understand how the TOM2!=0 case is supposed to work and simply
uncommenting the code causes the IASL compiler to complain about
truncation of 64 bit values to 32 bit. Can we simply always store the
BIOS data at the top of TOM1? That would eliminate some code.
- Why does the DBM690T have THOT=80?C, TCRT=85?C and Pistachio have 10
Kelvin more (THOT=90?C, TCRT=95?C)?

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl
===================================================================
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl	(Revision 3929)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl	(Arbeitskopie)
@@ -30,8 +30,8 @@
 	/* Include ("debug.asl") */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
+	/* FIXME this is still missing! */
 	/* Memory related values */
-	Name(TOM, 0x40000000)/* Top of RAM memory below 4GB */
 	Name(TOM2, 0x0)	/* Top of RAM memory above 4GB (>> 16) */
 	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
 	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
@@ -1171,6 +1171,7 @@
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
 		Device(PCI0) {
+			External (TOM1)
 			Name(_HID, EISAID("PNP0A03"))
 			Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
 			Method(_BBN, 0) { /* Bus number = 0 */
@@ -1433,7 +1434,7 @@
 				Name(_ADR, 0x00140006)
 			} /* end Ac97modem */
 
-			/* ITE87427 Support */
+			/* ITE IT8712F Support */
 			OperationRegion (IOID, SystemIO, 0x2E, 0x02)	/* sometimes it is 0x4E */
 				Field (IOID, ByteAcc, NoLock, Preserve)
 				{
@@ -1457,15 +1458,15 @@
 				APC4,	8	/* APC/PME Control Register 2 */
 			}
 
-			/* Enter the 87427 MB PnP Mode */
+			/* Enter the IT8712F MB PnP Mode */
 			Method (EPNP)
 			{
 				Store(0x87, SIOI)
 				Store(0x01, SIOI)
 				Store(0x55, SIOI)
-				Store(0x55, SIOI) /* 87427 magic number */
+				Store(0x55, SIOI) /* IT8712F magic number */
 			}
-			/* Exit the 87427 MB PnP Mode */
+			/* Exit the IT8712F MB PnP Mode */
 			Method (XPNP)
 			{
 				Store (0x02, SIOI)
@@ -1482,7 +1483,7 @@
 				If (LLess (Arg0, 0x05))
 				{
 					EPNP()
-					/* DBGO("87427F\n") */
+					/* DBGO("IT8712F\n") */
 
 					Store (0x4, LDN)
 					Store (One, ACTR)  /* Enable EC */
@@ -1593,7 +1594,7 @@
 				}
 
 				/* Set size of memory from 1MB to TopMem */
-				Subtract(TOM, 0x100000, DMLL)
+				Subtract(TOM1, 0x100000, DMLL)
 
 				/*
 				* If(LNotEqual(TOM2, 0x00000000)){
Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl
===================================================================
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl	(Revision 3929)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl	(Arbeitskopie)
@@ -30,8 +30,8 @@
 	/* Include ("debug.asl") */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
+	/* FIXME this is still missing! */
 	/* Memory related values */
-	Name(TOM, 0x40000000)/* Top of RAM memory below 4GB */
 	Name(TOM2, 0x0)	/* Top of RAM memory above 4GB (>> 16) */
 	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
 	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
@@ -1170,6 +1170,7 @@
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
 		Device(PCI0) {
+			External (TOM1)
 			Name(_HID, EISAID("PNP0A03"))
 			Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
 			Method(_BBN, 0) { /* Bus number = 0 */
@@ -1516,7 +1517,7 @@
 				}
 
 				/* Set size of memory from 1MB to TopMem */
-				Subtract(TOM, 0x100000, DMLL)
+				Subtract(TOM1, 0x100000, DMLL)
 
 				/*
 				* If(LNotEqual(TOM2, 0x00000000)){
@@ -1676,9 +1677,9 @@
 
 	/* THERMAL */
 	Scope(\_TZ) {
-		Name (KELV, 0x0AAC)
-		Name (THOT, 0x0384)
-		Name (TCRT, 0x03B6)
+		Name (KELV, 2732)
+		Name (THOT, 900)
+		Name (TCRT, 950)
 
 		ThermalZone(TZ00) {
 			Method(_AC0,0) {	/* Active Cooling 0 (0=highest fan speed) */
@@ -1759,4 +1760,3 @@
 	}
 }
 /* End of ASL file */
-


-- 
http://www.hailfinger.org/

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From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb  4 02:44:40 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 04 Feb 2009 02:44:40 +0100
Subject: [coreboot] [patch] flashrom: resending my patch about SPI/LPC
 conflicts
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
Message-ID: <4988F308.4030000@gmx.net>

Hi Zheng,

On 02.02.2009 05:12, Bao, Zheng wrote:
> Signed-off-by: Zheng Bao <zheng.bao at amd.com>
>
> This patch is about flashrom running on dbm690t. It was sent several
> months ago and hasn't got any response yet. Now it deals with 3
> problems.
> 1. Fix the bug that the flashrom would hang if there is not SPI chip. A
> timeout detection was added.
> 2. We only access LPC ROM if we boot via LPC ROM. And only SPI ROM if we
> boot via SPI ROM. Doing crossly is not allowed. Anybody has better idea?
> 3. When we read/write SPI, we use memory read/write instead of sending
> SPI command.
>   

I had no access to my hardware for a few weeks. I will test now.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From peter at stuge.se  Wed Feb  4 04:40:16 2009
From: peter at stuge.se (Peter Stuge)
Date: Wed, 4 Feb 2009 04:40:16 +0100
Subject: [coreboot] flashrom SB600 LPC vs SPI, ROM straps
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
Message-ID: <20090204034016.9472.qmail@stuge.se>

Hello,

Bao, Zheng wrote:
> This patch is about flashrom running on dbm690t.
> It was sent several months ago and hasn't got any response yet.

Thanks for sending it, and thank you very much for the reminder!
I sometimes forget about patches on the mailing list. Sorry for
the delay.


> Now it deals with 3 problems.
> 1. Fix the bug that the flashrom would hang if there is not SPI
>    chip. A timeout detection was added.

Carl-Daniel confirmed that flashrom hangs while trying to probe for
SPI flash chips, if the system is not using SPI.


> 2. We only access LPC ROM if we boot via LPC ROM. And only SPI ROM
>    if we boot via SPI ROM. Doing crossly is not allowed. Anybody
>    has better idea?

This is a good idea, but at the moment enable_flash_sb600() in
chipset_enable.c assumes that SB600 is always using SPI.

The best fix for 2. (and I believe it will also fix 1. without the
need for a timeout, but the timeout can be a good idea anyway) is to
make sure that enable_flash_sb600() sets

flashbus = BUS_TYPE_SB600_SPI;

only when SPI is actually used. In that case flashrom will not call
any SB600 SPI functions.

If the enable functions do not set flashbus then flashrom falls back
to assume direct CPU access, which will work correctly.

The SB600 RRG says that the BypassRom bits in FakeAsrEn (0xcd6 0x8f)
will only _override_ the strap setting, so I think that they can not
be used by software to read the ROM straps.

We need another method to find out what was used to boot the system.
The only way to more information that I can find is to read the LPC
ROM Address Range registers in the LPC/ISA bridge, register 0x68 and
test for the special value meaning that the LPC strap is disabled.
RRG page 256.

However: LPC being disabled does not mean that SPI is enabled. The
straps can also be FWH and PCI. How can we read the ROM straps?


> 3. When we read/write SPI, we use memory read/write instead of
>    sending SPI command.

Yes, this is a really nice feature of the SB600! :)


//Peter



From engineerguy3737 at yahoo.com  Wed Feb  4 04:57:46 2009
From: engineerguy3737 at yahoo.com (Dan Lykowski)
Date: Tue, 3 Feb 2009 19:57:46 -0800 (PST)
Subject: [coreboot] SB600 HDA can't find codec fix
References: <DD1CC71B621B004FA76856E5129D6B17025AD406@sbjgexmb1.amd.com>
Message-ID: <464201.22040.qm@web57008.mail.re3.yahoo.com>

Sorry for the delay.. Way too much to do and so little time..

Fixed the spotted issues and added 1ms delay to match the BKDG while waiting for BAR+0xe to set its bits.

Dan Lykowski

Signed-off-by: Dan Lykowski<lykowdk at gmail.com>




________________________________
From: "Li, Maggie" <Maggie.Li at amd.com>
To: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Cc: Dan Lykowski <engineerguy3737 at yahoo.com>; Marc Jones <marcj303 at gmail.com>; coreboot at coreboot.org
Sent: Sunday, February 1, 2009 7:47:15 PM
Subject: RE: [coreboot] SB600 HDA can't find codec fix

Carl, 

I see. Pci_find_device is more reliable than dev_find_slot. However, we didn't use the former in our SB600 and RS690 code. There are many places to be modified if needed.

Best regards
Maggie li

-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
Sent: Monday, February 02, 2009 10:26 AM
To: Li, Maggie
Cc: Dan Lykowski; Marc Jones; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

Hi Maggie,

while your point about pci_find_device is valid, I think that
dev_find_device is the function Dan should choose. It allows us to
address the PCI devices even if their bus locations are shifted which is
possible with some AMD chipsets and may also be true for boards with
multiple chipsets.
In general, we want to use functions which can deal with non-default bus
topologies.

On 02.02.2009 02:48, Li, Maggie wrote:
> Dan,
>
>  
>
> I read the RRG spec, just as you said, you should use 0xF in file sb600_hda.c to get the current audio codec, that is to say, 
>
> dword &= 0xF;
>     if (!dword)  
>         goto no_codec;
>
>  
>
> pci_locate_device is really should be used in early setup. Device_t is the type of u32 at that time. After this stage, you should use dev_find_slot. In file sb600_sata.c, ?/* sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ ? gives you misunderstanding about how to get the SMBus and it should be removed. You can submit a patch about sata and I will ack it. Thanks.
>  

I'd prefer to use dev_find_device there as well.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/ 


      
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From Zheng.Bao at amd.com  Wed Feb  4 04:59:11 2009
From: Zheng.Bao at amd.com (Bao, Zheng)
Date: Wed, 4 Feb 2009 11:59:11 +0800
Subject: [coreboot] flashrom SB600 LPC vs SPI, ROM straps
In-Reply-To: <20090204034016.9472.qmail@stuge.se>
References: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
	<20090204034016.9472.qmail@stuge.se>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD954@sbjgexmb1.amd.com>

Hi,
About 2, we don't have to know where the board boots. If we assume the
cross-burning is not allowed, the flashrom can not detect the existence
of a SPI chip. Then it will not do any SPI action. Right?

Zheng

-----Original Message-----
From: coreboot-bounces at coreboot.org
[mailto:coreboot-bounces at coreboot.org] On Behalf Of Peter Stuge
Sent: Wednesday, February 04, 2009 11:40 AM
To: coreboot at coreboot.org
Subject: Re: [coreboot] flashrom SB600 LPC vs SPI, ROM straps

Hello,

Bao, Zheng wrote:
> This patch is about flashrom running on dbm690t.
> It was sent several months ago and hasn't got any response yet.

Thanks for sending it, and thank you very much for the reminder!
I sometimes forget about patches on the mailing list. Sorry for
the delay.


> Now it deals with 3 problems.
> 1. Fix the bug that the flashrom would hang if there is not SPI
>    chip. A timeout detection was added.

Carl-Daniel confirmed that flashrom hangs while trying to probe for
SPI flash chips, if the system is not using SPI.


> 2. We only access LPC ROM if we boot via LPC ROM. And only SPI ROM
>    if we boot via SPI ROM. Doing crossly is not allowed. Anybody
>    has better idea?

This is a good idea, but at the moment enable_flash_sb600() in
chipset_enable.c assumes that SB600 is always using SPI.

The best fix for 2. (and I believe it will also fix 1. without the
need for a timeout, but the timeout can be a good idea anyway) is to
make sure that enable_flash_sb600() sets

flashbus = BUS_TYPE_SB600_SPI;

only when SPI is actually used. In that case flashrom will not call
any SB600 SPI functions.

If the enable functions do not set flashbus then flashrom falls back
to assume direct CPU access, which will work correctly.

The SB600 RRG says that the BypassRom bits in FakeAsrEn (0xcd6 0x8f)
will only _override_ the strap setting, so I think that they can not
be used by software to read the ROM straps.

We need another method to find out what was used to boot the system.
The only way to more information that I can find is to read the LPC
ROM Address Range registers in the LPC/ISA bridge, register 0x68 and
test for the special value meaning that the LPC strap is disabled.
RRG page 256.

However: LPC being disabled does not mean that SPI is enabled. The
straps can also be FWH and PCI. How can we read the ROM straps?


> 3. When we read/write SPI, we use memory read/write instead of
>    sending SPI command.

Yes, this is a really nice feature of the SB600! :)


//Peter

--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot





From Maggie.Li at amd.com  Wed Feb  4 05:14:24 2009
From: Maggie.Li at amd.com (Li, Maggie)
Date: Wed, 4 Feb 2009 12:14:24 +0800
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <464201.22040.qm@web57008.mail.re3.yahoo.com>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD95E@sbjgexmb1.amd.com>

Dan

 

I think you made a mistake. It should be ?sm_dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_ATI_SB600_SM, 0);?, not ?sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);? in your file.

 

In my last letter, there is a writing error. We should say that dev_find_device is more reliable than dev_find_slot

Best regards 
Maggie li 

________________________________

From: Dan Lykowski [mailto:engineerguy3737 at yahoo.com] 
Sent: Wednesday, February 04, 2009 11:58 AM
To: Li, Maggie; Carl-Daniel Hailfinger
Cc: Marc Jones; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

 

Sorry for the delay.. Way too much to do and so little time..

Fixed the spotted issues and added 1ms delay to match the BKDG while waiting for BAR+0xe to set its bits.

Dan Lykowski

Signed-off-by: Dan Lykowski<lykowdk at gmail.com>

 

________________________________

From: "Li, Maggie" <Maggie.Li at amd.com>
To: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Cc: Dan Lykowski <engineerguy3737 at yahoo.com>; Marc Jones <marcj303 at gmail.com>; coreboot at coreboot.org
Sent: Sunday, February 1, 2009 7:47:15 PM
Subject: RE: [coreboot] SB600 HDA can't find codec fix

Carl, 

I see. Pci_find_device is more reliable than dev_find_slot. However, we didn't use the former in our SB600 and RS690 code. There are many places to be modified if needed.

Best regards
Maggie li

-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
Sent: Monday, February 02, 2009 10:26 AM
To: Li, Maggie
Cc: Dan Lykowski; Marc Jones; coreboot at coreboot.org
Subject: Re: [coreboot] SB600 HDA can't find codec fix

Hi Maggie,

while your point about pci_find_device is valid, I think that
dev_find_device is the function Dan should choose. It allows us to
address the PCI devices even if their bus locations are shifted which is
possible with some AMD chipsets and may also be true for boards with
multiple chipsets.
In general, we want to use functions which can deal with non-default bus
topologies.

On 02.02.2009 02:48, Li, Maggie wrote:
> Dan,
>
>  
>
> I read the RRG spec, just as you said, you should use 0xF in file sb600_hda.c to get the current audio codec, that is to say, 
>
> dword &= 0xF;
>    if (!dword)  
>        goto no_codec;
>
>  
>
> pci_locate_device is really should be used in early setup. Device_t is the type of u32 at that time. After this stage, you should use dev_find_slot. In file sb600_sata.c, ?/* sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ ? gives you misunderstanding about how to get the SMBus and it should be removed. You can submit a patch about sata and I will ack it. Thanks.
>  

I'd prefer to use dev_find_device there as well.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/ 



 

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From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb  4 05:20:17 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 04 Feb 2009 05:20:17 +0100
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD95E@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD95E@sbjgexmb1.amd.com>
Message-ID: <49891781.9080408@gmx.net>

Hi Dan,

sorry for chasing you around in circles on that issue.

On 04.02.2009 05:14, Li, Maggie wrote:
> Dan 
>
> I think you made a mistake. It should be ?sm_dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_ATI_SB600_SM, 0);?, not ?sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);? in your file.
>
> In my last letter, there is a writing error. We should say that dev_find_device is more reliable than dev_find_slot
>   

I believe dev_find_device is indeed best. Anyway, I think I can make
that change locally and commit if you're OK with that.

Regards,
Carl-Daniel

> -----Original Message-----
> From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
> Sent: Monday, February 02, 2009 10:26 AM
> To: Li, Maggie
> Cc: Dan Lykowski; Marc Jones; coreboot at coreboot.org
> Subject: Re: [coreboot] SB600 HDA can't find codec fix
>
> Hi Maggie,
>
> while your point about pci_find_device is valid, I think that
> dev_find_device is the function Dan should choose. It allows us to
> address the PCI devices even if their bus locations are shifted which is
> possible with some AMD chipsets and may also be true for boards with
> multiple chipsets.
> In general, we want to use functions which can deal with non-default bus
> topologies.
>   
-- 
http://www.hailfinger.org/




From peter at stuge.se  Wed Feb  4 05:27:40 2009
From: peter at stuge.se (Peter Stuge)
Date: Wed, 4 Feb 2009 05:27:40 +0100
Subject: [coreboot] flashrom SB600 LPC vs SPI, ROM straps
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD954@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com>
	<20090204034016.9472.qmail@stuge.se>
	<DD1CC71B621B004FA76856E5129D6B17025AD954@sbjgexmb1.amd.com>
Message-ID: <20090204042740.18843.qmail@stuge.se>

Bao, Zheng wrote:
> About 2, we don't have to know where the board boots.

I'm afraid we do.


> If we assume the cross-burning is not allowed, the flashrom can not
> detect the existence of a SPI chip. Then it will not do any SPI
> action. Right?

The flashbus variable is used to control if and how SPI commands are
performed by flashrom.

Existing chipset enable code for SB600 unconditionally enables SPI in
the PM registers, and sets flashbus = BUS_TYPE_SB600_SPI. This does
not work, as can be seen on SB600 boards with LPC flash. Leaving the
PM registers untouched and setting flashbus = BUS_TYPE_SB600_SPI also
does not work, because erase and probe commands will be sent via SPI.

flashrom must detect what the system is actually using so that the
flashbus variable is set correctly.


//Peter



From Zheng.Bao at amd.com  Wed Feb  4 06:06:45 2009
From: Zheng.Bao at amd.com (Bao, Zheng)
Date: Wed, 4 Feb 2009 13:06:45 +0800
Subject: [coreboot] flashrom SB600 LPC vs SPI, ROM straps
In-Reply-To: <20090204042740.18843.qmail@stuge.se>
References: <DD1CC71B621B004FA76856E5129D6B17025AD41E@sbjgexmb1.amd.com><20090204034016.9472.qmail@stuge.se><DD1CC71B621B004FA76856E5129D6B17025AD954@sbjgexmb1.amd.com>
	<20090204042740.18843.qmail@stuge.se>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025AD96D@sbjgexmb1.amd.com>

That is why I send the patch which removes code that "unconditionally
enables SPI in the PM registers". If the SPI commands failed, it will go
on probing other chips. And then it will find the LPC flashchip which it
should work with.

Zheng

-----Original Message-----
From: coreboot-bounces at coreboot.org
[mailto:coreboot-bounces at coreboot.org] On Behalf Of Peter Stuge
Sent: Wednesday, February 04, 2009 12:28 PM
To: coreboot at coreboot.org
Cc: Perley, Tim
Subject: Re: [coreboot] flashrom SB600 LPC vs SPI, ROM straps

Bao, Zheng wrote:
> About 2, we don't have to know where the board boots.

I'm afraid we do.


> If we assume the cross-burning is not allowed, the flashrom can not
> detect the existence of a SPI chip. Then it will not do any SPI
> action. Right?

The flashbus variable is used to control if and how SPI commands are
performed by flashrom.

Existing chipset enable code for SB600 unconditionally enables SPI in
the PM registers, and sets flashbus = BUS_TYPE_SB600_SPI. This does
not work, as can be seen on SB600 boards with LPC flash. Leaving the
PM registers untouched and setting flashbus = BUS_TYPE_SB600_SPI also
does not work, because erase and probe commands will be sent via SPI.

flashrom must detect what the system is actually using so that the
flashbus variable is set correctly.


//Peter

--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot





From peter at stuge.se  Wed Feb  4 07:50:38 2009
From: peter at stuge.se (Peter Stuge)
Date: Wed, 4 Feb 2009 07:50:38 +0100
Subject: [coreboot] flashrom SB600 LPC vs SPI, ROM straps
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD96D@sbjgexmb1.amd.com>
References: <20090204042740.18843.qmail@stuge.se>
	<DD1CC71B621B004FA76856E5129D6B17025AD96D@sbjgexmb1.amd.com>
Message-ID: <20090204065038.31143.qmail@stuge.se>

Hi,

Bao, Zheng wrote:
> That is why I send the patch which removes code that
> "unconditionally enables SPI in the PM registers". If the SPI
> commands failed, it will go on probing other chips. And then it
> will find the LPC flashchip which it should work with.

SPI commands will hang if there is no SPI flash chip so they must
not be used blindly. Do you know what state the SPI hardware will
be in if an SPI command is executed without an SPI flash chip?


>> Leaving the PM registers untouched and setting
>> flashbus = BUS_TYPE_SB600_SPI also does not work, because
>> erase and probe commands will be sent via SPI.

Please consider this again. By "leave untouched" I mean that flashrom
does not set these registers, as in your suggested patch. If flashbus
is set to BUS_TYPE_SB600_SPI, sb600_spi_ functions will be called.
The way flashrom is written, each function can not fall back to
direct CPU access. The flashbus variable was introduced to control
this exact thing and it needs to be set to reflect the hardware.


>> flashrom must detect what the system is actually using so that the
>> flashbus variable is set correctly.

Unfortunately we can not get around this. For flashrom to do the
right thing, we must check (or worst case, guess) what the system is
using.


SPI command timeout is not as good indication as if we can find out
the value of the ROM strap through other means. Maybe there is even
risk that issuing a command that hangs has a negative effect on the
LPC/SPI state. In particular, I am worried about the SPI/LPC
translation that SB600 can do which transparently allows the MAC
access to an LPC flash chip via SPI.


//Peter



From engineerguy3737 at yahoo.com  Wed Feb  4 09:01:42 2009
From: engineerguy3737 at yahoo.com (Dan Lykowski)
Date: Wed, 4 Feb 2009 00:01:42 -0800 (PST)
Subject: [coreboot] SB600 HDA can't find codec fix
References: <DD1CC71B621B004FA76856E5129D6B17025AD95E@sbjgexmb1.amd.com>
	<49891781.9080408@gmx.net>
Message-ID: <60778.9846.qm@web57006.mail.re3.yahoo.com>

Its OK, I'm flexible. Do whatever everyone decides is right, I just need to move on to other things.

Thanks,
Dan Lykowski




________________________________
From: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
To: "Li, Maggie" <Maggie.Li at amd.com>
Cc: Marc Jones <marcj303 at gmail.com>; Dan Lykowski <engineerguy3737 at yahoo.com>; coreboot at coreboot.org
Sent: Tuesday, February 3, 2009 8:20:17 PM
Subject: Re: [coreboot] SB600 HDA can't find codec fix

Hi Dan,

sorry for chasing you around in circles on that issue.

On 04.02.2009 05:14, Li, Maggie wrote:
> Dan 
>
> I think you made a mistake. It should be ?sm_dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_ATI_SB600_SM, 0);?, not ?sm_dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);? in your file.
>
> In my last letter, there is a writing error. We should say that dev_find_device is more reliable than dev_find_slot
>  

I believe dev_find_device is indeed best. Anyway, I think I can make
that change locally and commit if you're OK with that.

Regards,
Carl-Daniel

> -----Original Message-----
> From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
> Sent: Monday, February 02, 2009 10:26 AM
> To: Li, Maggie
> Cc: Dan Lykowski; Marc Jones; coreboot at coreboot.org
> Subject: Re: [coreboot] SB600 HDA can't find codec fix
>
> Hi Maggie,
>
> while your point about pci_find_device is valid, I think that
> dev_find_device is the function Dan should choose. It allows us to
> address the PCI devices even if their bus locations are shifted which is
> possible with some AMD chipsets and may also be true for boards with
> multiple chipsets.
> In general, we want to use functions which can deal with non-default bus
> topologies.
>  
-- 
http://www.hailfinger.org/


--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot


      
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From mylesgw at gmail.com  Wed Feb  4 15:25:29 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Wed, 4 Feb 2009 07:25:29 -0700
Subject: [coreboot] coreboot Digest, Vol 48, Issue 13
In-Reply-To: <4988D9CA.90906@gmail.com>
References: <mailman.62.1233679417.23928.coreboot@coreboot.org>
	<4988D9CA.90906@gmail.com>
Message-ID: <F2E3F73DF44941AE88AA2AFE13D11321@chimp>



> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of David Melik
> Sent: Tuesday, February 03, 2009 4:57 PM
> To: coreboot at coreboot.org
> Subject: Re: [coreboot] coreboot Digest, Vol 48, Issue 13
> 
> 
> > > > I did that, then did not see Opterons listed in it or on
> > > > coreboot.org/buildrom/.
> >
> > ?
> >
> 
> The current buildrom just
> seems to omit Opteron 800 (or any) series, and that link omits s4882
> from 'supported boards.'
s4882 isn't supported in buildrom.  It would be very easy to add that
support.

There are several Tyan boards which are supported.  All of them are Opteron
boards.  You select the board under platform in menuconfig.

> 
> > > > I thought I read in the archives that someone patched coreboot for
> s4882[...]
> >
> > It should still work.  Here's what I did.
> >
> > cd coreboot/svn/targets

...

> > That should work.  Let me know.  Exact error messages and what you type
> will
> > help us help you.
> >
> > Thanks,
> > Myles
> 
> Great!  It appeared to work, but I am unsure if I will test it today or
> in few/one day(s) after
> I upgrade with slamd64-12.2-dvd.iso (downloading.)

I'm glad it worked for you.

> So, how hard is it to build coreboot for unsupported boards?  I have 15
> - 20 boards around, incl. a few working (mostly '90s:) perhaps I should
> try others if I wait for my OS download....

Porting coreboot to a new board can be very difficult or relatively easy.

Here's a helpful link.  If your CPU, Northbridge, Southbridge, and SuperIO
are supported it should be fairly easy.  Otherwise you'll need docs for
them.  Also check out the developers links on coreboot.org.

http://www.coreboot.org/Supported_Chipsets_and_Devices

Thanks,
Myles




From p.brostovski at levigo.de  Wed Feb  4 16:12:46 2009
From: p.brostovski at levigo.de (Piotr Brostovski)
Date: Wed, 04 Feb 2009 16:12:46 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <4988D2EC.1010200@assembler.cz>
References: <49870D6C.3040608@levigo.de>	<20090202152615.29495.qmail@stuge.se>		<49871CC9.8010907@levigo.de>	<20090202164229.23050.qmail@stuge.se>		<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>		<498736B6.1000704@levigo.de>	<13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>	<49874622.2010900@levigo.de>
	<4988D2EC.1010200@assembler.cz>
Message-ID: <4989B06E.1010202@levigo.de>

Hi,

Rudolf Marek schrieb:
> Hi,
> 
> I think gpxe works with following combination
> Coreboot + SeaBIOS + gpxe.

That sounds great - but how can i do it?


Can i attach the gPXE as an image inside the rom?
An load it from memory, like filo can do it?


Or do i have to use a hd, floppy, etc?


--
Regards,
Piotr



From bandan.das at stratus.com  Wed Feb  4 17:34:35 2009
From: bandan.das at stratus.com (Bandan Das)
Date: Wed, 04 Feb 2009 11:34:35 -0500
Subject: [coreboot] VIA pc2500e for a start ?
Message-ID: <1233765275.10993.339.camel@BSD.mno.stratus.com>

Hello everybody,

I have been playing around with coreboot on qemu for a while. I am on
the lookout for a cheap development board to try coreboot on some real
hardware and stumbled upon the VIA pc2500e mainboard
(http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp). 

It has initial support with coreboot -v2 and I can find some cheap ones
for sale on ebay. Is this a good board to start hacking with ? Can
someone suggest some other sources to check out evaluation boards ? I
also saw clubit.com mentioned in a lot of posts, but that site seems to
exist no more.
  
Thanks,
Bandan

-- 
BSD




From bari at onelabs.com  Wed Feb  4 18:59:24 2009
From: bari at onelabs.com (bari)
Date: Wed, 04 Feb 2009 11:59:24 -0600
Subject: [coreboot] VIA pc2500e for a start ?
In-Reply-To: <1233765275.10993.339.camel@BSD.mno.stratus.com>
References: <1233765275.10993.339.camel@BSD.mno.stratus.com>
Message-ID: <4989D77C.1060801@onelabs.com>

Bandan Das wrote:
> Hello everybody,
> 
> I have been playing around with coreboot on qemu for a while. I am on
> the lookout for a cheap development board to try coreboot on some real
> hardware and stumbled upon the VIA pc2500e mainboard
> (http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp). 
> 
> It has initial support with coreboot -v2 and I can find some cheap ones
> for sale on ebay. Is this a good board to start hacking with ? 

Yes, it's already supported in V2.

ebay is a good source for other older boards supported in V2.

> Can someone suggest some other sources to check out evaluation boards ? 

The VIA VB7001 (very similar to Epia-LN and close to CN) is ~$100.

In the US : http://www.idotpc.com/thestore/pc/viewContent.asp?idpage=1
http://www.logicsupply.com/

> I also saw clubit.com mentioned in a lot of posts, but that site seems to
> exist no more.

Yes, I don't think they stock them anymore. I don't know where you are 
located.  The pc2500e is still being produced in Brazil. You might find 
some distributors there. Everex also sells a system using a pc2500 
version board.

-Bari



From bandan.das at stratus.com  Wed Feb  4 21:48:14 2009
From: bandan.das at stratus.com (Bandan Das)
Date: Wed, 04 Feb 2009 15:48:14 -0500
Subject: [coreboot] VIA pc2500e for a start ?
In-Reply-To: 4989D77C.1060801@onelabs.com
References: <1233765275.10993.339.camel@BSD.mno.stratus.com>
	4989D77C.1060801@onelabs.com
Message-ID: <1233780494.5893.5.camel@BSD.mno.stratus.com>

Hi Bari,

Thanks for the pointers.

The VIA VB7001 actually looks good and I am thinking I will ditch my
pc2500e plans in its favor unless I find something better :) 

Bandan

On Wed, 2009-02-04 at 11:59 -0600, bari wrote:
> Bandan Das wrote:
> > Hello everybody,
> > 
> > I have been playing around with coreboot on qemu for a while. I am on
> > the lookout for a cheap development board to try coreboot on some real
> > hardware and stumbled upon the VIA pc2500e mainboard
> > (http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp). 
> > 
> > It has initial support with coreboot -v2 and I can find some cheap ones
> > for sale on ebay. Is this a good board to start hacking with ? 
> 
> Yes, it's already supported in V2.
> 
> ebay is a good source for other older boards supported in V2.
> 
> > Can someone suggest some other sources to check out evaluation boards ? 
> 
> The VIA VB7001 (very similar to Epia-LN and close to CN) is ~$100.
> 
> In the US : http://www.idotpc.com/thestore/pc/viewContent.asp?idpage=1
> http://www.logicsupply.com/
> 
> > I also saw clubit.com mentioned in a lot of posts, but that site seems to
> > exist no more.
> 
> Yes, I don't think they stock them anymore. I don't know where you are 
> located.  The pc2500e is still being produced in Brazil. You might find 
> some distributors there. Everex also sells a system using a pc2500 
> version board.
> 
> -Bari
-- 
BSD




From peter at stuge.se  Thu Feb  5 00:24:46 2009
From: peter at stuge.se (Peter Stuge)
Date: Thu, 5 Feb 2009 00:24:46 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <4989B06E.1010202@levigo.de>
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<49871CC9.8010907@levigo.de> <20090202164229.23050.qmail@stuge.se>
	<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>
	<498736B6.1000704@levigo.de>
	<13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>
	<49874622.2010900@levigo.de> <4988D2EC.1010200@assembler.cz>
	<4989B06E.1010202@levigo.de>
Message-ID: <20090204232446.14187.qmail@stuge.se>

Piotr Brostovski wrote:
> > I think gpxe works with following combination
> > Coreboot + SeaBIOS + gpxe.
> 
> That sounds great - but how can i do it?
> 
> 
> Can i attach the gPXE as an image inside the rom?
> An load it from memory, like filo can do it?

No. That is not possible right now.


> Or do i have to use a hd, floppy, etc?

A hard drive or CD-ROM would work best with SeaBIOS.

I think the idea is that SeaBIOS should behave exactly like a BIOS
and if you need something else you use a different payload.


//Peter



From r.marek at assembler.cz  Thu Feb  5 00:43:15 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Thu, 05 Feb 2009 00:43:15 +0100
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <4989B06E.1010202@levigo.de>
References: <49870D6C.3040608@levigo.de>	<20090202152615.29495.qmail@stuge.se>		<49871CC9.8010907@levigo.de>	<20090202164229.23050.qmail@stuge.se>		<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>		<498736B6.1000704@levigo.de>	<13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>	<49874622.2010900@levigo.de>	<4988D2EC.1010200@assembler.cz>
	<4989B06E.1010202@levigo.de>
Message-ID: <498A2813.2030302@assembler.cz>

Hi,

You need to edit SeaBIOS config.h and tell where the ROM is in final image.
SeaBIOS will load it for you. I'm out on bussiness trip from next day evening. 
Perhaps Kevin will help with details.

Rudolf


Piotr Brostovski napsal(a):
> Hi,
> 
> Rudolf Marek schrieb:
>> Hi,
>>
>> I think gpxe works with following combination
>> Coreboot + SeaBIOS + gpxe.
> 
> That sounds great - but how can i do it?
> 
> 
> Can i attach the gPXE as an image inside the rom?
> An load it from memory, like filo can do it?
> 
> 
> Or do i have to use a hd, floppy, etc?
> 
> 
> --
> Regards,
> Piotr
> 
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot



From blink at nm.ru  Thu Feb  5 01:42:04 2009
From: blink at nm.ru (blink at nm.ru)
Date: Thu, 05 Feb 2009 03:42:04 +0300
Subject: [coreboot] flashrom doesn't work on asus P5K-E wifi, ICH9-R
Message-ID: <12337945243067.2125205963.blink@nm.ru>

Hello!

Is it normal or am I doing something wrong?

Log:

 
                                   addr-75:~/coreboot-v3/util/flashrom # ./flashrom -w -v P5K-E-1102.ROM 
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... OK.
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 

Verifying flash... FAILED at 0x0006e9a4!  Expected=0x84, Read=0x78

addr-75:~/coreboot-v3/util/flashrom # ./flashrom -w -v P5K-E-1202.ROM 
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... OK.
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 

Verifying flash... FAILED at 0x001dc000!  Expected=0xff, Read=0x05

addr-75:~/coreboot-v3/util/flashrom # ./flashrom -w -v bios.bin 
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... OK.
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 

Verifying flash... FAILED at 0x00000000!  Expected=0x4c, Read=0x41

addr-75:~/coreboot-v3/util/flashrom # ./flashrom -w -v bios.bin 
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... OK.
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 

Verifying flash... FAILED at 0x00000000!  Expected=0x4c, Read=0x41

addr-75:~/coreboot-v3/util/flashrom # ./flashrom -w -v last.rom 
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... OK.
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 

Verifying flash... VERIFIED.           (I've read it by flashrom -r)

addr-75:~/coreboot-v3/util/flashrom # ./flashrom -E
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... OK.
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Erasing flash chip... FAILED!
ERROR at 0x00000000: Expected=0xff, Read=0x41

addr-75:~/coreboot-v3/util/flashrom # addr-75:~/coreboot-v3/util/flashrom # ./flashrom -w -v P5K-E-1102.ROM 
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... OK.
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 

Verifying flash... FAILED at 0x0006e9a4!  Expected=0x84, Read=0x78

Thanks in advace,
JonB

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From peter at stuge.se  Thu Feb  5 02:27:03 2009
From: peter at stuge.se (Peter Stuge)
Date: Thu, 5 Feb 2009 02:27:03 +0100
Subject: [coreboot] flashrom doesn't work on asus P5K-E wifi, ICH9-R
In-Reply-To: <12337945243067.2125205963.blink@nm.ru>
References: <12337945243067.2125205963.blink@nm.ru>
Message-ID: <20090205012703.15980.qmail@stuge.se>

Hi Jon,

blink at nm.ru wrote:
> Is it normal or am I doing something wrong?

I would say neither.


> addr-75:~/coreboot-v3/util/flashrom # ./flashrom -E
> Calibrating delay loop... OK.
> No coreboot table found.
> Found chipset "Intel ICH9R", enabling flash write... OK.
> Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
> Erasing flash chip... FAILED!
> ERROR at 0x00000000: Expected=0xff, Read=0x41

This is the best test right now. Writing doesn't work on your
platform for some reason. It would be helpful to see output from
flashrom -E -V

Possibly the BIOS has restricted flash chip access.

Also, which revision of flashrom is this? It seems a recent one, but
if you haven't already please run svn up to get the very latest
revision.


Thanks!

//Peter



From kevin at koconnor.net  Thu Feb  5 02:37:59 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Wed, 4 Feb 2009 20:37:59 -0500
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <498A2813.2030302@assembler.cz>
References: <20090202152615.29495.qmail@stuge.se> <49871CC9.8010907@levigo.de>
	<20090202164229.23050.qmail@stuge.se>
	<13426df10902020850m4f7a799bx51f1720a682cce97@mail.gmail.com>
	<498736B6.1000704@levigo.de>
	<13426df10902021058n6ed9d120jfaf1c12acba78f91@mail.gmail.com>
	<49874622.2010900@levigo.de> <4988D2EC.1010200@assembler.cz>
	<4989B06E.1010202@levigo.de> <498A2813.2030302@assembler.cz>
Message-ID: <20090205013759.GA6963@morn.localdomain>

On Thu, Feb 05, 2009 at 12:43:15AM +0100, Rudolf Marek wrote:
> Hi,
>
> You need to edit SeaBIOS config.h and tell where the ROM is in final image.
> SeaBIOS will load it for you. I'm out on bussiness trip from next day 
> evening. Perhaps Kevin will help with details.

I ran gpxe from coreboot-v2 with seabios.  The procedure I used was:

* modify coreboot-v2 Config.lb to make room for gpxe image.  I set:

  option ROM_SIZE = (256 * 1024) - (62 * 1024) - (53 * 1024)

  Total rom is 256KiB, 62KiB is for vga rom, and 53KiB for
  10ec8167.rom (gpxe rom).

* Configure seabios to deploy both a vga rom and gpxe rom by setting
  in src/config.h:

  #define OPTIONROM_BDF_1 0x0100
  #define OPTIONROM_MEM_1 0xfffc0000
  #define OPTIONROM_BDF_2 0x0048
  #define OPTIONROM_MEM_2 0xfffcf800

  The 0xfffc0000 corresponds with the 256KiB rom.  The vga adapter is
  at pci 1:00.0 (hex(1<<8) == 0x100) and nic is at pci 00:09.0
  (hex(9<<3) == 0x48).

* Build coreboot-v2 with seabios as payload.

* Build the coreboot rom and combine with vga rom and gpxe:

  cat video.bios.bin 10ec8167.rom coreboot.rom > coreboot.final.rom

Hope this helps.

-Kevin



From svn at coreboot.org  Thu Feb  5 03:18:42 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Thu,  5 Feb 2009 03:18:42 +0100
Subject: [coreboot] r3930 - trunk/coreboot-v2/src/southbridge/amd/sb600
Message-ID: <mailman.2751.1355071479.16123.coreboot@coreboot.org>

Author: hailfinger
Date: 2009-02-05 03:18:42 +0100 (Thu, 05 Feb 2009)
New Revision: 3930

Modified:
   trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c
Log:
Use the correct device for switching on HDA.

Reorder HDA (HD Audio) init:
The reordering was based on what order things happen in the BIOS
Developers guide, RPR, and SATA driver. I fixed the order of the devices
that didn't matter to clean up the change log.
1. Enable the Chip
2. Setup the SMBus registers
3. Setup the Device Registers
4. Look for Codec
5. Init Codec

The codec init was changed to match the description in the RRG pg 235.
Mem Reg: Base + 08h Bit 0. There were unneeded things happening.

Added 1ms delay to match the BKDG while waiting for BAR+0xe to set its
bits.

Signed-off-by: Dan Lykowski <lykowdk at gmail.com>

Tested on AMD DBM690T and AMD Pistachio by Maggie Li. Works.

Tested on Asus M2A-VM by Carl-Daniel Hailfinger. Improves the situation,
but some warnings remain.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>


Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c	2009-02-03 22:37:22 UTC (rev 3929)
+++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_hda.c	2009-02-05 02:18:42 UTC (rev 3930)
@@ -35,23 +35,27 @@
 	u32 dword;
 	int count;
 
+	/* Write (val & ~mask) to port */
 	val &= mask;
 	dword = readl(port);
 	dword &= ~mask;
 	dword |= val;
 	writel(dword, port);
 
+	/* Wait for readback of register to 
+	 * match what was just written to it 
+	 */
 	count = 50;
 	do {
+		/* Wait 1ms based on BKDG wait time */
+		mdelay(1);
 		dword = readl(port);
 		dword &= mask;
-		udelay(100);
 	} while ((dword != val) && --count);
 
+	/* Timeout occured */
 	if (!count)
 		return -1;
-
-	udelay(540);
 	return 0;
 }
 
@@ -59,32 +63,31 @@
 {
 	u32 dword;
 
-	/* 1 */
-	set_bits(base + 0x08, 1, 1);
+	/* Set Bit0 to 0 to enter reset state (BAR + 0x8)[0] */
+	if (set_bits(base + 0x08, 1, 0) == -1) 
+		goto no_codec;
 
-	/* 2 */
-	dword = readl(base + 0x0e);
-	dword |= 7;
-	writel(dword, base + 0x0e);
+	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
+	if (set_bits(base + 0x08, 1, 1) == -1) 
+		goto no_codec;
 
-	/* 3 */
-	set_bits(base + 0x08, 1, 0);
+	/* Delay for 1 ms since the BKDG does */
+	mdelay(1);
 
-	/* 4 */
-	set_bits(base + 0x08, 1, 1);
-
-	/* 5 */
+	/* Read in Codec location (BAR + 0xe)[3..0]*/
 	dword = readl(base + 0xe);
-	dword &= 7;
-
-	/* 6 */
-	if (!dword) {
-		set_bits(base + 0x08, 1, 0);
-		printk_debug("No codec!\n");
-		return 0;
-	}
+	dword &= 0x0F;
+	if (!dword)
+		goto no_codec;
+		
 	return dword;
 
+no_codec:
+	/* Codec Not found */
+	/* Put HDA back in reset (BAR + 0x8) [0] */
+	set_bits(base + 0x08, 1, 0);
+	printk_debug("No codec!\n");
+	return 0;
 }
 
 static u32 cim_verb_data[] = {
@@ -262,20 +265,38 @@
 
 static void hda_init(struct device *dev)
 {
+	u8 byte;
+	u32 dword;
 	u8 *base;
 	struct resource *res;
 	u32 codec_mask;
+	device_t sm_dev;
+	
+	/* Enable azalia - PM_io 0x59[4], disable ac97 - PM_io 0x59[1..0] */
+	pm_iowrite(0x59, 0xB);
+	
+	/* Find the SMBus */
+	/* FIXME: Need to find out why the call below crashes. */
+	/*sm_dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_ATI_SB600_SM, 0);*/
+	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
 
-	/* SM Setting */
+	/* Set routing pin - SMBus ExtFunc (0xf8/0xfc) */
+	pci_write_config32(sm_dev, 0xf8, 0x00);
+	pci_write_config8(sm_dev, 0xfc, 0xAA);
+	/* Set INTA - SMBus 0x63 [2..0] */
+	byte = pci_read_config8(sm_dev, 0x63);
+	byte &= ~0x7;
+	byte |= 0x0; /* INTA:0x0 - INTH:0x7 */
+	pci_write_config8(sm_dev, 0x63, byte);
 
-	/* Set routing pin */
-	pci_write_config32(dev, 0xf8, 0x0);
-	pci_write_config8(dev, 0xfc, 0xAA);
-	/* Set INTA */
-	pci_write_config8(dev, 0x63, 0x0);
-	/* Enable azalia, disable ac97 */
-	pm_iowrite(0x59, 0xB);
+	/* Program the 2C to 0x437b1002 */
+	dword = 0x437b1002;
+	pci_write_config32(dev, 0x2c, dword);
 
+	/* Read in BAR */
+	/* Is this right? HDA allows for a 64-bit BAR 
+	 * but this is only setup for a 32-bit one 
+	 */
 	res = find_resource(dev, 0x10);
 	if (!res)
 		return;




From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb  5 03:38:48 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 05 Feb 2009 03:38:48 +0100
Subject: [coreboot] SB600 HDA can't find codec fix
In-Reply-To: <60778.9846.qm@web57006.mail.re3.yahoo.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD95E@sbjgexmb1.amd.com>	<49891781.9080408@gmx.net>
	<60778.9846.qm@web57006.mail.re3.yahoo.com>
Message-ID: <498A5138.8090903@gmx.net>

On 04.02.2009 09:01, Dan Lykowski wrote:
> Its OK, I'm flexible. Do whatever everyone decides is right, I just need to move on to other things.
>   

Thanks, committed in r3930.

Two problems remain:
- Using dev_find_device instead of dev_find_slot causes a hang during
PCI init.
- I get unexpected warnings from the coreboot HDA code:
PCI: 00:14.2 init
base = fc400000
No codec!
codec_mask = 01
codec viddid: 10ec0883
Dev=PCI: 00:14.2
Default viddid=10ec0882
Reading viddid=10ec0883
No verb!
PCI: 00:14.3 init

Linux says something similar: "Intel 0000:00:14.2: PCI INT A -> GSI 16
(level, low) -> IRQ 16".

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From peter at stuge.se  Thu Feb  5 04:05:32 2009
From: peter at stuge.se (Peter Stuge)
Date: Thu, 5 Feb 2009 04:05:32 +0100
Subject: [coreboot] msrtool CS5536 interrupt and DIVIL LBAR MSRs
In-Reply-To: <57947bf80902030730s224c781al99fcff636bfa8385@mail.gmail.com>
References: <20090126041442.14272.qmail@stuge.se>
	<20090130161642.9391.qmail@stuge.se>
	<57947bf80902030730s224c781al99fcff636bfa8385@mail.gmail.com>
Message-ID: <20090205030532.10721.qmail@stuge.se>

Tom Sylla wrote:
> +	{ 0x51400008, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_IRQ", "Local BAR
> - IRQ Mapper", {
> +		{ 63, 15, RESERVED },
> +		{ 48, 1, RESERVED },
> 
> I'm sure there is some reason, but why isn't this just
> "{ 63, 16, RESERVED }," ?

It does not matter to msrtool at the moment. I made it two separate
fields primarily because they are separate in the data book. In the
future maybe msrtool will also be writing to MSRs, in which case it
becomes more important because the latter is always write 0, but
again there's no way to express that in msrtool right now. Maybe
fields for that should be added sooner rather than later?


> +		{ 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
> 
> The masks are probably most readable as hex, especially to match the
> display type of the BAR.

Could certainly change that. I like them different because they have
a different length than the base address, and I find binary easier
than hex for masks. A habit I guess.


> +	{ 0x51400009, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_KEL", "Local BAR
> - KEL from USB OHC Host Controller", {
> 
> Copied directly from the spec, but just "Local BAR - KEL from USB OHC"
> wouldn't propagate RAS Syndrome.

Thank you!


> +	{ 0x51400020, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_LOW", "IRQ Mapper
> Unrestricted Y Select Low", {
> +		{ 63, 32, RESERVED },
> +		{ 31, 4, "MAP_Y7", "Map Unrestricted Y Input 7", PRESENT_BIN, {
> 
> HEX is maybe more readable for all of these selects?

I used binary because the bitdefs are listed that way in the data
book. All selects have full bitdef text descriptions and they have
the number in decimal, so I think it should be ok.


> +		{ 0, 1, "IG8_STS_PRIM", "Primary Input 8", PRESENT_BIN, {
> +			{ MSR1(0), "No interrupt." },
> +			{ MSR1(1), "Interrupt status." },
> 
> Like Myles said, "Interrupt set" or maybe "Interrupt requested" for
> value '1'

I like set over requested, but status over set. Maybe signal active
or simply condition or signalled?


//Peter



From Maggie.Li at amd.com  Thu Feb  5 04:20:12 2009
From: Maggie.Li at amd.com (Li, Maggie)
Date: Thu, 5 Feb 2009 11:20:12 +0800
Subject: [coreboot] [PATCH] Fix and clean up DBM690T/Pistachio DSDT
In-Reply-To: <4988F26F.6050709@gmx.net>
Message-ID: <DD1CC71B621B004FA76856E5129D6B17025ADB7D@sbjgexmb1.amd.com>

Carl, 

The patch has been tested on dbm690t and pistachio. It works.

About the thermal, dbm690t uses adt7461, while pistachio uses adt7475. So, their THOT and TCRT are different. You can get details from their spec.

Best regards
Maggie li

-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
Sent: Wednesday, February 04, 2009 9:42 AM
To: Coreboot
Cc: Bao, Zheng; Li, Maggie
Subject: [coreboot] [PATCH] Fix and clean up DBM690T/Pistachio DSDT

The DBM690T/Pistachio DSDT has some issues in the memory management code:
- TOM is hardcoded to a fixed value and not updated.
- TOM2 is hardcoded as well.
- The TOM2!=0 case is commented out.

Fixes in this patch:
- Rename TOM to TOM1 and refer to the SSDT value with an External(TOM1)
clause.
- An ITE87427 Super I/O does not exist. Use the real name (IT8712F) of
the chip on the DBM690T board.
- Use decimal values for KELV, THOT and TCRT on the Pistachio board for
better readability.

Remaining questions/problems:
- The TOM2 hardcode can't be fixed until the generic K8/Fam10 SSDT
contains TOM2.
- I don't understand how the TOM2!=0 case is supposed to work and simply
uncommenting the code causes the IASL compiler to complain about
truncation of 64 bit values to 32 bit. Can we simply always store the
BIOS data at the top of TOM1? That would eliminate some code.
- Why does the DBM690T have THOT=80?C, TCRT=85?C and Pistachio have 10
Kelvin more (THOT=90?C, TCRT=95?C)?

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl
===================================================================
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl	(Revision 3929)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl	(Arbeitskopie)
@@ -30,8 +30,8 @@
 	/* Include ("debug.asl") */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
+	/* FIXME this is still missing! */
 	/* Memory related values */
-	Name(TOM, 0x40000000)/* Top of RAM memory below 4GB */
 	Name(TOM2, 0x0)	/* Top of RAM memory above 4GB (>> 16) */
 	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
 	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
@@ -1171,6 +1171,7 @@
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
 		Device(PCI0) {
+			External (TOM1)
 			Name(_HID, EISAID("PNP0A03"))
 			Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
 			Method(_BBN, 0) { /* Bus number = 0 */
@@ -1433,7 +1434,7 @@
 				Name(_ADR, 0x00140006)
 			} /* end Ac97modem */
 
-			/* ITE87427 Support */
+			/* ITE IT8712F Support */
 			OperationRegion (IOID, SystemIO, 0x2E, 0x02)	/* sometimes it is 0x4E */
 				Field (IOID, ByteAcc, NoLock, Preserve)
 				{
@@ -1457,15 +1458,15 @@
 				APC4,	8	/* APC/PME Control Register 2 */
 			}
 
-			/* Enter the 87427 MB PnP Mode */
+			/* Enter the IT8712F MB PnP Mode */
 			Method (EPNP)
 			{
 				Store(0x87, SIOI)
 				Store(0x01, SIOI)
 				Store(0x55, SIOI)
-				Store(0x55, SIOI) /* 87427 magic number */
+				Store(0x55, SIOI) /* IT8712F magic number */
 			}
-			/* Exit the 87427 MB PnP Mode */
+			/* Exit the IT8712F MB PnP Mode */
 			Method (XPNP)
 			{
 				Store (0x02, SIOI)
@@ -1482,7 +1483,7 @@
 				If (LLess (Arg0, 0x05))
 				{
 					EPNP()
-					/* DBGO("87427F\n") */
+					/* DBGO("IT8712F\n") */
 
 					Store (0x4, LDN)
 					Store (One, ACTR)  /* Enable EC */
@@ -1593,7 +1594,7 @@
 				}
 
 				/* Set size of memory from 1MB to TopMem */
-				Subtract(TOM, 0x100000, DMLL)
+				Subtract(TOM1, 0x100000, DMLL)
 
 				/*
 				* If(LNotEqual(TOM2, 0x00000000)){
Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl
===================================================================
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl	(Revision 3929)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/acpi/dsdt.asl	(Arbeitskopie)
@@ -30,8 +30,8 @@
 	/* Include ("debug.asl") */		/* Include global debug methods if needed */
 
 	/* Data to be patched by the BIOS during POST */
+	/* FIXME this is still missing! */
 	/* Memory related values */
-	Name(TOM, 0x40000000)/* Top of RAM memory below 4GB */
 	Name(TOM2, 0x0)	/* Top of RAM memory above 4GB (>> 16) */
 	Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
 	Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
@@ -1170,6 +1170,7 @@
 		/*  _SB.PCI0 */
 		/* Note: Only need HID on Primary Bus */
 		Device(PCI0) {
+			External (TOM1)
 			Name(_HID, EISAID("PNP0A03"))
 			Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
 			Method(_BBN, 0) { /* Bus number = 0 */
@@ -1516,7 +1517,7 @@
 				}
 
 				/* Set size of memory from 1MB to TopMem */
-				Subtract(TOM, 0x100000, DMLL)
+				Subtract(TOM1, 0x100000, DMLL)
 
 				/*
 				* If(LNotEqual(TOM2, 0x00000000)){
@@ -1676,9 +1677,9 @@
 
 	/* THERMAL */
 	Scope(\_TZ) {
-		Name (KELV, 0x0AAC)
-		Name (THOT, 0x0384)
-		Name (TCRT, 0x03B6)
+		Name (KELV, 2732)
+		Name (THOT, 900)
+		Name (TCRT, 950)
 
 		ThermalZone(TZ00) {
 			Method(_AC0,0) {	/* Active Cooling 0 (0=highest fan speed) */
@@ -1759,4 +1760,3 @@
 	}
 }
 /* End of ASL file */
-


-- 
http://www.hailfinger.org/


From JasonZhao at viatech.com.cn  Thu Feb  5 04:33:02 2009
From: JasonZhao at viatech.com.cn (JasonZhao at viatech.com.cn)
Date: Thu, 5 Feb 2009 11:33:02 +0800
Subject: [coreboot] FW: Two test result(linux+2G-RAM>10minutes and install
	ubuntu8.10) of vx800 patch
Message-ID: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>

My VX800 bug of "boot linux with 2G mem >10 minutes" has been proved to
be the problem of MTRR setting.  Thanks for Carldani, Rudolf and Bari.
1 The root cause is:
1) The free memory I report to coreboot through ram_resource is [0,
1983M=2G-64M(Framebuffer)-1M(TOP 1M SM Memory)].  If I report [0,
1984M=2G-64M(Framebuffer)], then all is OK.
2) The src/cpu/x86/mtrr.c setting result of [0,1983M] is: 
reg00: base=0x00000000 (   0MB), size=1024MB: write-back, count=1
reg01: base=0x40000000 (1024MB), size= 512MB: write-back, count=1
reg02: base=0x60000000 (1536MB), size= 256MB: write-back, count=1
reg03: base=0x70000000 (1792MB), size= 128MB: write-back, count=1
reg04: base=0x78000000 (1920MB), size=  32MB: write-back, count=1
reg05: base=0x7a000000 (1952MB), size=  16MB: write-back, count=1
reg06: base=0x7b000000 (1968MB), size=   8MB: write-back, count=1
reg07: base=0x7b800000 (1976MB), size=   4MB: write-back, count=1
This setting make the last 3MB is uncached due to the lack of MTRR
registers. And It seems that the last 3MB is frequently used by linux
with kernel before(2.6.25.19), so the OS become slow.  However XP and
the linux with newest kernel (2.6.26.6-49.fc8) are not disturbed by the
uncache of last 3MB.

The mtrr.c setting of [0,1984M] is: 
reg00: base=0x00000000 (   0MB), size=1024MB: write-back, count=1
reg01: base=0x40000000 (1024MB), size= 512MB: write-back, count=1
reg02: base=0x60000000 (1536MB), size= 256MB: write-back, count=1
reg03: base=0x70000000 (1792MB), size= 128MB: write-back, count=1
reg04: base=0x78000000 (1920MB), size=  64MB: write-back, count=1
all of memory area is cached, and all OS run at a good speed.




2 So we need improve mtrr.c to make it can treat with such
input[0,1983M].
The legacybios handle my [0,1983] like this 
 Cache [0,2048M]
 Unchace [1983M, 1984M] size=1M
 Uncache  [1984M,2048M] size =64M.
I guess the legacybios compare the number of '1' and '0' in 1983 to
decide how to use minimum number of MTRR.

Carldaniel, you said on irc that mtrr.c also have the ability like
legacybios(cache 2G,then uncache some area of 2G). But I didn't find any
logic like that in mtrr.c. 

3 And Stefan, your cx700 code will meet the same problem. Since the
cx700's northbridge.c report the memory size in the same way of
[0,xxxx-1M(TOP 1M SM Memory)].  The last 1M will also confuse the
mtrr.c.


-jasonzhao 

-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
Sent: Saturday, January 24, 2009 7:53 PM
To: Jason Zhao
Cc: r.marek at assembler.cz
Subject: Re: [coreboot] Two test result(linux+2G-RAM>10minutes and
install ubuntu8.10) of vx800 patch

Hi Jason,

thanks for the dumps.

On 24.01.2009 08:08, JasonZhao at viatech.com.cn wrote:
> Carl and ruik:
> Here is some more result of acpidump, /proc/mtrr and /proc/meminfo.
> Some explanation of my memory using in coreboot:
> [topmem-64,tompmem] as framebuffer, 
> [topmem-64M-64k,topmem-64M] as coreboot-table (In
> tables.c:rom_table_start = (*mem_top) - 64*1024;).
>   

It is a bit strange that the DSDTs are identical for both memory
configurations. The following parts of the code are suspicious:
>             Method (_CRS, 0, NotSerialized)
>             {
>                 Name (BUF0, ResourceTemplate ()
>                 {
> [...]
>                     DWordMemory (ResourceProducer, PosDecode,
> MinFixed, MaxFixed, Cacheable, ReadWrite,
>                         0x00000000,         // Granularity
>                         0x80000000,         // Range Minimum
>                         0xBFFFFFFF,         // Range Maximum
>                         0x00000000,         // Translation Offset
>                         0x40000000,         // Length
>                         ,, _Y00, AddressRangeMemory, TypeStatic)
>                 })

That address range is always the same, even if you only have 512M
memory. Why? Will it cause problems if you have 3G memory?

And our MTRR setup is incomplete for the 2G case. The last 4 MB are
uncached because we run out of MTRR registers. That will cause an
extreme slowdown during boot.

I think the MTRR setup explains almost everything.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From blink at nm.ru  Thu Feb  5 10:43:05 2009
From: blink at nm.ru (blink at nm.ru)
Date: Thu, 05 Feb 2009 12:43:05 +0300
Subject: [coreboot]
	=?utf-8?q?flashrom_doesn=27t_work_on_asus_=09_P5K-E_wi?=
	=?utf-8?q?fi=2C_ICH9-R?=
In-Reply-To: <12338265084321.1784999684.blink@nm.ru>
References: <20090205012703.15980.qmail@stuge.se>
Message-ID: <12338269855072.558129970.blink@nm.ru>

Hi Peter!

It's my flashrom -E -V log:

Calibrating delay loop... 759M loops per second, 100 myus = 199 us. OK.
No coreboot table found.
Found chipset "Intel ICH9R", enabling flash write... 
BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1

Root Complex Register Block address = 0xfed1c000
GCS = 0x1464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x2008 (HSFS)
FLOCKDN 0, FDV 0, FDOPSS 1, SCIP 0, BERASE 1, AEL 0, FCERR 0, FDONE 0
0x50: 0x00000202 (FRAP)
BMWAG 0, BMRAG 0, BRWA 2, BRRA 2
0x54: 0x00001fff (FREG0)
0x58: 0x00001fff (FREG1)
0x5C: 0x00001fff (FREG2)
0x60: 0x00001fff (FREG3)
0x64: 0x00001fff (FREG4)
0x74: 0x00000000 (PR0)
0x78: 0x00000000 (PR1)
0x7C: 0x00000000 (PR2)
0x80: 0x00000000 (PR3)
0x84: 0x00000000 (PR4)
0x90: 0x007f1004 (SSFS, SSFC)
0x94: 0x0006     (PREOP)
0x96: 0x463b     (OPTYPE)
0x98: 0x05d80302 (OPMENU)
0x9C: 0xc79f01ab (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xB0: 0x00000000 (FDOC)
Programming OPCODES... 
program_opcodes: preop=0006 optype=463b opmenu=05d80302c79f01ab
done
SPI Read Configuration: prefetching disabled, caching enabled, OK.
Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0x41, id2 0x53
Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff
Probing for AMD Am29F080B, 1024 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation
Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff
Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff
Probing for ASD AE49F2008, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for Atmel AT25DF021, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25DF041A, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25DF081, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25DF161, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25DF321, 4096 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25DF321A, 4096 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25DF641, 8192 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25F512B, 64 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25FS010, 128 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT25FS040, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT26DF041, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT26DF081A, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT26DF161, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT26DF161A, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT26F004, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation
Probing for Atmel AT45CS1282, 16896 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB011D, 128 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB021D, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB041D, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB081D, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB161D, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB321C, 4224 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB321D, 4096 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT45DB642D, 8192 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Atmel AT49F002(N), 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for AMIC A25L40P, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0x74, id2 0xbb
Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0x74, id2 0xbb
Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff
Probing for AMIC A49LF040A, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation
Probing for EMST F49B002UA, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for Fujitsu MBM29F004BC, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation
Probing for Fujitsu MBM29F004TC, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation
Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for Macronix MX25L512, 64 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX25L1005, 128 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX25L2005, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX25L4005, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX25L8005, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX25L1605, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX25L3205, 4096 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX25L6405, 8192 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0x74, id2 0xbb
Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0x74, id2 0xbb
Probing for Macronix MX29LV040C, 512 KB: probe_29f002: id1 0xff, id2 0xff
Probing for Numonyx M25PE10, 128 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Numonyx M25PE20, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Numonyx M25PE40, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Numonyx M25PE80, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Numonyx M25PE16, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC Pm25LV010, 128 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC Pm25LV016B, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC Pm25LV020, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC Pm25LV040, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC Pm25LV080B, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC Pm25LV512, 64 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC Pm49FL002, 256 KB: probe_jedec: id1 0x74, id2 0xbb, id1 parity violation
Probing for PMC Pm49FL004, 512 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation
Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff
Probing for Spansion S25FL016A, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for SST SST25VF016B, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Chip status register is 1c
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is set
Chip status register: Bit 3 / Block Protect 1 (BP1) is set
Chip status register: Bit 2 / Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Resulting block protection : all
Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for SST SST25VF040B, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for SST SST25VF040B.REMS, 512 KB: Invalid OPCODE 0x90
Probing for SST SST25VF080B, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0x41, id2 0x53
Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST29EE020A, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF002A/B, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF003A/B, 384 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF004A/B, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0x41, id2 0x53
Probing for SST SST49LF008A, 1024 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0x41, id2 0x53
Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0x41, id2 0x53
Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF040B, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF080A, 1024 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0x41, id2 0x53
Probing for ST M25P05-A, 64 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P10-A, 128 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P20, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P40, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P40-old, 512 KB: RDID returned bf 25 41.
Probing for ST M25P80, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P16, 2048 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P32, 4096 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P64, 8192 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P128, 16384 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M29F002B, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for ST M29F002T/NT, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0x41, id2 0x53
Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0x41, id2 0x55
Probing for ST M29W010B, 128 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for ST M29W040B, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0x41, id2 0x53
Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0x41, id2 0x53
Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0x41, id2 0x53
Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0x41, id2 0x53
Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x41, id2 0x53
Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0x41, id2 0x53
Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x41, id2 0x53
Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0x41, id2 0x53
Probing for ST M50LPW116, 2048 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SyncMOS S29C31004T, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SyncMOS S29C51001T, 128 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SyncMOS S29C51002T, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for SyncMOS S29C51004T, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W25x10, 128 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Winbond W25x20, 256 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Winbond W25x40, 512 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Winbond W25x80, 1024 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Winbond W29C011, 128 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W29EE011, 128 KB: 
===
  Probing disabled for Winbond W29EE011 because the probing sequence puts the
  AMIC A49LF040A in a funky state.
  Use 'flashrom -c W29EE011' if you have a board with this chip.
===
Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W49F002U, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W49V002FA, 256 KB: probe_jedec: id1 0x41, id2 0x53, id1 parity violation
Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: vid 0x41, did 0x53
Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: vid 0x41, did 0x53
Probing for Atmel unknown Atmel SPI chip, 0 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for EON unknown EON SPI chip, 0 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Macronix unknown Macronix SPI chip, 0 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC unknown PMC SPI chip, 0 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for SST unknown SST SPI chip, 0 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST unknown ST SPI chip, 0 KB: RDID returned bf 25 41.
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Erasing flash chip... Some block protection in effect, disabling
Invalid OPCODE 0x50
spi_write_status_enable failed
spi_disable_blockprotect failed
ich_spi_read_page: offset=0, number=256, buf=0xb76bd008
ich_spi_read_page: offset=256, number=256, buf=0xb76bd108
ich_spi_read_page: offset=512, number=256, buf=0xb76bd208
ich_spi_read_page: offset=768, number=256, buf=0xb76bd308
ich_spi_read_page: offset=1024, number=256, buf=0xb76bd408
ich_spi_read_page: offset=1280, number=256, buf=0xb76bd508
ich_spi_read_page: offset=1536, number=256, buf=0xb76bd608
ich_spi_read_page: offset=1792, number=256, buf=0xb76bd708
ich_spi_read_page: offset=2048, number=256, buf=0xb76bd808
ich_spi_read_page: offset=2304, number=256, buf=0xb76bd908
ich_spi_read_page: offset=2560, number=256, buf=0xb76bda08
ich_spi_read_page: offset=2816, number=256, buf=0xb76bdb08
ich_spi_read_page: offset=3072, number=256, buf=0xb76bdc08
ich_spi_read_page: offset=3328, number=256, buf=0xb76bdd08
ich_spi_read_page: offset=3584, number=256, buf=0xb76bde08
ich_spi_read_page: offset=3840, number=256, buf=0xb76bdf08
ich_spi_read_page: offset=4096, number=256, buf=0xb76be008
ich_spi_read_page: offset=4352, number=256, buf=0xb76be108
ich_spi_read_page: offset=4608, number=256, buf=0xb76be208
ich_spi_read_page: offset=4864, number=256, buf=0xb76be308
ich_spi_read_page: offset=5120, number=256, buf=0xb76be408
ich_spi_read_page: offset=5376, number=256, buf=0xb76be508
ich_spi_read_page: offset=5632, number=256, buf=0xb76be608
ich_spi_read_page: offset=5888, number=256, buf=0xb76be708
ich_spi_read_page: offset=6144, number=256, buf=0xb76be808
ich_spi_read_page: offset=6400, number=256, buf=0xb76be908
ich_spi_read_page: offset=6656, number=256, buf=0xb76bea08
ich_spi_read_page: offset=6912, number=256, buf=0xb76beb08
ich_spi_read_page: offset=7168, number=256, buf=0xb76bec08
ich_spi_read_page: offset=7424, number=256, buf=0xb76bed08
ich_spi_read_page: offset=7680, number=256, buf=0xb76bee08
ich_spi_read_page: offset=7936, number=256, buf=0xb76bef08
ich_spi_read_page: offset=8192, number=256, buf=0xb76bf008
ich_spi_read_page: offset=8448, number=256, buf=0xb76bf108
ich_spi_read_page: offset=8704, number=256, buf=0xb76bf208
ich_spi_read_page: offset=8960, number=256, buf=0xb76bf308
ich_spi_read_page: offset=9216, number=256, buf=0xb76bf408
ich_spi_read_page: offset=9472, number=256, buf=0xb76bf508
ich_spi_read_page: offset=9728, number=256, buf=0xb76bf608
ich_spi_read_page: offset=9984, number=256, buf=0xb76bf708
ich_spi_read_page: offset=10240, number=256, buf=0xb76bf808
ich_spi_read_page: offset=10496, number=256, buf=0xb76bf908
ich_spi_read_page: offset=10752, number=256, buf=0xb76bfa08
ich_spi_read_page: offset=11008, number=256, buf=0xb76bfb08
ich_spi_read_page: offset=11264, number=256, buf=0xb76bfc08
ich_spi_read_page: offset=11520, number=256, buf=0xb76bfd08
ich_spi_read_page: offset=11776, number=256, buf=0xb76bfe08
ich_spi_read_page: offset=12032, number=256, buf=0xb76bff08
ich_spi_read_page: offset=12288, number=256, buf=0xb76c0008
ich_spi_read_page: offset=12544, number=256, buf=0xb76c0108
ich_spi_read_page: offset=12800, number=256, buf=0xb76c0208
ich_spi_read_page: offset=13056, number=256, buf=0xb76c0308
ich_spi_read_page: offset=13312, number=256, buf=0xb76c0408
ich_spi_read_page: offset=13568, number=256, buf=0xb76c0508
ich_spi_read_page: offset=13824, number=256, buf=0xb76c0608
ich_spi_read_page: offset=14080, number=256, buf=0xb76c0708
ich_spi_read_page: offset=14336, number=256, buf=0xb76c0808
ich_spi_read_page: offset=14592, number=256, buf=0xb76c0908
ich_spi_read_page: offset=14848, number=256, buf=0xb76c0a08
ich_spi_read_page: offset=15104, number=256, buf=0xb76c0b08
ich_spi_read_page: offset=15360, number=256, buf=0xb76c0c08
ich_spi_read_page: offset=15616, number=256, buf=0xb76c0d08
ich_spi_read_page: offset=15872, number=256, buf=0xb76c0e08
ich_spi_read_page: offset=16128, number=256, buf=0xb76c0f08
ich_spi_read_page: offset=16384, number=256, buf=0xb76c1008
ich_spi_read_page: offset=16640, number=256, buf=0xb76c1108
ich_spi_read_page: offset=16896, number=256, buf=0xb76c1208
ich_spi_read_page: offset=17152, number=256, buf=0xb76c1308
ich_spi_read_page: offset=17408, number=256, buf=0xb76c1408
ich_spi_read_page: offset=17664, number=256, buf=0xb76c1508
ich_spi_read_page: offset=17920, number=256, buf=0xb76c1608
ich_spi_read_page: offset=18176, number=256, buf=0xb76c1708
ich_spi_read_page: offset=18432, number=256, buf=0xb76c1808
ich_spi_read_page: offset=18688, number=256, buf=0xb76c1908
ich_spi_read_page: offset=18944, number=256, buf=0xb76c1a08
ich_spi_read_page: offset=19200, number=256, buf=0xb76c1b08
ich_spi_read_page: offset=19456, number=256, buf=0xb76c1c08
ich_spi_read_page: offset=19712, number=256, buf=0xb76c1d08
ich_spi_read_page: offset=19968, number=256, buf=0xb76c1e08
ich_spi_read_page: offset=20224, number=256, buf=0xb76c1f08
ich_spi_read_page: offset=20480, number=256, buf=0xb76c2008
ich_spi_read_page: offset=20736, number=256, buf=0xb76c2108
ich_spi_read_page: offset=20992, number=256, buf=0xb76c2208
ich_spi_read_page: offset=21248, number=256, buf=0xb76c2308
ich_spi_read_page: offset=21504, number=256, buf=0xb76c2408
ich_spi_read_page: offset=21760, number=256, buf=0xb76c2508
ich_spi_read_page: offset=22016, number=256, buf=0xb76c2608
ich_spi_read_page: offset=22272, number=256, buf=0xb76c2708
ich_spi_read_page: offset=22528, number=256, buf=0xb76c2808
ich_spi_read_page: offset=22784, number=256, buf=0xb76c2908
ich_spi_read_page: offset=23040, number=256, buf=0xb76c2a08
ich_spi_read_page: offset=23296, number=256, buf=0xb76c2b08
ich_spi_read_page: offset=23552, number=256, buf=0xb76c2c08
ich_spi_read_page: offset=23808, number=256, buf=0xb76c2d08
ich_spi_read_page: offset=24064, number=256, buf=0xb76c2e08
ich_spi_read_page: offset=24320, number=256, buf=0xb76c2f08
ich_spi_read_page: offset=24576, number=256, buf=0xb76c3008
ich_spi_read_page: offset=24832, number=256, buf=0xb76c3108
ich_spi_read_page: offset=25088, number=256, buf=0xb76c3208
ich_spi_read_page: offset=25344, number=256, buf=0xb76c3308
ich_spi_read_page: offset=25600, number=256, buf=0xb76c3408
ich_spi_read_page: offset=25856, number=256, buf=0xb76c3508
ich_spi_read_page: offset=26112, number=256, buf=0xb76c3608
ich_spi_read_page: offset=26368, number=256, buf=0xb76c3708
ich_spi_read_page: offset=26624, number=256, buf=0xb76c3808
ich_spi_read_page: offset=26880, number=256, buf=0xb76c3908
ich_spi_read_page: offset=27136, number=256, buf=0xb76c3a08
ich_spi_read_page: offset=27392, number=256, buf=0xb76c3b08
ich_spi_read_page: offset=27648, number=256, buf=0xb76c3c08
ich_spi_read_page: offset=27904, number=256, buf=0xb76c3d08
ich_spi_read_page: offset=28160, number=256, buf=0xb76c3e08
ich_spi_read_page: offset=28416, number=256, buf=0xb76c3f08
ich_spi_read_page: offset=28672, number=256, buf=0xb76c4008
ich_spi_read_page: offset=28928, number=256, buf=0xb76c4108
ich_spi_read_page: offset=29184, number=256, buf=0xb76c4208
ich_spi_read_page: offset=29440, number=256, buf=0xb76c4308
ich_spi_read_page: offset=29696, number=256, buf=0xb76c4408
ich_spi_read_page: offset=29952, number=256, buf=0xb76c4508
ich_spi_read_page: offset=30208, number=256, buf=0xb76c4608
ich_spi_read_page: offset=30464, number=256, buf=0xb76c4708
ich_spi_read_page: offset=30720, number=256, buf=0xb76c4808
ich_spi_read_page: offset=30976, number=256, buf=0xb76c4908
ich_spi_read_page: offset=31232, number=256, buf=0xb76c4a08
ich_spi_read_page: offset=31488, number=256, buf=0xb76c4b08
ich_spi_read_page: offset=31744, number=256, buf=0xb76c4c08
ich_spi_read_page: offset=32000, number=256, buf=0xb76c4d08
ich_spi_read_page: offset=32256, number=256, buf=0xb76c4e08
ich_spi_read_page: offset=32512, number=256, buf=0xb76c4f08
ich_spi_read_page: offset=32768, number=256, buf=0xb76c5008
ich_spi_read_page: offset=33024, number=256, buf=0xb76c5108
ich_spi_read_page: offset=33280, number=256, buf=0xb76c5208
ich_spi_read_page: offset=33536, number=256, buf=0xb76c5308
ich_spi_read_page: offset=33792, number=256, buf=0xb76c5408
ich_spi_read_page: offset=34048, number=256, buf=0xb76c5508
ich_spi_read_page: offset=34304, number=256, buf=0xb76c5608
ich_spi_read_page: offset=34560, number=256, buf=0xb76c5708
ich_spi_read_page: offset=34816, number=256, buf=0xb76c5808
ich_spi_read_page: offset=35072, number=256, buf=0xb76c5908
ich_spi_read_page: offset=35328, number=256, buf=0xb76c5a08
ich_spi_read_page: offset=35584, number=256, buf=0xb76c5b08
ich_spi_read_page: offset=35840, number=256, buf=0xb76c5c08
ich_spi_read_page: offset=36096, number=256, buf=0xb76c5d08
ich_spi_read_page: offset=36352, number=256, buf=0xb76c5e08
ich_spi_read_page: offset=36608, number=256, buf=0xb76c5f08
ich_spi_read_page: offset=36864, number=256, buf=0xb76c6008
ich_spi_read_page: offset=37120, number=256, buf=0xb76c6108
ich_spi_read_page: offset=37376, number=256, buf=0xb76c6208
ich_spi_read_page: offset=37632, number=256, buf=0xb76c6308
ich_spi_read_page: offset=37888, number=256, buf=0xb76c6408
ich_spi_read_page: offset=38144, number=256, buf=0xb76c6508
ich_spi_read_page: offset=38400, number=256, buf=0xb76c6608
ich_spi_read_page: offset=38656, number=256, buf=0xb76c6708
ich_spi_read_page: offset=38912, number=256, buf=0xb76c6808
ich_spi_read_page: offset=39168, number=256, buf=0xb76c6908
ich_spi_read_page: offset=39424, number=256, buf=0xb76c6a08
ich_spi_read_page: offset=39680, number=256, buf=0xb76c6b08
ich_spi_read_page: offset=39936, number=256, buf=0xb76c6c08
ich_spi_read_page: offset=40192, number=256, buf=0xb76c6d08
ich_spi_read_page: offset=40448, number=256, buf=0xb76c6e08
ich_spi_read_page: offset=40704, number=256, buf=0xb76c6f08
ich_spi_read_page: offset=40960, number=256, buf=0xb76c7008
ich_spi_read_page: offset=41216, number=256, buf=0xb76c7108
ich_spi_read_page: offset=41472, number=256, buf=0xb76c7208
ich_spi_read_page: offset=41728, number=256, buf=0xb76c7308
ich_spi_read_page: offset=41984, number=256, buf=0xb76c7408
ich_spi_read_page: offset=42240, number=256, buf=0xb76c7508
ich_spi_read_page: offset=42496, number=256, buf=0xb76c7608
ich_spi_read_page: offset=42752, number=256, buf=0xb76c7708
ich_spi_read_page: offset=43008, number=256, buf=0xb76c7808
ich_spi_read_page: offset=43264, number=256, buf=0xb76c7908
ich_spi_read_page: offset=43520, number=256, buf=0xb76c7a08
ich_spi_read_page: offset=43776, number=256, buf=0xb76c7b08
ich_spi_read_page: offset=44032, number=256, buf=0xb76c7c08
ich_spi_read_page: offset=44288, number=256, buf=0xb76c7d08
ich_spi_read_page: offset=44544, number=256, buf=0xb76c7e08
ich_spi_read_page: offset=44800, number=256, buf=0xb76c7f08
ich_spi_read_page: offset=45056, number=256, buf=0xb76c8008
ich_spi_read_page: offset=45312, number=256, buf=0xb76c8108
ich_spi_read_page: offset=45568, number=256, buf=0xb76c8208
ich_spi_read_page: offset=45824, number=256, buf=0xb76c8308
ich_spi_read_page: offset=46080, number=256, buf=0xb76c8408
ich_spi_read_page: offset=46336, number=256, buf=0xb76c8508
ich_spi_read_page: offset=46592, number=256, buf=0xb76c8608
ich_spi_read_page: offset=46848, number=256, buf=0xb76c8708
ich_spi_read_page: offset=47104, number=256, buf=0xb76c8808
ich_spi_read_page: offset=47360, number=256, buf=0xb76c8908
ich_spi_read_page: offset=47616, number=256, buf=0xb76c8a08
ich_spi_read_page: offset=47872, number=256, buf=0xb76c8b08
ich_spi_read_page: offset=48128, number=256, buf=0xb76c8c08
ich_spi_read_page: offset=48384, number=256, buf=0xb76c8d08
ich_spi_read_page: offset=48640, number=256, buf=0xb76c8e08
ich_spi_read_page: offset=48896, number=256, buf=0xb76c8f08
ich_spi_read_page: offset=49152, number=256, buf=0xb76c9008
ich_spi_read_page: offset=49408, number=256, buf=0xb76c9108
ich_spi_read_page: offset=49664, number=256, buf=0xb76c9208
ich_spi_read_page: offset=49920, number=256, buf=0xb76c9308
ich_spi_read_page: offset=50176, number=256, buf=0xb76c9408
ich_spi_read_page: offset=50432, number=256, buf=0xb76c9508
ich_spi_read_page: offset=50688, number=256, buf=0xb76c9608
ich_spi_read_page: offset=50944, number=256, buf=0xb76c9708
ich_spi_read_page: offset=51200, number=256, buf=0xb76c9808
ich_spi_read_page: offset=51456, number=256, buf=0xb76c9908
ich_spi_read_page: offset=51712, number=256, buf=0xb76c9a08
ich_spi_read_page: offset=51968, number=256, buf=0xb76c9b08
ich_spi_read_page: offset=52224, number=256, buf=0xb76c9c08
ich_spi_read_page: offset=52480, number=256, buf=0xb76c9d08
ich_spi_read_page: offset=52736, number=256, buf=0xb76c9e08
ich_spi_read_page: offset=52992, number=256, buf=0xb76c9f08
ich_spi_read_page: offset=53248, number=256, buf=0xb76ca008
ich_spi_read_page: offset=53504, number=256, buf=0xb76ca108
ich_spi_read_page: offset=53760, number=256, buf=0xb76ca208
ich_spi_read_page: offset=54016, number=256, buf=0xb76ca308
ich_spi_read_page: offset=54272, number=256, buf=0xb76ca408
ich_spi_read_page: offset=54528, number=256, buf=0xb76ca508
ich_spi_read_page: offset=54784, number=256, buf=0xb76ca608
ich_spi_read_page: offset=55040, number=256, buf=0xb76ca708
ich_spi_read_page: offset=55296, number=256, buf=0xb76ca808
ich_spi_read_page: offset=55552, number=256, buf=0xb76ca908
ich_spi_read_page: offset=55808, number=256, buf=0xb76caa08
ich_spi_read_page: offset=56064, number=256, buf=0xb76cab08
ich_spi_read_page: offset=56320, number=256, buf=0xb76cac08
ich_spi_read_page: offset=56576, number=256, buf=0xb76cad08
ich_spi_read_page: offset=56832, number=256, buf=0xb76cae08
ich_spi_read_page: offset=57088, number=256, buf=0xb76caf08
ich_spi_read_page: offset=57344, number=256, buf=0xb76cb008
ich_spi_read_page: offset=57600, number=256, buf=0xb76cb108
ich_spi_read_page: offset=57856, number=256, buf=0xb76cb208
ich_spi_read_page: offset=58112, number=256, buf=0xb76cb308
ich_spi_read_page: offset=58368, number=256, buf=0xb76cb408
ich_spi_read_page: offset=58624, number=256, buf=0xb76cb508
ich_spi_read_page: offset=58880, number=256, buf=0xb76cb608
ich_spi_read_page: offset=59136, number=256, buf=0xb76cb708
ich_spi_read_page: offset=59392, number=256, buf=0xb76cb808
ich_spi_read_page: offset=59648, number=256, buf=0xb76cb908
ich_spi_read_page: offset=59904, number=256, buf=0xb76cba08
ich_spi_read_page: offset=60160, number=256, buf=0xb76cbb08
ich_spi_read_page: offset=60416, number=256, buf=0xb76cbc08
ich_spi_read_page: offset=60672, number=256, buf=0xb76cbd08
ich_spi_read_page: offset=60928, number=256, buf=0xb76cbe08
ich_spi_read_page: offset=61184, number=256, buf=0xb76cbf08
ich_spi_read_page: offset=61440, number=256, buf=0xb76cc008
ich_spi_read_page: offset=61696, number=256, buf=0xb76cc108
ich_spi_read_page: offset=61952, number=256, buf=0xb76cc208
ich_spi_read_page: offset=62208, number=256, buf=0xb76cc308
ich_spi_read_page: offset=62464, number=256, buf=0xb76cc408
ich_spi_read_page: offset=62720, number=256, buf=0xb76cc508
ich_spi_read_page: offset=62976, number=256, buf=0xb76cc608
ich_spi_read_page: offset=63232, number=256, buf=0xb76cc708
ich_spi_read_page: offset=63488, number=256, buf=0xb76cc808
ich_spi_read_page: offset=63744, number=256, buf=0xb76cc908
ich_spi_read_page: offset=64000, number=256, buf=0xb76cca08
ich_spi_read_page: offset=64256, number=256, buf=0xb76ccb08
ich_spi_read_page: offset=64512, number=256, buf=0xb76ccc08
ich_spi_read_page: offset=64768, number=256, buf=0xb76ccd08
ich_spi_read_page: offset=65024, number=256, buf=0xb76cce08
ich_spi_read_page: offset=65280, number=256, buf=0xb76ccf08
ich_spi_read_page: offset=65536, number=256, buf=0xb76cd008
ich_spi_read_page: offset=65792, number=256, buf=0xb76cd108
ich_spi_read_page: offset=66048, number=256, buf=0xb76cd208
ich_spi_read_page: offset=66304, number=256, buf=0xb76cd308
ich_spi_read_page: offset=66560, number=256, buf=0xb76cd408
ich_spi_read_page: offset=66816, number=256, buf=0xb76cd508
ich_spi_read_page: offset=67072, number=256, buf=0xb76cd608
ich_spi_read_page: offset=67328, number=256, buf=0xb76cd708
ich_spi_read_page: offset=67584, number=256, buf=0xb76cd808
ich_spi_read_page: offset=67840, number=256, buf=0xb76cd908
ich_spi_read_page: offset=68096, number=256, buf=0xb76cda08
ich_spi_read_page: offset=68352, number=256, buf=0xb76cdb08
ich_spi_read_page: offset=68608, number=256, buf=0xb76cdc08
ich_spi_read_page: offset=68864, number=256, buf=0xb76cdd08
ich_spi_read_page: offset=69120, number=256, buf=0xb76cde08
ich_spi_read_page: offset=69376, number=256, buf=0xb76cdf08
ich_spi_read_page: offset=69632, number=256, buf=0xb76ce008
ich_spi_read_page: offset=69888, number=256, buf=0xb76ce108
ich_spi_read_page: offset=70144, number=256, buf=0xb76ce208
ich_spi_read_page: offset=70400, number=256, buf=0xb76ce308
ich_spi_read_page: offset=70656, number=256, buf=0xb76ce408
ich_spi_read_page: offset=70912, number=256, buf=0xb76ce508
ich_spi_read_page: offset=71168, number=256, buf=0xb76ce608
ich_spi_read_page: offset=71424, number=256, buf=0xb76ce708
ich_spi_read_page: offset=71680, number=256, buf=0xb76ce808
ich_spi_read_page: offset=71936, number=256, buf=0xb76ce908
ich_spi_read_page: offset=72192, number=256, buf=0xb76cea08
ich_spi_read_page: offset=72448, number=256, buf=0xb76ceb08
ich_spi_read_page: offset=72704, number=256, buf=0xb76cec08
ich_spi_read_page: offset=72960, number=256, buf=0xb76ced08
ich_spi_read_page: offset=73216, number=256, buf=0xb76cee08
ich_spi_read_page: offset=73472, number=256, buf=0xb76cef08
ich_spi_read_page: offset=73728, number=256, buf=0xb76cf008
ich_spi_read_page: offset=73984, number=256, buf=0xb76cf108
ich_spi_read_page: offset=74240, number=256, buf=0xb76cf208
ich_spi_read_page: offset=74496, number=256, buf=0xb76cf308
ich_spi_read_page: offset=74752, number=256, buf=0xb76cf408
ich_spi_read_page: offset=75008, number=256, buf=0xb76cf508
ich_spi_read_page: offset=75264, number=256, buf=0xb76cf608
ich_spi_read_page: offset=75520, number=256, buf=0xb76cf708
ich_spi_read_page: offset=75776, number=256, buf=0xb76cf808
ich_spi_read_page: offset=76032, number=256, buf=0xb76cf908
ich_spi_read_page: offset=76288, number=256, buf=0xb76cfa08
ich_spi_read_page: offset=76544, number=256, buf=0xb76cfb08
ich_spi_read_page: offset=76800, number=256, buf=0xb76cfc08
ich_spi_read_page: offset=77056, number=256, buf=0xb76cfd08
ich_spi_read_page: offset=77312, number=256, buf=0xb76cfe08
ich_spi_read_page: offset=77568, number=256, buf=0xb76cff08
ich_spi_read_page: offset=77824, number=256, buf=0xb76d0008
ich_spi_read_page: offset=78080, number=256, buf=0xb76d0108
ich_spi_read_page: offset=78336, number=256, buf=0xb76d0208
ich_spi_read_page: offset=78592, number=256, buf=0xb76d0308
ich_spi_read_page: offset=78848, number=256, buf=0xb76d0408
ich_spi_read_page: offset=79104, number=256, buf=0xb76d0508
ich_spi_read_page: offset=79360, number=256, buf=0xb76d0608
ich_spi_read_page: offset=79616, number=256, buf=0xb76d0708
ich_spi_read_page: offset=79872, number=256, buf=0xb76d0808
ich_spi_read_page: offset=80128, number=256, buf=0xb76d0908
ich_spi_read_page: offset=80384, number=256, buf=0xb76d0a08
ich_spi_read_page: offset=80640, number=256, buf=0xb76d0b08
ich_spi_read_page: offset=80896, number=256, buf=0xb76d0c08
ich_spi_read_page: offset=81152, number=256, buf=0xb76d0d08
ich_spi_read_page: offset=81408, number=256, buf=0xb76d0e08
ich_spi_read_page: offset=81664, number=256, buf=0xb76d0f08
ich_spi_read_page: offset=81920, number=256, buf=0xb76d1008
ich_spi_read_page: offset=82176, number=256, buf=0xb76d1108
ich_spi_read_page: offset=82432, number=256, buf=0xb76d1208
ich_spi_read_page: offset=82688, number=256, buf=0xb76d1308
ich_spi_read_page: offset=82944, number=256, buf=0xb76d1408
ich_spi_read_page: offset=83200, number=256, buf=0xb76d1508
ich_spi_read_page: offset=83456, number=256, buf=0xb76d1608
ich_spi_read_page: offset=83712, number=256, buf=0xb76d1708
ich_spi_read_page: offset=83968, number=256, buf=0xb76d1808
ich_spi_read_page: offset=84224, number=256, buf=0xb76d1908
ich_spi_read_page: offset=84480, number=256, buf=0xb76d1a08
ich_spi_read_page: offset=84736, number=256, buf=0xb76d1b08
ich_spi_read_page: offset=84992, number=256, buf=0xb76d1c08
ich_spi_read_page: offset=85248, number=256, buf=0xb76d1d08
ich_spi_read_page: offset=85504, number=256, buf=0xb76d1e08
ich_spi_read_page: offset=85760, number=256, buf=0xb76d1f08
ich_spi_read_page: offset=86016, number=256, buf=0xb76d2008
ich_spi_read_page: offset=86272, number=256, buf=0xb76d2108
ich_spi_read_page: offset=86528, number=256, buf=0xb76d2208
ich_spi_read_page: offset=86784, number=256, buf=0xb76d2308
ich_spi_read_page: offset=87040, number=256, buf=0xb76d2408
ich_spi_read_page: offset=87296, number=256, buf=0xb76d2508
ich_spi_read_page: offset=87552, number=256, buf=0xb76d2608
ich_spi_read_page: offset=87808, number=256, buf=0xb76d2708
ich_spi_read_page: offset=88064, number=256, buf=0xb76d2808
ich_spi_read_page: offset=88320, number=256, buf=0xb76d2908
ich_spi_read_page: offset=88576, number=256, buf=0xb76d2a08
ich_spi_read_page: offset=88832, number=256, buf=0xb76d2b08
ich_spi_read_page: offset=89088, number=256, buf=0xb76d2c08
ich_spi_read_page: offset=89344, number=256, buf=0xb76d2d08
ich_spi_read_page: offset=89600, number=256, buf=0xb76d2e08
ich_spi_read_page: offset=89856, number=256, buf=0xb76d2f08
ich_spi_read_page: offset=90112, number=256, buf=0xb76d3008
ich_spi_read_page: offset=90368, number=256, buf=0xb76d3108
ich_spi_read_page: offset=90624, number=256, buf=0xb76d3208
ich_spi_read_page: offset=90880, number=256, buf=0xb76d3308
ich_spi_read_page: offset=91136, number=256, buf=0xb76d3408
ich_spi_read_page: offset=91392, number=256, buf=0xb76d3508
ich_spi_read_page: offset=91648, number=256, buf=0xb76d3608
ich_spi_read_page: offset=91904, number=256, buf=0xb76d3708
ich_spi_read_page: offset=92160, number=256, buf=0xb76d3808
ich_spi_read_page: offset=92416, number=256, buf=0xb76d3908
ich_spi_read_page: offset=92672, number=256, buf=0xb76d3a08
ich_spi_read_page: offset=92928, number=256, buf=0xb76d3b08
ich_spi_read_page: offset=93184, number=256, buf=0xb76d3c08
ich_spi_read_page: offset=93440, number=256, buf=0xb76d3d08
ich_spi_read_page: offset=93696, number=256, buf=0xb76d3e08
ich_spi_read_page: offset=93952, number=256, buf=0xb76d3f08
ich_spi_read_page: offset=94208, number=256, buf=0xb76d4008
ich_spi_read_page: offset=94464, number=256, buf=0xb76d4108
ich_spi_read_page: offset=94720, number=256, buf=0xb76d4208
ich_spi_read_page: offset=94976, number=256, buf=0xb76d4308
ich_spi_read_page: offset=95232, number=256, buf=0xb76d4408
ich_spi_read_page: offset=95488, number=256, buf=0xb76d4508
ich_spi_read_page: offset=95744, number=256, buf=0xb76d4608
ich_spi_read_page: offset=96000, number=256, buf=0xb76d4708
ich_spi_read_page: offset=96256, number=256, buf=0xb76d4808
ich_spi_read_page: offset=96512, number=256, buf=0xb76d4908
ich_spi_read_page: offset=96768, number=256, buf=0xb76d4a08
ich_spi_read_page: offset=97024, number=256, buf=0xb76d4b08
ich_spi_read_page: offset=97280, number=256, buf=0xb76d4c08
ich_spi_read_page: offset=97536, number=256, buf=0xb76d4d08
ich_spi_read_page: offset=97792, number=256, buf=0xb76d4e08
ich_spi_read_page: offset=98048, number=256, buf=0xb76d4f08
ich_spi_read_page: offset=98304, number=256, buf=0xb76d5008
ich_spi_read_page: offset=98560, number=256, buf=0xb76d5108
ich_spi_read_page: offset=98816, number=256, buf=0xb76d5208
ich_spi_read_page: offset=99072, number=256, buf=0xb76d5308
ich_spi_read_page: offset=99328, number=256, buf=0xb76d5408
ich_spi_read_page: offset=99584, number=256, buf=0xb76d5508
ich_spi_read_page: offset=99840, number=256, buf=0xb76d5608
ich_spi_read_page: offset=100096, number=256, buf=0xb76d5708
ich_spi_read_page: offset=100352, number=256, buf=0xb76d5808
ich_spi_read_page: offset=100608, number=256, buf=0xb76d5908
ich_spi_read_page: offset=100864, number=256, buf=0xb76d5a08
ich_spi_read_page: offset=101120, number=256, buf=0xb76d5b08
ich_spi_read_page: offset=101376, number=256, buf=0xb76d5c08
ich_spi_read_page: offset=101632, number=256, buf=0xb76d5d08
ich_spi_read_page: offset=101888, number=256, buf=0xb76d5e08
ich_spi_read_page: offset=102144, number=256, buf=0xb76d5f08
ich_spi_read_page: offset=102400, number=256, buf=0xb76d6008
ich_spi_read_page: offset=102656, number=256, buf=0xb76d6108
ich_spi_read_page: offset=102912, number=256, buf=0xb76d6208
ich_spi_read_page: offset=103168, number=256, buf=0xb76d6308
ich_spi_read_page: offset=103424, number=256, buf=0xb76d6408
ich_spi_read_page: offset=103680, number=256, buf=0xb76d6508
ich_spi_read_page: offset=103936, number=256, buf=0xb76d6608
ich_spi_read_page: offset=104192, number=256, buf=0xb76d6708
ich_spi_read_page: offset=104448, number=256, buf=0xb76d6808
ich_spi_read_page: offset=104704, number=256, buf=0xb76d6908
ich_spi_read_page: offset=104960, number=256, buf=0xb76d6a08
ich_spi_read_page: offset=105216, number=256, buf=0xb76d6b08
ich_spi_read_page: offset=105472, number=256, buf=0xb76d6c08
ich_spi_read_page: offset=105728, number=256, buf=0xb76d6d08
ich_spi_read_page: offset=105984, number=256, buf=0xb76d6e08
ich_spi_read_page: offset=106240, number=256, buf=0xb76d6f08
ich_spi_read_page: offset=106496, number=256, buf=0xb76d7008
ich_spi_read_page: offset=106752, number=256, buf=0xb76d7108
ich_spi_read_page: offset=107008, number=256, buf=0xb76d7208
ich_spi_read_page: offset=107264, number=256, buf=0xb76d7308
ich_spi_read_page: offset=107520, number=256, buf=0xb76d7408
ich_spi_read_page: offset=107776, number=256, buf=0xb76d7508
ich_spi_read_page: offset=108032, number=256, buf=0xb76d7608
ich_spi_read_page: offset=108288, number=256, buf=0xb76d7708
ich_spi_read_page: offset=108544, number=256, buf=0xb76d7808
ich_spi_read_page: offset=108800, number=256, buf=0xb76d7908
ich_spi_read_page: offset=109056, number=256, buf=0xb76d7a08
ich_spi_read_page: offset=109312, number=256, buf=0xb76d7b08
ich_spi_read_page: offset=109568, number=256, buf=0xb76d7c08
ich_spi_read_page: offset=109824, number=256, buf=0xb76d7d08
ich_spi_read_page: offset=110080, number=256, buf=0xb76d7e08
ich_spi_read_page: offset=110336, number=256, buf=0xb76d7f08
ich_spi_read_page: offset=110592, number=256, buf=0xb76d8008
ich_spi_read_page: offset=110848, number=256, buf=0xb76d8108
ich_spi_read_page: offset=111104, number=256, buf=0xb76d8208
ich_spi_read_page: offset=111360, number=256, buf=0xb76d8308
ich_spi_read_page: offset=111616, number=256, buf=0xb76d8408
ich_spi_read_page: offset=111872, number=256, buf=0xb76d8508
ich_spi_read_page: offset=112128, number=256, buf=0xb76d8608
ich_spi_read_page: offset=112384, number=256, buf=0xb76d8708
ich_spi_read_page: offset=112640, number=256, buf=0xb76d8808
ich_spi_read_page: offset=112896, number=256, buf=0xb76d8908
ich_spi_read_page: offset=113152, number=256, buf=0xb76d8a08
ich_spi_read_page: offset=113408, number=256, buf=0xb76d8b08
ich_spi_read_page: offset=113664, number=256, buf=0xb76d8c08
ich_spi_read_page: offset=113920, number=256, buf=0xb76d8d08
ich_spi_read_page: offset=114176, number=256, buf=0xb76d8e08
ich_spi_read_page: offset=114432, number=256, buf=0xb76d8f08
ich_spi_read_page: offset=114688, number=256, buf=0xb76d9008
ich_spi_read_page: offset=114944, number=256, buf=0xb76d9108
ich_spi_read_page: offset=115200, number=256, buf=0xb76d9208
ich_spi_read_page: offset=115456, number=256, buf=0xb76d9308
ich_spi_read_page: offset=115712, number=256, buf=0xb76d9408
ich_spi_read_page: offset=115968, number=256, buf=0xb76d9508
ich_spi_read_page: offset=116224, number=256, buf=0xb76d9608
ich_spi_read_page: offset=116480, number=256, buf=0xb76d9708
ich_spi_read_page: offset=116736, number=256, buf=0xb76d9808
ich_spi_read_page: offset=116992, number=256, buf=0xb76d9908
ich_spi_read_page: offset=117248, number=256, buf=0xb76d9a08
ich_spi_read_page: offset=117504, number=256, buf=0xb76d9b08
ich_spi_read_page: offset=117760, number=256, buf=0xb76d9c08
ich_spi_read_page: offset=118016, number=256, buf=0xb76d9d08
ich_spi_read_page: offset=118272, number=256, buf=0xb76d9e08
ich_spi_read_page: offset=118528, number=256, buf=0xb76d9f08
ich_spi_read_page: offset=118784, number=256, buf=0xb76da008
ich_spi_read_page: offset=119040, number=256, buf=0xb76da108
ich_spi_read_page: offset=119296, number=256, buf=0xb76da208
ich_spi_read_page: offset=119552, number=256, buf=0xb76da308
ich_spi_read_page: offset=119808, number=256, buf=0xb76da408
ich_spi_read_page: offset=120064, number=256, buf=0xb76da508
ich_spi_read_page: offset=120320, number=256, buf=0xb76da608
ich_spi_read_page: offset=120576, number=256, buf=0xb76da708
ich_spi_read_page: offset=120832, number=256, buf=0xb76da808
ich_spi_read_page: offset=121088, number=256, buf=0xb76da908
ich_spi_read_page: offset=121344, number=256, buf=0xb76daa08
ich_spi_read_page: offset=121600, number=256, buf=0xb76dab08
ich_spi_read_page: offset=121856, number=256, buf=0xb76dac08
ich_spi_read_page: offset=122112, number=256, buf=0xb76dad08
ich_spi_read_page: offset=122368, number=256, buf=0xb76dae08
ich_spi_read_page: offset=122624, number=256, buf=0xb76daf08
ich_spi_read_page: offset=122880, number=256, buf=0xb76db008
ich_spi_read_page: offset=123136, number=256, buf=0xb76db108
ich_spi_read_page: offset=123392, number=256, buf=0xb76db208
ich_spi_read_page: offset=123648, number=256, buf=0xb76db308
ich_spi_read_page: offset=123904, number=256, buf=0xb76db408
ich_spi_read_page: offset=124160, number=256, buf=0xb76db508
ich_spi_read_page: offset=124416, number=256, buf=0xb76db608
ich_spi_read_page: offset=124672, number=256, buf=0xb76db708
ich_spi_read_page: offset=124928, number=256, buf=0xb76db808
ich_spi_read_page: offset=125184, number=256, buf=0xb76db908
ich_spi_read_page: offset=125440, number=256, buf=0xb76dba08
ich_spi_read_page: offset=125696, number=256, buf=0xb76dbb08
ich_spi_read_page: offset=125952, number=256, buf=0xb76dbc08
ich_spi_read_page: offset=126208, number=256, buf=0xb76dbd08
ich_spi_read_page: offset=126464, number=256, buf=0xb76dbe08
ich_spi_read_page: offset=126720, number=256, buf=0xb76dbf08
ich_spi_read_page: offset=126976, number=256, buf=0xb76dc008
ich_spi_read_page: offset=127232, number=256, buf=0xb76dc108
ich_spi_read_page: offset=127488, number=256, buf=0xb76dc208
ich_spi_read_page: offset=127744, number=256, buf=0xb76dc308
ich_spi_read_page: offset=128000, number=256, buf=0xb76dc408
ich_spi_read_page: offset=128256, number=256, buf=0xb76dc508
ich_spi_read_page: offset=128512, number=256, buf=0xb76dc608
ich_spi_read_page: offset=128768, number=256, buf=0xb76dc708
ich_spi_read_page: offset=129024, number=256, buf=0xb76dc808
ich_spi_read_page: offset=129280, number=256, buf=0xb76dc908
ich_spi_read_page: offset=129536, number=256, buf=0xb76dca08
ich_spi_read_page: offset=129792, number=256, buf=0xb76dcb08
ich_spi_read_page: offset=130048, number=256, buf=0xb76dcc08
ich_spi_read_page: offset=130304, number=256, buf=0xb76dcd08
ich_spi_read_page: offset=130560, number=256, buf=0xb76dce08
ich_spi_read_page: offset=130816, number=256, buf=0xb76dcf08
ich_spi_read_page: offset=131072, number=256, buf=0xb76dd008
ich_spi_read_page: offset=131328, number=256, buf=0xb76dd108
ich_spi_read_page: offset=131584, number=256, buf=0xb76dd208
ich_spi_read_page: offset=131840, number=256, buf=0xb76dd308
ich_spi_read_page: offset=132096, number=256, buf=0xb76dd408
ich_spi_read_page: offset=132352, number=256, buf=0xb76dd508
ich_spi_read_page: offset=132608, number=256, buf=0xb76dd608
ich_spi_read_page: offset=132864, number=256, buf=0xb76dd708
ich_spi_read_page: offset=133120, number=256, buf=0xb76dd808
ich_spi_read_page: offset=133376, number=256, buf=0xb76dd908
ich_spi_read_page: offset=133632, number=256, buf=0xb76dda08
ich_spi_read_page: offset=133888, number=256, buf=0xb76ddb08
ich_spi_read_page: offset=134144, number=256, buf=0xb76ddc08
ich_spi_read_page: offset=134400, number=256, buf=0xb76ddd08
ich_spi_read_page: offset=134656, number=256, buf=0xb76dde08
ich_spi_read_page: offset=134912, number=256, buf=0xb76ddf08
ich_spi_read_page: offset=135168, number=256, buf=0xb76de008
ich_spi_read_page: offset=135424, number=256, buf=0xb76de108
ich_spi_read_page: offset=135680, number=256, buf=0xb76de208
ich_spi_read_page: offset=135936, number=256, buf=0xb76de308
ich_spi_read_page: offset=136192, number=256, buf=0xb76de408
ich_spi_read_page: offset=136448, number=256, buf=0xb76de508
ich_spi_read_page: offset=136704, number=256, buf=0xb76de608
ich_spi_read_page: offset=136960, number=256, buf=0xb76de708
ich_spi_read_page: offset=137216, number=256, buf=0xb76de808
ich_spi_read_page: offset=137472, number=256, buf=0xb76de908
ich_spi_read_page: offset=137728, number=256, buf=0xb76dea08
ich_spi_read_page: offset=137984, number=256, buf=0xb76deb08
ich_spi_read_page: offset=138240, number=256, buf=0xb76dec08
ich_spi_read_page: offset=138496, number=256, buf=0xb76ded08
ich_spi_read_page: offset=138752, number=256, buf=0xb76dee08
ich_spi_read_page: offset=139008, number=256, buf=0xb76def08
ich_spi_read_page: offset=139264, number=256, buf=0xb76df008
ich_spi_read_page: offset=139520, number=256, buf=0xb76df108
ich_spi_read_page: offset=139776, number=256, buf=0xb76df208
ich_spi_read_page: offset=140032, number=256, buf=0xb76df308
ich_spi_read_page: offset=140288, number=256, buf=0xb76df408
ich_spi_read_page: offset=140544, number=256, buf=0xb76df508
ich_spi_read_page: offset=140800, number=256, buf=0xb76df608
ich_spi_read_page: offset=141056, number=256, buf=0xb76df708
ich_spi_read_page: offset=141312, number=256, buf=0xb76df808
ich_spi_read_page: offset=141568, number=256, buf=0xb76df908
ich_spi_read_page: offset=141824, number=256, buf=0xb76dfa08
ich_spi_read_page: offset=142080, number=256, buf=0xb76dfb08
ich_spi_read_page: offset=142336, number=256, buf=0xb76dfc08
ich_spi_read_page: offset=142592, number=256, buf=0xb76dfd08
ich_spi_read_page: offset=142848, number=256, buf=0xb76dfe08
ich_spi_read_page: offset=143104, number=256, buf=0xb76dff08
ich_spi_read_page: offset=143360, number=256, buf=0xb76e0008
ich_spi_read_page: offset=143616, number=256, buf=0xb76e0108
ich_spi_read_page: offset=143872, number=256, buf=0xb76e0208
ich_spi_read_page: offset=144128, number=256, buf=0xb76e0308
ich_spi_read_page: offset=144384, number=256, buf=0xb76e0408
ich_spi_read_page: offset=144640, number=256, buf=0xb76e0508
ich_spi_read_page: offset=144896, number=256, buf=0xb76e0608
ich_spi_read_page: offset=145152, number=256, buf=0xb76e0708
ich_spi_read_page: offset=145408, number=256, buf=0xb76e0808
ich_spi_read_page: offset=145664, number=256, buf=0xb76e0908
ich_spi_read_page: offset=145920, number=256, buf=0xb76e0a08
ich_spi_read_page: offset=146176, number=256, buf=0xb76e0b08
ich_spi_read_page: offset=146432, number=256, buf=0xb76e0c08
ich_spi_read_page: offset=146688, number=256, buf=0xb76e0d08
ich_spi_read_page: offset=146944, number=256, buf=0xb76e0e08
ich_spi_read_page: offset=147200, number=256, buf=0xb76e0f08
ich_spi_read_page: offset=147456, number=256, buf=0xb76e1008
ich_spi_read_page: offset=147712, number=256, buf=0xb76e1108
ich_spi_read_page: offset=147968, number=256, buf=0xb76e1208
ich_spi_read_page: offset=148224, number=256, buf=0xb76e1308
ich_spi_read_page: offset=148480, number=256, buf=0xb76e1408
ich_spi_read_page: offset=148736, number=256, buf=0xb76e1508
ich_spi_read_page: offset=148992, number=256, buf=0xb76e1608
ich_spi_read_page: offset=149248, number=256, buf=0xb76e1708
ich_spi_read_page: offset=149504, number=256, buf=0xb76e1808
ich_spi_read_page: offset=149760, number=256, buf=0xb76e1908
ich_spi_read_page: offset=150016, number=256, buf=0xb76e1a08
ich_spi_read_page: offset=150272, number=256, buf=0xb76e1b08
ich_spi_read_page: offset=150528, number=256, buf=0xb76e1c08
ich_spi_read_page: offset=150784, number=256, buf=0xb76e1d08
ich_spi_read_page: offset=151040, number=256, buf=0xb76e1e08
ich_spi_read_page: offset=151296, number=256, buf=0xb76e1f08
ich_spi_read_page: offset=151552, number=256, buf=0xb76e2008
ich_spi_read_page: offset=151808, number=256, buf=0xb76e2108
ich_spi_read_page: offset=152064, number=256, buf=0xb76e2208
ich_spi_read_page: offset=152320, number=256, buf=0xb76e2308
ich_spi_read_page: offset=152576, number=256, buf=0xb76e2408
ich_spi_read_page: offset=152832, number=256, buf=0xb76e2508
ich_spi_read_page: offset=153088, number=256, buf=0xb76e2608
ich_spi_read_page: offset=153344, number=256, buf=0xb76e2708
ich_spi_read_page: offset=153600, number=256, buf=0xb76e2808
ich_spi_read_page: offset=153856, number=256, buf=0xb76e2908
ich_spi_read_page: offset=154112, number=256, buf=0xb76e2a08
ich_spi_read_page: offset=154368, number=256, buf=0xb76e2b08
ich_spi_read_page: offset=154624, number=256, buf=0xb76e2c08
ich_spi_read_page: offset=154880, number=256, buf=0xb76e2d08
ich_spi_read_page: offset=155136, number=256, buf=0xb76e2e08
ich_spi_read_page: offset=155392, number=256, buf=0xb76e2f08
ich_spi_read_page: offset=155648, number=256, buf=0xb76e3008
ich_spi_read_page: offset=155904, number=256, buf=0xb76e3108
ich_spi_read_page: offset=156160, number=256, buf=0xb76e3208
ich_spi_read_page: offset=156416, number=256, buf=0xb76e3308
ich_spi_read_page: offset=156672, number=256, buf=0xb76e3408
ich_spi_read_page: offset=156928, number=256, buf=0xb76e3508
ich_spi_read_page: offset=157184, number=256, buf=0xb76e3608
ich_spi_read_page: offset=157440, number=256, buf=0xb76e3708
ich_spi_read_page: offset=157696, number=256, buf=0xb76e3808
ich_spi_read_page: offset=157952, number=256, buf=0xb76e3908
ich_spi_read_page: offset=158208, number=256, buf=0xb76e3a08
ich_spi_read_page: offset=158464, number=256, buf=0xb76e3b08
ich_spi_read_page: offset=158720, number=256, buf=0xb76e3c08
ich_spi_read_page: offset=158976, number=256, buf=0xb76e3d08
ich_spi_read_page: offset=159232, number=256, buf=0xb76e3e08
ich_spi_read_page: offset=159488, number=256, buf=0xb76e3f08
ich_spi_read_page: offset=159744, number=256, buf=0xb76e4008
ich_spi_read_page: offset=160000, number=256, buf=0xb76e4108
ich_spi_read_page: offset=160256, number=256, buf=0xb76e4208
ich_spi_read_page: offset=160512, number=256, buf=0xb76e4308
ich_spi_read_page: offset=160768, number=256, buf=0xb76e4408
ich_spi_read_page: offset=161024, number=256, buf=0xb76e4508
ich_spi_read_page: offset=161280, number=256, buf=0xb76e4608
ich_spi_read_page: offset=161536, number=256, buf=0xb76e4708
ich_spi_read_page: offset=161792, number=256, buf=0xb76e4808
ich_spi_read_page: offset=162048, number=256, buf=0xb76e4908
ich_spi_read_page: offset=162304, number=256, buf=0xb76e4a08
ich_spi_read_page: offset=162560, number=256, buf=0xb76e4b08
ich_spi_read_page: offset=162816, number=256, buf=0xb76e4c08
ich_spi_read_page: offset=163072, number=256, buf=0xb76e4d08
ich_spi_read_page: offset=163328, number=256, buf=0xb76e4e08
ich_spi_read_page: offset=163584, number=256, buf=0xb76e4f08
ich_spi_read_page: offset=163840, number=256, buf=0xb76e5008
ich_spi_read_page: offset=164096, number=256, buf=0xb76e5108
ich_spi_read_page: offset=164352, number=256, buf=0xb76e5208
ich_spi_read_page: offset=164608, number=256, buf=0xb76e5308
ich_spi_read_page: offset=164864, number=256, buf=0xb76e5408
ich_spi_read_page: offset=165120, number=256, buf=0xb76e5508
ich_spi_read_page: offset=165376, number=256, buf=0xb76e5608
ich_spi_read_page: offset=165632, number=256, buf=0xb76e5708
ich_spi_read_page: offset=165888, number=256, buf=0xb76e5808
ich_spi_read_page: offset=166144, number=256, buf=0xb76e5908
ich_spi_read_page: offset=166400, number=256, buf=0xb76e5a08
ich_spi_read_page: offset=166656, number=256, buf=0xb76e5b08
ich_spi_read_page: offset=166912, number=256, buf=0xb76e5c08
ich_spi_read_page: offset=167168, number=256, buf=0xb76e5d08
ich_spi_read_page: offset=167424, number=256, buf=0xb76e5e08
ich_spi_read_page: offset=167680, number=256, buf=0xb76e5f08
ich_spi_read_page: offset=167936, number=256, buf=0xb76e6008
ich_spi_read_page: offset=168192, number=256, buf=0xb76e6108
ich_spi_read_page: offset=168448, number=256, buf=0xb76e6208
ich_spi_read_page: offset=168704, number=256, buf=0xb76e6308
ich_spi_read_page: offset=168960, number=256, buf=0xb76e6408
ich_spi_read_page: offset=169216, number=256, buf=0xb76e6508
ich_spi_read_page: offset=169472, number=256, buf=0xb76e6608
ich_spi_read_page: offset=169728, number=256, buf=0xb76e6708
ich_spi_read_page: offset=169984, number=256, buf=0xb76e6808
ich_spi_read_page: offset=170240, number=256, buf=0xb76e6908
ich_spi_read_page: offset=170496, number=256, buf=0xb76e6a08
ich_spi_read_page: offset=170752, number=256, buf=0xb76e6b08
ich_spi_read_page: offset=171008, number=256, buf=0xb76e6c08
ich_spi_read_page: offset=171264, number=256, buf=0xb76e6d08
ich_spi_read_page: offset=171520, number=256, buf=0xb76e6e08
ich_spi_read_page: offset=171776, number=256, buf=0xb76e6f08
ich_spi_read_page: offset=172032, number=256, buf=0xb76e7008
ich_spi_read_page: offset=172288, number=256, buf=0xb76e7108
ich_spi_read_page: offset=172544, number=256, buf=0xb76e7208
ich_spi_read_page: offset=172800, number=256, buf=0xb76e7308
ich_spi_read_page: offset=173056, number=256, buf=0xb76e7408
ich_spi_read_page: offset=173312, number=256, buf=0xb76e7508
ich_spi_read_page: offset=173568, number=256, buf=0xb76e7608
ich_spi_read_page: offset=173824, number=256, buf=0xb76e7708
ich_spi_read_page: offset=174080, number=256, buf=0xb76e7808
ich_spi_read_page: offset=174336, number=256, buf=0xb76e7908
ich_spi_read_page: offset=174592, number=256, buf=0xb76e7a08
ich_spi_read_page: offset=174848, number=256, buf=0xb76e7b08
ich_spi_read_page: offset=175104, number=256, buf=0xb76e7c08
ich_spi_read_page: offset=175360, number=256, buf=0xb76e7d08
ich_spi_read_page: offset=175616, number=256, buf=0xb76e7e08
ich_spi_read_page: offset=175872, number=256, buf=0xb76e7f08
ich_spi_read_page: offset=176128, number=256, buf=0xb76e8008
ich_spi_read_page: offset=176384, number=256, buf=0xb76e8108
ich_spi_read_page: offset=176640, number=256, buf=0xb76e8208
ich_spi_read_page: offset=176896, number=256, buf=0xb76e8308
ich_spi_read_page: offset=177152, number=256, buf=0xb76e8408
ich_spi_read_page: offset=177408, number=256, buf=0xb76e8508
ich_spi_read_page: offset=177664, number=256, buf=0xb76e8608
ich_spi_read_page: offset=177920, number=256, buf=0xb76e8708
ich_spi_read_page: offset=178176, number=256, buf=0xb76e8808
ich_spi_read_page: offset=178432, number=256, buf=0xb76e8908
ich_spi_read_page: offset=178688, number=256, buf=0xb76e8a08
ich_spi_read_page: offset=178944, number=256, buf=0xb76e8b08
ich_spi_read_page: offset=179200, number=256, buf=0xb76e8c08
ich_spi_read_page: offset=179456, number=256, buf=0xb76e8d08
ich_spi_read_page: offset=179712, number=256, buf=0xb76e8e08
ich_spi_read_page: offset=179968, number=256, buf=0xb76e8f08
ich_spi_read_page: offset=180224, number=256, buf=0xb76e9008
ich_spi_read_page: offset=180480, number=256, buf=0xb76e9108
ich_spi_read_page: offset=180736, number=256, buf=0xb76e9208
ich_spi_read_page: offset=180992, number=256, buf=0xb76e9308
ich_spi_read_page: offset=181248, number=256, buf=0xb76e9408
ich_spi_read_page: offset=181504, number=256, buf=0xb76e9508
ich_spi_read_page: offset=181760, number=256, buf=0xb76e9608
ich_spi_read_page: offset=182016, number=256, buf=0xb76e9708
ich_spi_read_page: offset=182272, number=256, buf=0xb76e9808
ich_spi_read_page: offset=182528, number=256, buf=0xb76e9908
ich_spi_read_page: offset=182784, number=256, buf=0xb76e9a08
ich_spi_read_page: offset=183040, number=256, buf=0xb76e9b08
ich_spi_read_page: offset=183296, number=256, buf=0xb76e9c08
ich_spi_read_page: offset=183552, number=256, buf=0xb76e9d08
ich_spi_read_page: offset=183808, number=256, buf=0xb76e9e08
ich_spi_read_page: offset=184064, number=256, buf=0xb76e9f08
ich_spi_read_page: offset=184320, number=256, buf=0xb76ea008
ich_spi_read_page: offset=184576, number=256, buf=0xb76ea108
ich_spi_read_page: offset=184832, number=256, buf=0xb76ea208
ich_spi_read_page: offset=185088, number=256, buf=0xb76ea308
ich_spi_read_page: offset=185344, number=256, buf=0xb76ea408
ich_spi_read_page: offset=185600, number=256, buf=0xb76ea508
ich_spi_read_page: offset=185856, number=256, buf=0xb76ea608
ich_spi_read_page: offset=186112, number=256, buf=0xb76ea708
ich_spi_read_page: offset=186368, number=256, buf=0xb76ea808
ich_spi_read_page: offset=186624, number=256, buf=0xb76ea908
ich_spi_read_page: offset=186880, number=256, buf=0xb76eaa08
ich_spi_read_page: offset=187136, number=256, buf=0xb76eab08
ich_spi_read_page: offset=187392, number=256, buf=0xb76eac08
ich_spi_read_page: offset=187648, number=256, buf=0xb76ead08
ich_spi_read_page: offset=187904, number=256, buf=0xb76eae08
ich_spi_read_page: offset=188160, number=256, buf=0xb76eaf08
ich_spi_read_page: offset=188416, number=256, buf=0xb76eb008
ich_spi_read_page: offset=188672, number=256, buf=0xb76eb108
ich_spi_read_page: offset=188928, number=256, buf=0xb76eb208
ich_spi_read_page: offset=189184, number=256, buf=0xb76eb308
ich_spi_read_page: offset=189440, number=256, buf=0xb76eb408
ich_spi_read_page: offset=189696, number=256, buf=0xb76eb508
ich_spi_read_page: offset=189952, number=256, buf=0xb76eb608
ich_spi_read_page: offset=190208, number=256, buf=0xb76eb708
ich_spi_read_page: offset=190464, number=256, buf=0xb76eb808
ich_spi_read_page: offset=190720, number=256, buf=0xb76eb908
ich_spi_read_page: offset=190976, number=256, buf=0xb76eba08
ich_spi_read_page: offset=191232, number=256, buf=0xb76ebb08
ich_spi_read_page: offset=191488, number=256, buf=0xb76ebc08
ich_spi_read_page: offset=191744, number=256, buf=0xb76ebd08
ich_spi_read_page: offset=192000, number=256, buf=0xb76ebe08
ich_spi_read_page: offset=192256, number=256, buf=0xb76ebf08
ich_spi_read_page: offset=192512, number=256, buf=0xb76ec008
ich_spi_read_page: offset=192768, number=256, buf=0xb76ec108
ich_spi_read_page: offset=193024, number=256, buf=0xb76ec208
ich_spi_read_page: offset=193280, number=256, buf=0xb76ec308
ich_spi_read_page: offset=193536, number=256, buf=0xb76ec408
ich_spi_read_page: offset=193792, number=256, buf=0xb76ec508
ich_spi_read_page: offset=194048, number=256, buf=0xb76ec608
ich_spi_read_page: offset=194304, number=256, buf=0xb76ec708
ich_spi_read_page: offset=194560, number=256, buf=0xb76ec808
ich_spi_read_page: offset=194816, number=256, buf=0xb76ec908
ich_spi_read_page: offset=195072, number=256, buf=0xb76eca08
ich_spi_read_page: offset=195328, number=256, buf=0xb76ecb08
ich_spi_read_page: offset=195584, number=256, buf=0xb76ecc08
ich_spi_read_page: offset=195840, number=256, buf=0xb76ecd08
ich_spi_read_page: offset=196096, number=256, buf=0xb76ece08
ich_spi_read_page: offset=196352, number=256, buf=0xb76ecf08
ich_spi_read_page: offset=196608, number=256, buf=0xb76ed008
ich_spi_read_page: offset=196864, number=256, buf=0xb76ed108
ich_spi_read_page: offset=197120, number=256, buf=0xb76ed208
ich_spi_read_page: offset=197376, number=256, buf=0xb76ed308
ich_spi_read_page: offset=197632, number=256, buf=0xb76ed408
ich_spi_read_page: offset=197888, number=256, buf=0xb76ed508
ich_spi_read_page: offset=198144, number=256, buf=0xb76ed608
ich_spi_read_page: offset=198400, number=256, buf=0xb76ed708
ich_spi_read_page: offset=198656, number=256, buf=0xb76ed808
ich_spi_read_page: offset=198912, number=256, buf=0xb76ed908
ich_spi_read_page: offset=199168, number=256, buf=0xb76eda08
ich_spi_read_page: offset=199424, number=256, buf=0xb76edb08
ich_spi_read_page: offset=199680, number=256, buf=0xb76edc08
ich_spi_read_page: offset=199936, number=256, buf=0xb76edd08
ich_spi_read_page: offset=200192, number=256, buf=0xb76ede08
ich_spi_read_page: offset=200448, number=256, buf=0xb76edf08
ich_spi_read_page: offset=200704, number=256, buf=0xb76ee008
ich_spi_read_page: offset=200960, number=256, buf=0xb76ee108
ich_spi_read_page: offset=201216, number=256, buf=0xb76ee208
ich_spi_read_page: offset=201472, number=256, buf=0xb76ee308
ich_spi_read_page: offset=201728, number=256, buf=0xb76ee408
ich_spi_read_page: offset=201984, number=256, buf=0xb76ee508
ich_spi_read_page: offset=202240, number=256, buf=0xb76ee608
ich_spi_read_page: offset=202496, number=256, buf=0xb76ee708
ich_spi_read_page: offset=202752, number=256, buf=0xb76ee808
ich_spi_read_page: offset=203008, number=256, buf=0xb76ee908
ich_spi_read_page: offset=203264, number=256, buf=0xb76eea08
ich_spi_read_page: offset=203520, number=256, buf=0xb76eeb08
ich_spi_read_page: offset=203776, number=256, buf=0xb76eec08
ich_spi_read_page: offset=204032, number=256, buf=0xb76eed08
ich_spi_read_page: offset=204288, number=256, buf=0xb76eee08
ich_spi_read_page: offset=204544, number=256, buf=0xb76eef08
ich_spi_read_page: offset=204800, number=256, buf=0xb76ef008
ich_spi_read_page: offset=205056, number=256, buf=0xb76ef108
ich_spi_read_page: offset=205312, number=256, buf=0xb76ef208
ich_spi_read_page: offset=205568, number=256, buf=0xb76ef308
ich_spi_read_page: offset=205824, number=256, buf=0xb76ef408
ich_spi_read_page: offset=206080, number=256, buf=0xb76ef508
ich_spi_read_page: offset=206336, number=256, buf=0xb76ef608
ich_spi_read_page: offset=206592, number=256, buf=0xb76ef708
ich_spi_read_page: offset=206848, number=256, buf=0xb76ef808
ich_spi_read_page: offset=207104, number=256, buf=0xb76ef908
ich_spi_read_page: offset=207360, number=256, buf=0xb76efa08
ich_spi_read_page: offset=207616, number=256, buf=0xb76efb08
ich_spi_read_page: offset=207872, number=256, buf=0xb76efc08
ich_spi_read_page: offset=208128, number=256, buf=0xb76efd08
ich_spi_read_page: offset=208384, number=256, buf=0xb76efe08
ich_spi_read_page: offset=208640, number=256, buf=0xb76eff08
ich_spi_read_page: offset=208896, number=256, buf=0xb76f0008
ich_spi_read_page: offset=209152, number=256, buf=0xb76f0108
ich_spi_read_page: offset=209408, number=256, buf=0xb76f0208
ich_spi_read_page: offset=209664, number=256, buf=0xb76f0308
ich_spi_read_page: offset=209920, number=256, buf=0xb76f0408
ich_spi_read_page: offset=210176, number=256, buf=0xb76f0508
ich_spi_read_page: offset=210432, number=256, buf=0xb76f0608
ich_spi_read_page: offset=210688, number=256, buf=0xb76f0708
ich_spi_read_page: offset=210944, number=256, buf=0xb76f0808
ich_spi_read_page: offset=211200, number=256, buf=0xb76f0908
ich_spi_read_page: offset=211456, number=256, buf=0xb76f0a08
ich_spi_read_page: offset=211712, number=256, buf=0xb76f0b08
ich_spi_read_page: offset=211968, number=256, buf=0xb76f0c08
ich_spi_read_page: offset=212224, number=256, buf=0xb76f0d08
ich_spi_read_page: offset=212480, number=256, buf=0xb76f0e08
ich_spi_read_page: offset=212736, number=256, buf=0xb76f0f08
ich_spi_read_page: offset=212992, number=256, buf=0xb76f1008
ich_spi_read_page: offset=213248, number=256, buf=0xb76f1108
ich_spi_read_page: offset=213504, number=256, buf=0xb76f1208
ich_spi_read_page: offset=213760, number=256, buf=0xb76f1308
ich_spi_read_page: offset=214016, number=256, buf=0xb76f1408
ich_spi_read_page: offset=214272, number=256, buf=0xb76f1508
ich_spi_read_page: offset=214528, number=256, buf=0xb76f1608
ich_spi_read_page: offset=214784, number=256, buf=0xb76f1708
ich_spi_read_page: offset=215040, number=256, buf=0xb76f1808
ich_spi_read_page: offset=215296, number=256, buf=0xb76f1908
ich_spi_read_page: offset=215552, number=256, buf=0xb76f1a08
ich_spi_read_page: offset=215808, number=256, buf=0xb76f1b08
ich_spi_read_page: offset=216064, number=256, buf=0xb76f1c08
ich_spi_read_page: offset=216320, number=256, buf=0xb76f1d08
ich_spi_read_page: offset=216576, number=256, buf=0xb76f1e08
ich_spi_read_page: offset=216832, number=256, buf=0xb76f1f08
ich_spi_read_page: offset=217088, number=256, buf=0xb76f2008
ich_spi_read_page: offset=217344, number=256, buf=0xb76f2108
ich_spi_read_page: offset=217600, number=256, buf=0xb76f2208
ich_spi_read_page: offset=217856, number=256, buf=0xb76f2308
ich_spi_read_page: offset=218112, number=256, buf=0xb76f2408
ich_spi_read_page: offset=218368, number=256, buf=0xb76f2508
ich_spi_read_page: offset=218624, number=256, buf=0xb76f2608
ich_spi_read_page: offset=218880, number=256, buf=0xb76f2708
ich_spi_read_page: offset=219136, number=256, buf=0xb76f2808
ich_spi_read_page: offset=219392, number=256, buf=0xb76f2908
ich_spi_read_page: offset=219648, number=256, buf=0xb76f2a08
ich_spi_read_page: offset=219904, number=256, buf=0xb76f2b08
ich_spi_read_page: offset=220160, number=256, buf=0xb76f2c08
ich_spi_read_page: offset=220416, number=256, buf=0xb76f2d08
ich_spi_read_page: offset=220672, number=256, buf=0xb76f2e08
ich_spi_read_page: offset=220928, number=256, buf=0xb76f2f08
ich_spi_read_page: offset=221184, number=256, buf=0xb76f3008
ich_spi_read_page: offset=221440, number=256, buf=0xb76f3108
ich_spi_read_page: offset=221696, number=256, buf=0xb76f3208
ich_spi_read_page: offset=221952, number=256, buf=0xb76f3308
ich_spi_read_page: offset=222208, number=256, buf=0xb76f3408
ich_spi_read_page: offset=222464, number=256, buf=0xb76f3508
ich_spi_read_page: offset=222720, number=256, buf=0xb76f3608
ich_spi_read_page: offset=222976, number=256, buf=0xb76f3708
ich_spi_read_page: offset=223232, number=256, buf=0xb76f3808
ich_spi_read_page: offset=223488, number=256, buf=0xb76f3908
ich_spi_read_page: offset=223744, number=256, buf=0xb76f3a08
ich_spi_read_page: offset=224000, number=256, buf=0xb76f3b08
ich_spi_read_page: offset=224256, number=256, buf=0xb76f3c08
ich_spi_read_page: offset=224512, number=256, buf=0xb76f3d08
ich_spi_read_page: offset=224768, number=256, buf=0xb76f3e08
ich_spi_read_page: offset=225024, number=256, buf=0xb76f3f08
ich_spi_read_page: offset=225280, number=256, buf=0xb76f4008
ich_spi_read_page: offset=225536, number=256, buf=0xb76f4108
ich_spi_read_page: offset=225792, number=256, buf=0xb76f4208
ich_spi_read_page: offset=226048, number=256, buf=0xb76f4308
ich_spi_read_page: offset=226304, number=256, buf=0xb76f4408
ich_spi_read_page: offset=226560, number=256, buf=0xb76f4508
ich_spi_read_page: offset=226816, number=256, buf=0xb76f4608
ich_spi_read_page: offset=227072, number=256, buf=0xb76f4708
ich_spi_read_page: offset=227328, number=256, buf=0xb76f4808
ich_spi_read_page: offset=227584, number=256, buf=0xb76f4908
ich_spi_read_page: offset=227840, number=256, buf=0xb76f4a08
ich_spi_read_page: offset=228096, number=256, buf=0xb76f4b08
ich_spi_read_page: offset=228352, number=256, buf=0xb76f4c08
ich_spi_read_page: offset=228608, number=256, buf=0xb76f4d08
ich_spi_read_page: offset=228864, number=256, buf=0xb76f4e08
ich_spi_read_page: offset=229120, number=256, buf=0xb76f4f08
ich_spi_read_page: offset=229376, number=256, buf=0xb76f5008
ich_spi_read_page: offset=229632, number=256, buf=0xb76f5108
ich_spi_read_page: offset=229888, number=256, buf=0xb76f5208
ich_spi_read_page: offset=230144, number=256, buf=0xb76f5308
ich_spi_read_page: offset=230400, number=256, buf=0xb76f5408
ich_spi_read_page: offset=230656, number=256, buf=0xb76f5508
ich_spi_read_page: offset=230912, number=256, buf=0xb76f5608
ich_spi_read_page: offset=231168, number=256, buf=0xb76f5708
ich_spi_read_page: offset=231424, number=256, buf=0xb76f5808
ich_spi_read_page: offset=231680, number=256, buf=0xb76f5908
ich_spi_read_page: offset=231936, number=256, buf=0xb76f5a08
ich_spi_read_page: offset=232192, number=256, buf=0xb76f5b08
ich_spi_read_page: offset=232448, number=256, buf=0xb76f5c08
ich_spi_read_page: offset=232704, number=256, buf=0xb76f5d08
ich_spi_read_page: offset=232960, number=256, buf=0xb76f5e08
ich_spi_read_page: offset=233216, number=256, buf=0xb76f5f08
ich_spi_read_page: offset=233472, number=256, buf=0xb76f6008
ich_spi_read_page: offset=233728, number=256, buf=0xb76f6108
ich_spi_read_page: offset=233984, number=256, buf=0xb76f6208
ich_spi_read_page: offset=234240, number=256, buf=0xb76f6308
ich_spi_read_page: offset=234496, number=256, buf=0xb76f6408
ich_spi_read_page: offset=234752, number=256, buf=0xb76f6508
ich_spi_read_page: offset=235008, number=256, buf=0xb76f6608
ich_spi_read_page: offset=235264, number=256, buf=0xb76f6708
ich_spi_read_page: offset=235520, number=256, buf=0xb76f6808
ich_spi_read_page: offset=235776, number=256, buf=0xb76f6908
ich_spi_read_page: offset=236032, number=256, buf=0xb76f6a08
ich_spi_read_page: offset=236288, number=256, buf=0xb76f6b08
ich_spi_read_page: offset=236544, number=256, buf=0xb76f6c08
ich_spi_read_page: offset=236800, number=256, buf=0xb76f6d08
ich_spi_read_page: offset=237056, number=256, buf=0xb76f6e08
ich_spi_read_page: offset=237312, number=256, buf=0xb76f6f08
ich_spi_read_page: offset=237568, number=256, buf=0xb76f7008
ich_spi_read_page: offset=237824, number=256, buf=0xb76f7108
ich_spi_read_page: offset=238080, number=256, buf=0xb76f7208
ich_spi_read_page: offset=238336, number=256, buf=0xb76f7308
ich_spi_read_page: offset=238592, number=256, buf=0xb76f7408
ich_spi_read_page: offset=238848, number=256, buf=0xb76f7508
ich_spi_read_page: offset=239104, number=256, buf=0xb76f7608
ich_spi_read_page: offset=239360, number=256, buf=0xb76f7708
ich_spi_read_page: offset=239616, number=256, buf=0xb76f7808
ich_spi_read_page: offset=239872, number=256, buf=0xb76f7908
ich_spi_read_page: offset=240128, number=256, buf=0xb76f7a08
ich_spi_read_page: offset=240384, number=256, buf=0xb76f7b08
ich_spi_read_page: offset=240640, number=256, buf=0xb76f7c08
ich_spi_read_page: offset=240896, number=256, buf=0xb76f7d08
ich_spi_read_page: offset=241152, number=256, buf=0xb76f7e08
ich_spi_read_page: offset=241408, number=256, buf=0xb76f7f08
ich_spi_read_page: offset=241664, number=256, buf=0xb76f8008
ich_spi_read_page: offset=241920, number=256, buf=0xb76f8108
ich_spi_read_page: offset=242176, number=256, buf=0xb76f8208
ich_spi_read_page: offset=242432, number=256, buf=0xb76f8308
ich_spi_read_page: offset=242688, number=256, buf=0xb76f8408
ich_spi_read_page: offset=242944, number=256, buf=0xb76f8508
ich_spi_read_page: offset=243200, number=256, buf=0xb76f8608
ich_spi_read_page: offset=243456, number=256, buf=0xb76f8708
ich_spi_read_page: offset=243712, number=256, buf=0xb76f8808
ich_spi_read_page: offset=243968, number=256, buf=0xb76f8908
ich_spi_read_page: offset=244224, number=256, buf=0xb76f8a08
ich_spi_read_page: offset=244480, number=256, buf=0xb76f8b08
ich_spi_read_page: offset=244736, number=256, buf=0xb76f8c08
ich_spi_read_page: offset=244992, number=256, buf=0xb76f8d08
ich_spi_read_page: offset=245248, number=256, buf=0xb76f8e08
ich_spi_read_page: offset=245504, number=256, buf=0xb76f8f08
ich_spi_read_page: offset=245760, number=256, buf=0xb76f9008
ich_spi_read_page: offset=246016, number=256, buf=0xb76f9108
ich_spi_read_page: offset=246272, number=256, buf=0xb76f9208
ich_spi_read_page: offset=246528, number=256, buf=0xb76f9308
ich_spi_read_page: offset=246784, number=256, buf=0xb76f9408
ich_spi_read_page: offset=247040, number=256, buf=0xb76f9508
ich_spi_read_page: offset=247296, number=256, buf=0xb76f9608
ich_spi_read_page: offset=247552, number=256, buf=0xb76f9708
ich_spi_read_page: offset=247808, number=256, buf=0xb76f9808
ich_spi_read_page: offset=248064, number=256, buf=0xb76f9908
ich_spi_read_page: offset=248320, number=256, buf=0xb76f9a08
ich_spi_read_page: offset=248576, number=256, buf=0xb76f9b08
ich_spi_read_page: offset=248832, number=256, buf=0xb76f9c08
ich_spi_read_page: offset=249088, number=256, buf=0xb76f9d08
ich_spi_read_page: offset=249344, number=256, buf=0xb76f9e08
ich_spi_read_page: offset=249600, number=256, buf=0xb76f9f08
ich_spi_read_page: offset=249856, number=256, buf=0xb76fa008
ich_spi_read_page: offset=250112, number=256, buf=0xb76fa108
ich_spi_read_page: offset=250368, number=256, buf=0xb76fa208
ich_spi_read_page: offset=250624, number=256, buf=0xb76fa308
ich_spi_read_page: offset=250880, number=256, buf=0xb76fa408
ich_spi_read_page: offset=251136, number=256, buf=0xb76fa508
ich_spi_read_page: offset=251392, number=256, buf=0xb76fa608
ich_spi_read_page: offset=251648, number=256, buf=0xb76fa708
ich_spi_read_page: offset=251904, number=256, buf=0xb76fa808
ich_spi_read_page: offset=252160, number=256, buf=0xb76fa908
ich_spi_read_page: offset=252416, number=256, buf=0xb76faa08
ich_spi_read_page: offset=252672, number=256, buf=0xb76fab08
ich_spi_read_page: offset=252928, number=256, buf=0xb76fac08
ich_spi_read_page: offset=253184, number=256, buf=0xb76fad08
ich_spi_read_page: offset=253440, number=256, buf=0xb76fae08
ich_spi_read_page: offset=253696, number=256, buf=0xb76faf08
ich_spi_read_page: offset=253952, number=256, buf=0xb76fb008
ich_spi_read_page: offset=254208, number=256, buf=0xb76fb108
ich_spi_read_page: offset=254464, number=256, buf=0xb76fb208
ich_spi_read_page: offset=254720, number=256, buf=0xb76fb308
ich_spi_read_page: offset=254976, number=256, buf=0xb76fb408
ich_spi_read_page: offset=255232, number=256, buf=0xb76fb508
ich_spi_read_page: offset=255488, number=256, buf=0xb76fb608
ich_spi_read_page: offset=255744, number=256, buf=0xb76fb708
ich_spi_read_page: offset=256000, number=256, buf=0xb76fb808
ich_spi_read_page: offset=256256, number=256, buf=0xb76fb908
ich_spi_read_page: offset=256512, number=256, buf=0xb76fba08
ich_spi_read_page: offset=256768, number=256, buf=0xb76fbb08
ich_spi_read_page: offset=257024, number=256, buf=0xb76fbc08
ich_spi_read_page: offset=257280, number=256, buf=0xb76fbd08
ich_spi_read_page: offset=257536, number=256, buf=0xb76fbe08
ich_spi_read_page: offset=257792, number=256, buf=0xb76fbf08
ich_spi_read_page: offset=258048, number=256, buf=0xb76fc008
ich_spi_read_page: offset=258304, number=256, buf=0xb76fc108
ich_spi_read_page: offset=258560, number=256, buf=0xb76fc208
ich_spi_read_page: offset=258816, number=256, buf=0xb76fc308
ich_spi_read_page: offset=259072, number=256, buf=0xb76fc408
ich_spi_read_page: offset=259328, number=256, buf=0xb76fc508
ich_spi_read_page: offset=259584, number=256, buf=0xb76fc608
ich_spi_read_page: offset=259840, number=256, buf=0xb76fc708
ich_spi_read_page: offset=260096, number=256, buf=0xb76fc808
ich_spi_read_page: offset=260352, number=256, buf=0xb76fc908
ich_spi_read_page: offset=260608, number=256, buf=0xb76fca08
ich_spi_read_page: offset=260864, number=256, buf=0xb76fcb08
ich_spi_read_page: offset=261120, number=256, buf=0xb76fcc08
ich_spi_read_page: offset=261376, number=256, buf=0xb76fcd08
ich_spi_read_page: offset=261632, number=256, buf=0xb76fce08
ich_spi_read_page: offset=261888, number=256, buf=0xb76fcf08
ich_spi_read_page: offset=262144, number=256, buf=0xb76fd008
ich_spi_read_page: offset=262400, number=256, buf=0xb76fd108
ich_spi_read_page: offset=262656, number=256, buf=0xb76fd208
ich_spi_read_page: offset=262912, number=256, buf=0xb76fd308
ich_spi_read_page: offset=263168, number=256, buf=0xb76fd408
ich_spi_read_page: offset=263424, number=256, buf=0xb76fd508
ich_spi_read_page: offset=263680, number=256, buf=0xb76fd608
ich_spi_read_page: offset=263936, number=256, buf=0xb76fd708
ich_spi_read_page: offset=264192, number=256, buf=0xb76fd808
ich_spi_read_page: offset=264448, number=256, buf=0xb76fd908
ich_spi_read_page: offset=264704, number=256, buf=0xb76fda08
ich_spi_read_page: offset=264960, number=256, buf=0xb76fdb08
ich_spi_read_page: offset=265216, number=256, buf=0xb76fdc08
ich_spi_read_page: offset=265472, number=256, buf=0xb76fdd08
ich_spi_read_page: offset=265728, number=256, buf=0xb76fde08
ich_spi_read_page: offset=265984, number=256, buf=0xb76fdf08
ich_spi_read_page: offset=266240, number=256, buf=0xb76fe008
ich_spi_read_page: offset=266496, number=256, buf=0xb76fe108
ich_spi_read_page: offset=266752, number=256, buf=0xb76fe208
ich_spi_read_page: offset=267008, number=256, buf=0xb76fe308
ich_spi_read_page: offset=267264, number=256, buf=0xb76fe408
ich_spi_read_page: offset=267520, number=256, buf=0xb76fe508
ich_spi_read_page: offset=267776, number=256, buf=0xb76fe608
ich_spi_read_page: offset=268032, number=256, buf=0xb76fe708
ich_spi_read_page: offset=268288, number=256, buf=0xb76fe808
ich_spi_read_page: offset=268544, number=256, buf=0xb76fe908
ich_spi_read_page: offset=268800, number=256, buf=0xb76fea08
ich_spi_read_page: offset=269056, number=256, buf=0xb76feb08
ich_spi_read_page: offset=269312, number=256, buf=0xb76fec08
ich_spi_read_page: offset=269568, number=256, buf=0xb76fed08
ich_spi_read_page: offset=269824, number=256, buf=0xb76fee08
ich_spi_read_page: offset=270080, number=256, buf=0xb76fef08
ich_spi_read_page: offset=270336, number=256, buf=0xb76ff008
ich_spi_read_page: offset=270592, number=256, buf=0xb76ff108
ich_spi_read_page: offset=270848, number=256, buf=0xb76ff208
ich_spi_read_page: offset=271104, number=256, buf=0xb76ff308
ich_spi_read_page: offset=271360, number=256, buf=0xb76ff408
ich_spi_read_page: offset=271616, number=256, buf=0xb76ff508
ich_spi_read_page: offset=271872, number=256, buf=0xb76ff608
ich_spi_read_page: offset=272128, number=256, buf=0xb76ff708
ich_spi_read_page: offset=272384, number=256, buf=0xb76ff808
ich_spi_read_page: offset=272640, number=256, buf=0xb76ff908
ich_spi_read_page: offset=272896, number=256, buf=0xb76ffa08
ich_spi_read_page: offset=273152, number=256, buf=0xb76ffb08
ich_spi_read_page: offset=273408, number=256, buf=0xb76ffc08
ich_spi_read_page: offset=273664, number=256, buf=0xb76ffd08
ich_spi_read_page: offset=273920, number=256, buf=0xb76ffe08
ich_spi_read_page: offset=274176, number=256, buf=0xb76fff08
ich_spi_read_page: offset=274432, number=256, buf=0xb7700008
ich_spi_read_page: offset=274688, number=256, buf=0xb7700108
ich_spi_read_page: offset=274944, number=256, buf=0xb7700208
ich_spi_read_page: offset=275200, number=256, buf=0xb7700308
ich_spi_read_page: offset=275456, number=256, buf=0xb7700408
ich_spi_read_page: offset=275712, number=256, buf=0xb7700508
ich_spi_read_page: offset=275968, number=256, buf=0xb7700608
ich_spi_read_page: offset=276224, number=256, buf=0xb7700708
ich_spi_read_page: offset=276480, number=256, buf=0xb7700808
ich_spi_read_page: offset=276736, number=256, buf=0xb7700908
ich_spi_read_page: offset=276992, number=256, buf=0xb7700a08
ich_spi_read_page: offset=277248, number=256, buf=0xb7700b08
ich_spi_read_page: offset=277504, number=256, buf=0xb7700c08
ich_spi_read_page: offset=277760, number=256, buf=0xb7700d08
ich_spi_read_page: offset=278016, number=256, buf=0xb7700e08
ich_spi_read_page: offset=278272, number=256, buf=0xb7700f08
ich_spi_read_page: offset=278528, number=256, buf=0xb7701008
ich_spi_read_page: offset=278784, number=256, buf=0xb7701108
ich_spi_read_page: offset=279040, number=256, buf=0xb7701208
ich_spi_read_page: offset=279296, number=256, buf=0xb7701308
ich_spi_read_page: offset=279552, number=256, buf=0xb7701408
ich_spi_read_page: offset=279808, number=256, buf=0xb7701508
ich_spi_read_page: offset=280064, number=256, buf=0xb7701608
ich_spi_read_page: offset=280320, number=256, buf=0xb7701708
ich_spi_read_page: offset=280576, number=256, buf=0xb7701808
ich_spi_read_page: offset=280832, number=256, buf=0xb7701908
ich_spi_read_page: offset=281088, number=256, buf=0xb7701a08
ich_spi_read_page: offset=281344, number=256, buf=0xb7701b08
ich_spi_read_page: offset=281600, number=256, buf=0xb7701c08
ich_spi_read_page: offset=281856, number=256, buf=0xb7701d08
ich_spi_read_page: offset=282112, number=256, buf=0xb7701e08
ich_spi_read_page: offset=282368, number=256, buf=0xb7701f08
ich_spi_read_page: offset=282624, number=256, buf=0xb7702008
ich_spi_read_page: offset=282880, number=256, buf=0xb7702108
ich_spi_read_page: offset=283136, number=256, buf=0xb7702208
ich_spi_read_page: offset=283392, number=256, buf=0xb7702308
ich_spi_read_page: offset=283648, number=256, buf=0xb7702408
ich_spi_read_page: offset=283904, number=256, buf=0xb7702508
ich_spi_read_page: offset=284160, number=256, buf=0xb7702608
ich_spi_read_page: offset=284416, number=256, buf=0xb7702708
ich_spi_read_page: offset=284672, number=256, buf=0xb7702808
ich_spi_read_page: offset=284928, number=256, buf=0xb7702908
ich_spi_read_page: offset=285184, number=256, buf=0xb7702a08
ich_spi_read_page: offset=285440, number=256, buf=0xb7702b08
ich_spi_read_page: offset=285696, number=256, buf=0xb7702c08
ich_spi_read_page: offset=285952, number=256, buf=0xb7702d08
ich_spi_read_page: offset=286208, number=256, buf=0xb7702e08
ich_spi_read_page: offset=286464, number=256, buf=0xb7702f08
ich_spi_read_page: offset=286720, number=256, buf=0xb7703008
ich_spi_read_page: offset=286976, number=256, buf=0xb7703108
ich_spi_read_page: offset=287232, number=256, buf=0xb7703208
ich_spi_read_page: offset=287488, number=256, buf=0xb7703308
ich_spi_read_page: offset=287744, number=256, buf=0xb7703408
ich_spi_read_page: offset=288000, number=256, buf=0xb7703508
ich_spi_read_page: offset=288256, number=256, buf=0xb7703608
ich_spi_read_page: offset=288512, number=256, buf=0xb7703708
ich_spi_read_page: offset=288768, number=256, buf=0xb7703808
ich_spi_read_page: offset=289024, number=256, buf=0xb7703908
ich_spi_read_page: offset=289280, number=256, buf=0xb7703a08
ich_spi_read_page: offset=289536, number=256, buf=0xb7703b08
ich_spi_read_page: offset=289792, number=256, buf=0xb7703c08
ich_spi_read_page: offset=290048, number=256, buf=0xb7703d08
ich_spi_read_page: offset=290304, number=256, buf=0xb7703e08
ich_spi_read_page: offset=290560, number=256, buf=0xb7703f08
ich_spi_read_page: offset=290816, number=256, buf=0xb7704008
ich_spi_read_page: offset=291072, number=256, buf=0xb7704108
ich_spi_read_page: offset=291328, number=256, buf=0xb7704208
ich_spi_read_page: offset=291584, number=256, buf=0xb7704308
ich_spi_read_page: offset=291840, number=256, buf=0xb7704408
ich_spi_read_page: offset=292096, number=256, buf=0xb7704508
ich_spi_read_page: offset=292352, number=256, buf=0xb7704608
ich_spi_read_page: offset=292608, number=256, buf=0xb7704708
ich_spi_read_page: offset=292864, number=256, buf=0xb7704808
ich_spi_read_page: offset=293120, number=256, buf=0xb7704908
ich_spi_read_page: offset=293376, number=256, buf=0xb7704a08
ich_spi_read_page: offset=293632, number=256, buf=0xb7704b08
ich_spi_read_page: offset=293888, number=256, buf=0xb7704c08
ich_spi_read_page: offset=294144, number=256, buf=0xb7704d08
ich_spi_read_page: offset=294400, number=256, buf=0xb7704e08
ich_spi_read_page: offset=294656, number=256, buf=0xb7704f08
ich_spi_read_page: offset=294912, number=256, buf=0xb7705008
ich_spi_read_page: offset=295168, number=256, buf=0xb7705108
ich_spi_read_page: offset=295424, number=256, buf=0xb7705208
ich_spi_read_page: offset=295680, number=256, buf=0xb7705308
ich_spi_read_page: offset=295936, number=256, buf=0xb7705408
ich_spi_read_page: offset=296192, number=256, buf=0xb7705508
ich_spi_read_page: offset=296448, number=256, buf=0xb7705608
ich_spi_read_page: offset=296704, number=256, buf=0xb7705708
ich_spi_read_page: offset=296960, number=256, buf=0xb7705808
ich_spi_read_page: offset=297216, number=256, buf=0xb7705908
ich_spi_read_page: offset=297472, number=256, buf=0xb7705a08
ich_spi_read_page: offset=297728, number=256, buf=0xb7705b08
ich_spi_read_page: offset=297984, number=256, buf=0xb7705c08
ich_spi_read_page: offset=298240, number=256, buf=0xb7705d08
ich_spi_read_page: offset=298496, number=256, buf=0xb7705e08
ich_spi_read_page: offset=298752, number=256, buf=0xb7705f08
ich_spi_read_page: offset=299008, number=256, buf=0xb7706008
ich_spi_read_page: offset=299264, number=256, buf=0xb7706108
ich_spi_read_page: offset=299520, number=256, buf=0xb7706208
ich_spi_read_page: offset=299776, number=256, buf=0xb7706308
ich_spi_read_page: offset=300032, number=256, buf=0xb7706408
ich_spi_read_page: offset=300288, number=256, buf=0xb7706508
ich_spi_read_page: offset=300544, number=256, buf=0xb7706608
ich_spi_read_page: offset=300800, number=256, buf=0xb7706708
ich_spi_read_page: offset=301056, number=256, buf=0xb7706808
ich_spi_read_page: offset=301312, number=256, buf=0xb7706908
ich_spi_read_page: offset=301568, number=256, buf=0xb7706a08
ich_spi_read_page: offset=301824, number=256, buf=0xb7706b08
ich_spi_read_page: offset=302080, number=256, buf=0xb7706c08
ich_spi_read_page: offset=302336, number=256, buf=0xb7706d08
ich_spi_read_page: offset=302592, number=256, buf=0xb7706e08
ich_spi_read_page: offset=302848, number=256, buf=0xb7706f08
ich_spi_read_page: offset=303104, number=256, buf=0xb7707008
ich_spi_read_page: offset=303360, number=256, buf=0xb7707108
ich_spi_read_page: offset=303616, number=256, buf=0xb7707208
ich_spi_read_page: offset=303872, number=256, buf=0xb7707308
ich_spi_read_page: offset=304128, number=256, buf=0xb7707408
ich_spi_read_page: offset=304384, number=256, buf=0xb7707508
ich_spi_read_page: offset=304640, number=256, buf=0xb7707608
ich_spi_read_page: offset=304896, number=256, buf=0xb7707708
ich_spi_read_page: offset=305152, number=256, buf=0xb7707808
ich_spi_read_page: offset=305408, number=256, buf=0xb7707908
ich_spi_read_page: offset=305664, number=256, buf=0xb7707a08
ich_spi_read_page: offset=305920, number=256, buf=0xb7707b08
ich_spi_read_page: offset=306176, number=256, buf=0xb7707c08
ich_spi_read_page: offset=306432, number=256, buf=0xb7707d08
ich_spi_read_page: offset=306688, number=256, buf=0xb7707e08
ich_spi_read_page: offset=306944, number=256, buf=0xb7707f08
ich_spi_read_page: offset=307200, number=256, buf=0xb7708008
ich_spi_read_page: offset=307456, number=256, buf=0xb7708108
ich_spi_read_page: offset=307712, number=256, buf=0xb7708208
ich_spi_read_page: offset=307968, number=256, buf=0xb7708308
ich_spi_read_page: offset=308224, number=256, buf=0xb7708408
ich_spi_read_page: offset=308480, number=256, buf=0xb7708508
ich_spi_read_page: offset=308736, number=256, buf=0xb7708608
ich_spi_read_page: offset=308992, number=256, buf=0xb7708708
ich_spi_read_page: offset=309248, number=256, buf=0xb7708808
ich_spi_read_page: offset=309504, number=256, buf=0xb7708908
ich_spi_read_page: offset=309760, number=256, buf=0xb7708a08
ich_spi_read_page: offset=310016, number=256, buf=0xb7708b08
ich_spi_read_page: offset=310272, number=256, buf=0xb7708c08
ich_spi_read_page: offset=310528, number=256, buf=0xb7708d08
ich_spi_read_page: offset=310784, number=256, buf=0xb7708e08
ich_spi_read_page: offset=311040, number=256, buf=0xb7708f08
ich_spi_read_page: offset=311296, number=256, buf=0xb7709008
ich_spi_read_page: offset=311552, number=256, buf=0xb7709108
ich_spi_read_page: offset=311808, number=256, buf=0xb7709208
ich_spi_read_page: offset=312064, number=256, buf=0xb7709308
ich_spi_read_page: offset=312320, number=256, buf=0xb7709408
ich_spi_read_page: offset=312576, number=256, buf=0xb7709508
ich_spi_read_page: offset=312832, number=256, buf=0xb7709608
ich_spi_read_page: offset=313088, number=256, buf=0xb7709708
ich_spi_read_page: offset=313344, number=256, buf=0xb7709808
ich_spi_read_page: offset=313600, number=256, buf=0xb7709908
ich_spi_read_page: offset=313856, number=256, buf=0xb7709a08
ich_spi_read_page: offset=314112, number=256, buf=0xb7709b08
ich_spi_read_page: offset=314368, number=256, buf=0xb7709c08
ich_spi_read_page: offset=314624, number=256, buf=0xb7709d08
ich_spi_read_page: offset=314880, number=256, buf=0xb7709e08
ich_spi_read_page: offset=315136, number=256, buf=0xb7709f08
ich_spi_read_page: offset=315392, number=256, buf=0xb770a008
ich_spi_read_page: offset=315648, number=256, buf=0xb770a108
ich_spi_read_page: offset=315904, number=256, buf=0xb770a208
ich_spi_read_page: offset=316160, number=256, buf=0xb770a308
ich_spi_read_page: offset=316416, number=256, buf=0xb770a408
ich_spi_read_page: offset=316672, number=256, buf=0xb770a508
ich_spi_read_page: offset=316928, number=256, buf=0xb770a608
ich_spi_read_page: offset=317184, number=256, buf=0xb770a708
ich_spi_read_page: offset=317440, number=256, buf=0xb770a808
ich_spi_read_page: offset=317696, number=256, buf=0xb770a908
ich_spi_read_page: offset=317952, number=256, buf=0xb770aa08
ich_spi_read_page: offset=318208, number=256, buf=0xb770ab08
ich_spi_read_page: offset=318464, number=256, buf=0xb770ac08
ich_spi_read_page: offset=318720, number=256, buf=0xb770ad08
ich_spi_read_page: offset=318976, number=256, buf=0xb770ae08
ich_spi_read_page: offset=319232, number=256, buf=0xb770af08
ich_spi_read_page: offset=319488, number=256, buf=0xb770b008
ich_spi_read_page: offset=319744, number=256, buf=0xb770b108
ich_spi_read_page: offset=320000, number=256, buf=0xb770b208
ich_spi_read_page: offset=320256, number=256, buf=0xb770b308
ich_spi_read_page: offset=320512, number=256, buf=0xb770b408
ich_spi_read_page: offset=320768, number=256, buf=0xb770b508
ich_spi_read_page: offset=321024, number=256, buf=0xb770b608
ich_spi_read_page: offset=321280, number=256, buf=0xb770b708
ich_spi_read_page: offset=321536, number=256, buf=0xb770b808
ich_spi_read_page: offset=321792, number=256, buf=0xb770b908
ich_spi_read_page: offset=322048, number=256, buf=0xb770ba08
ich_spi_read_page: offset=322304, number=256, buf=0xb770bb08
ich_spi_read_page: offset=322560, number=256, buf=0xb770bc08
ich_spi_read_page: offset=322816, number=256, buf=0xb770bd08
ich_spi_read_page: offset=323072, number=256, buf=0xb770be08
ich_spi_read_page: offset=323328, number=256, buf=0xb770bf08
ich_spi_read_page: offset=323584, number=256, buf=0xb770c008
ich_spi_read_page: offset=323840, number=256, buf=0xb770c108
ich_spi_read_page: offset=324096, number=256, buf=0xb770c208
ich_spi_read_page: offset=324352, number=256, buf=0xb770c308
ich_spi_read_page: offset=324608, number=256, buf=0xb770c408
ich_spi_read_page: offset=324864, number=256, buf=0xb770c508
ich_spi_read_page: offset=325120, number=256, buf=0xb770c608
ich_spi_read_page: offset=325376, number=256, buf=0xb770c708
ich_spi_read_page: offset=325632, number=256, buf=0xb770c808
ich_spi_read_page: offset=325888, number=256, buf=0xb770c908
ich_spi_read_page: offset=326144, number=256, buf=0xb770ca08
ich_spi_read_page: offset=326400, number=256, buf=0xb770cb08
ich_spi_read_page: offset=326656, number=256, buf=0xb770cc08
ich_spi_read_page: offset=326912, number=256, buf=0xb770cd08
ich_spi_read_page: offset=327168, number=256, buf=0xb770ce08
ich_spi_read_page: offset=327424, number=256, buf=0xb770cf08
ich_spi_read_page: offset=327680, number=256, buf=0xb770d008
ich_spi_read_page: offset=327936, number=256, buf=0xb770d108
ich_spi_read_page: offset=328192, number=256, buf=0xb770d208
ich_spi_read_page: offset=328448, number=256, buf=0xb770d308
ich_spi_read_page: offset=328704, number=256, buf=0xb770d408
ich_spi_read_page: offset=328960, number=256, buf=0xb770d508
ich_spi_read_page: offset=329216, number=256, buf=0xb770d608
ich_spi_read_page: offset=329472, number=256, buf=0xb770d708
ich_spi_read_page: offset=329728, number=256, buf=0xb770d808
ich_spi_read_page: offset=329984, number=256, buf=0xb770d908
ich_spi_read_page: offset=330240, number=256, buf=0xb770da08
ich_spi_read_page: offset=330496, number=256, buf=0xb770db08
ich_spi_read_page: offset=330752, number=256, buf=0xb770dc08
ich_spi_read_page: offset=331008, number=256, buf=0xb770dd08
ich_spi_read_page: offset=331264, number=256, buf=0xb770de08
ich_spi_read_page: offset=331520, number=256, buf=0xb770df08
ich_spi_read_page: offset=331776, number=256, buf=0xb770e008
ich_spi_read_page: offset=332032, number=256, buf=0xb770e108
ich_spi_read_page: offset=332288, number=256, buf=0xb770e208
ich_spi_read_page: offset=332544, number=256, buf=0xb770e308
ich_spi_read_page: offset=332800, number=256, buf=0xb770e408
ich_spi_read_page: offset=333056, number=256, buf=0xb770e508
ich_spi_read_page: offset=333312, number=256, buf=0xb770e608
ich_spi_read_page: offset=333568, number=256, buf=0xb770e708
ich_spi_read_page: offset=333824, number=256, buf=0xb770e808
ich_spi_read_page: offset=334080, number=256, buf=0xb770e908
ich_spi_read_page: offset=334336, number=256, buf=0xb770ea08
ich_spi_read_page: offset=334592, number=256, buf=0xb770eb08
ich_spi_read_page: offset=334848, number=256, buf=0xb770ec08
ich_spi_read_page: offset=335104, number=256, buf=0xb770ed08
ich_spi_read_page: offset=335360, number=256, buf=0xb770ee08
ich_spi_read_page: offset=335616, number=256, buf=0xb770ef08
ich_spi_read_page: offset=335872, number=256, buf=0xb770f008
ich_spi_read_page: offset=336128, number=256, buf=0xb770f108
ich_spi_read_page: offset=336384, number=256, buf=0xb770f208
ich_spi_read_page: offset=336640, number=256, buf=0xb770f308
ich_spi_read_page: offset=336896, number=256, buf=0xb770f408
ich_spi_read_page: offset=337152, number=256, buf=0xb770f508
ich_spi_read_page: offset=337408, number=256, buf=0xb770f608
ich_spi_read_page: offset=337664, number=256, buf=0xb770f708
ich_spi_read_page: offset=337920, number=256, buf=0xb770f808
ich_spi_read_page: offset=338176, number=256, buf=0xb770f908
ich_spi_read_page: offset=338432, number=256, buf=0xb770fa08
ich_spi_read_page: offset=338688, number=256, buf=0xb770fb08
ich_spi_read_page: offset=338944, number=256, buf=0xb770fc08
ich_spi_read_page: offset=339200, number=256, buf=0xb770fd08
ich_spi_read_page: offset=339456, number=256, buf=0xb770fe08
ich_spi_read_page: offset=339712, number=256, buf=0xb770ff08
ich_spi_read_page: offset=339968, number=256, buf=0xb7710008
ich_spi_read_page: offset=340224, number=256, buf=0xb7710108
ich_spi_read_page: offset=340480, number=256, buf=0xb7710208
ich_spi_read_page: offset=340736, number=256, buf=0xb7710308
ich_spi_read_page: offset=340992, number=256, buf=0xb7710408
ich_spi_read_page: offset=341248, number=256, buf=0xb7710508
ich_spi_read_page: offset=341504, number=256, buf=0xb7710608
ich_spi_read_page: offset=341760, number=256, buf=0xb7710708
ich_spi_read_page: offset=342016, number=256, buf=0xb7710808
ich_spi_read_page: offset=342272, number=256, buf=0xb7710908
ich_spi_read_page: offset=342528, number=256, buf=0xb7710a08
ich_spi_read_page: offset=342784, number=256, buf=0xb7710b08
ich_spi_read_page: offset=343040, number=256, buf=0xb7710c08
ich_spi_read_page: offset=343296, number=256, buf=0xb7710d08
ich_spi_read_page: offset=343552, number=256, buf=0xb7710e08
ich_spi_read_page: offset=343808, number=256, buf=0xb7710f08
ich_spi_read_page: offset=344064, number=256, buf=0xb7711008
ich_spi_read_page: offset=344320, number=256, buf=0xb7711108
ich_spi_read_page: offset=344576, number=256, buf=0xb7711208
ich_spi_read_page: offset=344832, number=256, buf=0xb7711308
ich_spi_read_page: offset=345088, number=256, buf=0xb7711408
ich_spi_read_page: offset=345344, number=256, buf=0xb7711508
ich_spi_read_page: offset=345600, number=256, buf=0xb7711608
ich_spi_read_page: offset=345856, number=256, buf=0xb7711708
ich_spi_read_page: offset=346112, number=256, buf=0xb7711808
ich_spi_read_page: offset=346368, number=256, buf=0xb7711908
ich_spi_read_page: offset=346624, number=256, buf=0xb7711a08
ich_spi_read_page: offset=346880, number=256, buf=0xb7711b08
ich_spi_read_page: offset=347136, number=256, buf=0xb7711c08
ich_spi_read_page: offset=347392, number=256, buf=0xb7711d08
ich_spi_read_page: offset=347648, number=256, buf=0xb7711e08
ich_spi_read_page: offset=347904, number=256, buf=0xb7711f08
ich_spi_read_page: offset=348160, number=256, buf=0xb7712008
ich_spi_read_page: offset=348416, number=256, buf=0xb7712108
ich_spi_read_page: offset=348672, number=256, buf=0xb7712208
ich_spi_read_page: offset=348928, number=256, buf=0xb7712308
ich_spi_read_page: offset=349184, number=256, buf=0xb7712408
ich_spi_read_page: offset=349440, number=256, buf=0xb7712508
ich_spi_read_page: offset=349696, number=256, buf=0xb7712608
ich_spi_read_page: offset=349952, number=256, buf=0xb7712708
ich_spi_read_page: offset=350208, number=256, buf=0xb7712808
ich_spi_read_page: offset=350464, number=256, buf=0xb7712908
ich_spi_read_page: offset=350720, number=256, buf=0xb7712a08
ich_spi_read_page: offset=350976, number=256, buf=0xb7712b08
ich_spi_read_page: offset=351232, number=256, buf=0xb7712c08
ich_spi_read_page: offset=351488, number=256, buf=0xb7712d08
ich_spi_read_page: offset=351744, number=256, buf=0xb7712e08
ich_spi_read_page: offset=352000, number=256, buf=0xb7712f08
ich_spi_read_page: offset=352256, number=256, buf=0xb7713008
ich_spi_read_page: offset=352512, number=256, buf=0xb7713108
ich_spi_read_page: offset=352768, number=256, buf=0xb7713208
ich_spi_read_page: offset=353024, number=256, buf=0xb7713308
ich_spi_read_page: offset=353280, number=256, buf=0xb7713408
ich_spi_read_page: offset=353536, number=256, buf=0xb7713508
ich_spi_read_page: offset=353792, number=256, buf=0xb7713608
ich_spi_read_page: offset=354048, number=256, buf=0xb7713708
ich_spi_read_page: offset=354304, number=256, buf=0xb7713808
ich_spi_read_page: offset=354560, number=256, buf=0xb7713908
ich_spi_read_page: offset=354816, number=256, buf=0xb7713a08
ich_spi_read_page: offset=355072, number=256, buf=0xb7713b08
ich_spi_read_page: offset=355328, number=256, buf=0xb7713c08
ich_spi_read_page: offset=355584, number=256, buf=0xb7713d08
ich_spi_read_page: offset=355840, number=256, buf=0xb7713e08
ich_spi_read_page: offset=356096, number=256, buf=0xb7713f08
ich_spi_read_page: offset=356352, number=256, buf=0xb7714008
ich_spi_read_page: offset=356608, number=256, buf=0xb7714108
ich_spi_read_page: offset=356864, number=256, buf=0xb7714208
ich_spi_read_page: offset=357120, number=256, buf=0xb7714308
ich_spi_read_page: offset=357376, number=256, buf=0xb7714408
ich_spi_read_page: offset=357632, number=256, buf=0xb7714508
ich_spi_read_page: offset=357888, number=256, buf=0xb7714608
ich_spi_read_page: offset=358144, number=256, buf=0xb7714708
ich_spi_read_page: offset=358400, number=256, buf=0xb7714808
ich_spi_read_page: offset=358656, number=256, buf=0xb7714908
ich_spi_read_page: offset=358912, number=256, buf=0xb7714a08
ich_spi_read_page: offset=359168, number=256, buf=0xb7714b08
ich_spi_read_page: offset=359424, number=256, buf=0xb7714c08
ich_spi_read_page: offset=359680, number=256, buf=0xb7714d08
ich_spi_read_page: offset=359936, number=256, buf=0xb7714e08
ich_spi_read_page: offset=360192, number=256, buf=0xb7714f08
ich_spi_read_page: offset=360448, number=256, buf=0xb7715008
ich_spi_read_page: offset=360704, number=256, buf=0xb7715108
ich_spi_read_page: offset=360960, number=256, buf=0xb7715208
ich_spi_read_page: offset=361216, number=256, buf=0xb7715308
ich_spi_read_page: offset=361472, number=256, buf=0xb7715408
ich_spi_read_page: offset=361728, number=256, buf=0xb7715508
ich_spi_read_page: offset=361984, number=256, buf=0xb7715608
ich_spi_read_page: offset=362240, number=256, buf=0xb7715708
ich_spi_read_page: offset=362496, number=256, buf=0xb7715808
ich_spi_read_page: offset=362752, number=256, buf=0xb7715908
ich_spi_read_page: offset=363008, number=256, buf=0xb7715a08
ich_spi_read_page: offset=363264, number=256, buf=0xb7715b08
ich_spi_read_page: offset=363520, number=256, buf=0xb7715c08
ich_spi_read_page: offset=363776, number=256, buf=0xb7715d08
ich_spi_read_page: offset=364032, number=256, buf=0xb7715e08
ich_spi_read_page: offset=364288, number=256, buf=0xb7715f08
ich_spi_read_page: offset=364544, number=256, buf=0xb7716008
ich_spi_read_page: offset=364800, number=256, buf=0xb7716108
ich_spi_read_page: offset=365056, number=256, buf=0xb7716208
ich_spi_read_page: offset=365312, number=256, buf=0xb7716308
ich_spi_read_page: offset=365568, number=256, buf=0xb7716408
ich_spi_read_page: offset=365824, number=256, buf=0xb7716508
ich_spi_read_page: offset=366080, number=256, buf=0xb7716608
ich_spi_read_page: offset=366336, number=256, buf=0xb7716708
ich_spi_read_page: offset=366592, number=256, buf=0xb7716808
ich_spi_read_page: offset=366848, number=256, buf=0xb7716908
ich_spi_read_page: offset=367104, number=256, buf=0xb7716a08
ich_spi_read_page: offset=367360, number=256, buf=0xb7716b08
ich_spi_read_page: offset=367616, number=256, buf=0xb7716c08
ich_spi_read_page: offset=367872, number=256, buf=0xb7716d08
ich_spi_read_page: offset=368128, number=256, buf=0xb7716e08
ich_spi_read_page: offset=368384, number=256, buf=0xb7716f08
ich_spi_read_page: offset=368640, number=256, buf=0xb7717008
ich_spi_read_page: offset=368896, number=256, buf=0xb7717108
ich_spi_read_page: offset=369152, number=256, buf=0xb7717208
ich_spi_read_page: offset=369408, number=256, buf=0xb7717308
ich_spi_read_page: offset=369664, number=256, buf=0xb7717408
ich_spi_read_page: offset=369920, number=256, buf=0xb7717508
ich_spi_read_page: offset=370176, number=256, buf=0xb7717608
ich_spi_read_page: offset=370432, number=256, buf=0xb7717708
ich_spi_read_page: offset=370688, number=256, buf=0xb7717808
ich_spi_read_page: offset=370944, number=256, buf=0xb7717908
ich_spi_read_page: offset=371200, number=256, buf=0xb7717a08
ich_spi_read_page: offset=371456, number=256, buf=0xb7717b08
ich_spi_read_page: offset=371712, number=256, buf=0xb7717c08
ich_spi_read_page: offset=371968, number=256, buf=0xb7717d08
ich_spi_read_page: offset=372224, number=256, buf=0xb7717e08
ich_spi_read_page: offset=372480, number=256, buf=0xb7717f08
ich_spi_read_page: offset=372736, number=256, buf=0xb7718008
ich_spi_read_page: offset=372992, number=256, buf=0xb7718108
ich_spi_read_page: offset=373248, number=256, buf=0xb7718208
ich_spi_read_page: offset=373504, number=256, buf=0xb7718308
ich_spi_read_page: offset=373760, number=256, buf=0xb7718408
ich_spi_read_page: offset=374016, number=256, buf=0xb7718508
ich_spi_read_page: offset=374272, number=256, buf=0xb7718608
ich_spi_read_page: offset=374528, number=256, buf=0xb7718708
ich_spi_read_page: offset=374784, number=256, buf=0xb7718808
ich_spi_read_page: offset=375040, number=256, buf=0xb7718908
ich_spi_read_page: offset=375296, number=256, buf=0xb7718a08
ich_spi_read_page: offset=375552, number=256, buf=0xb7718b08
ich_spi_read_page: offset=375808, number=256, buf=0xb7718c08
ich_spi_read_page: offset=376064, number=256, buf=0xb7718d08
ich_spi_read_page: offset=376320, number=256, buf=0xb7718e08
ich_spi_read_page: offset=376576, number=256, buf=0xb7718f08
ich_spi_read_page: offset=376832, number=256, buf=0xb7719008
ich_spi_read_page: offset=377088, number=256, buf=0xb7719108
ich_spi_read_page: offset=377344, number=256, buf=0xb7719208
ich_spi_read_page: offset=377600, number=256, buf=0xb7719308
ich_spi_read_page: offset=377856, number=256, buf=0xb7719408
ich_spi_read_page: offset=378112, number=256, buf=0xb7719508
ich_spi_read_page: offset=378368, number=256, buf=0xb7719608
ich_spi_read_page: offset=378624, number=256, buf=0xb7719708
ich_spi_read_page: offset=378880, number=256, buf=0xb7719808
ich_spi_read_page: offset=379136, number=256, buf=0xb7719908
ich_spi_read_page: offset=379392, number=256, buf=0xb7719a08
ich_spi_read_page: offset=379648, number=256, buf=0xb7719b08
ich_spi_read_page: offset=379904, number=256, buf=0xb7719c08
ich_spi_read_page: offset=380160, number=256, buf=0xb7719d08
ich_spi_read_page: offset=380416, number=256, buf=0xb7719e08
ich_spi_read_page: offset=380672, number=256, buf=0xb7719f08
ich_spi_read_page: offset=380928, number=256, buf=0xb771a008
ich_spi_read_page: offset=381184, number=256, buf=0xb771a108
ich_spi_read_page: offset=381440, number=256, buf=0xb771a208
ich_spi_read_page: offset=381696, number=256, buf=0xb771a308
ich_spi_read_page: offset=381952, number=256, buf=0xb771a408
ich_spi_read_page: offset=382208, number=256, buf=0xb771a508
ich_spi_read_page: offset=382464, number=256, buf=0xb771a608
ich_spi_read_page: offset=382720, number=256, buf=0xb771a708
ich_spi_read_page: offset=382976, number=256, buf=0xb771a808
ich_spi_read_page: offset=383232, number=256, buf=0xb771a908
ich_spi_read_page: offset=383488, number=256, buf=0xb771aa08
ich_spi_read_page: offset=383744, number=256, buf=0xb771ab08
ich_spi_read_page: offset=384000, number=256, buf=0xb771ac08
ich_spi_read_page: offset=384256, number=256, buf=0xb771ad08
ich_spi_read_page: offset=384512, number=256, buf=0xb771ae08
ich_spi_read_page: offset=384768, number=256, buf=0xb771af08
ich_spi_read_page: offset=385024, number=256, buf=0xb771b008
ich_spi_read_page: offset=385280, number=256, buf=0xb771b108
ich_spi_read_page: offset=385536, number=256, buf=0xb771b208
ich_spi_read_page: offset=385792, number=256, buf=0xb771b308
ich_spi_read_page: offset=386048, number=256, buf=0xb771b408
ich_spi_read_page: offset=386304, number=256, buf=0xb771b508
ich_spi_read_page: offset=386560, number=256, buf=0xb771b608
ich_spi_read_page: offset=386816, number=256, buf=0xb771b708
ich_spi_read_page: offset=387072, number=256, buf=0xb771b808
ich_spi_read_page: offset=387328, number=256, buf=0xb771b908
ich_spi_read_page: offset=387584, number=256, buf=0xb771ba08
ich_spi_read_page: offset=387840, number=256, buf=0xb771bb08
ich_spi_read_page: offset=388096, number=256, buf=0xb771bc08
ich_spi_read_page: offset=388352, number=256, buf=0xb771bd08
ich_spi_read_page: offset=388608, number=256, buf=0xb771be08
ich_spi_read_page: offset=388864, number=256, buf=0xb771bf08
ich_spi_read_page: offset=389120, number=256, buf=0xb771c008
ich_spi_read_page: offset=389376, number=256, buf=0xb771c108
ich_spi_read_page: offset=389632, number=256, buf=0xb771c208
ich_spi_read_page: offset=389888, number=256, buf=0xb771c308
ich_spi_read_page: offset=390144, number=256, buf=0xb771c408
ich_spi_read_page: offset=390400, number=256, buf=0xb771c508
ich_spi_read_page: offset=390656, number=256, buf=0xb771c608
ich_spi_read_page: offset=390912, number=256, buf=0xb771c708
ich_spi_read_page: offset=391168, number=256, buf=0xb771c808
ich_spi_read_page: offset=391424, number=256, buf=0xb771c908
ich_spi_read_page: offset=391680, number=256, buf=0xb771ca08
ich_spi_read_page: offset=391936, number=256, buf=0xb771cb08
ich_spi_read_page: offset=392192, number=256, buf=0xb771cc08
ich_spi_read_page: offset=392448, number=256, buf=0xb771cd08
ich_spi_read_page: offset=392704, number=256, buf=0xb771ce08
ich_spi_read_page: offset=392960, number=256, buf=0xb771cf08
ich_spi_read_page: offset=393216, number=256, buf=0xb771d008
ich_spi_read_page: offset=393472, number=256, buf=0xb771d108
ich_spi_read_page: offset=393728, number=256, buf=0xb771d208
ich_spi_read_page: offset=393984, number=256, buf=0xb771d308
ich_spi_read_page: offset=394240, number=256, buf=0xb771d408
ich_spi_read_page: offset=394496, number=256, buf=0xb771d508
ich_spi_read_page: offset=394752, number=256, buf=0xb771d608
ich_spi_read_page: offset=395008, number=256, buf=0xb771d708
ich_spi_read_page: offset=395264, number=256, buf=0xb771d808
ich_spi_read_page: offset=395520, number=256, buf=0xb771d908
ich_spi_read_page: offset=395776, number=256, buf=0xb771da08
ich_spi_read_page: offset=396032, number=256, buf=0xb771db08
ich_spi_read_page: offset=396288, number=256, buf=0xb771dc08
ich_spi_read_page: offset=396544, number=256, buf=0xb771dd08
ich_spi_read_page: offset=396800, number=256, buf=0xb771de08
ich_spi_read_page: offset=397056, number=256, buf=0xb771df08
ich_spi_read_page: offset=397312, number=256, buf=0xb771e008
ich_spi_read_page: offset=397568, number=256, buf=0xb771e108
ich_spi_read_page: offset=397824, number=256, buf=0xb771e208
ich_spi_read_page: offset=398080, number=256, buf=0xb771e308
ich_spi_read_page: offset=398336, number=256, buf=0xb771e408
ich_spi_read_page: offset=398592, number=256, buf=0xb771e508
ich_spi_read_page: offset=398848, number=256, buf=0xb771e608
ich_spi_read_page: offset=399104, number=256, buf=0xb771e708
ich_spi_read_page: offset=399360, number=256, buf=0xb771e808
ich_spi_read_page: offset=399616, number=256, buf=0xb771e908
ich_spi_read_page: offset=399872, number=256, buf=0xb771ea08
ich_spi_read_page: offset=400128, number=256, buf=0xb771eb08
ich_spi_read_page: offset=400384, number=256, buf=0xb771ec08
ich_spi_read_page: offset=400640, number=256, buf=0xb771ed08
ich_spi_read_page: offset=400896, number=256, buf=0xb771ee08
ich_spi_read_page: offset=401152, number=256, buf=0xb771ef08
ich_spi_read_page: offset=401408, number=256, buf=0xb771f008
ich_spi_read_page: offset=401664, number=256, buf=0xb771f108
ich_spi_read_page: offset=401920, number=256, buf=0xb771f208
ich_spi_read_page: offset=402176, number=256, buf=0xb771f308
ich_spi_read_page: offset=402432, number=256, buf=0xb771f408
ich_spi_read_page: offset=402688, number=256, buf=0xb771f508
ich_spi_read_page: offset=402944, number=256, buf=0xb771f608
ich_spi_read_page: offset=403200, number=256, buf=0xb771f708
ich_spi_read_page: offset=403456, number=256, buf=0xb771f808
ich_spi_read_page: offset=403712, number=256, buf=0xb771f908
ich_spi_read_page: offset=403968, number=256, buf=0xb771fa08
ich_spi_read_page: offset=404224, number=256, buf=0xb771fb08
ich_spi_read_page: offset=404480, number=256, buf=0xb771fc08
ich_spi_read_page: offset=404736, number=256, buf=0xb771fd08
ich_spi_read_page: offset=404992, number=256, buf=0xb771fe08
ich_spi_read_page: offset=405248, number=256, buf=0xb771ff08
ich_spi_read_page: offset=405504, number=256, buf=0xb7720008
ich_spi_read_page: offset=405760, number=256, buf=0xb7720108
ich_spi_read_page: offset=406016, number=256, buf=0xb7720208
ich_spi_read_page: offset=406272, number=256, buf=0xb7720308
ich_spi_read_page: offset=406528, number=256, buf=0xb7720408
ich_spi_read_page: offset=406784, number=256, buf=0xb7720508
ich_spi_read_page: offset=407040, number=256, buf=0xb7720608
ich_spi_read_page: offset=407296, number=256, buf=0xb7720708
ich_spi_read_page: offset=407552, number=256, buf=0xb7720808
ich_spi_read_page: offset=407808, number=256, buf=0xb7720908
ich_spi_read_page: offset=408064, number=256, buf=0xb7720a08
ich_spi_read_page: offset=408320, number=256, buf=0xb7720b08
ich_spi_read_page: offset=408576, number=256, buf=0xb7720c08
ich_spi_read_page: offset=408832, number=256, buf=0xb7720d08
ich_spi_read_page: offset=409088, number=256, buf=0xb7720e08
ich_spi_read_page: offset=409344, number=256, buf=0xb7720f08
ich_spi_read_page: offset=409600, number=256, buf=0xb7721008
ich_spi_read_page: offset=409856, number=256, buf=0xb7721108
ich_spi_read_page: offset=410112, number=256, buf=0xb7721208
ich_spi_read_page: offset=410368, number=256, buf=0xb7721308
ich_spi_read_page: offset=410624, number=256, buf=0xb7721408
ich_spi_read_page: offset=410880, number=256, buf=0xb7721508
ich_spi_read_page: offset=411136, number=256, buf=0xb7721608
ich_spi_read_page: offset=411392, number=256, buf=0xb7721708
ich_spi_read_page: offset=411648, number=256, buf=0xb7721808
ich_spi_read_page: offset=411904, number=256, buf=0xb7721908
ich_spi_read_page: offset=412160, number=256, buf=0xb7721a08
ich_spi_read_page: offset=412416, number=256, buf=0xb7721b08
ich_spi_read_page: offset=412672, number=256, buf=0xb7721c08
ich_spi_read_page: offset=412928, number=256, buf=0xb7721d08
ich_spi_read_page: offset=413184, number=256, buf=0xb7721e08
ich_spi_read_page: offset=413440, number=256, buf=0xb7721f08
ich_spi_read_page: offset=413696, number=256, buf=0xb7722008
ich_spi_read_page: offset=413952, number=256, buf=0xb7722108
ich_spi_read_page: offset=414208, number=256, buf=0xb7722208
ich_spi_read_page: offset=414464, number=256, buf=0xb7722308
ich_spi_read_page: offset=414720, number=256, buf=0xb7722408
ich_spi_read_page: offset=414976, number=256, buf=0xb7722508
ich_spi_read_page: offset=415232, number=256, buf=0xb7722608
ich_spi_read_page: offset=415488, number=256, buf=0xb7722708
ich_spi_read_page: offset=415744, number=256, buf=0xb7722808
ich_spi_read_page: offset=416000, number=256, buf=0xb7722908
ich_spi_read_page: offset=416256, number=256, buf=0xb7722a08
ich_spi_read_page: offset=416512, number=256, buf=0xb7722b08
ich_spi_read_page: offset=416768, number=256, buf=0xb7722c08
ich_spi_read_page: offset=417024, number=256, buf=0xb7722d08
ich_spi_read_page: offset=417280, number=256, buf=0xb7722e08
ich_spi_read_page: offset=417536, number=256, buf=0xb7722f08
ich_spi_read_page: offset=417792, number=256, buf=0xb7723008
ich_spi_read_page: offset=418048, number=256, buf=0xb7723108
ich_spi_read_page: offset=418304, number=256, buf=0xb7723208
ich_spi_read_page: offset=418560, number=256, buf=0xb7723308
ich_spi_read_page: offset=418816, number=256, buf=0xb7723408
ich_spi_read_page: offset=419072, number=256, buf=0xb7723508
ich_spi_read_page: offset=419328, number=256, buf=0xb7723608
ich_spi_read_page: offset=419584, number=256, buf=0xb7723708
ich_spi_read_page: offset=419840, number=256, buf=0xb7723808
ich_spi_read_page: offset=420096, number=256, buf=0xb7723908
ich_spi_read_page: offset=420352, number=256, buf=0xb7723a08
ich_spi_read_page: offset=420608, number=256, buf=0xb7723b08
ich_spi_read_page: offset=420864, number=256, buf=0xb7723c08
ich_spi_read_page: offset=421120, number=256, buf=0xb7723d08
ich_spi_read_page: offset=421376, number=256, buf=0xb7723e08
ich_spi_read_page: offset=421632, number=256, buf=0xb7723f08
ich_spi_read_page: offset=421888, number=256, buf=0xb7724008
ich_spi_read_page: offset=422144, number=256, buf=0xb7724108
ich_spi_read_page: offset=422400, number=256, buf=0xb7724208
ich_spi_read_page: offset=422656, number=256, buf=0xb7724308
ich_spi_read_page: offset=422912, number=256, buf=0xb7724408
ich_spi_read_page: offset=423168, number=256, buf=0xb7724508
ich_spi_read_page: offset=423424, number=256, buf=0xb7724608
ich_spi_read_page: offset=423680, number=256, buf=0xb7724708
ich_spi_read_page: offset=423936, number=256, buf=0xb7724808
ich_spi_read_page: offset=424192, number=256, buf=0xb7724908
ich_spi_read_page: offset=424448, number=256, buf=0xb7724a08
ich_spi_read_page: offset=424704, number=256, buf=0xb7724b08
ich_spi_read_page: offset=424960, number=256, buf=0xb7724c08
ich_spi_read_page: offset=425216, number=256, buf=0xb7724d08
ich_spi_read_page: offset=425472, number=256, buf=0xb7724e08
ich_spi_read_page: offset=425728, number=256, buf=0xb7724f08
ich_spi_read_page: offset=425984, number=256, buf=0xb7725008
ich_spi_read_page: offset=426240, number=256, buf=0xb7725108
ich_spi_read_page: offset=426496, number=256, buf=0xb7725208
ich_spi_read_page: offset=426752, number=256, buf=0xb7725308
ich_spi_read_page: offset=427008, number=256, buf=0xb7725408
ich_spi_read_page: offset=427264, number=256, buf=0xb7725508
ich_spi_read_page: offset=427520, number=256, buf=0xb7725608
ich_spi_read_page: offset=427776, number=256, buf=0xb7725708
ich_spi_read_page: offset=428032, number=256, buf=0xb7725808
ich_spi_read_page: offset=428288, number=256, buf=0xb7725908
ich_spi_read_page: offset=428544, number=256, buf=0xb7725a08
ich_spi_read_page: offset=428800, number=256, buf=0xb7725b08
ich_spi_read_page: offset=429056, number=256, buf=0xb7725c08
ich_spi_read_page: offset=429312, number=256, buf=0xb7725d08
ich_spi_read_page: offset=429568, number=256, buf=0xb7725e08
ich_spi_read_page: offset=429824, number=256, buf=0xb7725f08
ich_spi_read_page: offset=430080, number=256, buf=0xb7726008
ich_spi_read_page: offset=430336, number=256, buf=0xb7726108
ich_spi_read_page: offset=430592, number=256, buf=0xb7726208
ich_spi_read_page: offset=430848, number=256, buf=0xb7726308
ich_spi_read_page: offset=431104, number=256, buf=0xb7726408
ich_spi_read_page: offset=431360, number=256, buf=0xb7726508
ich_spi_read_page: offset=431616, number=256, buf=0xb7726608
ich_spi_read_page: offset=431872, number=256, buf=0xb7726708
ich_spi_read_page: offset=432128, number=256, buf=0xb7726808
ich_spi_read_page: offset=432384, number=256, buf=0xb7726908
ich_spi_read_page: offset=432640, number=256, buf=0xb7726a08
ich_spi_read_page: offset=432896, number=256, buf=0xb7726b08
ich_spi_read_page: offset=433152, number=256, buf=0xb7726c08
ich_spi_read_page: offset=433408, number=256, buf=0xb7726d08
ich_spi_read_page: offset=433664, number=256, buf=0xb7726e08
ich_spi_read_page: offset=433920, number=256, buf=0xb7726f08
ich_spi_read_page: offset=434176, number=256, buf=0xb7727008
ich_spi_read_page: offset=434432, number=256, buf=0xb7727108
ich_spi_read_page: offset=434688, number=256, buf=0xb7727208
ich_spi_read_page: offset=434944, number=256, buf=0xb7727308
ich_spi_read_page: offset=435200, number=256, buf=0xb7727408
ich_spi_read_page: offset=435456, number=256, buf=0xb7727508
ich_spi_read_page: offset=435712, number=256, buf=0xb7727608
ich_spi_read_page: offset=435968, number=256, buf=0xb7727708
ich_spi_read_page: offset=436224, number=256, buf=0xb7727808
ich_spi_read_page: offset=436480, number=256, buf=0xb7727908
ich_spi_read_page: offset=436736, number=256, buf=0xb7727a08
ich_spi_read_page: offset=436992, number=256, buf=0xb7727b08
ich_spi_read_page: offset=437248, number=256, buf=0xb7727c08
ich_spi_read_page: offset=437504, number=256, buf=0xb7727d08
ich_spi_read_page: offset=437760, number=256, buf=0xb7727e08
ich_spi_read_page: offset=438016, number=256, buf=0xb7727f08
ich_spi_read_page: offset=438272, number=256, buf=0xb7728008
ich_spi_read_page: offset=438528, number=256, buf=0xb7728108
ich_spi_read_page: offset=438784, number=256, buf=0xb7728208
ich_spi_read_page: offset=439040, number=256, buf=0xb7728308
ich_spi_read_page: offset=439296, number=256, buf=0xb7728408
ich_spi_read_page: offset=439552, number=256, buf=0xb7728508
ich_spi_read_page: offset=439808, number=256, buf=0xb7728608
ich_spi_read_page: offset=440064, number=256, buf=0xb7728708
ich_spi_read_page: offset=440320, number=256, buf=0xb7728808
ich_spi_read_page: offset=440576, number=256, buf=0xb7728908
ich_spi_read_page: offset=440832, number=256, buf=0xb7728a08
ich_spi_read_page: offset=441088, number=256, buf=0xb7728b08
ich_spi_read_page: offset=441344, number=256, buf=0xb7728c08
ich_spi_read_page: offset=441600, number=256, buf=0xb7728d08
ich_spi_read_page: offset=441856, number=256, buf=0xb7728e08
ich_spi_read_page: offset=442112, number=256, buf=0xb7728f08
ich_spi_read_page: offset=442368, number=256, buf=0xb7729008
ich_spi_read_page: offset=442624, number=256, buf=0xb7729108
ich_spi_read_page: offset=442880, number=256, buf=0xb7729208
ich_spi_read_page: offset=443136, number=256, buf=0xb7729308
ich_spi_read_page: offset=443392, number=256, buf=0xb7729408
ich_spi_read_page: offset=443648, number=256, buf=0xb7729508
ich_spi_read_page: offset=443904, number=256, buf=0xb7729608
ich_spi_read_page: offset=444160, number=256, buf=0xb7729708
ich_spi_read_page: offset=444416, number=256, buf=0xb7729808
ich_spi_read_page: offset=444672, number=256, buf=0xb7729908
ich_spi_read_page: offset=444928, number=256, buf=0xb7729a08
ich_spi_read_page: offset=445184, number=256, buf=0xb7729b08
ich_spi_read_page: offset=445440, number=256, buf=0xb7729c08
ich_spi_read_page: offset=445696, number=256, buf=0xb7729d08
ich_spi_read_page: offset=445952, number=256, buf=0xb7729e08
ich_spi_read_page: offset=446208, number=256, buf=0xb7729f08
ich_spi_read_page: offset=446464, number=256, buf=0xb772a008
ich_spi_read_page: offset=446720, number=256, buf=0xb772a108
ich_spi_read_page: offset=446976, number=256, buf=0xb772a208
ich_spi_read_page: offset=447232, number=256, buf=0xb772a308
ich_spi_read_page: offset=447488, number=256, buf=0xb772a408
ich_spi_read_page: offset=447744, number=256, buf=0xb772a508
ich_spi_read_page: offset=448000, number=256, buf=0xb772a608
ich_spi_read_page: offset=448256, number=256, buf=0xb772a708
ich_spi_read_page: offset=448512, number=256, buf=0xb772a808
ich_spi_read_page: offset=448768, number=256, buf=0xb772a908
ich_spi_read_page: offset=449024, number=256, buf=0xb772aa08
ich_spi_read_page: offset=449280, number=256, buf=0xb772ab08
ich_spi_read_page: offset=449536, number=256, buf=0xb772ac08
ich_spi_read_page: offset=449792, number=256, buf=0xb772ad08
ich_spi_read_page: offset=450048, number=256, buf=0xb772ae08
ich_spi_read_page: offset=450304, number=256, buf=0xb772af08
ich_spi_read_page: offset=450560, number=256, buf=0xb772b008
ich_spi_read_page: offset=450816, number=256, buf=0xb772b108
ich_spi_read_page: offset=451072, number=256, buf=0xb772b208
ich_spi_read_page: offset=451328, number=256, buf=0xb772b308
ich_spi_read_page: offset=451584, number=256, buf=0xb772b408
ich_spi_read_page: offset=451840, number=256, buf=0xb772b508
ich_spi_read_page: offset=452096, number=256, buf=0xb772b608
ich_spi_read_page: offset=452352, number=256, buf=0xb772b708
ich_spi_read_page: offset=452608, number=256, buf=0xb772b808
ich_spi_read_page: offset=452864, number=256, buf=0xb772b908
ich_spi_read_page: offset=453120, number=256, buf=0xb772ba08
ich_spi_read_page: offset=453376, number=256, buf=0xb772bb08
ich_spi_read_page: offset=453632, number=256, buf=0xb772bc08
ich_spi_read_page: offset=453888, number=256, buf=0xb772bd08
ich_spi_read_page: offset=454144, number=256, buf=0xb772be08
ich_spi_read_page: offset=454400, number=256, buf=0xb772bf08
ich_spi_read_page: offset=454656, number=256, buf=0xb772c008
ich_spi_read_page: offset=454912, number=256, buf=0xb772c108
ich_spi_read_page: offset=455168, number=256, buf=0xb772c208
ich_spi_read_page: offset=455424, number=256, buf=0xb772c308
ich_spi_read_page: offset=455680, number=256, buf=0xb772c408
ich_spi_read_page: offset=455936, number=256, buf=0xb772c508
ich_spi_read_page: offset=456192, number=256, buf=0xb772c608
ich_spi_read_page: offset=456448, number=256, buf=0xb772c708
ich_spi_read_page: offset=456704, number=256, buf=0xb772c808
ich_spi_read_page: offset=456960, number=256, buf=0xb772c908
ich_spi_read_page: offset=457216, number=256, buf=0xb772ca08
ich_spi_read_page: offset=457472, number=256, buf=0xb772cb08
ich_spi_read_page: offset=457728, number=256, buf=0xb772cc08
ich_spi_read_page: offset=457984, number=256, buf=0xb772cd08
ich_spi_read_page: offset=458240, number=256, buf=0xb772ce08
ich_spi_read_page: offset=458496, number=256, buf=0xb772cf08
ich_spi_read_page: offset=458752, number=256, buf=0xb772d008
ich_spi_read_page: offset=459008, number=256, buf=0xb772d108
ich_spi_read_page: offset=459264, number=256, buf=0xb772d208
ich_spi_read_page: offset=459520, number=256, buf=0xb772d308
ich_spi_read_page: offset=459776, number=256, buf=0xb772d408
ich_spi_read_page: offset=460032, number=256, buf=0xb772d508
ich_spi_read_page: offset=460288, number=256, buf=0xb772d608
ich_spi_read_page: offset=460544, number=256, buf=0xb772d708
ich_spi_read_page: offset=460800, number=256, buf=0xb772d808
ich_spi_read_page: offset=461056, number=256, buf=0xb772d908
ich_spi_read_page: offset=461312, number=256, buf=0xb772da08
ich_spi_read_page: offset=461568, number=256, buf=0xb772db08
ich_spi_read_page: offset=461824, number=256, buf=0xb772dc08
ich_spi_read_page: offset=462080, number=256, buf=0xb772dd08
ich_spi_read_page: offset=462336, number=256, buf=0xb772de08
ich_spi_read_page: offset=462592, number=256, buf=0xb772df08
ich_spi_read_page: offset=462848, number=256, buf=0xb772e008
ich_spi_read_page: offset=463104, number=256, buf=0xb772e108
ich_spi_read_page: offset=463360, number=256, buf=0xb772e208
ich_spi_read_page: offset=463616, number=256, buf=0xb772e308
ich_spi_read_page: offset=463872, number=256, buf=0xb772e408
ich_spi_read_page: offset=464128, number=256, buf=0xb772e508
ich_spi_read_page: offset=464384, number=256, buf=0xb772e608
ich_spi_read_page: offset=464640, number=256, buf=0xb772e708
ich_spi_read_page: offset=464896, number=256, buf=0xb772e808
ich_spi_read_page: offset=465152, number=256, buf=0xb772e908
ich_spi_read_page: offset=465408, number=256, buf=0xb772ea08
ich_spi_read_page: offset=465664, number=256, buf=0xb772eb08
ich_spi_read_page: offset=465920, number=256, buf=0xb772ec08
ich_spi_read_page: offset=466176, number=256, buf=0xb772ed08
ich_spi_read_page: offset=466432, number=256, buf=0xb772ee08
ich_spi_read_page: offset=466688, number=256, buf=0xb772ef08
ich_spi_read_page: offset=466944, number=256, buf=0xb772f008
ich_spi_read_page: offset=467200, number=256, buf=0xb772f108
ich_spi_read_page: offset=467456, number=256, buf=0xb772f208
ich_spi_read_page: offset=467712, number=256, buf=0xb772f308
ich_spi_read_page: offset=467968, number=256, buf=0xb772f408
ich_spi_read_page: offset=468224, number=256, buf=0xb772f508
ich_spi_read_page: offset=468480, number=256, buf=0xb772f608
ich_spi_read_page: offset=468736, number=256, buf=0xb772f708
ich_spi_read_page: offset=468992, number=256, buf=0xb772f808
ich_spi_read_page: offset=469248, number=256, buf=0xb772f908
ich_spi_read_page: offset=469504, number=256, buf=0xb772fa08
ich_spi_read_page: offset=469760, number=256, buf=0xb772fb08
ich_spi_read_page: offset=470016, number=256, buf=0xb772fc08
ich_spi_read_page: offset=470272, number=256, buf=0xb772fd08
ich_spi_read_page: offset=470528, number=256, buf=0xb772fe08
ich_spi_read_page: offset=470784, number=256, buf=0xb772ff08
ich_spi_read_page: offset=471040, number=256, buf=0xb7730008
ich_spi_read_page: offset=471296, number=256, buf=0xb7730108
ich_spi_read_page: offset=471552, number=256, buf=0xb7730208
ich_spi_read_page: offset=471808, number=256, buf=0xb7730308
ich_spi_read_page: offset=472064, number=256, buf=0xb7730408
ich_spi_read_page: offset=472320, number=256, buf=0xb7730508
ich_spi_read_page: offset=472576, number=256, buf=0xb7730608
ich_spi_read_page: offset=472832, number=256, buf=0xb7730708
ich_spi_read_page: offset=473088, number=256, buf=0xb7730808
ich_spi_read_page: offset=473344, number=256, buf=0xb7730908
ich_spi_read_page: offset=473600, number=256, buf=0xb7730a08
ich_spi_read_page: offset=473856, number=256, buf=0xb7730b08
ich_spi_read_page: offset=474112, number=256, buf=0xb7730c08
ich_spi_read_page: offset=474368, number=256, buf=0xb7730d08
ich_spi_read_page: offset=474624, number=256, buf=0xb7730e08
ich_spi_read_page: offset=474880, number=256, buf=0xb7730f08
ich_spi_read_page: offset=475136, number=256, buf=0xb7731008
ich_spi_read_page: offset=475392, number=256, buf=0xb7731108
ich_spi_read_page: offset=475648, number=256, buf=0xb7731208
ich_spi_read_page: offset=475904, number=256, buf=0xb7731308
ich_spi_read_page: offset=476160, number=256, buf=0xb7731408
ich_spi_read_page: offset=476416, number=256, buf=0xb7731508
ich_spi_read_page: offset=476672, number=256, buf=0xb7731608
ich_spi_read_page: offset=476928, number=256, buf=0xb7731708
ich_spi_read_page: offset=477184, number=256, buf=0xb7731808
ich_spi_read_page: offset=477440, number=256, buf=0xb7731908
ich_spi_read_page: offset=477696, number=256, buf=0xb7731a08
ich_spi_read_page: offset=477952, number=256, buf=0xb7731b08
ich_spi_read_page: offset=478208, number=256, buf=0xb7731c08
ich_spi_read_page: offset=478464, number=256, buf=0xb7731d08
ich_spi_read_page: offset=478720, number=256, buf=0xb7731e08
ich_spi_read_page: offset=478976, number=256, buf=0xb7731f08
ich_spi_read_page: offset=479232, number=256, buf=0xb7732008
ich_spi_read_page: offset=479488, number=256, buf=0xb7732108
ich_spi_read_page: offset=479744, number=256, buf=0xb7732208
ich_spi_read_page: offset=480000, number=256, buf=0xb7732308
ich_spi_read_page: offset=480256, number=256, buf=0xb7732408
ich_spi_read_page: offset=480512, number=256, buf=0xb7732508
ich_spi_read_page: offset=480768, number=256, buf=0xb7732608
ich_spi_read_page: offset=481024, number=256, buf=0xb7732708
ich_spi_read_page: offset=481280, number=256, buf=0xb7732808
ich_spi_read_page: offset=481536, number=256, buf=0xb7732908
ich_spi_read_page: offset=481792, number=256, buf=0xb7732a08
ich_spi_read_page: offset=482048, number=256, buf=0xb7732b08
ich_spi_read_page: offset=482304, number=256, buf=0xb7732c08
ich_spi_read_page: offset=482560, number=256, buf=0xb7732d08
ich_spi_read_page: offset=482816, number=256, buf=0xb7732e08
ich_spi_read_page: offset=483072, number=256, buf=0xb7732f08
ich_spi_read_page: offset=483328, number=256, buf=0xb7733008
ich_spi_read_page: offset=483584, number=256, buf=0xb7733108
ich_spi_read_page: offset=483840, number=256, buf=0xb7733208
ich_spi_read_page: offset=484096, number=256, buf=0xb7733308
ich_spi_read_page: offset=484352, number=256, buf=0xb7733408
ich_spi_read_page: offset=484608, number=256, buf=0xb7733508
ich_spi_read_page: offset=484864, number=256, buf=0xb7733608
ich_spi_read_page: offset=485120, number=256, buf=0xb7733708
ich_spi_read_page: offset=485376, number=256, buf=0xb7733808
ich_spi_read_page: offset=485632, number=256, buf=0xb7733908
ich_spi_read_page: offset=485888, number=256, buf=0xb7733a08
ich_spi_read_page: offset=486144, number=256, buf=0xb7733b08
ich_spi_read_page: offset=486400, number=256, buf=0xb7733c08
ich_spi_read_page: offset=486656, number=256, buf=0xb7733d08
ich_spi_read_page: offset=486912, number=256, buf=0xb7733e08
ich_spi_read_page: offset=487168, number=256, buf=0xb7733f08
ich_spi_read_page: offset=487424, number=256, buf=0xb7734008
ich_spi_read_page: offset=487680, number=256, buf=0xb7734108
ich_spi_read_page: offset=487936, number=256, buf=0xb7734208
ich_spi_read_page: offset=488192, number=256, buf=0xb7734308
ich_spi_read_page: offset=488448, number=256, buf=0xb7734408
ich_spi_read_page: offset=488704, number=256, buf=0xb7734508
ich_spi_read_page: offset=488960, number=256, buf=0xb7734608
ich_spi_read_page: offset=489216, number=256, buf=0xb7734708
ich_spi_read_page: offset=489472, number=256, buf=0xb7734808
ich_spi_read_page: offset=489728, number=256, buf=0xb7734908
ich_spi_read_page: offset=489984, number=256, buf=0xb7734a08
ich_spi_read_page: offset=490240, number=256, buf=0xb7734b08
ich_spi_read_page: offset=490496, number=256, buf=0xb7734c08
ich_spi_read_page: offset=490752, number=256, buf=0xb7734d08
ich_spi_read_page: offset=491008, number=256, buf=0xb7734e08
ich_spi_read_page: offset=491264, number=256, buf=0xb7734f08
ich_spi_read_page: offset=491520, number=256, buf=0xb7735008
ich_spi_read_page: offset=491776, number=256, buf=0xb7735108
ich_spi_read_page: offset=492032, number=256, buf=0xb7735208
ich_spi_read_page: offset=492288, number=256, buf=0xb7735308
ich_spi_read_page: offset=492544, number=256, buf=0xb7735408
ich_spi_read_page: offset=492800, number=256, buf=0xb7735508
ich_spi_read_page: offset=493056, number=256, buf=0xb7735608
ich_spi_read_page: offset=493312, number=256, buf=0xb7735708
ich_spi_read_page: offset=493568, number=256, buf=0xb7735808
ich_spi_read_page: offset=493824, number=256, buf=0xb7735908
ich_spi_read_page: offset=494080, number=256, buf=0xb7735a08
ich_spi_read_page: offset=494336, number=256, buf=0xb7735b08
ich_spi_read_page: offset=494592, number=256, buf=0xb7735c08
ich_spi_read_page: offset=494848, number=256, buf=0xb7735d08
ich_spi_read_page: offset=495104, number=256, buf=0xb7735e08
ich_spi_read_page: offset=495360, number=256, buf=0xb7735f08
ich_spi_read_page: offset=495616, number=256, buf=0xb7736008
ich_spi_read_page: offset=495872, number=256, buf=0xb7736108
ich_spi_read_page: offset=496128, number=256, buf=0xb7736208
ich_spi_read_page: offset=496384, number=256, buf=0xb7736308
ich_spi_read_page: offset=496640, number=256, buf=0xb7736408
ich_spi_read_page: offset=496896, number=256, buf=0xb7736508
ich_spi_read_page: offset=497152, number=256, buf=0xb7736608
ich_spi_read_page: offset=497408, number=256, buf=0xb7736708
ich_spi_read_page: offset=497664, number=256, buf=0xb7736808
ich_spi_read_page: offset=497920, number=256, buf=0xb7736908
ich_spi_read_page: offset=498176, number=256, buf=0xb7736a08
ich_spi_read_page: offset=498432, number=256, buf=0xb7736b08
ich_spi_read_page: offset=498688, number=256, buf=0xb7736c08
ich_spi_read_page: offset=498944, number=256, buf=0xb7736d08
ich_spi_read_page: offset=499200, number=256, buf=0xb7736e08
ich_spi_read_page: offset=499456, number=256, buf=0xb7736f08
ich_spi_read_page: offset=499712, number=256, buf=0xb7737008
ich_spi_read_page: offset=499968, number=256, buf=0xb7737108
ich_spi_read_page: offset=500224, number=256, buf=0xb7737208
ich_spi_read_page: offset=500480, number=256, buf=0xb7737308
ich_spi_read_page: offset=500736, number=256, buf=0xb7737408
ich_spi_read_page: offset=500992, number=256, buf=0xb7737508
ich_spi_read_page: offset=501248, number=256, buf=0xb7737608
ich_spi_read_page: offset=501504, number=256, buf=0xb7737708
ich_spi_read_page: offset=501760, number=256, buf=0xb7737808
ich_spi_read_page: offset=502016, number=256, buf=0xb7737908
ich_spi_read_page: offset=502272, number=256, buf=0xb7737a08
ich_spi_read_page: offset=502528, number=256, buf=0xb7737b08
ich_spi_read_page: offset=502784, number=256, buf=0xb7737c08
ich_spi_read_page: offset=503040, number=256, buf=0xb7737d08
ich_spi_read_page: offset=503296, number=256, buf=0xb7737e08
ich_spi_read_page: offset=503552, number=256, buf=0xb7737f08
ich_spi_read_page: offset=503808, number=256, buf=0xb7738008
ich_spi_read_page: offset=504064, number=256, buf=0xb7738108
ich_spi_read_page: offset=504320, number=256, buf=0xb7738208
ich_spi_read_page: offset=504576, number=256, buf=0xb7738308
ich_spi_read_page: offset=504832, number=256, buf=0xb7738408
ich_spi_read_page: offset=505088, number=256, buf=0xb7738508
ich_spi_read_page: offset=505344, number=256, buf=0xb7738608
ich_spi_read_page: offset=505600, number=256, buf=0xb7738708
ich_spi_read_page: offset=505856, number=256, buf=0xb7738808
ich_spi_read_page: offset=506112, number=256, buf=0xb7738908
ich_spi_read_page: offset=506368, number=256, buf=0xb7738a08
ich_spi_read_page: offset=506624, number=256, buf=0xb7738b08
ich_spi_read_page: offset=506880, number=256, buf=0xb7738c08
ich_spi_read_page: offset=507136, number=256, buf=0xb7738d08
ich_spi_read_page: offset=507392, number=256, buf=0xb7738e08
ich_spi_read_page: offset=507648, number=256, buf=0xb7738f08
ich_spi_read_page: offset=507904, number=256, buf=0xb7739008
ich_spi_read_page: offset=508160, number=256, buf=0xb7739108
ich_spi_read_page: offset=508416, number=256, buf=0xb7739208
ich_spi_read_page: offset=508672, number=256, buf=0xb7739308
ich_spi_read_page: offset=508928, number=256, buf=0xb7739408
ich_spi_read_page: offset=509184, number=256, buf=0xb7739508
ich_spi_read_page: offset=509440, number=256, buf=0xb7739608
ich_spi_read_page: offset=509696, number=256, buf=0xb7739708
ich_spi_read_page: offset=509952, number=256, buf=0xb7739808
ich_spi_read_page: offset=510208, number=256, buf=0xb7739908
ich_spi_read_page: offset=510464, number=256, buf=0xb7739a08
ich_spi_read_page: offset=510720, number=256, buf=0xb7739b08
ich_spi_read_page: offset=510976, number=256, buf=0xb7739c08
ich_spi_read_page: offset=511232, number=256, buf=0xb7739d08
ich_spi_read_page: offset=511488, number=256, buf=0xb7739e08
ich_spi_read_page: offset=511744, number=256, buf=0xb7739f08
ich_spi_read_page: offset=512000, number=256, buf=0xb773a008
ich_spi_read_page: offset=512256, number=256, buf=0xb773a108
ich_spi_read_page: offset=512512, number=256, buf=0xb773a208
ich_spi_read_page: offset=512768, number=256, buf=0xb773a308
ich_spi_read_page: offset=513024, number=256, buf=0xb773a408
ich_spi_read_page: offset=513280, number=256, buf=0xb773a508
ich_spi_read_page: offset=513536, number=256, buf=0xb773a608
ich_spi_read_page: offset=513792, number=256, buf=0xb773a708
ich_spi_read_page: offset=514048, number=256, buf=0xb773a808
ich_spi_read_page: offset=514304, number=256, buf=0xb773a908
ich_spi_read_page: offset=514560, number=256, buf=0xb773aa08
ich_spi_read_page: offset=514816, number=256, buf=0xb773ab08
ich_spi_read_page: offset=515072, number=256, buf=0xb773ac08
ich_spi_read_page: offset=515328, number=256, buf=0xb773ad08
ich_spi_read_page: offset=515584, number=256, buf=0xb773ae08
ich_spi_read_page: offset=515840, number=256, buf=0xb773af08
ich_spi_read_page: offset=516096, number=256, buf=0xb773b008
ich_spi_read_page: offset=516352, number=256, buf=0xb773b108
ich_spi_read_page: offset=516608, number=256, buf=0xb773b208
ich_spi_read_page: offset=516864, number=256, buf=0xb773b308
ich_spi_read_page: offset=517120, number=256, buf=0xb773b408
ich_spi_read_page: offset=517376, number=256, buf=0xb773b508
ich_spi_read_page: offset=517632, number=256, buf=0xb773b608
ich_spi_read_page: offset=517888, number=256, buf=0xb773b708
ich_spi_read_page: offset=518144, number=256, buf=0xb773b808
ich_spi_read_page: offset=518400, number=256, buf=0xb773b908
ich_spi_read_page: offset=518656, number=256, buf=0xb773ba08
ich_spi_read_page: offset=518912, number=256, buf=0xb773bb08
ich_spi_read_page: offset=519168, number=256, buf=0xb773bc08
ich_spi_read_page: offset=519424, number=256, buf=0xb773bd08
ich_spi_read_page: offset=519680, number=256, buf=0xb773be08
ich_spi_read_page: offset=519936, number=256, buf=0xb773bf08
ich_spi_read_page: offset=520192, number=256, buf=0xb773c008
ich_spi_read_page: offset=520448, number=256, buf=0xb773c108
ich_spi_read_page: offset=520704, number=256, buf=0xb773c208
ich_spi_read_page: offset=520960, number=256, buf=0xb773c308
ich_spi_read_page: offset=521216, number=256, buf=0xb773c408
ich_spi_read_page: offset=521472, number=256, buf=0xb773c508
ich_spi_read_page: offset=521728, number=256, buf=0xb773c608
ich_spi_read_page: offset=521984, number=256, buf=0xb773c708
ich_spi_read_page: offset=522240, number=256, buf=0xb773c808
ich_spi_read_page: offset=522496, number=256, buf=0xb773c908
ich_spi_read_page: offset=522752, number=256, buf=0xb773ca08
ich_spi_read_page: offset=523008, number=256, buf=0xb773cb08
ich_spi_read_page: offset=523264, number=256, buf=0xb773cc08
ich_spi_read_page: offset=523520, number=256, buf=0xb773cd08
ich_spi_read_page: offset=523776, number=256, buf=0xb773ce08
ich_spi_read_page: offset=524032, number=256, buf=0xb773cf08
ich_spi_read_page: offset=524288, number=256, buf=0xb773d008
ich_spi_read_page: offset=524544, number=256, buf=0xb773d108
ich_spi_read_page: offset=524800, number=256, buf=0xb773d208
ich_spi_read_page: offset=525056, number=256, buf=0xb773d308
ich_spi_read_page: offset=525312, number=256, buf=0xb773d408
ich_spi_read_page: offset=525568, number=256, buf=0xb773d508
ich_spi_read_page: offset=525824, number=256, buf=0xb773d608
ich_spi_read_page: offset=526080, number=256, buf=0xb773d708
ich_spi_read_page: offset=526336, number=256, buf=0xb773d808
ich_spi_read_page: offset=526592, number=256, buf=0xb773d908
ich_spi_read_page: offset=526848, number=256, buf=0xb773da08
ich_spi_read_page: offset=527104, number=256, buf=0xb773db08
ich_spi_read_page: offset=527360, number=256, buf=0xb773dc08
ich_spi_read_page: offset=527616, number=256, buf=0xb773dd08
ich_spi_read_page: offset=527872, number=256, buf=0xb773de08
ich_spi_read_page: offset=528128, number=256, buf=0xb773df08
ich_spi_read_page: offset=528384, number=256, buf=0xb773e008
ich_spi_read_page: offset=528640, number=256, buf=0xb773e108
ich_spi_read_page: offset=528896, number=256, buf=0xb773e208
ich_spi_read_page: offset=529152, number=256, buf=0xb773e308
ich_spi_read_page: offset=529408, number=256, buf=0xb773e408
ich_spi_read_page: offset=529664, number=256, buf=0xb773e508
ich_spi_read_page: offset=529920, number=256, buf=0xb773e608
ich_spi_read_page: offset=530176, number=256, buf=0xb773e708
ich_spi_read_page: offset=530432, number=256, buf=0xb773e808
ich_spi_read_page: offset=530688, number=256, buf=0xb773e908
ich_spi_read_page: offset=530944, number=256, buf=0xb773ea08
ich_spi_read_page: offset=531200, number=256, buf=0xb773eb08
ich_spi_read_page: offset=531456, number=256, buf=0xb773ec08
ich_spi_read_page: offset=531712, number=256, buf=0xb773ed08
ich_spi_read_page: offset=531968, number=256, buf=0xb773ee08
ich_spi_read_page: offset=532224, number=256, buf=0xb773ef08
ich_spi_read_page: offset=532480, number=256, buf=0xb773f008
ich_spi_read_page: offset=532736, number=256, buf=0xb773f108
ich_spi_read_page: offset=532992, number=256, buf=0xb773f208
ich_spi_read_page: offset=533248, number=256, buf=0xb773f308
ich_spi_read_page: offset=533504, number=256, buf=0xb773f408
ich_spi_read_page: offset=533760, number=256, buf=0xb773f508
ich_spi_read_page: offset=534016, number=256, buf=0xb773f608
ich_spi_read_page: offset=534272, number=256, buf=0xb773f708
ich_spi_read_page: offset=534528, number=256, buf=0xb773f808
ich_spi_read_page: offset=534784, number=256, buf=0xb773f908
ich_spi_read_page: offset=535040, number=256, buf=0xb773fa08
ich_spi_read_page: offset=535296, number=256, buf=0xb773fb08
ich_spi_read_page: offset=535552, number=256, buf=0xb773fc08
ich_spi_read_page: offset=535808, number=256, buf=0xb773fd08
ich_spi_read_page: offset=536064, number=256, buf=0xb773fe08
ich_spi_read_page: offset=536320, number=256, buf=0xb773ff08
ich_spi_read_page: offset=536576, number=256, buf=0xb7740008
ich_spi_read_page: offset=536832, number=256, buf=0xb7740108
ich_spi_read_page: offset=537088, number=256, buf=0xb7740208
ich_spi_read_page: offset=537344, number=256, buf=0xb7740308
ich_spi_read_page: offset=537600, number=256, buf=0xb7740408
ich_spi_read_page: offset=537856, number=256, buf=0xb7740508
ich_spi_read_page: offset=538112, number=256, buf=0xb7740608
ich_spi_read_page: offset=538368, number=256, buf=0xb7740708
ich_spi_read_page: offset=538624, number=256, buf=0xb7740808
ich_spi_read_page: offset=538880, number=256, buf=0xb7740908
ich_spi_read_page: offset=539136, number=256, buf=0xb7740a08
ich_spi_read_page: offset=539392, number=256, buf=0xb7740b08
ich_spi_read_page: offset=539648, number=256, buf=0xb7740c08
ich_spi_read_page: offset=539904, number=256, buf=0xb7740d08
ich_spi_read_page: offset=540160, number=256, buf=0xb7740e08
ich_spi_read_page: offset=540416, number=256, buf=0xb7740f08
ich_spi_read_page: offset=540672, number=256, buf=0xb7741008
ich_spi_read_page: offset=540928, number=256, buf=0xb7741108
ich_spi_read_page: offset=541184, number=256, buf=0xb7741208
ich_spi_read_page: offset=541440, number=256, buf=0xb7741308
ich_spi_read_page: offset=541696, number=256, buf=0xb7741408
ich_spi_read_page: offset=541952, number=256, buf=0xb7741508
ich_spi_read_page: offset=542208, number=256, buf=0xb7741608
ich_spi_read_page: offset=542464, number=256, buf=0xb7741708
ich_spi_read_page: offset=542720, number=256, buf=0xb7741808
ich_spi_read_page: offset=542976, number=256, buf=0xb7741908
ich_spi_read_page: offset=543232, number=256, buf=0xb7741a08
ich_spi_read_page: offset=543488, number=256, buf=0xb7741b08
ich_spi_read_page: offset=543744, number=256, buf=0xb7741c08
ich_spi_read_page: offset=544000, number=256, buf=0xb7741d08
ich_spi_read_page: offset=544256, number=256, buf=0xb7741e08
ich_spi_read_page: offset=544512, number=256, buf=0xb7741f08
ich_spi_read_page: offset=544768, number=256, buf=0xb7742008
ich_spi_read_page: offset=545024, number=256, buf=0xb7742108
ich_spi_read_page: offset=545280, number=256, buf=0xb7742208
ich_spi_read_page: offset=545536, number=256, buf=0xb7742308
ich_spi_read_page: offset=545792, number=256, buf=0xb7742408
ich_spi_read_page: offset=546048, number=256, buf=0xb7742508
ich_spi_read_page: offset=546304, number=256, buf=0xb7742608
ich_spi_read_page: offset=546560, number=256, buf=0xb7742708
ich_spi_read_page: offset=546816, number=256, buf=0xb7742808
ich_spi_read_page: offset=547072, number=256, buf=0xb7742908
ich_spi_read_page: offset=547328, number=256, buf=0xb7742a08
ich_spi_read_page: offset=547584, number=256, buf=0xb7742b08
ich_spi_read_page: offset=547840, number=256, buf=0xb7742c08
ich_spi_read_page: offset=548096, number=256, buf=0xb7742d08
ich_spi_read_page: offset=548352, number=256, buf=0xb7742e08
ich_spi_read_page: offset=548608, number=256, buf=0xb7742f08
ich_spi_read_page: offset=548864, number=256, buf=0xb7743008
ich_spi_read_page: offset=549120, number=256, buf=0xb7743108
ich_spi_read_page: offset=549376, number=256, buf=0xb7743208
ich_spi_read_page: offset=549632, number=256, buf=0xb7743308
ich_spi_read_page: offset=549888, number=256, buf=0xb7743408
ich_spi_read_page: offset=550144, number=256, buf=0xb7743508
ich_spi_read_page: offset=550400, number=256, buf=0xb7743608
ich_spi_read_page: offset=550656, number=256, buf=0xb7743708
ich_spi_read_page: offset=550912, number=256, buf=0xb7743808
ich_spi_read_page: offset=551168, number=256, buf=0xb7743908
ich_spi_read_page: offset=551424, number=256, buf=0xb7743a08
ich_spi_read_page: offset=551680, number=256, buf=0xb7743b08
ich_spi_read_page: offset=551936, number=256, buf=0xb7743c08
ich_spi_read_page: offset=552192, number=256, buf=0xb7743d08
ich_spi_read_page: offset=552448, number=256, buf=0xb7743e08
ich_spi_read_page: offset=552704, number=256, buf=0xb7743f08
ich_spi_read_page: offset=552960, number=256, buf=0xb7744008
ich_spi_read_page: offset=553216, number=256, buf=0xb7744108
ich_spi_read_page: offset=553472, number=256, buf=0xb7744208
ich_spi_read_page: offset=553728, number=256, buf=0xb7744308
ich_spi_read_page: offset=553984, number=256, buf=0xb7744408
ich_spi_read_page: offset=554240, number=256, buf=0xb7744508
ich_spi_read_page: offset=554496, number=256, buf=0xb7744608
ich_spi_read_page: offset=554752, number=256, buf=0xb7744708
ich_spi_read_page: offset=555008, number=256, buf=0xb7744808
ich_spi_read_page: offset=555264, number=256, buf=0xb7744908
ich_spi_read_page: offset=555520, number=256, buf=0xb7744a08
ich_spi_read_page: offset=555776, number=256, buf=0xb7744b08
ich_spi_read_page: offset=556032, number=256, buf=0xb7744c08
ich_spi_read_page: offset=556288, number=256, buf=0xb7744d08
ich_spi_read_page: offset=556544, number=256, buf=0xb7744e08
ich_spi_read_page: offset=556800, number=256, buf=0xb7744f08
ich_spi_read_page: offset=557056, number=256, buf=0xb7745008
ich_spi_read_page: offset=557312, number=256, buf=0xb7745108
ich_spi_read_page: offset=557568, number=256, buf=0xb7745208
ich_spi_read_page: offset=557824, number=256, buf=0xb7745308
ich_spi_read_page: offset=558080, number=256, buf=0xb7745408
ich_spi_read_page: offset=558336, number=256, buf=0xb7745508
ich_spi_read_page: offset=558592, number=256, buf=0xb7745608
ich_spi_read_page: offset=558848, number=256, buf=0xb7745708
ich_spi_read_page: offset=559104, number=256, buf=0xb7745808
ich_spi_read_page: offset=559360, number=256, buf=0xb7745908
ich_spi_read_page: offset=559616, number=256, buf=0xb7745a08
ich_spi_read_page: offset=559872, number=256, buf=0xb7745b08
ich_spi_read_page: offset=560128, number=256, buf=0xb7745c08
ich_spi_read_page: offset=560384, number=256, buf=0xb7745d08
ich_spi_read_page: offset=560640, number=256, buf=0xb7745e08
ich_spi_read_page: offset=560896, number=256, buf=0xb7745f08
ich_spi_read_page: offset=561152, number=256, buf=0xb7746008
ich_spi_read_page: offset=561408, number=256, buf=0xb7746108
ich_spi_read_page: offset=561664, number=256, buf=0xb7746208
ich_spi_read_page: offset=561920, number=256, buf=0xb7746308
ich_spi_read_page: offset=562176, number=256, buf=0xb7746408
ich_spi_read_page: offset=562432, number=256, buf=0xb7746508
ich_spi_read_page: offset=562688, number=256, buf=0xb7746608
ich_spi_read_page: offset=562944, number=256, buf=0xb7746708
ich_spi_read_page: offset=563200, number=256, buf=0xb7746808
ich_spi_read_page: offset=563456, number=256, buf=0xb7746908
ich_spi_read_page: offset=563712, number=256, buf=0xb7746a08
ich_spi_read_page: offset=563968, number=256, buf=0xb7746b08
ich_spi_read_page: offset=564224, number=256, buf=0xb7746c08
ich_spi_read_page: offset=564480, number=256, buf=0xb7746d08
ich_spi_read_page: offset=564736, number=256, buf=0xb7746e08
ich_spi_read_page: offset=564992, number=256, buf=0xb7746f08
ich_spi_read_page: offset=565248, number=256, buf=0xb7747008
ich_spi_read_page: offset=565504, number=256, buf=0xb7747108
ich_spi_read_page: offset=565760, number=256, buf=0xb7747208
ich_spi_read_page: offset=566016, number=256, buf=0xb7747308
ich_spi_read_page: offset=566272, number=256, buf=0xb7747408
ich_spi_read_page: offset=566528, number=256, buf=0xb7747508
ich_spi_read_page: offset=566784, number=256, buf=0xb7747608
ich_spi_read_page: offset=567040, number=256, buf=0xb7747708
ich_spi_read_page: offset=567296, number=256, buf=0xb7747808
ich_spi_read_page: offset=567552, number=256, buf=0xb7747908
ich_spi_read_page: offset=567808, number=256, buf=0xb7747a08
ich_spi_read_page: offset=568064, number=256, buf=0xb7747b08
ich_spi_read_page: offset=568320, number=256, buf=0xb7747c08
ich_spi_read_page: offset=568576, number=256, buf=0xb7747d08
ich_spi_read_page: offset=568832, number=256, buf=0xb7747e08
ich_spi_read_page: offset=569088, number=256, buf=0xb7747f08
ich_spi_read_page: offset=569344, number=256, buf=0xb7748008
ich_spi_read_page: offset=569600, number=256, buf=0xb7748108
ich_spi_read_page: offset=569856, number=256, buf=0xb7748208
ich_spi_read_page: offset=570112, number=256, buf=0xb7748308
ich_spi_read_page: offset=570368, number=256, buf=0xb7748408
ich_spi_read_page: offset=570624, number=256, buf=0xb7748508
ich_spi_read_page: offset=570880, number=256, buf=0xb7748608
ich_spi_read_page: offset=571136, number=256, buf=0xb7748708
ich_spi_read_page: offset=571392, number=256, buf=0xb7748808
ich_spi_read_page: offset=571648, number=256, buf=0xb7748908
ich_spi_read_page: offset=571904, number=256, buf=0xb7748a08
ich_spi_read_page: offset=572160, number=256, buf=0xb7748b08
ich_spi_read_page: offset=572416, number=256, buf=0xb7748c08
ich_spi_read_page: offset=572672, number=256, buf=0xb7748d08
ich_spi_read_page: offset=572928, number=256, buf=0xb7748e08
ich_spi_read_page: offset=573184, number=256, buf=0xb7748f08
ich_spi_read_page: offset=573440, number=256, buf=0xb7749008
ich_spi_read_page: offset=573696, number=256, buf=0xb7749108
ich_spi_read_page: offset=573952, number=256, buf=0xb7749208
ich_spi_read_page: offset=574208, number=256, buf=0xb7749308
ich_spi_read_page: offset=574464, number=256, buf=0xb7749408
ich_spi_read_page: offset=574720, number=256, buf=0xb7749508
ich_spi_read_page: offset=574976, number=256, buf=0xb7749608
ich_spi_read_page: offset=575232, number=256, buf=0xb7749708
ich_spi_read_page: offset=575488, number=256, buf=0xb7749808
ich_spi_read_page: offset=575744, number=256, buf=0xb7749908
ich_spi_read_page: offset=576000, number=256, buf=0xb7749a08
ich_spi_read_page: offset=576256, number=256, buf=0xb7749b08
ich_spi_read_page: offset=576512, number=256, buf=0xb7749c08
ich_spi_read_page: offset=576768, number=256, buf=0xb7749d08
ich_spi_read_page: offset=577024, number=256, buf=0xb7749e08
ich_spi_read_page: offset=577280, number=256, buf=0xb7749f08
ich_spi_read_page: offset=577536, number=256, buf=0xb774a008
ich_spi_read_page: offset=577792, number=256, buf=0xb774a108
ich_spi_read_page: offset=578048, number=256, buf=0xb774a208
ich_spi_read_page: offset=578304, number=256, buf=0xb774a308
ich_spi_read_page: offset=578560, number=256, buf=0xb774a408
ich_spi_read_page: offset=578816, number=256, buf=0xb774a508
ich_spi_read_page: offset=579072, number=256, buf=0xb774a608
ich_spi_read_page: offset=579328, number=256, buf=0xb774a708
ich_spi_read_page: offset=579584, number=256, buf=0xb774a808
ich_spi_read_page: offset=579840, number=256, buf=0xb774a908
ich_spi_read_page: offset=580096, number=256, buf=0xb774aa08
ich_spi_read_page: offset=580352, number=256, buf=0xb774ab08
ich_spi_read_page: offset=580608, number=256, buf=0xb774ac08
ich_spi_read_page: offset=580864, number=256, buf=0xb774ad08
ich_spi_read_page: offset=581120, number=256, buf=0xb774ae08
ich_spi_read_page: offset=581376, number=256, buf=0xb774af08
ich_spi_read_page: offset=581632, number=256, buf=0xb774b008
ich_spi_read_page: offset=581888, number=256, buf=0xb774b108
ich_spi_read_page: offset=582144, number=256, buf=0xb774b208
ich_spi_read_page: offset=582400, number=256, buf=0xb774b308
ich_spi_read_page: offset=582656, number=256, buf=0xb774b408
ich_spi_read_page: offset=582912, number=256, buf=0xb774b508
ich_spi_read_page: offset=583168, number=256, buf=0xb774b608
ich_spi_read_page: offset=583424, number=256, buf=0xb774b708
ich_spi_read_page: offset=583680, number=256, buf=0xb774b808
ich_spi_read_page: offset=583936, number=256, buf=0xb774b908
ich_spi_read_page: offset=584192, number=256, buf=0xb774ba08
ich_spi_read_page: offset=584448, number=256, buf=0xb774bb08
ich_spi_read_page: offset=584704, number=256, buf=0xb774bc08
ich_spi_read_page: offset=584960, number=256, buf=0xb774bd08
ich_spi_read_page: offset=585216, number=256, buf=0xb774be08
ich_spi_read_page: offset=585472, number=256, buf=0xb774bf08
ich_spi_read_page: offset=585728, number=256, buf=0xb774c008
ich_spi_read_page: offset=585984, number=256, buf=0xb774c108
ich_spi_read_page: offset=586240, number=256, buf=0xb774c208
ich_spi_read_page: offset=586496, number=256, buf=0xb774c308
ich_spi_read_page: offset=586752, number=256, buf=0xb774c408
ich_spi_read_page: offset=587008, number=256, buf=0xb774c508
ich_spi_read_page: offset=587264, number=256, buf=0xb774c608
ich_spi_read_page: offset=587520, number=256, buf=0xb774c708
ich_spi_read_page: offset=587776, number=256, buf=0xb774c808
ich_spi_read_page: offset=588032, number=256, buf=0xb774c908
ich_spi_read_page: offset=588288, number=256, buf=0xb774ca08
ich_spi_read_page: offset=588544, number=256, buf=0xb774cb08
ich_spi_read_page: offset=588800, number=256, buf=0xb774cc08
ich_spi_read_page: offset=589056, number=256, buf=0xb774cd08
ich_spi_read_page: offset=589312, number=256, buf=0xb774ce08
ich_spi_read_page: offset=589568, number=256, buf=0xb774cf08
ich_spi_read_page: offset=589824, number=256, buf=0xb774d008
ich_spi_read_page: offset=590080, number=256, buf=0xb774d108
ich_spi_read_page: offset=590336, number=256, buf=0xb774d208
ich_spi_read_page: offset=590592, number=256, buf=0xb774d308
ich_spi_read_page: offset=590848, number=256, buf=0xb774d408
ich_spi_read_page: offset=591104, number=256, buf=0xb774d508
ich_spi_read_page: offset=591360, number=256, buf=0xb774d608
ich_spi_read_page: offset=591616, number=256, buf=0xb774d708
ich_spi_read_page: offset=591872, number=256, buf=0xb774d808
ich_spi_read_page: offset=592128, number=256, buf=0xb774d908
ich_spi_read_page: offset=592384, number=256, buf=0xb774da08
ich_spi_read_page: offset=592640, number=256, buf=0xb774db08
ich_spi_read_page: offset=592896, number=256, buf=0xb774dc08
ich_spi_read_page: offset=593152, number=256, buf=0xb774dd08
ich_spi_read_page: offset=593408, number=256, buf=0xb774de08
ich_spi_read_page: offset=593664, number=256, buf=0xb774df08
ich_spi_read_page: offset=593920, number=256, buf=0xb774e008
ich_spi_read_page: offset=594176, number=256, buf=0xb774e108
ich_spi_read_page: offset=594432, number=256, buf=0xb774e208
ich_spi_read_page: offset=594688, number=256, buf=0xb774e308
ich_spi_read_page: offset=594944, number=256, buf=0xb774e408
ich_spi_read_page: offset=595200, number=256, buf=0xb774e508
ich_spi_read_page: offset=595456, number=256, buf=0xb774e608
ich_spi_read_page: offset=595712, number=256, buf=0xb774e708
ich_spi_read_page: offset=595968, number=256, buf=0xb774e808
ich_spi_read_page: offset=596224, number=256, buf=0xb774e908
ich_spi_read_page: offset=596480, number=256, buf=0xb774ea08
ich_spi_read_page: offset=596736, number=256, buf=0xb774eb08
ich_spi_read_page: offset=596992, number=256, buf=0xb774ec08
ich_spi_read_page: offset=597248, number=256, buf=0xb774ed08
ich_spi_read_page: offset=597504, number=256, buf=0xb774ee08
ich_spi_read_page: offset=597760, number=256, buf=0xb774ef08
ich_spi_read_page: offset=598016, number=256, buf=0xb774f008
ich_spi_read_page: offset=598272, number=256, buf=0xb774f108
ich_spi_read_page: offset=598528, number=256, buf=0xb774f208
ich_spi_read_page: offset=598784, number=256, buf=0xb774f308
ich_spi_read_page: offset=599040, number=256, buf=0xb774f408
ich_spi_read_page: offset=599296, number=256, buf=0xb774f508
ich_spi_read_page: offset=599552, number=256, buf=0xb774f608
ich_spi_read_page: offset=599808, number=256, buf=0xb774f708
ich_spi_read_page: offset=600064, number=256, buf=0xb774f808
ich_spi_read_page: offset=600320, number=256, buf=0xb774f908
ich_spi_read_page: offset=600576, number=256, buf=0xb774fa08
ich_spi_read_page: offset=600832, number=256, buf=0xb774fb08
ich_spi_read_page: offset=601088, number=256, buf=0xb774fc08
ich_spi_read_page: offset=601344, number=256, buf=0xb774fd08
ich_spi_read_page: offset=601600, number=256, buf=0xb774fe08
ich_spi_read_page: offset=601856, number=256, buf=0xb774ff08
ich_spi_read_page: offset=602112, number=256, buf=0xb7750008
ich_spi_read_page: offset=602368, number=256, buf=0xb7750108
ich_spi_read_page: offset=602624, number=256, buf=0xb7750208
ich_spi_read_page: offset=602880, number=256, buf=0xb7750308
ich_spi_read_page: offset=603136, number=256, buf=0xb7750408
ich_spi_read_page: offset=603392, number=256, buf=0xb7750508
ich_spi_read_page: offset=603648, number=256, buf=0xb7750608
ich_spi_read_page: offset=603904, number=256, buf=0xb7750708
ich_spi_read_page: offset=604160, number=256, buf=0xb7750808
ich_spi_read_page: offset=604416, number=256, buf=0xb7750908
ich_spi_read_page: offset=604672, number=256, buf=0xb7750a08
ich_spi_read_page: offset=604928, number=256, buf=0xb7750b08
ich_spi_read_page: offset=605184, number=256, buf=0xb7750c08
ich_spi_read_page: offset=605440, number=256, buf=0xb7750d08
ich_spi_read_page: offset=605696, number=256, buf=0xb7750e08
ich_spi_read_page: offset=605952, number=256, buf=0xb7750f08
ich_spi_read_page: offset=606208, number=256, buf=0xb7751008
ich_spi_read_page: offset=606464, number=256, buf=0xb7751108
ich_spi_read_page: offset=606720, number=256, buf=0xb7751208
ich_spi_read_page: offset=606976, number=256, buf=0xb7751308
ich_spi_read_page: offset=607232, number=256, buf=0xb7751408
ich_spi_read_page: offset=607488, number=256, buf=0xb7751508
ich_spi_read_page: offset=607744, number=256, buf=0xb7751608
ich_spi_read_page: offset=608000, number=256, buf=0xb7751708
ich_spi_read_page: offset=608256, number=256, buf=0xb7751808
ich_spi_read_page: offset=608512, number=256, buf=0xb7751908
ich_spi_read_page: offset=608768, number=256, buf=0xb7751a08
ich_spi_read_page: offset=609024, number=256, buf=0xb7751b08
ich_spi_read_page: offset=609280, number=256, buf=0xb7751c08
ich_spi_read_page: offset=609536, number=256, buf=0xb7751d08
ich_spi_read_page: offset=609792, number=256, buf=0xb7751e08
ich_spi_read_page: offset=610048, number=256, buf=0xb7751f08
ich_spi_read_page: offset=610304, number=256, buf=0xb7752008
ich_spi_read_page: offset=610560, number=256, buf=0xb7752108
ich_spi_read_page: offset=610816, number=256, buf=0xb7752208
ich_spi_read_page: offset=611072, number=256, buf=0xb7752308
ich_spi_read_page: offset=611328, number=256, buf=0xb7752408
ich_spi_read_page: offset=611584, number=256, buf=0xb7752508
ich_spi_read_page: offset=611840, number=256, buf=0xb7752608
ich_spi_read_page: offset=612096, number=256, buf=0xb7752708
ich_spi_read_page: offset=612352, number=256, buf=0xb7752808
ich_spi_read_page: offset=612608, number=256, buf=0xb7752908
ich_spi_read_page: offset=612864, number=256, buf=0xb7752a08
ich_spi_read_page: offset=613120, number=256, buf=0xb7752b08
ich_spi_read_page: offset=613376, number=256, buf=0xb7752c08
ich_spi_read_page: offset=613632, number=256, buf=0xb7752d08
ich_spi_read_page: offset=613888, number=256, buf=0xb7752e08
ich_spi_read_page: offset=614144, number=256, buf=0xb7752f08
ich_spi_read_page: offset=614400, number=256, buf=0xb7753008
ich_spi_read_page: offset=614656, number=256, buf=0xb7753108
ich_spi_read_page: offset=614912, number=256, buf=0xb7753208
ich_spi_read_page: offset=615168, number=256, buf=0xb7753308
ich_spi_read_page: offset=615424, number=256, buf=0xb7753408
ich_spi_read_page: offset=615680, number=256, buf=0xb7753508
ich_spi_read_page: offset=615936, number=256, buf=0xb7753608
ich_spi_read_page: offset=616192, number=256, buf=0xb7753708
ich_spi_read_page: offset=616448, number=256, buf=0xb7753808
ich_spi_read_page: offset=616704, number=256, buf=0xb7753908
ich_spi_read_page: offset=616960, number=256, buf=0xb7753a08
ich_spi_read_page: offset=617216, number=256, buf=0xb7753b08
ich_spi_read_page: offset=617472, number=256, buf=0xb7753c08
ich_spi_read_page: offset=617728, number=256, buf=0xb7753d08
ich_spi_read_page: offset=617984, number=256, buf=0xb7753e08
ich_spi_read_page: offset=618240, number=256, buf=0xb7753f08
ich_spi_read_page: offset=618496, number=256, buf=0xb7754008
ich_spi_read_page: offset=618752, number=256, buf=0xb7754108
ich_spi_read_page: offset=619008, number=256, buf=0xb7754208
ich_spi_read_page: offset=619264, number=256, buf=0xb7754308
ich_spi_read_page: offset=619520, number=256, buf=0xb7754408
ich_spi_read_page: offset=619776, number=256, buf=0xb7754508
ich_spi_read_page: offset=620032, number=256, buf=0xb7754608
ich_spi_read_page: offset=620288, number=256, buf=0xb7754708
ich_spi_read_page: offset=620544, number=256, buf=0xb7754808
ich_spi_read_page: offset=620800, number=256, buf=0xb7754908
ich_spi_read_page: offset=621056, number=256, buf=0xb7754a08
ich_spi_read_page: offset=621312, number=256, buf=0xb7754b08
ich_spi_read_page: offset=621568, number=256, buf=0xb7754c08
ich_spi_read_page: offset=621824, number=256, buf=0xb7754d08
ich_spi_read_page: offset=622080, number=256, buf=0xb7754e08
ich_spi_read_page: offset=622336, number=256, buf=0xb7754f08
ich_spi_read_page: offset=622592, number=256, buf=0xb7755008
ich_spi_read_page: offset=622848, number=256, buf=0xb7755108
ich_spi_read_page: offset=623104, number=256, buf=0xb7755208
ich_spi_read_page: offset=623360, number=256, buf=0xb7755308
ich_spi_read_page: offset=623616, number=256, buf=0xb7755408
ich_spi_read_page: offset=623872, number=256, buf=0xb7755508
ich_spi_read_page: offset=624128, number=256, buf=0xb7755608
ich_spi_read_page: offset=624384, number=256, buf=0xb7755708
ich_spi_read_page: offset=624640, number=256, buf=0xb7755808
ich_spi_read_page: offset=624896, number=256, buf=0xb7755908
ich_spi_read_page: offset=625152, number=256, buf=0xb7755a08
ich_spi_read_page: offset=625408, number=256, buf=0xb7755b08
ich_spi_read_page: offset=625664, number=256, buf=0xb7755c08
ich_spi_read_page: offset=625920, number=256, buf=0xb7755d08
ich_spi_read_page: offset=626176, number=256, buf=0xb7755e08
ich_spi_read_page: offset=626432, number=256, buf=0xb7755f08
ich_spi_read_page: offset=626688, number=256, buf=0xb7756008
ich_spi_read_page: offset=626944, number=256, buf=0xb7756108
ich_spi_read_page: offset=627200, number=256, buf=0xb7756208
ich_spi_read_page: offset=627456, number=256, buf=0xb7756308
ich_spi_read_page: offset=627712, number=256, buf=0xb7756408
ich_spi_read_page: offset=627968, number=256, buf=0xb7756508
ich_spi_read_page: offset=628224, number=256, buf=0xb7756608
ich_spi_read_page: offset=628480, number=256, buf=0xb7756708
ich_spi_read_page: offset=628736, number=256, buf=0xb7756808
ich_spi_read_page: offset=628992, number=256, buf=0xb7756908
ich_spi_read_page: offset=629248, number=256, buf=0xb7756a08
ich_spi_read_page: offset=629504, number=256, buf=0xb7756b08
ich_spi_read_page: offset=629760, number=256, buf=0xb7756c08
ich_spi_read_page: offset=630016, number=256, buf=0xb7756d08
ich_spi_read_page: offset=630272, number=256, buf=0xb7756e08
ich_spi_read_page: offset=630528, number=256, buf=0xb7756f08
ich_spi_read_page: offset=630784, number=256, buf=0xb7757008
ich_spi_read_page: offset=631040, number=256, buf=0xb7757108
ich_spi_read_page: offset=631296, number=256, buf=0xb7757208
ich_spi_read_page: offset=631552, number=256, buf=0xb7757308
ich_spi_read_page: offset=631808, number=256, buf=0xb7757408
ich_spi_read_page: offset=632064, number=256, buf=0xb7757508
ich_spi_read_page: offset=632320, number=256, buf=0xb7757608
ich_spi_read_page: offset=632576, number=256, buf=0xb7757708
ich_spi_read_page: offset=632832, number=256, buf=0xb7757808
ich_spi_read_page: offset=633088, number=256, buf=0xb7757908
ich_spi_read_page: offset=633344, number=256, buf=0xb7757a08
ich_spi_read_page: offset=633600, number=256, buf=0xb7757b08
ich_spi_read_page: offset=633856, number=256, buf=0xb7757c08
ich_spi_read_page: offset=634112, number=256, buf=0xb7757d08
ich_spi_read_page: offset=634368, number=256, buf=0xb7757e08
ich_spi_read_page: offset=634624, number=256, buf=0xb7757f08
ich_spi_read_page: offset=634880, number=256, buf=0xb7758008
ich_spi_read_page: offset=635136, number=256, buf=0xb7758108
ich_spi_read_page: offset=635392, number=256, buf=0xb7758208
ich_spi_read_page: offset=635648, number=256, buf=0xb7758308
ich_spi_read_page: offset=635904, number=256, buf=0xb7758408
ich_spi_read_page: offset=636160, number=256, buf=0xb7758508
ich_spi_read_page: offset=636416, number=256, buf=0xb7758608
ich_spi_read_page: offset=636672, number=256, buf=0xb7758708
ich_spi_read_page: offset=636928, number=256, buf=0xb7758808
ich_spi_read_page: offset=637184, number=256, buf=0xb7758908
ich_spi_read_page: offset=637440, number=256, buf=0xb7758a08
ich_spi_read_page: offset=637696, number=256, buf=0xb7758b08
ich_spi_read_page: offset=637952, number=256, buf=0xb7758c08
ich_spi_read_page: offset=638208, number=256, buf=0xb7758d08
ich_spi_read_page: offset=638464, number=256, buf=0xb7758e08
ich_spi_read_page: offset=638720, number=256, buf=0xb7758f08
ich_spi_read_page: offset=638976, number=256, buf=0xb7759008
ich_spi_read_page: offset=639232, number=256, buf=0xb7759108
ich_spi_read_page: offset=639488, number=256, buf=0xb7759208
ich_spi_read_page: offset=639744, number=256, buf=0xb7759308
ich_spi_read_page: offset=640000, number=256, buf=0xb7759408
ich_spi_read_page: offset=640256, number=256, buf=0xb7759508
ich_spi_read_page: offset=640512, number=256, buf=0xb7759608
ich_spi_read_page: offset=640768, number=256, buf=0xb7759708
ich_spi_read_page: offset=641024, number=256, buf=0xb7759808
ich_spi_read_page: offset=641280, number=256, buf=0xb7759908
ich_spi_read_page: offset=641536, number=256, buf=0xb7759a08
ich_spi_read_page: offset=641792, number=256, buf=0xb7759b08
ich_spi_read_page: offset=642048, number=256, buf=0xb7759c08
ich_spi_read_page: offset=642304, number=256, buf=0xb7759d08
ich_spi_read_page: offset=642560, number=256, buf=0xb7759e08
ich_spi_read_page: offset=642816, number=256, buf=0xb7759f08
ich_spi_read_page: offset=643072, number=256, buf=0xb775a008
ich_spi_read_page: offset=643328, number=256, buf=0xb775a108
ich_spi_read_page: offset=643584, number=256, buf=0xb775a208
ich_spi_read_page: offset=643840, number=256, buf=0xb775a308
ich_spi_read_page: offset=644096, number=256, buf=0xb775a408
ich_spi_read_page: offset=644352, number=256, buf=0xb775a508
ich_spi_read_page: offset=644608, number=256, buf=0xb775a608
ich_spi_read_page: offset=644864, number=256, buf=0xb775a708
ich_spi_read_page: offset=645120, number=256, buf=0xb775a808
ich_spi_read_page: offset=645376, number=256, buf=0xb775a908
ich_spi_read_page: offset=645632, number=256, buf=0xb775aa08
ich_spi_read_page: offset=645888, number=256, buf=0xb775ab08
ich_spi_read_page: offset=646144, number=256, buf=0xb775ac08
ich_spi_read_page: offset=646400, number=256, buf=0xb775ad08
ich_spi_read_page: offset=646656, number=256, buf=0xb775ae08
ich_spi_read_page: offset=646912, number=256, buf=0xb775af08
ich_spi_read_page: offset=647168, number=256, buf=0xb775b008
ich_spi_read_page: offset=647424, number=256, buf=0xb775b108
ich_spi_read_page: offset=647680, number=256, buf=0xb775b208
ich_spi_read_page: offset=647936, number=256, buf=0xb775b308
ich_spi_read_page: offset=648192, number=256, buf=0xb775b408
ich_spi_read_page: offset=648448, number=256, buf=0xb775b508
ich_spi_read_page: offset=648704, number=256, buf=0xb775b608
ich_spi_read_page: offset=648960, number=256, buf=0xb775b708
ich_spi_read_page: offset=649216, number=256, buf=0xb775b808
ich_spi_read_page: offset=649472, number=256, buf=0xb775b908
ich_spi_read_page: offset=649728, number=256, buf=0xb775ba08
ich_spi_read_page: offset=649984, number=256, buf=0xb775bb08
ich_spi_read_page: offset=650240, number=256, buf=0xb775bc08
ich_spi_read_page: offset=650496, number=256, buf=0xb775bd08
ich_spi_read_page: offset=650752, number=256, buf=0xb775be08
ich_spi_read_page: offset=651008, number=256, buf=0xb775bf08
ich_spi_read_page: offset=651264, number=256, buf=0xb775c008
ich_spi_read_page: offset=651520, number=256, buf=0xb775c108
ich_spi_read_page: offset=651776, number=256, buf=0xb775c208
ich_spi_read_page: offset=652032, number=256, buf=0xb775c308
ich_spi_read_page: offset=652288, number=256, buf=0xb775c408
ich_spi_read_page: offset=652544, number=256, buf=0xb775c508
ich_spi_read_page: offset=652800, number=256, buf=0xb775c608
ich_spi_read_page: offset=653056, number=256, buf=0xb775c708
ich_spi_read_page: offset=653312, number=256, buf=0xb775c808
ich_spi_read_page: offset=653568, number=256, buf=0xb775c908
ich_spi_read_page: offset=653824, number=256, buf=0xb775ca08
ich_spi_read_page: offset=654080, number=256, buf=0xb775cb08
ich_spi_read_page: offset=654336, number=256, buf=0xb775cc08
ich_spi_read_page: offset=654592, number=256, buf=0xb775cd08
ich_spi_read_page: offset=654848, number=256, buf=0xb775ce08
ich_spi_read_page: offset=655104, number=256, buf=0xb775cf08
ich_spi_read_page: offset=655360, number=256, buf=0xb775d008
ich_spi_read_page: offset=655616, number=256, buf=0xb775d108
ich_spi_read_page: offset=655872, number=256, buf=0xb775d208
ich_spi_read_page: offset=656128, number=256, buf=0xb775d308
ich_spi_read_page: offset=656384, number=256, buf=0xb775d408
ich_spi_read_page: offset=656640, number=256, buf=0xb775d508
ich_spi_read_page: offset=656896, number=256, buf=0xb775d608
ich_spi_read_page: offset=657152, number=256, buf=0xb775d708
ich_spi_read_page: offset=657408, number=256, buf=0xb775d808
ich_spi_read_page: offset=657664, number=256, buf=0xb775d908
ich_spi_read_page: offset=657920, number=256, buf=0xb775da08
ich_spi_read_page: offset=658176, number=256, buf=0xb775db08
ich_spi_read_page: offset=658432, number=256, buf=0xb775dc08
ich_spi_read_page: offset=658688, number=256, buf=0xb775dd08
ich_spi_read_page: offset=658944, number=256, buf=0xb775de08
ich_spi_read_page: offset=659200, number=256, buf=0xb775df08
ich_spi_read_page: offset=659456, number=256, buf=0xb775e008
ich_spi_read_page: offset=659712, number=256, buf=0xb775e108
ich_spi_read_page: offset=659968, number=256, buf=0xb775e208
ich_spi_read_page: offset=660224, number=256, buf=0xb775e308
ich_spi_read_page: offset=660480, number=256, buf=0xb775e408
ich_spi_read_page: offset=660736, number=256, buf=0xb775e508
ich_spi_read_page: offset=660992, number=256, buf=0xb775e608
ich_spi_read_page: offset=661248, number=256, buf=0xb775e708
ich_spi_read_page: offset=661504, number=256, buf=0xb775e808
ich_spi_read_page: offset=661760, number=256, buf=0xb775e908
ich_spi_read_page: offset=662016, number=256, buf=0xb775ea08
ich_spi_read_page: offset=662272, number=256, buf=0xb775eb08
ich_spi_read_page: offset=662528, number=256, buf=0xb775ec08
ich_spi_read_page: offset=662784, number=256, buf=0xb775ed08
ich_spi_read_page: offset=663040, number=256, buf=0xb775ee08
ich_spi_read_page: offset=663296, number=256, buf=0xb775ef08
ich_spi_read_page: offset=663552, number=256, buf=0xb775f008
ich_spi_read_page: offset=663808, number=256, buf=0xb775f108
ich_spi_read_page: offset=664064, number=256, buf=0xb775f208
ich_spi_read_page: offset=664320, number=256, buf=0xb775f308
ich_spi_read_page: offset=664576, number=256, buf=0xb775f408
ich_spi_read_page: offset=664832, number=256, buf=0xb775f508
ich_spi_read_page: offset=665088, number=256, buf=0xb775f608
ich_spi_read_page: offset=665344, number=256, buf=0xb775f708
ich_spi_read_page: offset=665600, number=256, buf=0xb775f808
ich_spi_read_page: offset=665856, number=256, buf=0xb775f908
ich_spi_read_page: offset=666112, number=256, buf=0xb775fa08
ich_spi_read_page: offset=666368, number=256, buf=0xb775fb08
ich_spi_read_page: offset=666624, number=256, buf=0xb775fc08
ich_spi_read_page: offset=666880, number=256, buf=0xb775fd08
ich_spi_read_page: offset=667136, number=256, buf=0xb775fe08
ich_spi_read_page: offset=667392, number=256, buf=0xb775ff08
ich_spi_read_page: offset=667648, number=256, buf=0xb7760008
ich_spi_read_page: offset=667904, number=256, buf=0xb7760108
ich_spi_read_page: offset=668160, number=256, buf=0xb7760208
ich_spi_read_page: offset=668416, number=256, buf=0xb7760308
ich_spi_read_page: offset=668672, number=256, buf=0xb7760408
ich_spi_read_page: offset=668928, number=256, buf=0xb7760508
ich_spi_read_page: offset=669184, number=256, buf=0xb7760608
ich_spi_read_page: offset=669440, number=256, buf=0xb7760708
ich_spi_read_page: offset=669696, number=256, buf=0xb7760808
ich_spi_read_page: offset=669952, number=256, buf=0xb7760908
ich_spi_read_page: offset=670208, number=256, buf=0xb7760a08
ich_spi_read_page: offset=670464, number=256, buf=0xb7760b08
ich_spi_read_page: offset=670720, number=256, buf=0xb7760c08
ich_spi_read_page: offset=670976, number=256, buf=0xb7760d08
ich_spi_read_page: offset=671232, number=256, buf=0xb7760e08
ich_spi_read_page: offset=671488, number=256, buf=0xb7760f08
ich_spi_read_page: offset=671744, number=256, buf=0xb7761008
ich_spi_read_page: offset=672000, number=256, buf=0xb7761108
ich_spi_read_page: offset=672256, number=256, buf=0xb7761208
ich_spi_read_page: offset=672512, number=256, buf=0xb7761308
ich_spi_read_page: offset=672768, number=256, buf=0xb7761408
ich_spi_read_page: offset=673024, number=256, buf=0xb7761508
ich_spi_read_page: offset=673280, number=256, buf=0xb7761608
ich_spi_read_page: offset=673536, number=256, buf=0xb7761708
ich_spi_read_page: offset=673792, number=256, buf=0xb7761808
ich_spi_read_page: offset=674048, number=256, buf=0xb7761908
ich_spi_read_page: offset=674304, number=256, buf=0xb7761a08
ich_spi_read_page: offset=674560, number=256, buf=0xb7761b08
ich_spi_read_page: offset=674816, number=256, buf=0xb7761c08
ich_spi_read_page: offset=675072, number=256, buf=0xb7761d08
ich_spi_read_page: offset=675328, number=256, buf=0xb7761e08
ich_spi_read_page: offset=675584, number=256, buf=0xb7761f08
ich_spi_read_page: offset=675840, number=256, buf=0xb7762008
ich_spi_read_page: offset=676096, number=256, buf=0xb7762108
ich_spi_read_page: offset=676352, number=256, buf=0xb7762208
ich_spi_read_page: offset=676608, number=256, buf=0xb7762308
ich_spi_read_page: offset=676864, number=256, buf=0xb7762408
ich_spi_read_page: offset=677120, number=256, buf=0xb7762508
ich_spi_read_page: offset=677376, number=256, buf=0xb7762608
ich_spi_read_page: offset=677632, number=256, buf=0xb7762708
ich_spi_read_page: offset=677888, number=256, buf=0xb7762808
ich_spi_read_page: offset=678144, number=256, buf=0xb7762908
ich_spi_read_page: offset=678400, number=256, buf=0xb7762a08
ich_spi_read_page: offset=678656, number=256, buf=0xb7762b08
ich_spi_read_page: offset=678912, number=256, buf=0xb7762c08
ich_spi_read_page: offset=679168, number=256, buf=0xb7762d08
ich_spi_read_page: offset=679424, number=256, buf=0xb7762e08
ich_spi_read_page: offset=679680, number=256, buf=0xb7762f08
ich_spi_read_page: offset=679936, number=256, buf=0xb7763008
ich_spi_read_page: offset=680192, number=256, buf=0xb7763108
ich_spi_read_page: offset=680448, number=256, buf=0xb7763208
ich_spi_read_page: offset=680704, number=256, buf=0xb7763308
ich_spi_read_page: offset=680960, number=256, buf=0xb7763408
ich_spi_read_page: offset=681216, number=256, buf=0xb7763508
ich_spi_read_page: offset=681472, number=256, buf=0xb7763608
ich_spi_read_page: offset=681728, number=256, buf=0xb7763708
ich_spi_read_page: offset=681984, number=256, buf=0xb7763808
ich_spi_read_page: offset=682240, number=256, buf=0xb7763908
ich_spi_read_page: offset=682496, number=256, buf=0xb7763a08
ich_spi_read_page: offset=682752, number=256, buf=0xb7763b08
ich_spi_read_page: offset=683008, number=256, buf=0xb7763c08
ich_spi_read_page: offset=683264, number=256, buf=0xb7763d08
ich_spi_read_page: offset=683520, number=256, buf=0xb7763e08
ich_spi_read_page: offset=683776, number=256, buf=0xb7763f08
ich_spi_read_page: offset=684032, number=256, buf=0xb7764008
ich_spi_read_page: offset=684288, number=256, buf=0xb7764108
ich_spi_read_page: offset=684544, number=256, buf=0xb7764208
ich_spi_read_page: offset=684800, number=256, buf=0xb7764308
ich_spi_read_page: offset=685056, number=256, buf=0xb7764408
ich_spi_read_page: offset=685312, number=256, buf=0xb7764508
ich_spi_read_page: offset=685568, number=256, buf=0xb7764608
ich_spi_read_page: offset=685824, number=256, buf=0xb7764708
ich_spi_read_page: offset=686080, number=256, buf=0xb7764808
ich_spi_read_page: offset=686336, number=256, buf=0xb7764908
ich_spi_read_page: offset=686592, number=256, buf=0xb7764a08
ich_spi_read_page: offset=686848, number=256, buf=0xb7764b08
ich_spi_read_page: offset=687104, number=256, buf=0xb7764c08
ich_spi_read_page: offset=687360, number=256, buf=0xb7764d08
ich_spi_read_page: offset=687616, number=256, buf=0xb7764e08
ich_spi_read_page: offset=687872, number=256, buf=0xb7764f08
ich_spi_read_page: offset=688128, number=256, buf=0xb7765008
ich_spi_read_page: offset=688384, number=256, buf=0xb7765108
ich_spi_read_page: offset=688640, number=256, buf=0xb7765208
ich_spi_read_page: offset=688896, number=256, buf=0xb7765308
ich_spi_read_page: offset=689152, number=256, buf=0xb7765408
ich_spi_read_page: offset=689408, number=256, buf=0xb7765508
ich_spi_read_page: offset=689664, number=256, buf=0xb7765608
ich_spi_read_page: offset=689920, number=256, buf=0xb7765708
ich_spi_read_page: offset=690176, number=256, buf=0xb7765808
ich_spi_read_page: offset=690432, number=256, buf=0xb7765908
ich_spi_read_page: offset=690688, number=256, buf=0xb7765a08
ich_spi_read_page: offset=690944, number=256, buf=0xb7765b08
ich_spi_read_page: offset=691200, number=256, buf=0xb7765c08
ich_spi_read_page: offset=691456, number=256, buf=0xb7765d08
ich_spi_read_page: offset=691712, number=256, buf=0xb7765e08
ich_spi_read_page: offset=691968, number=256, buf=0xb7765f08
ich_spi_read_page: offset=692224, number=256, buf=0xb7766008
ich_spi_read_page: offset=692480, number=256, buf=0xb7766108
ich_spi_read_page: offset=692736, number=256, buf=0xb7766208
ich_spi_read_page: offset=692992, number=256, buf=0xb7766308
ich_spi_read_page: offset=693248, number=256, buf=0xb7766408
ich_spi_read_page: offset=693504, number=256, buf=0xb7766508
ich_spi_read_page: offset=693760, number=256, buf=0xb7766608
ich_spi_read_page: offset=694016, number=256, buf=0xb7766708
ich_spi_read_page: offset=694272, number=256, buf=0xb7766808
ich_spi_read_page: offset=694528, number=256, buf=0xb7766908
ich_spi_read_page: offset=694784, number=256, buf=0xb7766a08
ich_spi_read_page: offset=695040, number=256, buf=0xb7766b08
ich_spi_read_page: offset=695296, number=256, buf=0xb7766c08
ich_spi_read_page: offset=695552, number=256, buf=0xb7766d08
ich_spi_read_page: offset=695808, number=256, buf=0xb7766e08
ich_spi_read_page: offset=696064, number=256, buf=0xb7766f08
ich_spi_read_page: offset=696320, number=256, buf=0xb7767008
ich_spi_read_page: offset=696576, number=256, buf=0xb7767108
ich_spi_read_page: offset=696832, number=256, buf=0xb7767208
ich_spi_read_page: offset=697088, number=256, buf=0xb7767308
ich_spi_read_page: offset=697344, number=256, buf=0xb7767408
ich_spi_read_page: offset=697600, number=256, buf=0xb7767508
ich_spi_read_page: offset=697856, number=256, buf=0xb7767608
ich_spi_read_page: offset=698112, number=256, buf=0xb7767708
ich_spi_read_page: offset=698368, number=256, buf=0xb7767808
ich_spi_read_page: offset=698624, number=256, buf=0xb7767908
ich_spi_read_page: offset=698880, number=256, buf=0xb7767a08
ich_spi_read_page: offset=699136, number=256, buf=0xb7767b08
ich_spi_read_page: offset=699392, number=256, buf=0xb7767c08
ich_spi_read_page: offset=699648, number=256, buf=0xb7767d08
ich_spi_read_page: offset=699904, number=256, buf=0xb7767e08
ich_spi_read_page: offset=700160, number=256, buf=0xb7767f08
ich_spi_read_page: offset=700416, number=256, buf=0xb7768008
ich_spi_read_page: offset=700672, number=256, buf=0xb7768108
ich_spi_read_page: offset=700928, number=256, buf=0xb7768208
ich_spi_read_page: offset=701184, number=256, buf=0xb7768308
ich_spi_read_page: offset=701440, number=256, buf=0xb7768408
ich_spi_read_page: offset=701696, number=256, buf=0xb7768508
ich_spi_read_page: offset=701952, number=256, buf=0xb7768608
ich_spi_read_page: offset=702208, number=256, buf=0xb7768708
ich_spi_read_page: offset=702464, number=256, buf=0xb7768808
ich_spi_read_page: offset=702720, number=256, buf=0xb7768908
ich_spi_read_page: offset=702976, number=256, buf=0xb7768a08
ich_spi_read_page: offset=703232, number=256, buf=0xb7768b08
ich_spi_read_page: offset=703488, number=256, buf=0xb7768c08
ich_spi_read_page: offset=703744, number=256, buf=0xb7768d08
ich_spi_read_page: offset=704000, number=256, buf=0xb7768e08
ich_spi_read_page: offset=704256, number=256, buf=0xb7768f08
ich_spi_read_page: offset=704512, number=256, buf=0xb7769008
ich_spi_read_page: offset=704768, number=256, buf=0xb7769108
ich_spi_read_page: offset=705024, number=256, buf=0xb7769208
ich_spi_read_page: offset=705280, number=256, buf=0xb7769308
ich_spi_read_page: offset=705536, number=256, buf=0xb7769408
ich_spi_read_page: offset=705792, number=256, buf=0xb7769508
ich_spi_read_page: offset=706048, number=256, buf=0xb7769608
ich_spi_read_page: offset=706304, number=256, buf=0xb7769708
ich_spi_read_page: offset=706560, number=256, buf=0xb7769808
ich_spi_read_page: offset=706816, number=256, buf=0xb7769908
ich_spi_read_page: offset=707072, number=256, buf=0xb7769a08
ich_spi_read_page: offset=707328, number=256, buf=0xb7769b08
ich_spi_read_page: offset=707584, number=256, buf=0xb7769c08
ich_spi_read_page: offset=707840, number=256, buf=0xb7769d08
ich_spi_read_page: offset=708096, number=256, buf=0xb7769e08
ich_spi_read_page: offset=708352, number=256, buf=0xb7769f08
ich_spi_read_page: offset=708608, number=256, buf=0xb776a008
ich_spi_read_page: offset=708864, number=256, buf=0xb776a108
ich_spi_read_page: offset=709120, number=256, buf=0xb776a208
ich_spi_read_page: offset=709376, number=256, buf=0xb776a308
ich_spi_read_page: offset=709632, number=256, buf=0xb776a408
ich_spi_read_page: offset=709888, number=256, buf=0xb776a508
ich_spi_read_page: offset=710144, number=256, buf=0xb776a608
ich_spi_read_page: offset=710400, number=256, buf=0xb776a708
ich_spi_read_page: offset=710656, number=256, buf=0xb776a808
ich_spi_read_page: offset=710912, number=256, buf=0xb776a908
ich_spi_read_page: offset=711168, number=256, buf=0xb776aa08
ich_spi_read_page: offset=711424, number=256, buf=0xb776ab08
ich_spi_read_page: offset=711680, number=256, buf=0xb776ac08
ich_spi_read_page: offset=711936, number=256, buf=0xb776ad08
ich_spi_read_page: offset=712192, number=256, buf=0xb776ae08
ich_spi_read_page: offset=712448, number=256, buf=0xb776af08
ich_spi_read_page: offset=712704, number=256, buf=0xb776b008
ich_spi_read_page: offset=712960, number=256, buf=0xb776b108
ich_spi_read_page: offset=713216, number=256, buf=0xb776b208
ich_spi_read_page: offset=713472, number=256, buf=0xb776b308
ich_spi_read_page: offset=713728, number=256, buf=0xb776b408
ich_spi_read_page: offset=713984, number=256, buf=0xb776b508
ich_spi_read_page: offset=714240, number=256, buf=0xb776b608
ich_spi_read_page: offset=714496, number=256, buf=0xb776b708
ich_spi_read_page: offset=714752, number=256, buf=0xb776b808
ich_spi_read_page: offset=715008, number=256, buf=0xb776b908
ich_spi_read_page: offset=715264, number=256, buf=0xb776ba08
ich_spi_read_page: offset=715520, number=256, buf=0xb776bb08
ich_spi_read_page: offset=715776, number=256, buf=0xb776bc08
ich_spi_read_page: offset=716032, number=256, buf=0xb776bd08
ich_spi_read_page: offset=716288, number=256, buf=0xb776be08
ich_spi_read_page: offset=716544, number=256, buf=0xb776bf08
ich_spi_read_page: offset=716800, number=256, buf=0xb776c008
ich_spi_read_page: offset=717056, number=256, buf=0xb776c108
ich_spi_read_page: offset=717312, number=256, buf=0xb776c208
ich_spi_read_page: offset=717568, number=256, buf=0xb776c308
ich_spi_read_page: offset=717824, number=256, buf=0xb776c408
ich_spi_read_page: offset=718080, number=256, buf=0xb776c508
ich_spi_read_page: offset=718336, number=256, buf=0xb776c608
ich_spi_read_page: offset=718592, number=256, buf=0xb776c708
ich_spi_read_page: offset=718848, number=256, buf=0xb776c808
ich_spi_read_page: offset=719104, number=256, buf=0xb776c908
ich_spi_read_page: offset=719360, number=256, buf=0xb776ca08
ich_spi_read_page: offset=719616, number=256, buf=0xb776cb08
ich_spi_read_page: offset=719872, number=256, buf=0xb776cc08
ich_spi_read_page: offset=720128, number=256, buf=0xb776cd08
ich_spi_read_page: offset=720384, number=256, buf=0xb776ce08
ich_spi_read_page: offset=720640, number=256, buf=0xb776cf08
ich_spi_read_page: offset=720896, number=256, buf=0xb776d008
ich_spi_read_page: offset=721152, number=256, buf=0xb776d108
ich_spi_read_page: offset=721408, number=256, buf=0xb776d208
ich_spi_read_page: offset=721664, number=256, buf=0xb776d308
ich_spi_read_page: offset=721920, number=256, buf=0xb776d408
ich_spi_read_page: offset=722176, number=256, buf=0xb776d508
ich_spi_read_page: offset=722432, number=256, buf=0xb776d608
ich_spi_read_page: offset=722688, number=256, buf=0xb776d708
ich_spi_read_page: offset=722944, number=256, buf=0xb776d808
ich_spi_read_page: offset=723200, number=256, buf=0xb776d908
ich_spi_read_page: offset=723456, number=256, buf=0xb776da08
ich_spi_read_page: offset=723712, number=256, buf=0xb776db08
ich_spi_read_page: offset=723968, number=256, buf=0xb776dc08
ich_spi_read_page: offset=724224, number=256, buf=0xb776dd08
ich_spi_read_page: offset=724480, number=256, buf=0xb776de08
ich_spi_read_page: offset=724736, number=256, buf=0xb776df08
ich_spi_read_page: offset=724992, number=256, buf=0xb776e008
ich_spi_read_page: offset=725248, number=256, buf=0xb776e108
ich_spi_read_page: offset=725504, number=256, buf=0xb776e208
ich_spi_read_page: offset=725760, number=256, buf=0xb776e308
ich_spi_read_page: offset=726016, number=256, buf=0xb776e408
ich_spi_read_page: offset=726272, number=256, buf=0xb776e508
ich_spi_read_page: offset=726528, number=256, buf=0xb776e608
ich_spi_read_page: offset=726784, number=256, buf=0xb776e708
ich_spi_read_page: offset=727040, number=256, buf=0xb776e808
ich_spi_read_page: offset=727296, number=256, buf=0xb776e908
ich_spi_read_page: offset=727552, number=256, buf=0xb776ea08
ich_spi_read_page: offset=727808, number=256, buf=0xb776eb08
ich_spi_read_page: offset=728064, number=256, buf=0xb776ec08
ich_spi_read_page: offset=728320, number=256, buf=0xb776ed08
ich_spi_read_page: offset=728576, number=256, buf=0xb776ee08
ich_spi_read_page: offset=728832, number=256, buf=0xb776ef08
ich_spi_read_page: offset=729088, number=256, buf=0xb776f008
ich_spi_read_page: offset=729344, number=256, buf=0xb776f108
ich_spi_read_page: offset=729600, number=256, buf=0xb776f208
ich_spi_read_page: offset=729856, number=256, buf=0xb776f308
ich_spi_read_page: offset=730112, number=256, buf=0xb776f408
ich_spi_read_page: offset=730368, number=256, buf=0xb776f508
ich_spi_read_page: offset=730624, number=256, buf=0xb776f608
ich_spi_read_page: offset=730880, number=256, buf=0xb776f708
ich_spi_read_page: offset=731136, number=256, buf=0xb776f808
ich_spi_read_page: offset=731392, number=256, buf=0xb776f908
ich_spi_read_page: offset=731648, number=256, buf=0xb776fa08
ich_spi_read_page: offset=731904, number=256, buf=0xb776fb08
ich_spi_read_page: offset=732160, number=256, buf=0xb776fc08
ich_spi_read_page: offset=732416, number=256, buf=0xb776fd08
ich_spi_read_page: offset=732672, number=256, buf=0xb776fe08
ich_spi_read_page: offset=732928, number=256, buf=0xb776ff08
ich_spi_read_page: offset=733184, number=256, buf=0xb7770008
ich_spi_read_page: offset=733440, number=256, buf=0xb7770108
ich_spi_read_page: offset=733696, number=256, buf=0xb7770208
ich_spi_read_page: offset=733952, number=256, buf=0xb7770308
ich_spi_read_page: offset=734208, number=256, buf=0xb7770408
ich_spi_read_page: offset=734464, number=256, buf=0xb7770508
ich_spi_read_page: offset=734720, number=256, buf=0xb7770608
ich_spi_read_page: offset=734976, number=256, buf=0xb7770708
ich_spi_read_page: offset=735232, number=256, buf=0xb7770808
ich_spi_read_page: offset=735488, number=256, buf=0xb7770908
ich_spi_read_page: offset=735744, number=256, buf=0xb7770a08
ich_spi_read_page: offset=736000, number=256, buf=0xb7770b08
ich_spi_read_page: offset=736256, number=256, buf=0xb7770c08
ich_spi_read_page: offset=736512, number=256, buf=0xb7770d08
ich_spi_read_page: offset=736768, number=256, buf=0xb7770e08
ich_spi_read_page: offset=737024, number=256, buf=0xb7770f08
ich_spi_read_page: offset=737280, number=256, buf=0xb7771008
ich_spi_read_page: offset=737536, number=256, buf=0xb7771108
ich_spi_read_page: offset=737792, number=256, buf=0xb7771208
ich_spi_read_page: offset=738048, number=256, buf=0xb7771308
ich_spi_read_page: offset=738304, number=256, buf=0xb7771408
ich_spi_read_page: offset=738560, number=256, buf=0xb7771508
ich_spi_read_page: offset=738816, number=256, buf=0xb7771608
ich_spi_read_page: offset=739072, number=256, buf=0xb7771708
ich_spi_read_page: offset=739328, number=256, buf=0xb7771808
ich_spi_read_page: offset=739584, number=256, buf=0xb7771908
ich_spi_read_page: offset=739840, number=256, buf=0xb7771a08
ich_spi_read_page: offset=740096, number=256, buf=0xb7771b08
ich_spi_read_page: offset=740352, number=256, buf=0xb7771c08
ich_spi_read_page: offset=740608, number=256, buf=0xb7771d08
ich_spi_read_page: offset=740864, number=256, buf=0xb7771e08
ich_spi_read_page: offset=741120, number=256, buf=0xb7771f08
ich_spi_read_page: offset=741376, number=256, buf=0xb7772008
ich_spi_read_page: offset=741632, number=256, buf=0xb7772108
ich_spi_read_page: offset=741888, number=256, buf=0xb7772208
ich_spi_read_page: offset=742144, number=256, buf=0xb7772308
ich_spi_read_page: offset=742400, number=256, buf=0xb7772408
ich_spi_read_page: offset=742656, number=256, buf=0xb7772508
ich_spi_read_page: offset=742912, number=256, buf=0xb7772608
ich_spi_read_page: offset=743168, number=256, buf=0xb7772708
ich_spi_read_page: offset=743424, number=256, buf=0xb7772808
ich_spi_read_page: offset=743680, number=256, buf=0xb7772908
ich_spi_read_page: offset=743936, number=256, buf=0xb7772a08
ich_spi_read_page: offset=744192, number=256, buf=0xb7772b08
ich_spi_read_page: offset=744448, number=256, buf=0xb7772c08
ich_spi_read_page: offset=744704, number=256, buf=0xb7772d08
ich_spi_read_page: offset=744960, number=256, buf=0xb7772e08
ich_spi_read_page: offset=745216, number=256, buf=0xb7772f08
ich_spi_read_page: offset=745472, number=256, buf=0xb7773008
ich_spi_read_page: offset=745728, number=256, buf=0xb7773108
ich_spi_read_page: offset=745984, number=256, buf=0xb7773208
ich_spi_read_page: offset=746240, number=256, buf=0xb7773308
ich_spi_read_page: offset=746496, number=256, buf=0xb7773408
ich_spi_read_page: offset=746752, number=256, buf=0xb7773508
ich_spi_read_page: offset=747008, number=256, buf=0xb7773608
ich_spi_read_page: offset=747264, number=256, buf=0xb7773708
ich_spi_read_page: offset=747520, number=256, buf=0xb7773808
ich_spi_read_page: offset=747776, number=256, buf=0xb7773908
ich_spi_read_page: offset=748032, number=256, buf=0xb7773a08
ich_spi_read_page: offset=748288, number=256, buf=0xb7773b08
ich_spi_read_page: offset=748544, number=256, buf=0xb7773c08
ich_spi_read_page: offset=748800, number=256, buf=0xb7773d08
ich_spi_read_page: offset=749056, number=256, buf=0xb7773e08
ich_spi_read_page: offset=749312, number=256, buf=0xb7773f08
ich_spi_read_page: offset=749568, number=256, buf=0xb7774008
ich_spi_read_page: offset=749824, number=256, buf=0xb7774108
ich_spi_read_page: offset=750080, number=256, buf=0xb7774208
ich_spi_read_page: offset=750336, number=256, buf=0xb7774308
ich_spi_read_page: offset=750592, number=256, buf=0xb7774408
ich_spi_read_page: offset=750848, number=256, buf=0xb7774508
ich_spi_read_page: offset=751104, number=256, buf=0xb7774608
ich_spi_read_page: offset=751360, number=256, buf=0xb7774708
ich_spi_read_page: offset=751616, number=256, buf=0xb7774808
ich_spi_read_page: offset=751872, number=256, buf=0xb7774908
ich_spi_read_page: offset=752128, number=256, buf=0xb7774a08
ich_spi_read_page: offset=752384, number=256, buf=0xb7774b08
ich_spi_read_page: offset=752640, number=256, buf=0xb7774c08
ich_spi_read_page: offset=752896, number=256, buf=0xb7774d08
ich_spi_read_page: offset=753152, number=256, buf=0xb7774e08
ich_spi_read_page: offset=753408, number=256, buf=0xb7774f08
ich_spi_read_page: offset=753664, number=256, buf=0xb7775008
ich_spi_read_page: offset=753920, number=256, buf=0xb7775108
ich_spi_read_page: offset=754176, number=256, buf=0xb7775208
ich_spi_read_page: offset=754432, number=256, buf=0xb7775308
ich_spi_read_page: offset=754688, number=256, buf=0xb7775408
ich_spi_read_page: offset=754944, number=256, buf=0xb7775508
ich_spi_read_page: offset=755200, number=256, buf=0xb7775608
ich_spi_read_page: offset=755456, number=256, buf=0xb7775708
ich_spi_read_page: offset=755712, number=256, buf=0xb7775808
ich_spi_read_page: offset=755968, number=256, buf=0xb7775908
ich_spi_read_page: offset=756224, number=256, buf=0xb7775a08
ich_spi_read_page: offset=756480, number=256, buf=0xb7775b08
ich_spi_read_page: offset=756736, number=256, buf=0xb7775c08
ich_spi_read_page: offset=756992, number=256, buf=0xb7775d08
ich_spi_read_page: offset=757248, number=256, buf=0xb7775e08
ich_spi_read_page: offset=757504, number=256, buf=0xb7775f08
ich_spi_read_page: offset=757760, number=256, buf=0xb7776008
ich_spi_read_page: offset=758016, number=256, buf=0xb7776108
ich_spi_read_page: offset=758272, number=256, buf=0xb7776208
ich_spi_read_page: offset=758528, number=256, buf=0xb7776308
ich_spi_read_page: offset=758784, number=256, buf=0xb7776408
ich_spi_read_page: offset=759040, number=256, buf=0xb7776508
ich_spi_read_page: offset=759296, number=256, buf=0xb7776608
ich_spi_read_page: offset=759552, number=256, buf=0xb7776708
ich_spi_read_page: offset=759808, number=256, buf=0xb7776808
ich_spi_read_page: offset=760064, number=256, buf=0xb7776908
ich_spi_read_page: offset=760320, number=256, buf=0xb7776a08
ich_spi_read_page: offset=760576, number=256, buf=0xb7776b08
ich_spi_read_page: offset=760832, number=256, buf=0xb7776c08
ich_spi_read_page: offset=761088, number=256, buf=0xb7776d08
ich_spi_read_page: offset=761344, number=256, buf=0xb7776e08
ich_spi_read_page: offset=761600, number=256, buf=0xb7776f08
ich_spi_read_page: offset=761856, number=256, buf=0xb7777008
ich_spi_read_page: offset=762112, number=256, buf=0xb7777108
ich_spi_read_page: offset=762368, number=256, buf=0xb7777208
ich_spi_read_page: offset=762624, number=256, buf=0xb7777308
ich_spi_read_page: offset=762880, number=256, buf=0xb7777408
ich_spi_read_page: offset=763136, number=256, buf=0xb7777508
ich_spi_read_page: offset=763392, number=256, buf=0xb7777608
ich_spi_read_page: offset=763648, number=256, buf=0xb7777708
ich_spi_read_page: offset=763904, number=256, buf=0xb7777808
ich_spi_read_page: offset=764160, number=256, buf=0xb7777908
ich_spi_read_page: offset=764416, number=256, buf=0xb7777a08
ich_spi_read_page: offset=764672, number=256, buf=0xb7777b08
ich_spi_read_page: offset=764928, number=256, buf=0xb7777c08
ich_spi_read_page: offset=765184, number=256, buf=0xb7777d08
ich_spi_read_page: offset=765440, number=256, buf=0xb7777e08
ich_spi_read_page: offset=765696, number=256, buf=0xb7777f08
ich_spi_read_page: offset=765952, number=256, buf=0xb7778008
ich_spi_read_page: offset=766208, number=256, buf=0xb7778108
ich_spi_read_page: offset=766464, number=256, buf=0xb7778208
ich_spi_read_page: offset=766720, number=256, buf=0xb7778308
ich_spi_read_page: offset=766976, number=256, buf=0xb7778408
ich_spi_read_page: offset=767232, number=256, buf=0xb7778508
ich_spi_read_page: offset=767488, number=256, buf=0xb7778608
ich_spi_read_page: offset=767744, number=256, buf=0xb7778708
ich_spi_read_page: offset=768000, number=256, buf=0xb7778808
ich_spi_read_page: offset=768256, number=256, buf=0xb7778908
ich_spi_read_page: offset=768512, number=256, buf=0xb7778a08
ich_spi_read_page: offset=768768, number=256, buf=0xb7778b08
ich_spi_read_page: offset=769024, number=256, buf=0xb7778c08
ich_spi_read_page: offset=769280, number=256, buf=0xb7778d08
ich_spi_read_page: offset=769536, number=256, buf=0xb7778e08
ich_spi_read_page: offset=769792, number=256, buf=0xb7778f08
ich_spi_read_page: offset=770048, number=256, buf=0xb7779008
ich_spi_read_page: offset=770304, number=256, buf=0xb7779108
ich_spi_read_page: offset=770560, number=256, buf=0xb7779208
ich_spi_read_page: offset=770816, number=256, buf=0xb7779308
ich_spi_read_page: offset=771072, number=256, buf=0xb7779408
ich_spi_read_page: offset=771328, number=256, buf=0xb7779508
ich_spi_read_page: offset=771584, number=256, buf=0xb7779608
ich_spi_read_page: offset=771840, number=256, buf=0xb7779708
ich_spi_read_page: offset=772096, number=256, buf=0xb7779808
ich_spi_read_page: offset=772352, number=256, buf=0xb7779908
ich_spi_read_page: offset=772608, number=256, buf=0xb7779a08
ich_spi_read_page: offset=772864, number=256, buf=0xb7779b08
ich_spi_read_page: offset=773120, number=256, buf=0xb7779c08
ich_spi_read_page: offset=773376, number=256, buf=0xb7779d08
ich_spi_read_page: offset=773632, number=256, buf=0xb7779e08
ich_spi_read_page: offset=773888, number=256, buf=0xb7779f08
ich_spi_read_page: offset=774144, number=256, buf=0xb777a008
ich_spi_read_page: offset=774400, number=256, buf=0xb777a108
ich_spi_read_page: offset=774656, number=256, buf=0xb777a208
ich_spi_read_page: offset=774912, number=256, buf=0xb777a308
ich_spi_read_page: offset=775168, number=256, buf=0xb777a408
ich_spi_read_page: offset=775424, number=256, buf=0xb777a508
ich_spi_read_page: offset=775680, number=256, buf=0xb777a608
ich_spi_read_page: offset=775936, number=256, buf=0xb777a708
ich_spi_read_page: offset=776192, number=256, buf=0xb777a808
ich_spi_read_page: offset=776448, number=256, buf=0xb777a908
ich_spi_read_page: offset=776704, number=256, buf=0xb777aa08
ich_spi_read_page: offset=776960, number=256, buf=0xb777ab08
ich_spi_read_page: offset=777216, number=256, buf=0xb777ac08
ich_spi_read_page: offset=777472, number=256, buf=0xb777ad08
ich_spi_read_page: offset=777728, number=256, buf=0xb777ae08
ich_spi_read_page: offset=777984, number=256, buf=0xb777af08
ich_spi_read_page: offset=778240, number=256, buf=0xb777b008
ich_spi_read_page: offset=778496, number=256, buf=0xb777b108
ich_spi_read_page: offset=778752, number=256, buf=0xb777b208
ich_spi_read_page: offset=779008, number=256, buf=0xb777b308
ich_spi_read_page: offset=779264, number=256, buf=0xb777b408
ich_spi_read_page: offset=779520, number=256, buf=0xb777b508
ich_spi_read_page: offset=779776, number=256, buf=0xb777b608
ich_spi_read_page: offset=780032, number=256, buf=0xb777b708
ich_spi_read_page: offset=780288, number=256, buf=0xb777b808
ich_spi_read_page: offset=780544, number=256, buf=0xb777b908
ich_spi_read_page: offset=780800, number=256, buf=0xb777ba08
ich_spi_read_page: offset=781056, number=256, buf=0xb777bb08
ich_spi_read_page: offset=781312, number=256, buf=0xb777bc08
ich_spi_read_page: offset=781568, number=256, buf=0xb777bd08
ich_spi_read_page: offset=781824, number=256, buf=0xb777be08
ich_spi_read_page: offset=782080, number=256, buf=0xb777bf08
ich_spi_read_page: offset=782336, number=256, buf=0xb777c008
ich_spi_read_page: offset=782592, number=256, buf=0xb777c108
ich_spi_read_page: offset=782848, number=256, buf=0xb777c208
ich_spi_read_page: offset=783104, number=256, buf=0xb777c308
ich_spi_read_page: offset=783360, number=256, buf=0xb777c408
ich_spi_read_page: offset=783616, number=256, buf=0xb777c508
ich_spi_read_page: offset=783872, number=256, buf=0xb777c608
ich_spi_read_page: offset=784128, number=256, buf=0xb777c708
ich_spi_read_page: offset=784384, number=256, buf=0xb777c808
ich_spi_read_page: offset=784640, number=256, buf=0xb777c908
ich_spi_read_page: offset=784896, number=256, buf=0xb777ca08
ich_spi_read_page: offset=785152, number=256, buf=0xb777cb08
ich_spi_read_page: offset=785408, number=256, buf=0xb777cc08
ich_spi_read_page: offset=785664, number=256, buf=0xb777cd08
ich_spi_read_page: offset=785920, number=256, buf=0xb777ce08
ich_spi_read_page: offset=786176, number=256, buf=0xb777cf08
ich_spi_read_page: offset=786432, number=256, buf=0xb777d008
ich_spi_read_page: offset=786688, number=256, buf=0xb777d108
ich_spi_read_page: offset=786944, number=256, buf=0xb777d208
ich_spi_read_page: offset=787200, number=256, buf=0xb777d308
ich_spi_read_page: offset=787456, number=256, buf=0xb777d408
ich_spi_read_page: offset=787712, number=256, buf=0xb777d508
ich_spi_read_page: offset=787968, number=256, buf=0xb777d608
ich_spi_read_page: offset=788224, number=256, buf=0xb777d708
ich_spi_read_page: offset=788480, number=256, buf=0xb777d808
ich_spi_read_page: offset=788736, number=256, buf=0xb777d908
ich_spi_read_page: offset=788992, number=256, buf=0xb777da08
ich_spi_read_page: offset=789248, number=256, buf=0xb777db08
ich_spi_read_page: offset=789504, number=256, buf=0xb777dc08
ich_spi_read_page: offset=789760, number=256, buf=0xb777dd08
ich_spi_read_page: offset=790016, number=256, buf=0xb777de08
ich_spi_read_page: offset=790272, number=256, buf=0xb777df08
ich_spi_read_page: offset=790528, number=256, buf=0xb777e008
ich_spi_read_page: offset=790784, number=256, buf=0xb777e108
ich_spi_read_page: offset=791040, number=256, buf=0xb777e208
ich_spi_read_page: offset=791296, number=256, buf=0xb777e308
ich_spi_read_page: offset=791552, number=256, buf=0xb777e408
ich_spi_read_page: offset=791808, number=256, buf=0xb777e508
ich_spi_read_page: offset=792064, number=256, buf=0xb777e608
ich_spi_read_page: offset=792320, number=256, buf=0xb777e708
ich_spi_read_page: offset=792576, number=256, buf=0xb777e808
ich_spi_read_page: offset=792832, number=256, buf=0xb777e908
ich_spi_read_page: offset=793088, number=256, buf=0xb777ea08
ich_spi_read_page: offset=793344, number=256, buf=0xb777eb08
ich_spi_read_page: offset=793600, number=256, buf=0xb777ec08
ich_spi_read_page: offset=793856, number=256, buf=0xb777ed08
ich_spi_read_page: offset=794112, number=256, buf=0xb777ee08
ich_spi_read_page: offset=794368, number=256, buf=0xb777ef08
ich_spi_read_page: offset=794624, number=256, buf=0xb777f008
ich_spi_read_page: offset=794880, number=256, buf=0xb777f108
ich_spi_read_page: offset=795136, number=256, buf=0xb777f208
ich_spi_read_page: offset=795392, number=256, buf=0xb777f308
ich_spi_read_page: offset=795648, number=256, buf=0xb777f408
ich_spi_read_page: offset=795904, number=256, buf=0xb777f508
ich_spi_read_page: offset=796160, number=256, buf=0xb777f608
ich_spi_read_page: offset=796416, number=256, buf=0xb777f708
ich_spi_read_page: offset=796672, number=256, buf=0xb777f808
ich_spi_read_page: offset=796928, number=256, buf=0xb777f908
ich_spi_read_page: offset=797184, number=256, buf=0xb777fa08
ich_spi_read_page: offset=797440, number=256, buf=0xb777fb08
ich_spi_read_page: offset=797696, number=256, buf=0xb777fc08
ich_spi_read_page: offset=797952, number=256, buf=0xb777fd08
ich_spi_read_page: offset=798208, number=256, buf=0xb777fe08
ich_spi_read_page: offset=798464, number=256, buf=0xb777ff08
ich_spi_read_page: offset=798720, number=256, buf=0xb7780008
ich_spi_read_page: offset=798976, number=256, buf=0xb7780108
ich_spi_read_page: offset=799232, number=256, buf=0xb7780208
ich_spi_read_page: offset=799488, number=256, buf=0xb7780308
ich_spi_read_page: offset=799744, number=256, buf=0xb7780408
ich_spi_read_page: offset=800000, number=256, buf=0xb7780508
ich_spi_read_page: offset=800256, number=256, buf=0xb7780608
ich_spi_read_page: offset=800512, number=256, buf=0xb7780708
ich_spi_read_page: offset=800768, number=256, buf=0xb7780808
ich_spi_read_page: offset=801024, number=256, buf=0xb7780908
ich_spi_read_page: offset=801280, number=256, buf=0xb7780a08
ich_spi_read_page: offset=801536, number=256, buf=0xb7780b08
ich_spi_read_page: offset=801792, number=256, buf=0xb7780c08
ich_spi_read_page: offset=802048, number=256, buf=0xb7780d08
ich_spi_read_page: offset=802304, number=256, buf=0xb7780e08
ich_spi_read_page: offset=802560, number=256, buf=0xb7780f08
ich_spi_read_page: offset=802816, number=256, buf=0xb7781008
ich_spi_read_page: offset=803072, number=256, buf=0xb7781108
ich_spi_read_page: offset=803328, number=256, buf=0xb7781208
ich_spi_read_page: offset=803584, number=256, buf=0xb7781308
ich_spi_read_page: offset=803840, number=256, buf=0xb7781408
ich_spi_read_page: offset=804096, number=256, buf=0xb7781508
ich_spi_read_page: offset=804352, number=256, buf=0xb7781608
ich_spi_read_page: offset=804608, number=256, buf=0xb7781708
ich_spi_read_page: offset=804864, number=256, buf=0xb7781808
ich_spi_read_page: offset=805120, number=256, buf=0xb7781908
ich_spi_read_page: offset=805376, number=256, buf=0xb7781a08
ich_spi_read_page: offset=805632, number=256, buf=0xb7781b08
ich_spi_read_page: offset=805888, number=256, buf=0xb7781c08
ich_spi_read_page: offset=806144, number=256, buf=0xb7781d08
ich_spi_read_page: offset=806400, number=256, buf=0xb7781e08
ich_spi_read_page: offset=806656, number=256, buf=0xb7781f08
ich_spi_read_page: offset=806912, number=256, buf=0xb7782008
ich_spi_read_page: offset=807168, number=256, buf=0xb7782108
ich_spi_read_page: offset=807424, number=256, buf=0xb7782208
ich_spi_read_page: offset=807680, number=256, buf=0xb7782308
ich_spi_read_page: offset=807936, number=256, buf=0xb7782408
ich_spi_read_page: offset=808192, number=256, buf=0xb7782508
ich_spi_read_page: offset=808448, number=256, buf=0xb7782608
ich_spi_read_page: offset=808704, number=256, buf=0xb7782708
ich_spi_read_page: offset=808960, number=256, buf=0xb7782808
ich_spi_read_page: offset=809216, number=256, buf=0xb7782908
ich_spi_read_page: offset=809472, number=256, buf=0xb7782a08
ich_spi_read_page: offset=809728, number=256, buf=0xb7782b08
ich_spi_read_page: offset=809984, number=256, buf=0xb7782c08
ich_spi_read_page: offset=810240, number=256, buf=0xb7782d08
ich_spi_read_page: offset=810496, number=256, buf=0xb7782e08
ich_spi_read_page: offset=810752, number=256, buf=0xb7782f08
ich_spi_read_page: offset=811008, number=256, buf=0xb7783008
ich_spi_read_page: offset=811264, number=256, buf=0xb7783108
ich_spi_read_page: offset=811520, number=256, buf=0xb7783208
ich_spi_read_page: offset=811776, number=256, buf=0xb7783308
ich_spi_read_page: offset=812032, number=256, buf=0xb7783408
ich_spi_read_page: offset=812288, number=256, buf=0xb7783508
ich_spi_read_page: offset=812544, number=256, buf=0xb7783608
ich_spi_read_page: offset=812800, number=256, buf=0xb7783708
ich_spi_read_page: offset=813056, number=256, buf=0xb7783808
ich_spi_read_page: offset=813312, number=256, buf=0xb7783908
ich_spi_read_page: offset=813568, number=256, buf=0xb7783a08
ich_spi_read_page: offset=813824, number=256, buf=0xb7783b08
ich_spi_read_page: offset=814080, number=256, buf=0xb7783c08
ich_spi_read_page: offset=814336, number=256, buf=0xb7783d08
ich_spi_read_page: offset=814592, number=256, buf=0xb7783e08
ich_spi_read_page: offset=814848, number=256, buf=0xb7783f08
ich_spi_read_page: offset=815104, number=256, buf=0xb7784008
ich_spi_read_page: offset=815360, number=256, buf=0xb7784108
ich_spi_read_page: offset=815616, number=256, buf=0xb7784208
ich_spi_read_page: offset=815872, number=256, buf=0xb7784308
ich_spi_read_page: offset=816128, number=256, buf=0xb7784408
ich_spi_read_page: offset=816384, number=256, buf=0xb7784508
ich_spi_read_page: offset=816640, number=256, buf=0xb7784608
ich_spi_read_page: offset=816896, number=256, buf=0xb7784708
ich_spi_read_page: offset=817152, number=256, buf=0xb7784808
ich_spi_read_page: offset=817408, number=256, buf=0xb7784908
ich_spi_read_page: offset=817664, number=256, buf=0xb7784a08
ich_spi_read_page: offset=817920, number=256, buf=0xb7784b08
ich_spi_read_page: offset=818176, number=256, buf=0xb7784c08
ich_spi_read_page: offset=818432, number=256, buf=0xb7784d08
ich_spi_read_page: offset=818688, number=256, buf=0xb7784e08
ich_spi_read_page: offset=818944, number=256, buf=0xb7784f08
ich_spi_read_page: offset=819200, number=256, buf=0xb7785008
ich_spi_read_page: offset=819456, number=256, buf=0xb7785108
ich_spi_read_page: offset=819712, number=256, buf=0xb7785208
ich_spi_read_page: offset=819968, number=256, buf=0xb7785308
ich_spi_read_page: offset=820224, number=256, buf=0xb7785408
ich_spi_read_page: offset=820480, number=256, buf=0xb7785508
ich_spi_read_page: offset=820736, number=256, buf=0xb7785608
ich_spi_read_page: offset=820992, number=256, buf=0xb7785708
ich_spi_read_page: offset=821248, number=256, buf=0xb7785808
ich_spi_read_page: offset=821504, number=256, buf=0xb7785908
ich_spi_read_page: offset=821760, number=256, buf=0xb7785a08
ich_spi_read_page: offset=822016, number=256, buf=0xb7785b08
ich_spi_read_page: offset=822272, number=256, buf=0xb7785c08
ich_spi_read_page: offset=822528, number=256, buf=0xb7785d08
ich_spi_read_page: offset=822784, number=256, buf=0xb7785e08
ich_spi_read_page: offset=823040, number=256, buf=0xb7785f08
ich_spi_read_page: offset=823296, number=256, buf=0xb7786008
ich_spi_read_page: offset=823552, number=256, buf=0xb7786108
ich_spi_read_page: offset=823808, number=256, buf=0xb7786208
ich_spi_read_page: offset=824064, number=256, buf=0xb7786308
ich_spi_read_page: offset=824320, number=256, buf=0xb7786408
ich_spi_read_page: offset=824576, number=256, buf=0xb7786508
ich_spi_read_page: offset=824832, number=256, buf=0xb7786608
ich_spi_read_page: offset=825088, number=256, buf=0xb7786708
ich_spi_read_page: offset=825344, number=256, buf=0xb7786808
ich_spi_read_page: offset=825600, number=256, buf=0xb7786908
ich_spi_read_page: offset=825856, number=256, buf=0xb7786a08
ich_spi_read_page: offset=826112, number=256, buf=0xb7786b08
ich_spi_read_page: offset=826368, number=256, buf=0xb7786c08
ich_spi_read_page: offset=826624, number=256, buf=0xb7786d08
ich_spi_read_page: offset=826880, number=256, buf=0xb7786e08
ich_spi_read_page: offset=827136, number=256, buf=0xb7786f08
ich_spi_read_page: offset=827392, number=256, buf=0xb7787008
ich_spi_read_page: offset=827648, number=256, buf=0xb7787108
ich_spi_read_page: offset=827904, number=256, buf=0xb7787208
ich_spi_read_page: offset=828160, number=256, buf=0xb7787308
ich_spi_read_page: offset=828416, number=256, buf=0xb7787408
ich_spi_read_page: offset=828672, number=256, buf=0xb7787508
ich_spi_read_page: offset=828928, number=256, buf=0xb7787608
ich_spi_read_page: offset=829184, number=256, buf=0xb7787708
ich_spi_read_page: offset=829440, number=256, buf=0xb7787808
ich_spi_read_page: offset=829696, number=256, buf=0xb7787908
ich_spi_read_page: offset=829952, number=256, buf=0xb7787a08
ich_spi_read_page: offset=830208, number=256, buf=0xb7787b08
ich_spi_read_page: offset=830464, number=256, buf=0xb7787c08
ich_spi_read_page: offset=830720, number=256, buf=0xb7787d08
ich_spi_read_page: offset=830976, number=256, buf=0xb7787e08
ich_spi_read_page: offset=831232, number=256, buf=0xb7787f08
ich_spi_read_page: offset=831488, number=256, buf=0xb7788008
ich_spi_read_page: offset=831744, number=256, buf=0xb7788108
ich_spi_read_page: offset=832000, number=256, buf=0xb7788208
ich_spi_read_page: offset=832256, number=256, buf=0xb7788308
ich_spi_read_page: offset=832512, number=256, buf=0xb7788408
ich_spi_read_page: offset=832768, number=256, buf=0xb7788508
ich_spi_read_page: offset=833024, number=256, buf=0xb7788608
ich_spi_read_page: offset=833280, number=256, buf=0xb7788708
ich_spi_read_page: offset=833536, number=256, buf=0xb7788808
ich_spi_read_page: offset=833792, number=256, buf=0xb7788908
ich_spi_read_page: offset=834048, number=256, buf=0xb7788a08
ich_spi_read_page: offset=834304, number=256, buf=0xb7788b08
ich_spi_read_page: offset=834560, number=256, buf=0xb7788c08
ich_spi_read_page: offset=834816, number=256, buf=0xb7788d08
ich_spi_read_page: offset=835072, number=256, buf=0xb7788e08
ich_spi_read_page: offset=835328, number=256, buf=0xb7788f08
ich_spi_read_page: offset=835584, number=256, buf=0xb7789008
ich_spi_read_page: offset=835840, number=256, buf=0xb7789108
ich_spi_read_page: offset=836096, number=256, buf=0xb7789208
ich_spi_read_page: offset=836352, number=256, buf=0xb7789308
ich_spi_read_page: offset=836608, number=256, buf=0xb7789408
ich_spi_read_page: offset=836864, number=256, buf=0xb7789508
ich_spi_read_page: offset=837120, number=256, buf=0xb7789608
ich_spi_read_page: offset=837376, number=256, buf=0xb7789708
ich_spi_read_page: offset=837632, number=256, buf=0xb7789808
ich_spi_read_page: offset=837888, number=256, buf=0xb7789908
ich_spi_read_page: offset=838144, number=256, buf=0xb7789a08
ich_spi_read_page: offset=838400, number=256, buf=0xb7789b08
ich_spi_read_page: offset=838656, number=256, buf=0xb7789c08
ich_spi_read_page: offset=838912, number=256, buf=0xb7789d08
ich_spi_read_page: offset=839168, number=256, buf=0xb7789e08
ich_spi_read_page: offset=839424, number=256, buf=0xb7789f08
ich_spi_read_page: offset=839680, number=256, buf=0xb778a008
ich_spi_read_page: offset=839936, number=256, buf=0xb778a108
ich_spi_read_page: offset=840192, number=256, buf=0xb778a208
ich_spi_read_page: offset=840448, number=256, buf=0xb778a308
ich_spi_read_page: offset=840704, number=256, buf=0xb778a408
ich_spi_read_page: offset=840960, number=256, buf=0xb778a508
ich_spi_read_page: offset=841216, number=256, buf=0xb778a608
ich_spi_read_page: offset=841472, number=256, buf=0xb778a708
ich_spi_read_page: offset=841728, number=256, buf=0xb778a808
ich_spi_read_page: offset=841984, number=256, buf=0xb778a908
ich_spi_read_page: offset=842240, number=256, buf=0xb778aa08
ich_spi_read_page: offset=842496, number=256, buf=0xb778ab08
ich_spi_read_page: offset=842752, number=256, buf=0xb778ac08
ich_spi_read_page: offset=843008, number=256, buf=0xb778ad08
ich_spi_read_page: offset=843264, number=256, buf=0xb778ae08
ich_spi_read_page: offset=843520, number=256, buf=0xb778af08
ich_spi_read_page: offset=843776, number=256, buf=0xb778b008
ich_spi_read_page: offset=844032, number=256, buf=0xb778b108
ich_spi_read_page: offset=844288, number=256, buf=0xb778b208
ich_spi_read_page: offset=844544, number=256, buf=0xb778b308
ich_spi_read_page: offset=844800, number=256, buf=0xb778b408
ich_spi_read_page: offset=845056, number=256, buf=0xb778b508
ich_spi_read_page: offset=845312, number=256, buf=0xb778b608
ich_spi_read_page: offset=845568, number=256, buf=0xb778b708
ich_spi_read_page: offset=845824, number=256, buf=0xb778b808
ich_spi_read_page: offset=846080, number=256, buf=0xb778b908
ich_spi_read_page: offset=846336, number=256, buf=0xb778ba08
ich_spi_read_page: offset=846592, number=256, buf=0xb778bb08
ich_spi_read_page: offset=846848, number=256, buf=0xb778bc08
ich_spi_read_page: offset=847104, number=256, buf=0xb778bd08
ich_spi_read_page: offset=847360, number=256, buf=0xb778be08
ich_spi_read_page: offset=847616, number=256, buf=0xb778bf08
ich_spi_read_page: offset=847872, number=256, buf=0xb778c008
ich_spi_read_page: offset=848128, number=256, buf=0xb778c108
ich_spi_read_page: offset=848384, number=256, buf=0xb778c208
ich_spi_read_page: offset=848640, number=256, buf=0xb778c308
ich_spi_read_page: offset=848896, number=256, buf=0xb778c408
ich_spi_read_page: offset=849152, number=256, buf=0xb778c508
ich_spi_read_page: offset=849408, number=256, buf=0xb778c608
ich_spi_read_page: offset=849664, number=256, buf=0xb778c708
ich_spi_read_page: offset=849920, number=256, buf=0xb778c808
ich_spi_read_page: offset=850176, number=256, buf=0xb778c908
ich_spi_read_page: offset=850432, number=256, buf=0xb778ca08
ich_spi_read_page: offset=850688, number=256, buf=0xb778cb08
ich_spi_read_page: offset=850944, number=256, buf=0xb778cc08
ich_spi_read_page: offset=851200, number=256, buf=0xb778cd08
ich_spi_read_page: offset=851456, number=256, buf=0xb778ce08
ich_spi_read_page: offset=851712, number=256, buf=0xb778cf08
ich_spi_read_page: offset=851968, number=256, buf=0xb778d008
ich_spi_read_page: offset=852224, number=256, buf=0xb778d108
ich_spi_read_page: offset=852480, number=256, buf=0xb778d208
ich_spi_read_page: offset=852736, number=256, buf=0xb778d308
ich_spi_read_page: offset=852992, number=256, buf=0xb778d408
ich_spi_read_page: offset=853248, number=256, buf=0xb778d508
ich_spi_read_page: offset=853504, number=256, buf=0xb778d608
ich_spi_read_page: offset=853760, number=256, buf=0xb778d708
ich_spi_read_page: offset=854016, number=256, buf=0xb778d808
ich_spi_read_page: offset=854272, number=256, buf=0xb778d908
ich_spi_read_page: offset=854528, number=256, buf=0xb778da08
ich_spi_read_page: offset=854784, number=256, buf=0xb778db08
ich_spi_read_page: offset=855040, number=256, buf=0xb778dc08
ich_spi_read_page: offset=855296, number=256, buf=0xb778dd08
ich_spi_read_page: offset=855552, number=256, buf=0xb778de08
ich_spi_read_page: offset=855808, number=256, buf=0xb778df08
ich_spi_read_page: offset=856064, number=256, buf=0xb778e008
ich_spi_read_page: offset=856320, number=256, buf=0xb778e108
ich_spi_read_page: offset=856576, number=256, buf=0xb778e208
ich_spi_read_page: offset=856832, number=256, buf=0xb778e308
ich_spi_read_page: offset=857088, number=256, buf=0xb778e408
ich_spi_read_page: offset=857344, number=256, buf=0xb778e508
ich_spi_read_page: offset=857600, number=256, buf=0xb778e608
ich_spi_read_page: offset=857856, number=256, buf=0xb778e708
ich_spi_read_page: offset=858112, number=256, buf=0xb778e808
ich_spi_read_page: offset=858368, number=256, buf=0xb778e908
ich_spi_read_page: offset=858624, number=256, buf=0xb778ea08
ich_spi_read_page: offset=858880, number=256, buf=0xb778eb08
ich_spi_read_page: offset=859136, number=256, buf=0xb778ec08
ich_spi_read_page: offset=859392, number=256, buf=0xb778ed08
ich_spi_read_page: offset=859648, number=256, buf=0xb778ee08
ich_spi_read_page: offset=859904, number=256, buf=0xb778ef08
ich_spi_read_page: offset=860160, number=256, buf=0xb778f008
ich_spi_read_page: offset=860416, number=256, buf=0xb778f108
ich_spi_read_page: offset=860672, number=256, buf=0xb778f208
ich_spi_read_page: offset=860928, number=256, buf=0xb778f308
ich_spi_read_page: offset=861184, number=256, buf=0xb778f408
ich_spi_read_page: offset=861440, number=256, buf=0xb778f508
ich_spi_read_page: offset=861696, number=256, buf=0xb778f608
ich_spi_read_page: offset=861952, number=256, buf=0xb778f708
ich_spi_read_page: offset=862208, number=256, buf=0xb778f808
ich_spi_read_page: offset=862464, number=256, buf=0xb778f908
ich_spi_read_page: offset=862720, number=256, buf=0xb778fa08
ich_spi_read_page: offset=862976, number=256, buf=0xb778fb08
ich_spi_read_page: offset=863232, number=256, buf=0xb778fc08
ich_spi_read_page: offset=863488, number=256, buf=0xb778fd08
ich_spi_read_page: offset=863744, number=256, buf=0xb778fe08
ich_spi_read_page: offset=864000, number=256, buf=0xb778ff08
ich_spi_read_page: offset=864256, number=256, buf=0xb7790008
ich_spi_read_page: offset=864512, number=256, buf=0xb7790108
ich_spi_read_page: offset=864768, number=256, buf=0xb7790208
ich_spi_read_page: offset=865024, number=256, buf=0xb7790308
ich_spi_read_page: offset=865280, number=256, buf=0xb7790408
ich_spi_read_page: offset=865536, number=256, buf=0xb7790508
ich_spi_read_page: offset=865792, number=256, buf=0xb7790608
ich_spi_read_page: offset=866048, number=256, buf=0xb7790708
ich_spi_read_page: offset=866304, number=256, buf=0xb7790808
ich_spi_read_page: offset=866560, number=256, buf=0xb7790908
ich_spi_read_page: offset=866816, number=256, buf=0xb7790a08
ich_spi_read_page: offset=867072, number=256, buf=0xb7790b08
ich_spi_read_page: offset=867328, number=256, buf=0xb7790c08
ich_spi_read_page: offset=867584, number=256, buf=0xb7790d08
ich_spi_read_page: offset=867840, number=256, buf=0xb7790e08
ich_spi_read_page: offset=868096, number=256, buf=0xb7790f08
ich_spi_read_page: offset=868352, number=256, buf=0xb7791008
ich_spi_read_page: offset=868608, number=256, buf=0xb7791108
ich_spi_read_page: offset=868864, number=256, buf=0xb7791208
ich_spi_read_page: offset=869120, number=256, buf=0xb7791308
ich_spi_read_page: offset=869376, number=256, buf=0xb7791408
ich_spi_read_page: offset=869632, number=256, buf=0xb7791508
ich_spi_read_page: offset=869888, number=256, buf=0xb7791608
ich_spi_read_page: offset=870144, number=256, buf=0xb7791708
ich_spi_read_page: offset=870400, number=256, buf=0xb7791808
ich_spi_read_page: offset=870656, number=256, buf=0xb7791908
ich_spi_read_page: offset=870912, number=256, buf=0xb7791a08
ich_spi_read_page: offset=871168, number=256, buf=0xb7791b08
ich_spi_read_page: offset=871424, number=256, buf=0xb7791c08
ich_spi_read_page: offset=871680, number=256, buf=0xb7791d08
ich_spi_read_page: offset=871936, number=256, buf=0xb7791e08
ich_spi_read_page: offset=872192, number=256, buf=0xb7791f08
ich_spi_read_page: offset=872448, number=256, buf=0xb7792008
ich_spi_read_page: offset=872704, number=256, buf=0xb7792108
ich_spi_read_page: offset=872960, number=256, buf=0xb7792208
ich_spi_read_page: offset=873216, number=256, buf=0xb7792308
ich_spi_read_page: offset=873472, number=256, buf=0xb7792408
ich_spi_read_page: offset=873728, number=256, buf=0xb7792508
ich_spi_read_page: offset=873984, number=256, buf=0xb7792608
ich_spi_read_page: offset=874240, number=256, buf=0xb7792708
ich_spi_read_page: offset=874496, number=256, buf=0xb7792808
ich_spi_read_page: offset=874752, number=256, buf=0xb7792908
ich_spi_read_page: offset=875008, number=256, buf=0xb7792a08
ich_spi_read_page: offset=875264, number=256, buf=0xb7792b08
ich_spi_read_page: offset=875520, number=256, buf=0xb7792c08
ich_spi_read_page: offset=875776, number=256, buf=0xb7792d08
ich_spi_read_page: offset=876032, number=256, buf=0xb7792e08
ich_spi_read_page: offset=876288, number=256, buf=0xb7792f08
ich_spi_read_page: offset=876544, number=256, buf=0xb7793008
ich_spi_read_page: offset=876800, number=256, buf=0xb7793108
ich_spi_read_page: offset=877056, number=256, buf=0xb7793208
ich_spi_read_page: offset=877312, number=256, buf=0xb7793308
ich_spi_read_page: offset=877568, number=256, buf=0xb7793408
ich_spi_read_page: offset=877824, number=256, buf=0xb7793508
ich_spi_read_page: offset=878080, number=256, buf=0xb7793608
ich_spi_read_page: offset=878336, number=256, buf=0xb7793708
ich_spi_read_page: offset=878592, number=256, buf=0xb7793808
ich_spi_read_page: offset=878848, number=256, buf=0xb7793908
ich_spi_read_page: offset=879104, number=256, buf=0xb7793a08
ich_spi_read_page: offset=879360, number=256, buf=0xb7793b08
ich_spi_read_page: offset=879616, number=256, buf=0xb7793c08
ich_spi_read_page: offset=879872, number=256, buf=0xb7793d08
ich_spi_read_page: offset=880128, number=256, buf=0xb7793e08
ich_spi_read_page: offset=880384, number=256, buf=0xb7793f08
ich_spi_read_page: offset=880640, number=256, buf=0xb7794008
ich_spi_read_page: offset=880896, number=256, buf=0xb7794108
ich_spi_read_page: offset=881152, number=256, buf=0xb7794208
ich_spi_read_page: offset=881408, number=256, buf=0xb7794308
ich_spi_read_page: offset=881664, number=256, buf=0xb7794408
ich_spi_read_page: offset=881920, number=256, buf=0xb7794508
ich_spi_read_page: offset=882176, number=256, buf=0xb7794608
ich_spi_read_page: offset=882432, number=256, buf=0xb7794708
ich_spi_read_page: offset=882688, number=256, buf=0xb7794808
ich_spi_read_page: offset=882944, number=256, buf=0xb7794908
ich_spi_read_page: offset=883200, number=256, buf=0xb7794a08
ich_spi_read_page: offset=883456, number=256, buf=0xb7794b08
ich_spi_read_page: offset=883712, number=256, buf=0xb7794c08
ich_spi_read_page: offset=883968, number=256, buf=0xb7794d08
ich_spi_read_page: offset=884224, number=256, buf=0xb7794e08
ich_spi_read_page: offset=884480, number=256, buf=0xb7794f08
ich_spi_read_page: offset=884736, number=256, buf=0xb7795008
ich_spi_read_page: offset=884992, number=256, buf=0xb7795108
ich_spi_read_page: offset=885248, number=256, buf=0xb7795208
ich_spi_read_page: offset=885504, number=256, buf=0xb7795308
ich_spi_read_page: offset=885760, number=256, buf=0xb7795408
ich_spi_read_page: offset=886016, number=256, buf=0xb7795508
ich_spi_read_page: offset=886272, number=256, buf=0xb7795608
ich_spi_read_page: offset=886528, number=256, buf=0xb7795708
ich_spi_read_page: offset=886784, number=256, buf=0xb7795808
ich_spi_read_page: offset=887040, number=256, buf=0xb7795908
ich_spi_read_page: offset=887296, number=256, buf=0xb7795a08
ich_spi_read_page: offset=887552, number=256, buf=0xb7795b08
ich_spi_read_page: offset=887808, number=256, buf=0xb7795c08
ich_spi_read_page: offset=888064, number=256, buf=0xb7795d08
ich_spi_read_page: offset=888320, number=256, buf=0xb7795e08
ich_spi_read_page: offset=888576, number=256, buf=0xb7795f08
ich_spi_read_page: offset=888832, number=256, buf=0xb7796008
ich_spi_read_page: offset=889088, number=256, buf=0xb7796108
ich_spi_read_page: offset=889344, number=256, buf=0xb7796208
ich_spi_read_page: offset=889600, number=256, buf=0xb7796308
ich_spi_read_page: offset=889856, number=256, buf=0xb7796408
ich_spi_read_page: offset=890112, number=256, buf=0xb7796508
ich_spi_read_page: offset=890368, number=256, buf=0xb7796608
ich_spi_read_page: offset=890624, number=256, buf=0xb7796708
ich_spi_read_page: offset=890880, number=256, buf=0xb7796808
ich_spi_read_page: offset=891136, number=256, buf=0xb7796908
ich_spi_read_page: offset=891392, number=256, buf=0xb7796a08
ich_spi_read_page: offset=891648, number=256, buf=0xb7796b08
ich_spi_read_page: offset=891904, number=256, buf=0xb7796c08
ich_spi_read_page: offset=892160, number=256, buf=0xb7796d08
ich_spi_read_page: offset=892416, number=256, buf=0xb7796e08
ich_spi_read_page: offset=892672, number=256, buf=0xb7796f08
ich_spi_read_page: offset=892928, number=256, buf=0xb7797008
ich_spi_read_page: offset=893184, number=256, buf=0xb7797108
ich_spi_read_page: offset=893440, number=256, buf=0xb7797208
ich_spi_read_page: offset=893696, number=256, buf=0xb7797308
ich_spi_read_page: offset=893952, number=256, buf=0xb7797408
ich_spi_read_page: offset=894208, number=256, buf=0xb7797508
ich_spi_read_page: offset=894464, number=256, buf=0xb7797608
ich_spi_read_page: offset=894720, number=256, buf=0xb7797708
ich_spi_read_page: offset=894976, number=256, buf=0xb7797808
ich_spi_read_page: offset=895232, number=256, buf=0xb7797908
ich_spi_read_page: offset=895488, number=256, buf=0xb7797a08
ich_spi_read_page: offset=895744, number=256, buf=0xb7797b08
ich_spi_read_page: offset=896000, number=256, buf=0xb7797c08
ich_spi_read_page: offset=896256, number=256, buf=0xb7797d08
ich_spi_read_page: offset=896512, number=256, buf=0xb7797e08
ich_spi_read_page: offset=896768, number=256, buf=0xb7797f08
ich_spi_read_page: offset=897024, number=256, buf=0xb7798008
ich_spi_read_page: offset=897280, number=256, buf=0xb7798108
ich_spi_read_page: offset=897536, number=256, buf=0xb7798208
ich_spi_read_page: offset=897792, number=256, buf=0xb7798308
ich_spi_read_page: offset=898048, number=256, buf=0xb7798408
ich_spi_read_page: offset=898304, number=256, buf=0xb7798508
ich_spi_read_page: offset=898560, number=256, buf=0xb7798608
ich_spi_read_page: offset=898816, number=256, buf=0xb7798708
ich_spi_read_page: offset=899072, number=256, buf=0xb7798808
ich_spi_read_page: offset=899328, number=256, buf=0xb7798908
ich_spi_read_page: offset=899584, number=256, buf=0xb7798a08
ich_spi_read_page: offset=899840, number=256, buf=0xb7798b08
ich_spi_read_page: offset=900096, number=256, buf=0xb7798c08
ich_spi_read_page: offset=900352, number=256, buf=0xb7798d08
ich_spi_read_page: offset=900608, number=256, buf=0xb7798e08
ich_spi_read_page: offset=900864, number=256, buf=0xb7798f08
ich_spi_read_page: offset=901120, number=256, buf=0xb7799008
ich_spi_read_page: offset=901376, number=256, buf=0xb7799108
ich_spi_read_page: offset=901632, number=256, buf=0xb7799208
ich_spi_read_page: offset=901888, number=256, buf=0xb7799308
ich_spi_read_page: offset=902144, number=256, buf=0xb7799408
ich_spi_read_page: offset=902400, number=256, buf=0xb7799508
ich_spi_read_page: offset=902656, number=256, buf=0xb7799608
ich_spi_read_page: offset=902912, number=256, buf=0xb7799708
ich_spi_read_page: offset=903168, number=256, buf=0xb7799808
ich_spi_read_page: offset=903424, number=256, buf=0xb7799908
ich_spi_read_page: offset=903680, number=256, buf=0xb7799a08
ich_spi_read_page: offset=903936, number=256, buf=0xb7799b08
ich_spi_read_page: offset=904192, number=256, buf=0xb7799c08
ich_spi_read_page: offset=904448, number=256, buf=0xb7799d08
ich_spi_read_page: offset=904704, number=256, buf=0xb7799e08
ich_spi_read_page: offset=904960, number=256, buf=0xb7799f08
ich_spi_read_page: offset=905216, number=256, buf=0xb779a008
ich_spi_read_page: offset=905472, number=256, buf=0xb779a108
ich_spi_read_page: offset=905728, number=256, buf=0xb779a208
ich_spi_read_page: offset=905984, number=256, buf=0xb779a308
ich_spi_read_page: offset=906240, number=256, buf=0xb779a408
ich_spi_read_page: offset=906496, number=256, buf=0xb779a508
ich_spi_read_page: offset=906752, number=256, buf=0xb779a608
ich_spi_read_page: offset=907008, number=256, buf=0xb779a708
ich_spi_read_page: offset=907264, number=256, buf=0xb779a808
ich_spi_read_page: offset=907520, number=256, buf=0xb779a908
ich_spi_read_page: offset=907776, number=256, buf=0xb779aa08
ich_spi_read_page: offset=908032, number=256, buf=0xb779ab08
ich_spi_read_page: offset=908288, number=256, buf=0xb779ac08
ich_spi_read_page: offset=908544, number=256, buf=0xb779ad08
ich_spi_read_page: offset=908800, number=256, buf=0xb779ae08
ich_spi_read_page: offset=909056, number=256, buf=0xb779af08
ich_spi_read_page: offset=909312, number=256, buf=0xb779b008
ich_spi_read_page: offset=909568, number=256, buf=0xb779b108
ich_spi_read_page: offset=909824, number=256, buf=0xb779b208
ich_spi_read_page: offset=910080, number=256, buf=0xb779b308
ich_spi_read_page: offset=910336, number=256, buf=0xb779b408
ich_spi_read_page: offset=910592, number=256, buf=0xb779b508
ich_spi_read_page: offset=910848, number=256, buf=0xb779b608
ich_spi_read_page: offset=911104, number=256, buf=0xb779b708
ich_spi_read_page: offset=911360, number=256, buf=0xb779b808
ich_spi_read_page: offset=911616, number=256, buf=0xb779b908
ich_spi_read_page: offset=911872, number=256, buf=0xb779ba08
ich_spi_read_page: offset=912128, number=256, buf=0xb779bb08
ich_spi_read_page: offset=912384, number=256, buf=0xb779bc08
ich_spi_read_page: offset=912640, number=256, buf=0xb779bd08
ich_spi_read_page: offset=912896, number=256, buf=0xb779be08
ich_spi_read_page: offset=913152, number=256, buf=0xb779bf08
ich_spi_read_page: offset=913408, number=256, buf=0xb779c008
ich_spi_read_page: offset=913664, number=256, buf=0xb779c108
ich_spi_read_page: offset=913920, number=256, buf=0xb779c208
ich_spi_read_page: offset=914176, number=256, buf=0xb779c308
ich_spi_read_page: offset=914432, number=256, buf=0xb779c408
ich_spi_read_page: offset=914688, number=256, buf=0xb779c508
ich_spi_read_page: offset=914944, number=256, buf=0xb779c608
ich_spi_read_page: offset=915200, number=256, buf=0xb779c708
ich_spi_read_page: offset=915456, number=256, buf=0xb779c808
ich_spi_read_page: offset=915712, number=256, buf=0xb779c908
ich_spi_read_page: offset=915968, number=256, buf=0xb779ca08
ich_spi_read_page: offset=916224, number=256, buf=0xb779cb08
ich_spi_read_page: offset=916480, number=256, buf=0xb779cc08
ich_spi_read_page: offset=916736, number=256, buf=0xb779cd08
ich_spi_read_page: offset=916992, number=256, buf=0xb779ce08
ich_spi_read_page: offset=917248, number=256, buf=0xb779cf08
ich_spi_read_page: offset=917504, number=256, buf=0xb779d008
ich_spi_read_page: offset=917760, number=256, buf=0xb779d108
ich_spi_read_page: offset=918016, number=256, buf=0xb779d208
ich_spi_read_page: offset=918272, number=256, buf=0xb779d308
ich_spi_read_page: offset=918528, number=256, buf=0xb779d408
ich_spi_read_page: offset=918784, number=256, buf=0xb779d508
ich_spi_read_page: offset=919040, number=256, buf=0xb779d608
ich_spi_read_page: offset=919296, number=256, buf=0xb779d708
ich_spi_read_page: offset=919552, number=256, buf=0xb779d808
ich_spi_read_page: offset=919808, number=256, buf=0xb779d908
ich_spi_read_page: offset=920064, number=256, buf=0xb779da08
ich_spi_read_page: offset=920320, number=256, buf=0xb779db08
ich_spi_read_page: offset=920576, number=256, buf=0xb779dc08
ich_spi_read_page: offset=920832, number=256, buf=0xb779dd08
ich_spi_read_page: offset=921088, number=256, buf=0xb779de08
ich_spi_read_page: offset=921344, number=256, buf=0xb779df08
ich_spi_read_page: offset=921600, number=256, buf=0xb779e008
ich_spi_read_page: offset=921856, number=256, buf=0xb779e108
ich_spi_read_page: offset=922112, number=256, buf=0xb779e208
ich_spi_read_page: offset=922368, number=256, buf=0xb779e308
ich_spi_read_page: offset=922624, number=256, buf=0xb779e408
ich_spi_read_page: offset=922880, number=256, buf=0xb779e508
ich_spi_read_page: offset=923136, number=256, buf=0xb779e608
ich_spi_read_page: offset=923392, number=256, buf=0xb779e708
ich_spi_read_page: offset=923648, number=256, buf=0xb779e808
ich_spi_read_page: offset=923904, number=256, buf=0xb779e908
ich_spi_read_page: offset=924160, number=256, buf=0xb779ea08
ich_spi_read_page: offset=924416, number=256, buf=0xb779eb08
ich_spi_read_page: offset=924672, number=256, buf=0xb779ec08
ich_spi_read_page: offset=924928, number=256, buf=0xb779ed08
ich_spi_read_page: offset=925184, number=256, buf=0xb779ee08
ich_spi_read_page: offset=925440, number=256, buf=0xb779ef08
ich_spi_read_page: offset=925696, number=256, buf=0xb779f008
ich_spi_read_page: offset=925952, number=256, buf=0xb779f108
ich_spi_read_page: offset=926208, number=256, buf=0xb779f208
ich_spi_read_page: offset=926464, number=256, buf=0xb779f308
ich_spi_read_page: offset=926720, number=256, buf=0xb779f408
ich_spi_read_page: offset=926976, number=256, buf=0xb779f508
ich_spi_read_page: offset=927232, number=256, buf=0xb779f608
ich_spi_read_page: offset=927488, number=256, buf=0xb779f708
ich_spi_read_page: offset=927744, number=256, buf=0xb779f808
ich_spi_read_page: offset=928000, number=256, buf=0xb779f908
ich_spi_read_page: offset=928256, number=256, buf=0xb779fa08
ich_spi_read_page: offset=928512, number=256, buf=0xb779fb08
ich_spi_read_page: offset=928768, number=256, buf=0xb779fc08
ich_spi_read_page: offset=929024, number=256, buf=0xb779fd08
ich_spi_read_page: offset=929280, number=256, buf=0xb779fe08
ich_spi_read_page: offset=929536, number=256, buf=0xb779ff08
ich_spi_read_page: offset=929792, number=256, buf=0xb77a0008
ich_spi_read_page: offset=930048, number=256, buf=0xb77a0108
ich_spi_read_page: offset=930304, number=256, buf=0xb77a0208
ich_spi_read_page: offset=930560, number=256, buf=0xb77a0308
ich_spi_read_page: offset=930816, number=256, buf=0xb77a0408
ich_spi_read_page: offset=931072, number=256, buf=0xb77a0508
ich_spi_read_page: offset=931328, number=256, buf=0xb77a0608
ich_spi_read_page: offset=931584, number=256, buf=0xb77a0708
ich_spi_read_page: offset=931840, number=256, buf=0xb77a0808
ich_spi_read_page: offset=932096, number=256, buf=0xb77a0908
ich_spi_read_page: offset=932352, number=256, buf=0xb77a0a08
ich_spi_read_page: offset=932608, number=256, buf=0xb77a0b08
ich_spi_read_page: offset=932864, number=256, buf=0xb77a0c08
ich_spi_read_page: offset=933120, number=256, buf=0xb77a0d08
ich_spi_read_page: offset=933376, number=256, buf=0xb77a0e08
ich_spi_read_page: offset=933632, number=256, buf=0xb77a0f08
ich_spi_read_page: offset=933888, number=256, buf=0xb77a1008
ich_spi_read_page: offset=934144, number=256, buf=0xb77a1108
ich_spi_read_page: offset=934400, number=256, buf=0xb77a1208
ich_spi_read_page: offset=934656, number=256, buf=0xb77a1308
ich_spi_read_page: offset=934912, number=256, buf=0xb77a1408
ich_spi_read_page: offset=935168, number=256, buf=0xb77a1508
ich_spi_read_page: offset=935424, number=256, buf=0xb77a1608
ich_spi_read_page: offset=935680, number=256, buf=0xb77a1708
ich_spi_read_page: offset=935936, number=256, buf=0xb77a1808
ich_spi_read_page: offset=936192, number=256, buf=0xb77a1908
ich_spi_read_page: offset=936448, number=256, buf=0xb77a1a08
ich_spi_read_page: offset=936704, number=256, buf=0xb77a1b08
ich_spi_read_page: offset=936960, number=256, buf=0xb77a1c08
ich_spi_read_page: offset=937216, number=256, buf=0xb77a1d08
ich_spi_read_page: offset=937472, number=256, buf=0xb77a1e08
ich_spi_read_page: offset=937728, number=256, buf=0xb77a1f08
ich_spi_read_page: offset=937984, number=256, buf=0xb77a2008
ich_spi_read_page: offset=938240, number=256, buf=0xb77a2108
ich_spi_read_page: offset=938496, number=256, buf=0xb77a2208
ich_spi_read_page: offset=938752, number=256, buf=0xb77a2308
ich_spi_read_page: offset=939008, number=256, buf=0xb77a2408
ich_spi_read_page: offset=939264, number=256, buf=0xb77a2508
ich_spi_read_page: offset=939520, number=256, buf=0xb77a2608
ich_spi_read_page: offset=939776, number=256, buf=0xb77a2708
ich_spi_read_page: offset=940032, number=256, buf=0xb77a2808
ich_spi_read_page: offset=940288, number=256, buf=0xb77a2908
ich_spi_read_page: offset=940544, number=256, buf=0xb77a2a08
ich_spi_read_page: offset=940800, number=256, buf=0xb77a2b08
ich_spi_read_page: offset=941056, number=256, buf=0xb77a2c08
ich_spi_read_page: offset=941312, number=256, buf=0xb77a2d08
ich_spi_read_page: offset=941568, number=256, buf=0xb77a2e08
ich_spi_read_page: offset=941824, number=256, buf=0xb77a2f08
ich_spi_read_page: offset=942080, number=256, buf=0xb77a3008
ich_spi_read_page: offset=942336, number=256, buf=0xb77a3108
ich_spi_read_page: offset=942592, number=256, buf=0xb77a3208
ich_spi_read_page: offset=942848, number=256, buf=0xb77a3308
ich_spi_read_page: offset=943104, number=256, buf=0xb77a3408
ich_spi_read_page: offset=943360, number=256, buf=0xb77a3508
ich_spi_read_page: offset=943616, number=256, buf=0xb77a3608
ich_spi_read_page: offset=943872, number=256, buf=0xb77a3708
ich_spi_read_page: offset=944128, number=256, buf=0xb77a3808
ich_spi_read_page: offset=944384, number=256, buf=0xb77a3908
ich_spi_read_page: offset=944640, number=256, buf=0xb77a3a08
ich_spi_read_page: offset=944896, number=256, buf=0xb77a3b08
ich_spi_read_page: offset=945152, number=256, buf=0xb77a3c08
ich_spi_read_page: offset=945408, number=256, buf=0xb77a3d08
ich_spi_read_page: offset=945664, number=256, buf=0xb77a3e08
ich_spi_read_page: offset=945920, number=256, buf=0xb77a3f08
ich_spi_read_page: offset=946176, number=256, buf=0xb77a4008
ich_spi_read_page: offset=946432, number=256, buf=0xb77a4108
ich_spi_read_page: offset=946688, number=256, buf=0xb77a4208
ich_spi_read_page: offset=946944, number=256, buf=0xb77a4308
ich_spi_read_page: offset=947200, number=256, buf=0xb77a4408
ich_spi_read_page: offset=947456, number=256, buf=0xb77a4508
ich_spi_read_page: offset=947712, number=256, buf=0xb77a4608
ich_spi_read_page: offset=947968, number=256, buf=0xb77a4708
ich_spi_read_page: offset=948224, number=256, buf=0xb77a4808
ich_spi_read_page: offset=948480, number=256, buf=0xb77a4908
ich_spi_read_page: offset=948736, number=256, buf=0xb77a4a08
ich_spi_read_page: offset=948992, number=256, buf=0xb77a4b08
ich_spi_read_page: offset=949248, number=256, buf=0xb77a4c08
ich_spi_read_page: offset=949504, number=256, buf=0xb77a4d08
ich_spi_read_page: offset=949760, number=256, buf=0xb77a4e08
ich_spi_read_page: offset=950016, number=256, buf=0xb77a4f08
ich_spi_read_page: offset=950272, number=256, buf=0xb77a5008
ich_spi_read_page: offset=950528, number=256, buf=0xb77a5108
ich_spi_read_page: offset=950784, number=256, buf=0xb77a5208
ich_spi_read_page: offset=951040, number=256, buf=0xb77a5308
ich_spi_read_page: offset=951296, number=256, buf=0xb77a5408
ich_spi_read_page: offset=951552, number=256, buf=0xb77a5508
ich_spi_read_page: offset=951808, number=256, buf=0xb77a5608
ich_spi_read_page: offset=952064, number=256, buf=0xb77a5708
ich_spi_read_page: offset=952320, number=256, buf=0xb77a5808
ich_spi_read_page: offset=952576, number=256, buf=0xb77a5908
ich_spi_read_page: offset=952832, number=256, buf=0xb77a5a08
ich_spi_read_page: offset=953088, number=256, buf=0xb77a5b08
ich_spi_read_page: offset=953344, number=256, buf=0xb77a5c08
ich_spi_read_page: offset=953600, number=256, buf=0xb77a5d08
ich_spi_read_page: offset=953856, number=256, buf=0xb77a5e08
ich_spi_read_page: offset=954112, number=256, buf=0xb77a5f08
ich_spi_read_page: offset=954368, number=256, buf=0xb77a6008
ich_spi_read_page: offset=954624, number=256, buf=0xb77a6108
ich_spi_read_page: offset=954880, number=256, buf=0xb77a6208
ich_spi_read_page: offset=955136, number=256, buf=0xb77a6308
ich_spi_read_page: offset=955392, number=256, buf=0xb77a6408
ich_spi_read_page: offset=955648, number=256, buf=0xb77a6508
ich_spi_read_page: offset=955904, number=256, buf=0xb77a6608
ich_spi_read_page: offset=956160, number=256, buf=0xb77a6708
ich_spi_read_page: offset=956416, number=256, buf=0xb77a6808
ich_spi_read_page: offset=956672, number=256, buf=0xb77a6908
ich_spi_read_page: offset=956928, number=256, buf=0xb77a6a08
ich_spi_read_page: offset=957184, number=256, buf=0xb77a6b08
ich_spi_read_page: offset=957440, number=256, buf=0xb77a6c08
ich_spi_read_page: offset=957696, number=256, buf=0xb77a6d08
ich_spi_read_page: offset=957952, number=256, buf=0xb77a6e08
ich_spi_read_page: offset=958208, number=256, buf=0xb77a6f08
ich_spi_read_page: offset=958464, number=256, buf=0xb77a7008
ich_spi_read_page: offset=958720, number=256, buf=0xb77a7108
ich_spi_read_page: offset=958976, number=256, buf=0xb77a7208
ich_spi_read_page: offset=959232, number=256, buf=0xb77a7308
ich_spi_read_page: offset=959488, number=256, buf=0xb77a7408
ich_spi_read_page: offset=959744, number=256, buf=0xb77a7508
ich_spi_read_page: offset=960000, number=256, buf=0xb77a7608
ich_spi_read_page: offset=960256, number=256, buf=0xb77a7708
ich_spi_read_page: offset=960512, number=256, buf=0xb77a7808
ich_spi_read_page: offset=960768, number=256, buf=0xb77a7908
ich_spi_read_page: offset=961024, number=256, buf=0xb77a7a08
ich_spi_read_page: offset=961280, number=256, buf=0xb77a7b08
ich_spi_read_page: offset=961536, number=256, buf=0xb77a7c08
ich_spi_read_page: offset=961792, number=256, buf=0xb77a7d08
ich_spi_read_page: offset=962048, number=256, buf=0xb77a7e08
ich_spi_read_page: offset=962304, number=256, buf=0xb77a7f08
ich_spi_read_page: offset=962560, number=256, buf=0xb77a8008
ich_spi_read_page: offset=962816, number=256, buf=0xb77a8108
ich_spi_read_page: offset=963072, number=256, buf=0xb77a8208
ich_spi_read_page: offset=963328, number=256, buf=0xb77a8308
ich_spi_read_page: offset=963584, number=256, buf=0xb77a8408
ich_spi_read_page: offset=963840, number=256, buf=0xb77a8508
ich_spi_read_page: offset=964096, number=256, buf=0xb77a8608
ich_spi_read_page: offset=964352, number=256, buf=0xb77a8708
ich_spi_read_page: offset=964608, number=256, buf=0xb77a8808
ich_spi_read_page: offset=964864, number=256, buf=0xb77a8908
ich_spi_read_page: offset=965120, number=256, buf=0xb77a8a08
ich_spi_read_page: offset=965376, number=256, buf=0xb77a8b08
ich_spi_read_page: offset=965632, number=256, buf=0xb77a8c08
ich_spi_read_page: offset=965888, number=256, buf=0xb77a8d08
ich_spi_read_page: offset=966144, number=256, buf=0xb77a8e08
ich_spi_read_page: offset=966400, number=256, buf=0xb77a8f08
ich_spi_read_page: offset=966656, number=256, buf=0xb77a9008
ich_spi_read_page: offset=966912, number=256, buf=0xb77a9108
ich_spi_read_page: offset=967168, number=256, buf=0xb77a9208
ich_spi_read_page: offset=967424, number=256, buf=0xb77a9308
ich_spi_read_page: offset=967680, number=256, buf=0xb77a9408
ich_spi_read_page: offset=967936, number=256, buf=0xb77a9508
ich_spi_read_page: offset=968192, number=256, buf=0xb77a9608
ich_spi_read_page: offset=968448, number=256, buf=0xb77a9708
ich_spi_read_page: offset=968704, number=256, buf=0xb77a9808
ich_spi_read_page: offset=968960, number=256, buf=0xb77a9908
ich_spi_read_page: offset=969216, number=256, buf=0xb77a9a08
ich_spi_read_page: offset=969472, number=256, buf=0xb77a9b08
ich_spi_read_page: offset=969728, number=256, buf=0xb77a9c08
ich_spi_read_page: offset=969984, number=256, buf=0xb77a9d08
ich_spi_read_page: offset=970240, number=256, buf=0xb77a9e08
ich_spi_read_page: offset=970496, number=256, buf=0xb77a9f08
ich_spi_read_page: offset=970752, number=256, buf=0xb77aa008
ich_spi_read_page: offset=971008, number=256, buf=0xb77aa108
ich_spi_read_page: offset=971264, number=256, buf=0xb77aa208
ich_spi_read_page: offset=971520, number=256, buf=0xb77aa308
ich_spi_read_page: offset=971776, number=256, buf=0xb77aa408
ich_spi_read_page: offset=972032, number=256, buf=0xb77aa508
ich_spi_read_page: offset=972288, number=256, buf=0xb77aa608
ich_spi_read_page: offset=972544, number=256, buf=0xb77aa708
ich_spi_read_page: offset=972800, number=256, buf=0xb77aa808
ich_spi_read_page: offset=973056, number=256, buf=0xb77aa908
ich_spi_read_page: offset=973312, number=256, buf=0xb77aaa08
ich_spi_read_page: offset=973568, number=256, buf=0xb77aab08
ich_spi_read_page: offset=973824, number=256, buf=0xb77aac08
ich_spi_read_page: offset=974080, number=256, buf=0xb77aad08
ich_spi_read_page: offset=974336, number=256, buf=0xb77aae08
ich_spi_read_page: offset=974592, number=256, buf=0xb77aaf08
ich_spi_read_page: offset=974848, number=256, buf=0xb77ab008
ich_spi_read_page: offset=975104, number=256, buf=0xb77ab108
ich_spi_read_page: offset=975360, number=256, buf=0xb77ab208
ich_spi_read_page: offset=975616, number=256, buf=0xb77ab308
ich_spi_read_page: offset=975872, number=256, buf=0xb77ab408
ich_spi_read_page: offset=976128, number=256, buf=0xb77ab508
ich_spi_read_page: offset=976384, number=256, buf=0xb77ab608
ich_spi_read_page: offset=976640, number=256, buf=0xb77ab708
ich_spi_read_page: offset=976896, number=256, buf=0xb77ab808
ich_spi_read_page: offset=977152, number=256, buf=0xb77ab908
ich_spi_read_page: offset=977408, number=256, buf=0xb77aba08
ich_spi_read_page: offset=977664, number=256, buf=0xb77abb08
ich_spi_read_page: offset=977920, number=256, buf=0xb77abc08
ich_spi_read_page: offset=978176, number=256, buf=0xb77abd08
ich_spi_read_page: offset=978432, number=256, buf=0xb77abe08
ich_spi_read_page: offset=978688, number=256, buf=0xb77abf08
ich_spi_read_page: offset=978944, number=256, buf=0xb77ac008
ich_spi_read_page: offset=979200, number=256, buf=0xb77ac108
ich_spi_read_page: offset=979456, number=256, buf=0xb77ac208
ich_spi_read_page: offset=979712, number=256, buf=0xb77ac308
ich_spi_read_page: offset=979968, number=256, buf=0xb77ac408
ich_spi_read_page: offset=980224, number=256, buf=0xb77ac508
ich_spi_read_page: offset=980480, number=256, buf=0xb77ac608
ich_spi_read_page: offset=980736, number=256, buf=0xb77ac708
ich_spi_read_page: offset=980992, number=256, buf=0xb77ac808
ich_spi_read_page: offset=981248, number=256, buf=0xb77ac908
ich_spi_read_page: offset=981504, number=256, buf=0xb77aca08
ich_spi_read_page: offset=981760, number=256, buf=0xb77acb08
ich_spi_read_page: offset=982016, number=256, buf=0xb77acc08
ich_spi_read_page: offset=982272, number=256, buf=0xb77acd08
ich_spi_read_page: offset=982528, number=256, buf=0xb77ace08
ich_spi_read_page: offset=982784, number=256, buf=0xb77acf08
ich_spi_read_page: offset=983040, number=256, buf=0xb77ad008
ich_spi_read_page: offset=983296, number=256, buf=0xb77ad108
ich_spi_read_page: offset=983552, number=256, buf=0xb77ad208
ich_spi_read_page: offset=983808, number=256, buf=0xb77ad308
ich_spi_read_page: offset=984064, number=256, buf=0xb77ad408
ich_spi_read_page: offset=984320, number=256, buf=0xb77ad508
ich_spi_read_page: offset=984576, number=256, buf=0xb77ad608
ich_spi_read_page: offset=984832, number=256, buf=0xb77ad708
ich_spi_read_page: offset=985088, number=256, buf=0xb77ad808
ich_spi_read_page: offset=985344, number=256, buf=0xb77ad908
ich_spi_read_page: offset=985600, number=256, buf=0xb77ada08
ich_spi_read_page: offset=985856, number=256, buf=0xb77adb08
ich_spi_read_page: offset=986112, number=256, buf=0xb77adc08
ich_spi_read_page: offset=986368, number=256, buf=0xb77add08
ich_spi_read_page: offset=986624, number=256, buf=0xb77ade08
ich_spi_read_page: offset=986880, number=256, buf=0xb77adf08
ich_spi_read_page: offset=987136, number=256, buf=0xb77ae008
ich_spi_read_page: offset=987392, number=256, buf=0xb77ae108
ich_spi_read_page: offset=987648, number=256, buf=0xb77ae208
ich_spi_read_page: offset=987904, number=256, buf=0xb77ae308
ich_spi_read_page: offset=988160, number=256, buf=0xb77ae408
ich_spi_read_page: offset=988416, number=256, buf=0xb77ae508
ich_spi_read_page: offset=988672, number=256, buf=0xb77ae608
ich_spi_read_page: offset=988928, number=256, buf=0xb77ae708
ich_spi_read_page: offset=989184, number=256, buf=0xb77ae808
ich_spi_read_page: offset=989440, number=256, buf=0xb77ae908
ich_spi_read_page: offset=989696, number=256, buf=0xb77aea08
ich_spi_read_page: offset=989952, number=256, buf=0xb77aeb08
ich_spi_read_page: offset=990208, number=256, buf=0xb77aec08
ich_spi_read_page: offset=990464, number=256, buf=0xb77aed08
ich_spi_read_page: offset=990720, number=256, buf=0xb77aee08
ich_spi_read_page: offset=990976, number=256, buf=0xb77aef08
ich_spi_read_page: offset=991232, number=256, buf=0xb77af008
ich_spi_read_page: offset=991488, number=256, buf=0xb77af108
ich_spi_read_page: offset=991744, number=256, buf=0xb77af208
ich_spi_read_page: offset=992000, number=256, buf=0xb77af308
ich_spi_read_page: offset=992256, number=256, buf=0xb77af408
ich_spi_read_page: offset=992512, number=256, buf=0xb77af508
ich_spi_read_page: offset=992768, number=256, buf=0xb77af608
ich_spi_read_page: offset=993024, number=256, buf=0xb77af708
ich_spi_read_page: offset=993280, number=256, buf=0xb77af808
ich_spi_read_page: offset=993536, number=256, buf=0xb77af908
ich_spi_read_page: offset=993792, number=256, buf=0xb77afa08
ich_spi_read_page: offset=994048, number=256, buf=0xb77afb08
ich_spi_read_page: offset=994304, number=256, buf=0xb77afc08
ich_spi_read_page: offset=994560, number=256, buf=0xb77afd08
ich_spi_read_page: offset=994816, number=256, buf=0xb77afe08
ich_spi_read_page: offset=995072, number=256, buf=0xb77aff08
ich_spi_read_page: offset=995328, number=256, buf=0xb77b0008
ich_spi_read_page: offset=995584, number=256, buf=0xb77b0108
ich_spi_read_page: offset=995840, number=256, buf=0xb77b0208
ich_spi_read_page: offset=996096, number=256, buf=0xb77b0308
ich_spi_read_page: offset=996352, number=256, buf=0xb77b0408
ich_spi_read_page: offset=996608, number=256, buf=0xb77b0508
ich_spi_read_page: offset=996864, number=256, buf=0xb77b0608
ich_spi_read_page: offset=997120, number=256, buf=0xb77b0708
ich_spi_read_page: offset=997376, number=256, buf=0xb77b0808
ich_spi_read_page: offset=997632, number=256, buf=0xb77b0908
ich_spi_read_page: offset=997888, number=256, buf=0xb77b0a08
ich_spi_read_page: offset=998144, number=256, buf=0xb77b0b08
ich_spi_read_page: offset=998400, number=256, buf=0xb77b0c08
ich_spi_read_page: offset=998656, number=256, buf=0xb77b0d08
ich_spi_read_page: offset=998912, number=256, buf=0xb77b0e08
ich_spi_read_page: offset=999168, number=256, buf=0xb77b0f08
ich_spi_read_page: offset=999424, number=256, buf=0xb77b1008
ich_spi_read_page: offset=999680, number=256, buf=0xb77b1108
ich_spi_read_page: offset=999936, number=256, buf=0xb77b1208
ich_spi_read_page: offset=1000192, number=256, buf=0xb77b1308
ich_spi_read_page: offset=1000448, number=256, buf=0xb77b1408
ich_spi_read_page: offset=1000704, number=256, buf=0xb77b1508
ich_spi_read_page: offset=1000960, number=256, buf=0xb77b1608
ich_spi_read_page: offset=1001216, number=256, buf=0xb77b1708
ich_spi_read_page: offset=1001472, number=256, buf=0xb77b1808
ich_spi_read_page: offset=1001728, number=256, buf=0xb77b1908
ich_spi_read_page: offset=1001984, number=256, buf=0xb77b1a08
ich_spi_read_page: offset=1002240, number=256, buf=0xb77b1b08
ich_spi_read_page: offset=1002496, number=256, buf=0xb77b1c08
ich_spi_read_page: offset=1002752, number=256, buf=0xb77b1d08
ich_spi_read_page: offset=1003008, number=256, buf=0xb77b1e08
ich_spi_read_page: offset=1003264, number=256, buf=0xb77b1f08
ich_spi_read_page: offset=1003520, number=256, buf=0xb77b2008
ich_spi_read_page: offset=1003776, number=256, buf=0xb77b2108
ich_spi_read_page: offset=1004032, number=256, buf=0xb77b2208
ich_spi_read_page: offset=1004288, number=256, buf=0xb77b2308
ich_spi_read_page: offset=1004544, number=256, buf=0xb77b2408
ich_spi_read_page: offset=1004800, number=256, buf=0xb77b2508
ich_spi_read_page: offset=1005056, number=256, buf=0xb77b2608
ich_spi_read_page: offset=1005312, number=256, buf=0xb77b2708
ich_spi_read_page: offset=1005568, number=256, buf=0xb77b2808
ich_spi_read_page: offset=1005824, number=256, buf=0xb77b2908
ich_spi_read_page: offset=1006080, number=256, buf=0xb77b2a08
ich_spi_read_page: offset=1006336, number=256, buf=0xb77b2b08
ich_spi_read_page: offset=1006592, number=256, buf=0xb77b2c08
ich_spi_read_page: offset=1006848, number=256, buf=0xb77b2d08
ich_spi_read_page: offset=1007104, number=256, buf=0xb77b2e08
ich_spi_read_page: offset=1007360, number=256, buf=0xb77b2f08
ich_spi_read_page: offset=1007616, number=256, buf=0xb77b3008
ich_spi_read_page: offset=1007872, number=256, buf=0xb77b3108
ich_spi_read_page: offset=1008128, number=256, buf=0xb77b3208
ich_spi_read_page: offset=1008384, number=256, buf=0xb77b3308
ich_spi_read_page: offset=1008640, number=256, buf=0xb77b3408
ich_spi_read_page: offset=1008896, number=256, buf=0xb77b3508
ich_spi_read_page: offset=1009152, number=256, buf=0xb77b3608
ich_spi_read_page: offset=1009408, number=256, buf=0xb77b3708
ich_spi_read_page: offset=1009664, number=256, buf=0xb77b3808
ich_spi_read_page: offset=1009920, number=256, buf=0xb77b3908
ich_spi_read_page: offset=1010176, number=256, buf=0xb77b3a08
ich_spi_read_page: offset=1010432, number=256, buf=0xb77b3b08
ich_spi_read_page: offset=1010688, number=256, buf=0xb77b3c08
ich_spi_read_page: offset=1010944, number=256, buf=0xb77b3d08
ich_spi_read_page: offset=1011200, number=256, buf=0xb77b3e08
ich_spi_read_page: offset=1011456, number=256, buf=0xb77b3f08
ich_spi_read_page: offset=1011712, number=256, buf=0xb77b4008
ich_spi_read_page: offset=1011968, number=256, buf=0xb77b4108
ich_spi_read_page: offset=1012224, number=256, buf=0xb77b4208
ich_spi_read_page: offset=1012480, number=256, buf=0xb77b4308
ich_spi_read_page: offset=1012736, number=256, buf=0xb77b4408
ich_spi_read_page: offset=1012992, number=256, buf=0xb77b4508
ich_spi_read_page: offset=1013248, number=256, buf=0xb77b4608
ich_spi_read_page: offset=1013504, number=256, buf=0xb77b4708
ich_spi_read_page: offset=1013760, number=256, buf=0xb77b4808
ich_spi_read_page: offset=1014016, number=256, buf=0xb77b4908
ich_spi_read_page: offset=1014272, number=256, buf=0xb77b4a08
ich_spi_read_page: offset=1014528, number=256, buf=0xb77b4b08
ich_spi_read_page: offset=1014784, number=256, buf=0xb77b4c08
ich_spi_read_page: offset=1015040, number=256, buf=0xb77b4d08
ich_spi_read_page: offset=1015296, number=256, buf=0xb77b4e08
ich_spi_read_page: offset=1015552, number=256, buf=0xb77b4f08
ich_spi_read_page: offset=1015808, number=256, buf=0xb77b5008
ich_spi_read_page: offset=1016064, number=256, buf=0xb77b5108
ich_spi_read_page: offset=1016320, number=256, buf=0xb77b5208
ich_spi_read_page: offset=1016576, number=256, buf=0xb77b5308
ich_spi_read_page: offset=1016832, number=256, buf=0xb77b5408
ich_spi_read_page: offset=1017088, number=256, buf=0xb77b5508
ich_spi_read_page: offset=1017344, number=256, buf=0xb77b5608
ich_spi_read_page: offset=1017600, number=256, buf=0xb77b5708
ich_spi_read_page: offset=1017856, number=256, buf=0xb77b5808
ich_spi_read_page: offset=1018112, number=256, buf=0xb77b5908
ich_spi_read_page: offset=1018368, number=256, buf=0xb77b5a08
ich_spi_read_page: offset=1018624, number=256, buf=0xb77b5b08
ich_spi_read_page: offset=1018880, number=256, buf=0xb77b5c08
ich_spi_read_page: offset=1019136, number=256, buf=0xb77b5d08
ich_spi_read_page: offset=1019392, number=256, buf=0xb77b5e08
ich_spi_read_page: offset=1019648, number=256, buf=0xb77b5f08
ich_spi_read_page: offset=1019904, number=256, buf=0xb77b6008
ich_spi_read_page: offset=1020160, number=256, buf=0xb77b6108
ich_spi_read_page: offset=1020416, number=256, buf=0xb77b6208
ich_spi_read_page: offset=1020672, number=256, buf=0xb77b6308
ich_spi_read_page: offset=1020928, number=256, buf=0xb77b6408
ich_spi_read_page: offset=1021184, number=256, buf=0xb77b6508
ich_spi_read_page: offset=1021440, number=256, buf=0xb77b6608
ich_spi_read_page: offset=1021696, number=256, buf=0xb77b6708
ich_spi_read_page: offset=1021952, number=256, buf=0xb77b6808
ich_spi_read_page: offset=1022208, number=256, buf=0xb77b6908
ich_spi_read_page: offset=1022464, number=256, buf=0xb77b6a08
ich_spi_read_page: offset=1022720, number=256, buf=0xb77b6b08
ich_spi_read_page: offset=1022976, number=256, buf=0xb77b6c08
ich_spi_read_page: offset=1023232, number=256, buf=0xb77b6d08
ich_spi_read_page: offset=1023488, number=256, buf=0xb77b6e08
ich_spi_read_page: offset=1023744, number=256, buf=0xb77b6f08
ich_spi_read_page: offset=1024000, number=256, buf=0xb77b7008
ich_spi_read_page: offset=1024256, number=256, buf=0xb77b7108
ich_spi_read_page: offset=1024512, number=256, buf=0xb77b7208
ich_spi_read_page: offset=1024768, number=256, buf=0xb77b7308
ich_spi_read_page: offset=1025024, number=256, buf=0xb77b7408
ich_spi_read_page: offset=1025280, number=256, buf=0xb77b7508
ich_spi_read_page: offset=1025536, number=256, buf=0xb77b7608
ich_spi_read_page: offset=1025792, number=256, buf=0xb77b7708
ich_spi_read_page: offset=1026048, number=256, buf=0xb77b7808
ich_spi_read_page: offset=1026304, number=256, buf=0xb77b7908
ich_spi_read_page: offset=1026560, number=256, buf=0xb77b7a08
ich_spi_read_page: offset=1026816, number=256, buf=0xb77b7b08
ich_spi_read_page: offset=1027072, number=256, buf=0xb77b7c08
ich_spi_read_page: offset=1027328, number=256, buf=0xb77b7d08
ich_spi_read_page: offset=1027584, number=256, buf=0xb77b7e08
ich_spi_read_page: offset=1027840, number=256, buf=0xb77b7f08
ich_spi_read_page: offset=1028096, number=256, buf=0xb77b8008
ich_spi_read_page: offset=1028352, number=256, buf=0xb77b8108
ich_spi_read_page: offset=1028608, number=256, buf=0xb77b8208
ich_spi_read_page: offset=1028864, number=256, buf=0xb77b8308
ich_spi_read_page: offset=1029120, number=256, buf=0xb77b8408
ich_spi_read_page: offset=1029376, number=256, buf=0xb77b8508
ich_spi_read_page: offset=1029632, number=256, buf=0xb77b8608
ich_spi_read_page: offset=1029888, number=256, buf=0xb77b8708
ich_spi_read_page: offset=1030144, number=256, buf=0xb77b8808
ich_spi_read_page: offset=1030400, number=256, buf=0xb77b8908
ich_spi_read_page: offset=1030656, number=256, buf=0xb77b8a08
ich_spi_read_page: offset=1030912, number=256, buf=0xb77b8b08
ich_spi_read_page: offset=1031168, number=256, buf=0xb77b8c08
ich_spi_read_page: offset=1031424, number=256, buf=0xb77b8d08
ich_spi_read_page: offset=1031680, number=256, buf=0xb77b8e08
ich_spi_read_page: offset=1031936, number=256, buf=0xb77b8f08
ich_spi_read_page: offset=1032192, number=256, buf=0xb77b9008
ich_spi_read_page: offset=1032448, number=256, buf=0xb77b9108
ich_spi_read_page: offset=1032704, number=256, buf=0xb77b9208
ich_spi_read_page: offset=1032960, number=256, buf=0xb77b9308
ich_spi_read_page: offset=1033216, number=256, buf=0xb77b9408
ich_spi_read_page: offset=1033472, number=256, buf=0xb77b9508
ich_spi_read_page: offset=1033728, number=256, buf=0xb77b9608
ich_spi_read_page: offset=1033984, number=256, buf=0xb77b9708
ich_spi_read_page: offset=1034240, number=256, buf=0xb77b9808
ich_spi_read_page: offset=1034496, number=256, buf=0xb77b9908
ich_spi_read_page: offset=1034752, number=256, buf=0xb77b9a08
ich_spi_read_page: offset=1035008, number=256, buf=0xb77b9b08
ich_spi_read_page: offset=1035264, number=256, buf=0xb77b9c08
ich_spi_read_page: offset=1035520, number=256, buf=0xb77b9d08
ich_spi_read_page: offset=1035776, number=256, buf=0xb77b9e08
ich_spi_read_page: offset=1036032, number=256, buf=0xb77b9f08
ich_spi_read_page: offset=1036288, number=256, buf=0xb77ba008
ich_spi_read_page: offset=1036544, number=256, buf=0xb77ba108
ich_spi_read_page: offset=1036800, number=256, buf=0xb77ba208
ich_spi_read_page: offset=1037056, number=256, buf=0xb77ba308
ich_spi_read_page: offset=1037312, number=256, buf=0xb77ba408
ich_spi_read_page: offset=1037568, number=256, buf=0xb77ba508
ich_spi_read_page: offset=1037824, number=256, buf=0xb77ba608
ich_spi_read_page: offset=1038080, number=256, buf=0xb77ba708
ich_spi_read_page: offset=1038336, number=256, buf=0xb77ba808
ich_spi_read_page: offset=1038592, number=256, buf=0xb77ba908
ich_spi_read_page: offset=1038848, number=256, buf=0xb77baa08
ich_spi_read_page: offset=1039104, number=256, buf=0xb77bab08
ich_spi_read_page: offset=1039360, number=256, buf=0xb77bac08
ich_spi_read_page: offset=1039616, number=256, buf=0xb77bad08
ich_spi_read_page: offset=1039872, number=256, buf=0xb77bae08
ich_spi_read_page: offset=1040128, number=256, buf=0xb77baf08
ich_spi_read_page: offset=1040384, number=256, buf=0xb77bb008
ich_spi_read_page: offset=1040640, number=256, buf=0xb77bb108
ich_spi_read_page: offset=1040896, number=256, buf=0xb77bb208
ich_spi_read_page: offset=1041152, number=256, buf=0xb77bb308
ich_spi_read_page: offset=1041408, number=256, buf=0xb77bb408
ich_spi_read_page: offset=1041664, number=256, buf=0xb77bb508
ich_spi_read_page: offset=1041920, number=256, buf=0xb77bb608
ich_spi_read_page: offset=1042176, number=256, buf=0xb77bb708
ich_spi_read_page: offset=1042432, number=256, buf=0xb77bb808
ich_spi_read_page: offset=1042688, number=256, buf=0xb77bb908
ich_spi_read_page: offset=1042944, number=256, buf=0xb77bba08
ich_spi_read_page: offset=1043200, number=256, buf=0xb77bbb08
ich_spi_read_page: offset=1043456, number=256, buf=0xb77bbc08
ich_spi_read_page: offset=1043712, number=256, buf=0xb77bbd08
ich_spi_read_page: offset=1043968, number=256, buf=0xb77bbe08
ich_spi_read_page: offset=1044224, number=256, buf=0xb77bbf08
ich_spi_read_page: offset=1044480, number=256, buf=0xb77bc008
ich_spi_read_page: offset=1044736, number=256, buf=0xb77bc108
ich_spi_read_page: offset=1044992, number=256, buf=0xb77bc208
ich_spi_read_page: offset=1045248, number=256, buf=0xb77bc308
ich_spi_read_page: offset=1045504, number=256, buf=0xb77bc408
ich_spi_read_page: offset=1045760, number=256, buf=0xb77bc508
ich_spi_read_page: offset=1046016, number=256, buf=0xb77bc608
ich_spi_read_page: offset=1046272, number=256, buf=0xb77bc708
ich_spi_read_page: offset=1046528, number=256, buf=0xb77bc808
ich_spi_read_page: offset=1046784, number=256, buf=0xb77bc908
ich_spi_read_page: offset=1047040, number=256, buf=0xb77bca08
ich_spi_read_page: offset=1047296, number=256, buf=0xb77bcb08
ich_spi_read_page: offset=1047552, number=256, buf=0xb77bcc08
ich_spi_read_page: offset=1047808, number=256, buf=0xb77bcd08
ich_spi_read_page: offset=1048064, number=256, buf=0xb77bce08
ich_spi_read_page: offset=1048320, number=256, buf=0xb77bcf08
ich_spi_read_page: offset=1048576, number=256, buf=0xb77bd008
ich_spi_read_page: offset=1048832, number=256, buf=0xb77bd108
ich_spi_read_page: offset=1049088, number=256, buf=0xb77bd208
ich_spi_read_page: offset=1049344, number=256, buf=0xb77bd308
ich_spi_read_page: offset=1049600, number=256, buf=0xb77bd408
ich_spi_read_page: offset=1049856, number=256, buf=0xb77bd508
ich_spi_read_page: offset=1050112, number=256, buf=0xb77bd608
ich_spi_read_page: offset=1050368, number=256, buf=0xb77bd708
ich_spi_read_page: offset=1050624, number=256, buf=0xb77bd808
ich_spi_read_page: offset=1050880, number=256, buf=0xb77bd908
ich_spi_read_page: offset=1051136, number=256, buf=0xb77bda08
ich_spi_read_page: offset=1051392, number=256, buf=0xb77bdb08
ich_spi_read_page: offset=1051648, number=256, buf=0xb77bdc08
ich_spi_read_page: offset=1051904, number=256, buf=0xb77bdd08
ich_spi_read_page: offset=1052160, number=256, buf=0xb77bde08
ich_spi_read_page: offset=1052416, number=256, buf=0xb77bdf08
ich_spi_read_page: offset=1052672, number=256, buf=0xb77be008
ich_spi_read_page: offset=1052928, number=256, buf=0xb77be108
ich_spi_read_page: offset=1053184, number=256, buf=0xb77be208
ich_spi_read_page: offset=1053440, number=256, buf=0xb77be308
ich_spi_read_page: offset=1053696, number=256, buf=0xb77be408
ich_spi_read_page: offset=1053952, number=256, buf=0xb77be508
ich_spi_read_page: offset=1054208, number=256, buf=0xb77be608
ich_spi_read_page: offset=1054464, number=256, buf=0xb77be708
ich_spi_read_page: offset=1054720, number=256, buf=0xb77be808
ich_spi_read_page: offset=1054976, number=256, buf=0xb77be908
ich_spi_read_page: offset=1055232, number=256, buf=0xb77bea08
ich_spi_read_page: offset=1055488, number=256, buf=0xb77beb08
ich_spi_read_page: offset=1055744, number=256, buf=0xb77bec08
ich_spi_read_page: offset=1056000, number=256, buf=0xb77bed08
ich_spi_read_page: offset=1056256, number=256, buf=0xb77bee08
ich_spi_read_page: offset=1056512, number=256, buf=0xb77bef08
ich_spi_read_page: offset=1056768, number=256, buf=0xb77bf008
ich_spi_read_page: offset=1057024, number=256, buf=0xb77bf108
ich_spi_read_page: offset=1057280, number=256, buf=0xb77bf208
ich_spi_read_page: offset=1057536, number=256, buf=0xb77bf308
ich_spi_read_page: offset=1057792, number=256, buf=0xb77bf408
ich_spi_read_page: offset=1058048, number=256, buf=0xb77bf508
ich_spi_read_page: offset=1058304, number=256, buf=0xb77bf608
ich_spi_read_page: offset=1058560, number=256, buf=0xb77bf708
ich_spi_read_page: offset=1058816, number=256, buf=0xb77bf808
ich_spi_read_page: offset=1059072, number=256, buf=0xb77bf908
ich_spi_read_page: offset=1059328, number=256, buf=0xb77bfa08
ich_spi_read_page: offset=1059584, number=256, buf=0xb77bfb08
ich_spi_read_page: offset=1059840, number=256, buf=0xb77bfc08
ich_spi_read_page: offset=1060096, number=256, buf=0xb77bfd08
ich_spi_read_page: offset=1060352, number=256, buf=0xb77bfe08
ich_spi_read_page: offset=1060608, number=256, buf=0xb77bff08
ich_spi_read_page: offset=1060864, number=256, buf=0xb77c0008
ich_spi_read_page: offset=1061120, number=256, buf=0xb77c0108
ich_spi_read_page: offset=1061376, number=256, buf=0xb77c0208
ich_spi_read_page: offset=1061632, number=256, buf=0xb77c0308
ich_spi_read_page: offset=1061888, number=256, buf=0xb77c0408
ich_spi_read_page: offset=1062144, number=256, buf=0xb77c0508
ich_spi_read_page: offset=1062400, number=256, buf=0xb77c0608
ich_spi_read_page: offset=1062656, number=256, buf=0xb77c0708
ich_spi_read_page: offset=1062912, number=256, buf=0xb77c0808
ich_spi_read_page: offset=1063168, number=256, buf=0xb77c0908
ich_spi_read_page: offset=1063424, number=256, buf=0xb77c0a08
ich_spi_read_page: offset=1063680, number=256, buf=0xb77c0b08
ich_spi_read_page: offset=1063936, number=256, buf=0xb77c0c08
ich_spi_read_page: offset=1064192, number=256, buf=0xb77c0d08
ich_spi_read_page: offset=1064448, number=256, buf=0xb77c0e08
ich_spi_read_page: offset=1064704, number=256, buf=0xb77c0f08
ich_spi_read_page: offset=1064960, number=256, buf=0xb77c1008
ich_spi_read_page: offset=1065216, number=256, buf=0xb77c1108
ich_spi_read_page: offset=1065472, number=256, buf=0xb77c1208
ich_spi_read_page: offset=1065728, number=256, buf=0xb77c1308
ich_spi_read_page: offset=1065984, number=256, buf=0xb77c1408
ich_spi_read_page: offset=1066240, number=256, buf=0xb77c1508
ich_spi_read_page: offset=1066496, number=256, buf=0xb77c1608
ich_spi_read_page: offset=1066752, number=256, buf=0xb77c1708
ich_spi_read_page: offset=1067008, number=256, buf=0xb77c1808
ich_spi_read_page: offset=1067264, number=256, buf=0xb77c1908
ich_spi_read_page: offset=1067520, number=256, buf=0xb77c1a08
ich_spi_read_page: offset=1067776, number=256, buf=0xb77c1b08
ich_spi_read_page: offset=1068032, number=256, buf=0xb77c1c08
ich_spi_read_page: offset=1068288, number=256, buf=0xb77c1d08
ich_spi_read_page: offset=1068544, number=256, buf=0xb77c1e08
ich_spi_read_page: offset=1068800, number=256, buf=0xb77c1f08
ich_spi_read_page: offset=1069056, number=256, buf=0xb77c2008
ich_spi_read_page: offset=1069312, number=256, buf=0xb77c2108
ich_spi_read_page: offset=1069568, number=256, buf=0xb77c2208
ich_spi_read_page: offset=1069824, number=256, buf=0xb77c2308
ich_spi_read_page: offset=1070080, number=256, buf=0xb77c2408
ich_spi_read_page: offset=1070336, number=256, buf=0xb77c2508
ich_spi_read_page: offset=1070592, number=256, buf=0xb77c2608
ich_spi_read_page: offset=1070848, number=256, buf=0xb77c2708
ich_spi_read_page: offset=1071104, number=256, buf=0xb77c2808
ich_spi_read_page: offset=1071360, number=256, buf=0xb77c2908
ich_spi_read_page: offset=1071616, number=256, buf=0xb77c2a08
ich_spi_read_page: offset=1071872, number=256, buf=0xb77c2b08
ich_spi_read_page: offset=1072128, number=256, buf=0xb77c2c08
ich_spi_read_page: offset=1072384, number=256, buf=0xb77c2d08
ich_spi_read_page: offset=1072640, number=256, buf=0xb77c2e08
ich_spi_read_page: offset=1072896, number=256, buf=0xb77c2f08
ich_spi_read_page: offset=1073152, number=256, buf=0xb77c3008
ich_spi_read_page: offset=1073408, number=256, buf=0xb77c3108
ich_spi_read_page: offset=1073664, number=256, buf=0xb77c3208
ich_spi_read_page: offset=1073920, number=256, buf=0xb77c3308
ich_spi_read_page: offset=1074176, number=256, buf=0xb77c3408
ich_spi_read_page: offset=1074432, number=256, buf=0xb77c3508
ich_spi_read_page: offset=1074688, number=256, buf=0xb77c3608
ich_spi_read_page: offset=1074944, number=256, buf=0xb77c3708
ich_spi_read_page: offset=1075200, number=256, buf=0xb77c3808
ich_spi_read_page: offset=1075456, number=256, buf=0xb77c3908
ich_spi_read_page: offset=1075712, number=256, buf=0xb77c3a08
ich_spi_read_page: offset=1075968, number=256, buf=0xb77c3b08
ich_spi_read_page: offset=1076224, number=256, buf=0xb77c3c08
ich_spi_read_page: offset=1076480, number=256, buf=0xb77c3d08
ich_spi_read_page: offset=1076736, number=256, buf=0xb77c3e08
ich_spi_read_page: offset=1076992, number=256, buf=0xb77c3f08
ich_spi_read_page: offset=1077248, number=256, buf=0xb77c4008
ich_spi_read_page: offset=1077504, number=256, buf=0xb77c4108
ich_spi_read_page: offset=1077760, number=256, buf=0xb77c4208
ich_spi_read_page: offset=1078016, number=256, buf=0xb77c4308
ich_spi_read_page: offset=1078272, number=256, buf=0xb77c4408
ich_spi_read_page: offset=1078528, number=256, buf=0xb77c4508
ich_spi_read_page: offset=1078784, number=256, buf=0xb77c4608
ich_spi_read_page: offset=1079040, number=256, buf=0xb77c4708
ich_spi_read_page: offset=1079296, number=256, buf=0xb77c4808
ich_spi_read_page: offset=1079552, number=256, buf=0xb77c4908
ich_spi_read_page: offset=1079808, number=256, buf=0xb77c4a08
ich_spi_read_page: offset=1080064, number=256, buf=0xb77c4b08
ich_spi_read_page: offset=1080320, number=256, buf=0xb77c4c08
ich_spi_read_page: offset=1080576, number=256, buf=0xb77c4d08
ich_spi_read_page: offset=1080832, number=256, buf=0xb77c4e08
ich_spi_read_page: offset=1081088, number=256, buf=0xb77c4f08
ich_spi_read_page: offset=1081344, number=256, buf=0xb77c5008
ich_spi_read_page: offset=1081600, number=256, buf=0xb77c5108
ich_spi_read_page: offset=1081856, number=256, buf=0xb77c5208
ich_spi_read_page: offset=1082112, number=256, buf=0xb77c5308
ich_spi_read_page: offset=1082368, number=256, buf=0xb77c5408
ich_spi_read_page: offset=1082624, number=256, buf=0xb77c5508
ich_spi_read_page: offset=1082880, number=256, buf=0xb77c5608
ich_spi_read_page: offset=1083136, number=256, buf=0xb77c5708
ich_spi_read_page: offset=1083392, number=256, buf=0xb77c5808
ich_spi_read_page: offset=1083648, number=256, buf=0xb77c5908
ich_spi_read_page: offset=1083904, number=256, buf=0xb77c5a08
ich_spi_read_page: offset=1084160, number=256, buf=0xb77c5b08
ich_spi_read_page: offset=1084416, number=256, buf=0xb77c5c08
ich_spi_read_page: offset=1084672, number=256, buf=0xb77c5d08
ich_spi_read_page: offset=1084928, number=256, buf=0xb77c5e08
ich_spi_read_page: offset=1085184, number=256, buf=0xb77c5f08
ich_spi_read_page: offset=1085440, number=256, buf=0xb77c6008
ich_spi_read_page: offset=1085696, number=256, buf=0xb77c6108
ich_spi_read_page: offset=1085952, number=256, buf=0xb77c6208
ich_spi_read_page: offset=1086208, number=256, buf=0xb77c6308
ich_spi_read_page: offset=1086464, number=256, buf=0xb77c6408
ich_spi_read_page: offset=1086720, number=256, buf=0xb77c6508
ich_spi_read_page: offset=1086976, number=256, buf=0xb77c6608
ich_spi_read_page: offset=1087232, number=256, buf=0xb77c6708
ich_spi_read_page: offset=1087488, number=256, buf=0xb77c6808
ich_spi_read_page: offset=1087744, number=256, buf=0xb77c6908
ich_spi_read_page: offset=1088000, number=256, buf=0xb77c6a08
ich_spi_read_page: offset=1088256, number=256, buf=0xb77c6b08
ich_spi_read_page: offset=1088512, number=256, buf=0xb77c6c08
ich_spi_read_page: offset=1088768, number=256, buf=0xb77c6d08
ich_spi_read_page: offset=1089024, number=256, buf=0xb77c6e08
ich_spi_read_page: offset=1089280, number=256, buf=0xb77c6f08
ich_spi_read_page: offset=1089536, number=256, buf=0xb77c7008
ich_spi_read_page: offset=1089792, number=256, buf=0xb77c7108
ich_spi_read_page: offset=1090048, number=256, buf=0xb77c7208
ich_spi_read_page: offset=1090304, number=256, buf=0xb77c7308
ich_spi_read_page: offset=1090560, number=256, buf=0xb77c7408
ich_spi_read_page: offset=1090816, number=256, buf=0xb77c7508
ich_spi_read_page: offset=1091072, number=256, buf=0xb77c7608
ich_spi_read_page: offset=1091328, number=256, buf=0xb77c7708
ich_spi_read_page: offset=1091584, number=256, buf=0xb77c7808
ich_spi_read_page: offset=1091840, number=256, buf=0xb77c7908
ich_spi_read_page: offset=1092096, number=256, buf=0xb77c7a08
ich_spi_read_page: offset=1092352, number=256, buf=0xb77c7b08
ich_spi_read_page: offset=1092608, number=256, buf=0xb77c7c08
ich_spi_read_page: offset=1092864, number=256, buf=0xb77c7d08
ich_spi_read_page: offset=1093120, number=256, buf=0xb77c7e08
ich_spi_read_page: offset=1093376, number=256, buf=0xb77c7f08
ich_spi_read_page: offset=1093632, number=256, buf=0xb77c8008
ich_spi_read_page: offset=1093888, number=256, buf=0xb77c8108
ich_spi_read_page: offset=1094144, number=256, buf=0xb77c8208
ich_spi_read_page: offset=1094400, number=256, buf=0xb77c8308
ich_spi_read_page: offset=1094656, number=256, buf=0xb77c8408
ich_spi_read_page: offset=1094912, number=256, buf=0xb77c8508
ich_spi_read_page: offset=1095168, number=256, buf=0xb77c8608
ich_spi_read_page: offset=1095424, number=256, buf=0xb77c8708
ich_spi_read_page: offset=1095680, number=256, buf=0xb77c8808
ich_spi_read_page: offset=1095936, number=256, buf=0xb77c8908
ich_spi_read_page: offset=1096192, number=256, buf=0xb77c8a08
ich_spi_read_page: offset=1096448, number=256, buf=0xb77c8b08
ich_spi_read_page: offset=1096704, number=256, buf=0xb77c8c08
ich_spi_read_page: offset=1096960, number=256, buf=0xb77c8d08
ich_spi_read_page: offset=1097216, number=256, buf=0xb77c8e08
ich_spi_read_page: offset=1097472, number=256, buf=0xb77c8f08
ich_spi_read_page: offset=1097728, number=256, buf=0xb77c9008
ich_spi_read_page: offset=1097984, number=256, buf=0xb77c9108
ich_spi_read_page: offset=1098240, number=256, buf=0xb77c9208
ich_spi_read_page: offset=1098496, number=256, buf=0xb77c9308
ich_spi_read_page: offset=1098752, number=256, buf=0xb77c9408
ich_spi_read_page: offset=1099008, number=256, buf=0xb77c9508
ich_spi_read_page: offset=1099264, number=256, buf=0xb77c9608
ich_spi_read_page: offset=1099520, number=256, buf=0xb77c9708
ich_spi_read_page: offset=1099776, number=256, buf=0xb77c9808
ich_spi_read_page: offset=1100032, number=256, buf=0xb77c9908
ich_spi_read_page: offset=1100288, number=256, buf=0xb77c9a08
ich_spi_read_page: offset=1100544, number=256, buf=0xb77c9b08
ich_spi_read_page: offset=1100800, number=256, buf=0xb77c9c08
ich_spi_read_page: offset=1101056, number=256, buf=0xb77c9d08
ich_spi_read_page: offset=1101312, number=256, buf=0xb77c9e08
ich_spi_read_page: offset=1101568, number=256, buf=0xb77c9f08
ich_spi_read_page: offset=1101824, number=256, buf=0xb77ca008
ich_spi_read_page: offset=1102080, number=256, buf=0xb77ca108
ich_spi_read_page: offset=1102336, number=256, buf=0xb77ca208
ich_spi_read_page: offset=1102592, number=256, buf=0xb77ca308
ich_spi_read_page: offset=1102848, number=256, buf=0xb77ca408
ich_spi_read_page: offset=1103104, number=256, buf=0xb77ca508
ich_spi_read_page: offset=1103360, number=256, buf=0xb77ca608
ich_spi_read_page: offset=1103616, number=256, buf=0xb77ca708
ich_spi_read_page: offset=1103872, number=256, buf=0xb77ca808
ich_spi_read_page: offset=1104128, number=256, buf=0xb77ca908
ich_spi_read_page: offset=1104384, number=256, buf=0xb77caa08
ich_spi_read_page: offset=1104640, number=256, buf=0xb77cab08
ich_spi_read_page: offset=1104896, number=256, buf=0xb77cac08
ich_spi_read_page: offset=1105152, number=256, buf=0xb77cad08
ich_spi_read_page: offset=1105408, number=256, buf=0xb77cae08
ich_spi_read_page: offset=1105664, number=256, buf=0xb77caf08
ich_spi_read_page: offset=1105920, number=256, buf=0xb77cb008
ich_spi_read_page: offset=1106176, number=256, buf=0xb77cb108
ich_spi_read_page: offset=1106432, number=256, buf=0xb77cb208
ich_spi_read_page: offset=1106688, number=256, buf=0xb77cb308
ich_spi_read_page: offset=1106944, number=256, buf=0xb77cb408
ich_spi_read_page: offset=1107200, number=256, buf=0xb77cb508
ich_spi_read_page: offset=1107456, number=256, buf=0xb77cb608
ich_spi_read_page: offset=1107712, number=256, buf=0xb77cb708
ich_spi_read_page: offset=1107968, number=256, buf=0xb77cb808
ich_spi_read_page: offset=1108224, number=256, buf=0xb77cb908
ich_spi_read_page: offset=1108480, number=256, buf=0xb77cba08
ich_spi_read_page: offset=1108736, number=256, buf=0xb77cbb08
ich_spi_read_page: offset=1108992, number=256, buf=0xb77cbc08
ich_spi_read_page: offset=1109248, number=256, buf=0xb77cbd08
ich_spi_read_page: offset=1109504, number=256, buf=0xb77cbe08
ich_spi_read_page: offset=1109760, number=256, buf=0xb77cbf08
ich_spi_read_page: offset=1110016, number=256, buf=0xb77cc008
ich_spi_read_page: offset=1110272, number=256, buf=0xb77cc108
ich_spi_read_page: offset=1110528, number=256, buf=0xb77cc208
ich_spi_read_page: offset=1110784, number=256, buf=0xb77cc308
ich_spi_read_page: offset=1111040, number=256, buf=0xb77cc408
ich_spi_read_page: offset=1111296, number=256, buf=0xb77cc508
ich_spi_read_page: offset=1111552, number=256, buf=0xb77cc608
ich_spi_read_page: offset=1111808, number=256, buf=0xb77cc708
ich_spi_read_page: offset=1112064, number=256, buf=0xb77cc808
ich_spi_read_page: offset=1112320, number=256, buf=0xb77cc908
ich_spi_read_page: offset=1112576, number=256, buf=0xb77cca08
ich_spi_read_page: offset=1112832, number=256, buf=0xb77ccb08
ich_spi_read_page: offset=1113088, number=256, buf=0xb77ccc08
ich_spi_read_page: offset=1113344, number=256, buf=0xb77ccd08
ich_spi_read_page: offset=1113600, number=256, buf=0xb77cce08
ich_spi_read_page: offset=1113856, number=256, buf=0xb77ccf08
ich_spi_read_page: offset=1114112, number=256, buf=0xb77cd008
ich_spi_read_page: offset=1114368, number=256, buf=0xb77cd108
ich_spi_read_page: offset=1114624, number=256, buf=0xb77cd208
ich_spi_read_page: offset=1114880, number=256, buf=0xb77cd308
ich_spi_read_page: offset=1115136, number=256, buf=0xb77cd408
ich_spi_read_page: offset=1115392, number=256, buf=0xb77cd508
ich_spi_read_page: offset=1115648, number=256, buf=0xb77cd608
ich_spi_read_page: offset=1115904, number=256, buf=0xb77cd708
ich_spi_read_page: offset=1116160, number=256, buf=0xb77cd808
ich_spi_read_page: offset=1116416, number=256, buf=0xb77cd908
ich_spi_read_page: offset=1116672, number=256, buf=0xb77cda08
ich_spi_read_page: offset=1116928, number=256, buf=0xb77cdb08
ich_spi_read_page: offset=1117184, number=256, buf=0xb77cdc08
ich_spi_read_page: offset=1117440, number=256, buf=0xb77cdd08
ich_spi_read_page: offset=1117696, number=256, buf=0xb77cde08
ich_spi_read_page: offset=1117952, number=256, buf=0xb77cdf08
ich_spi_read_page: offset=1118208, number=256, buf=0xb77ce008
ich_spi_read_page: offset=1118464, number=256, buf=0xb77ce108
ich_spi_read_page: offset=1118720, number=256, buf=0xb77ce208
ich_spi_read_page: offset=1118976, number=256, buf=0xb77ce308
ich_spi_read_page: offset=1119232, number=256, buf=0xb77ce408
ich_spi_read_page: offset=1119488, number=256, buf=0xb77ce508
ich_spi_read_page: offset=1119744, number=256, buf=0xb77ce608
ich_spi_read_page: offset=1120000, number=256, buf=0xb77ce708
ich_spi_read_page: offset=1120256, number=256, buf=0xb77ce808
ich_spi_read_page: offset=1120512, number=256, buf=0xb77ce908
ich_spi_read_page: offset=1120768, number=256, buf=0xb77cea08
ich_spi_read_page: offset=1121024, number=256, buf=0xb77ceb08
ich_spi_read_page: offset=1121280, number=256, buf=0xb77cec08
ich_spi_read_page: offset=1121536, number=256, buf=0xb77ced08
ich_spi_read_page: offset=1121792, number=256, buf=0xb77cee08
ich_spi_read_page: offset=1122048, number=256, buf=0xb77cef08
ich_spi_read_page: offset=1122304, number=256, buf=0xb77cf008
ich_spi_read_page: offset=1122560, number=256, buf=0xb77cf108
ich_spi_read_page: offset=1122816, number=256, buf=0xb77cf208
ich_spi_read_page: offset=1123072, number=256, buf=0xb77cf308
ich_spi_read_page: offset=1123328, number=256, buf=0xb77cf408
ich_spi_read_page: offset=1123584, number=256, buf=0xb77cf508
ich_spi_read_page: offset=1123840, number=256, buf=0xb77cf608
ich_spi_read_page: offset=1124096, number=256, buf=0xb77cf708
ich_spi_read_page: offset=1124352, number=256, buf=0xb77cf808
ich_spi_read_page: offset=1124608, number=256, buf=0xb77cf908
ich_spi_read_page: offset=1124864, number=256, buf=0xb77cfa08
ich_spi_read_page: offset=1125120, number=256, buf=0xb77cfb08
ich_spi_read_page: offset=1125376, number=256, buf=0xb77cfc08
ich_spi_read_page: offset=1125632, number=256, buf=0xb77cfd08
ich_spi_read_page: offset=1125888, number=256, buf=0xb77cfe08
ich_spi_read_page: offset=1126144, number=256, buf=0xb77cff08
ich_spi_read_page: offset=1126400, number=256, buf=0xb77d0008
ich_spi_read_page: offset=1126656, number=256, buf=0xb77d0108
ich_spi_read_page: offset=1126912, number=256, buf=0xb77d0208
ich_spi_read_page: offset=1127168, number=256, buf=0xb77d0308
ich_spi_read_page: offset=1127424, number=256, buf=0xb77d0408
ich_spi_read_page: offset=1127680, number=256, buf=0xb77d0508
ich_spi_read_page: offset=1127936, number=256, buf=0xb77d0608
ich_spi_read_page: offset=1128192, number=256, buf=0xb77d0708
ich_spi_read_page: offset=1128448, number=256, buf=0xb77d0808
ich_spi_read_page: offset=1128704, number=256, buf=0xb77d0908
ich_spi_read_page: offset=1128960, number=256, buf=0xb77d0a08
ich_spi_read_page: offset=1129216, number=256, buf=0xb77d0b08
ich_spi_read_page: offset=1129472, number=256, buf=0xb77d0c08
ich_spi_read_page: offset=1129728, number=256, buf=0xb77d0d08
ich_spi_read_page: offset=1129984, number=256, buf=0xb77d0e08
ich_spi_read_page: offset=1130240, number=256, buf=0xb77d0f08
ich_spi_read_page: offset=1130496, number=256, buf=0xb77d1008
ich_spi_read_page: offset=1130752, number=256, buf=0xb77d1108
ich_spi_read_page: offset=1131008, number=256, buf=0xb77d1208
ich_spi_read_page: offset=1131264, number=256, buf=0xb77d1308
ich_spi_read_page: offset=1131520, number=256, buf=0xb77d1408
ich_spi_read_page: offset=1131776, number=256, buf=0xb77d1508
ich_spi_read_page: offset=1132032, number=256, buf=0xb77d1608
ich_spi_read_page: offset=1132288, number=256, buf=0xb77d1708
ich_spi_read_page: offset=1132544, number=256, buf=0xb77d1808
ich_spi_read_page: offset=1132800, number=256, buf=0xb77d1908
ich_spi_read_page: offset=1133056, number=256, buf=0xb77d1a08
ich_spi_read_page: offset=1133312, number=256, buf=0xb77d1b08
ich_spi_read_page: offset=1133568, number=256, buf=0xb77d1c08
ich_spi_read_page: offset=1133824, number=256, buf=0xb77d1d08
ich_spi_read_page: offset=1134080, number=256, buf=0xb77d1e08
ich_spi_read_page: offset=1134336, number=256, buf=0xb77d1f08
ich_spi_read_page: offset=1134592, number=256, buf=0xb77d2008
ich_spi_read_page: offset=1134848, number=256, buf=0xb77d2108
ich_spi_read_page: offset=1135104, number=256, buf=0xb77d2208
ich_spi_read_page: offset=1135360, number=256, buf=0xb77d2308
ich_spi_read_page: offset=1135616, number=256, buf=0xb77d2408
ich_spi_read_page: offset=1135872, number=256, buf=0xb77d2508
ich_spi_read_page: offset=1136128, number=256, buf=0xb77d2608
ich_spi_read_page: offset=1136384, number=256, buf=0xb77d2708
ich_spi_read_page: offset=1136640, number=256, buf=0xb77d2808
ich_spi_read_page: offset=1136896, number=256, buf=0xb77d2908
ich_spi_read_page: offset=1137152, number=256, buf=0xb77d2a08
ich_spi_read_page: offset=1137408, number=256, buf=0xb77d2b08
ich_spi_read_page: offset=1137664, number=256, buf=0xb77d2c08
ich_spi_read_page: offset=1137920, number=256, buf=0xb77d2d08
ich_spi_read_page: offset=1138176, number=256, buf=0xb77d2e08
ich_spi_read_page: offset=1138432, number=256, buf=0xb77d2f08
ich_spi_read_page: offset=1138688, number=256, buf=0xb77d3008
ich_spi_read_page: offset=1138944, number=256, buf=0xb77d3108
ich_spi_read_page: offset=1139200, number=256, buf=0xb77d3208
ich_spi_read_page: offset=1139456, number=256, buf=0xb77d3308
ich_spi_read_page: offset=1139712, number=256, buf=0xb77d3408
ich_spi_read_page: offset=1139968, number=256, buf=0xb77d3508
ich_spi_read_page: offset=1140224, number=256, buf=0xb77d3608
ich_spi_read_page: offset=1140480, number=256, buf=0xb77d3708
ich_spi_read_page: offset=1140736, number=256, buf=0xb77d3808
ich_spi_read_page: offset=1140992, number=256, buf=0xb77d3908
ich_spi_read_page: offset=1141248, number=256, buf=0xb77d3a08
ich_spi_read_page: offset=1141504, number=256, buf=0xb77d3b08
ich_spi_read_page: offset=1141760, number=256, buf=0xb77d3c08
ich_spi_read_page: offset=1142016, number=256, buf=0xb77d3d08
ich_spi_read_page: offset=1142272, number=256, buf=0xb77d3e08
ich_spi_read_page: offset=1142528, number=256, buf=0xb77d3f08
ich_spi_read_page: offset=1142784, number=256, buf=0xb77d4008
ich_spi_read_page: offset=1143040, number=256, buf=0xb77d4108
ich_spi_read_page: offset=1143296, number=256, buf=0xb77d4208
ich_spi_read_page: offset=1143552, number=256, buf=0xb77d4308
ich_spi_read_page: offset=1143808, number=256, buf=0xb77d4408
ich_spi_read_page: offset=1144064, number=256, buf=0xb77d4508
ich_spi_read_page: offset=1144320, number=256, buf=0xb77d4608
ich_spi_read_page: offset=1144576, number=256, buf=0xb77d4708
ich_spi_read_page: offset=1144832, number=256, buf=0xb77d4808
ich_spi_read_page: offset=1145088, number=256, buf=0xb77d4908
ich_spi_read_page: offset=1145344, number=256, buf=0xb77d4a08
ich_spi_read_page: offset=1145600, number=256, buf=0xb77d4b08
ich_spi_read_page: offset=1145856, number=256, buf=0xb77d4c08
ich_spi_read_page: offset=1146112, number=256, buf=0xb77d4d08
ich_spi_read_page: offset=1146368, number=256, buf=0xb77d4e08
ich_spi_read_page: offset=1146624, number=256, buf=0xb77d4f08
ich_spi_read_page: offset=1146880, number=256, buf=0xb77d5008
ich_spi_read_page: offset=1147136, number=256, buf=0xb77d5108
ich_spi_read_page: offset=1147392, number=256, buf=0xb77d5208
ich_spi_read_page: offset=1147648, number=256, buf=0xb77d5308
ich_spi_read_page: offset=1147904, number=256, buf=0xb77d5408
ich_spi_read_page: offset=1148160, number=256, buf=0xb77d5508
ich_spi_read_page: offset=1148416, number=256, buf=0xb77d5608
ich_spi_read_page: offset=1148672, number=256, buf=0xb77d5708
ich_spi_read_page: offset=1148928, number=256, buf=0xb77d5808
ich_spi_read_page: offset=1149184, number=256, buf=0xb77d5908
ich_spi_read_page: offset=1149440, number=256, buf=0xb77d5a08
ich_spi_read_page: offset=1149696, number=256, buf=0xb77d5b08
ich_spi_read_page: offset=1149952, number=256, buf=0xb77d5c08
ich_spi_read_page: offset=1150208, number=256, buf=0xb77d5d08
ich_spi_read_page: offset=1150464, number=256, buf=0xb77d5e08
ich_spi_read_page: offset=1150720, number=256, buf=0xb77d5f08
ich_spi_read_page: offset=1150976, number=256, buf=0xb77d6008
ich_spi_read_page: offset=1151232, number=256, buf=0xb77d6108
ich_spi_read_page: offset=1151488, number=256, buf=0xb77d6208
ich_spi_read_page: offset=1151744, number=256, buf=0xb77d6308
ich_spi_read_page: offset=1152000, number=256, buf=0xb77d6408
ich_spi_read_page: offset=1152256, number=256, buf=0xb77d6508
ich_spi_read_page: offset=1152512, number=256, buf=0xb77d6608
ich_spi_read_page: offset=1152768, number=256, buf=0xb77d6708
ich_spi_read_page: offset=1153024, number=256, buf=0xb77d6808
ich_spi_read_page: offset=1153280, number=256, buf=0xb77d6908
ich_spi_read_page: offset=1153536, number=256, buf=0xb77d6a08
ich_spi_read_page: offset=1153792, number=256, buf=0xb77d6b08
ich_spi_read_page: offset=1154048, number=256, buf=0xb77d6c08
ich_spi_read_page: offset=1154304, number=256, buf=0xb77d6d08
ich_spi_read_page: offset=1154560, number=256, buf=0xb77d6e08
ich_spi_read_page: offset=1154816, number=256, buf=0xb77d6f08
ich_spi_read_page: offset=1155072, number=256, buf=0xb77d7008
ich_spi_read_page: offset=1155328, number=256, buf=0xb77d7108
ich_spi_read_page: offset=1155584, number=256, buf=0xb77d7208
ich_spi_read_page: offset=1155840, number=256, buf=0xb77d7308
ich_spi_read_page: offset=1156096, number=256, buf=0xb77d7408
ich_spi_read_page: offset=1156352, number=256, buf=0xb77d7508
ich_spi_read_page: offset=1156608, number=256, buf=0xb77d7608
ich_spi_read_page: offset=1156864, number=256, buf=0xb77d7708
ich_spi_read_page: offset=1157120, number=256, buf=0xb77d7808
ich_spi_read_page: offset=1157376, number=256, buf=0xb77d7908
ich_spi_read_page: offset=1157632, number=256, buf=0xb77d7a08
ich_spi_read_page: offset=1157888, number=256, buf=0xb77d7b08
ich_spi_read_page: offset=1158144, number=256, buf=0xb77d7c08
ich_spi_read_page: offset=1158400, number=256, buf=0xb77d7d08
ich_spi_read_page: offset=1158656, number=256, buf=0xb77d7e08
ich_spi_read_page: offset=1158912, number=256, buf=0xb77d7f08
ich_spi_read_page: offset=1159168, number=256, buf=0xb77d8008
ich_spi_read_page: offset=1159424, number=256, buf=0xb77d8108
ich_spi_read_page: offset=1159680, number=256, buf=0xb77d8208
ich_spi_read_page: offset=1159936, number=256, buf=0xb77d8308
ich_spi_read_page: offset=1160192, number=256, buf=0xb77d8408
ich_spi_read_page: offset=1160448, number=256, buf=0xb77d8508
ich_spi_read_page: offset=1160704, number=256, buf=0xb77d8608
ich_spi_read_page: offset=1160960, number=256, buf=0xb77d8708
ich_spi_read_page: offset=1161216, number=256, buf=0xb77d8808
ich_spi_read_page: offset=1161472, number=256, buf=0xb77d8908
ich_spi_read_page: offset=1161728, number=256, buf=0xb77d8a08
ich_spi_read_page: offset=1161984, number=256, buf=0xb77d8b08
ich_spi_read_page: offset=1162240, number=256, buf=0xb77d8c08
ich_spi_read_page: offset=1162496, number=256, buf=0xb77d8d08
ich_spi_read_page: offset=1162752, number=256, buf=0xb77d8e08
ich_spi_read_page: offset=1163008, number=256, buf=0xb77d8f08
ich_spi_read_page: offset=1163264, number=256, buf=0xb77d9008
ich_spi_read_page: offset=1163520, number=256, buf=0xb77d9108
ich_spi_read_page: offset=1163776, number=256, buf=0xb77d9208
ich_spi_read_page: offset=1164032, number=256, buf=0xb77d9308
ich_spi_read_page: offset=1164288, number=256, buf=0xb77d9408
ich_spi_read_page: offset=1164544, number=256, buf=0xb77d9508
ich_spi_read_page: offset=1164800, number=256, buf=0xb77d9608
ich_spi_read_page: offset=1165056, number=256, buf=0xb77d9708
ich_spi_read_page: offset=1165312, number=256, buf=0xb77d9808
ich_spi_read_page: offset=1165568, number=256, buf=0xb77d9908
ich_spi_read_page: offset=1165824, number=256, buf=0xb77d9a08
ich_spi_read_page: offset=1166080, number=256, buf=0xb77d9b08
ich_spi_read_page: offset=1166336, number=256, buf=0xb77d9c08
ich_spi_read_page: offset=1166592, number=256, buf=0xb77d9d08
ich_spi_read_page: offset=1166848, number=256, buf=0xb77d9e08
ich_spi_read_page: offset=1167104, number=256, buf=0xb77d9f08
ich_spi_read_page: offset=1167360, number=256, buf=0xb77da008
ich_spi_read_page: offset=1167616, number=256, buf=0xb77da108
ich_spi_read_page: offset=1167872, number=256, buf=0xb77da208
ich_spi_read_page: offset=1168128, number=256, buf=0xb77da308
ich_spi_read_page: offset=1168384, number=256, buf=0xb77da408
ich_spi_read_page: offset=1168640, number=256, buf=0xb77da508
ich_spi_read_page: offset=1168896, number=256, buf=0xb77da608
ich_spi_read_page: offset=1169152, number=256, buf=0xb77da708
ich_spi_read_page: offset=1169408, number=256, buf=0xb77da808
ich_spi_read_page: offset=1169664, number=256, buf=0xb77da908
ich_spi_read_page: offset=1169920, number=256, buf=0xb77daa08
ich_spi_read_page: offset=1170176, number=256, buf=0xb77dab08
ich_spi_read_page: offset=1170432, number=256, buf=0xb77dac08
ich_spi_read_page: offset=1170688, number=256, buf=0xb77dad08
ich_spi_read_page: offset=1170944, number=256, buf=0xb77dae08
ich_spi_read_page: offset=1171200, number=256, buf=0xb77daf08
ich_spi_read_page: offset=1171456, number=256, buf=0xb77db008
ich_spi_read_page: offset=1171712, number=256, buf=0xb77db108
ich_spi_read_page: offset=1171968, number=256, buf=0xb77db208
ich_spi_read_page: offset=1172224, number=256, buf=0xb77db308
ich_spi_read_page: offset=1172480, number=256, buf=0xb77db408
ich_spi_read_page: offset=1172736, number=256, buf=0xb77db508
ich_spi_read_page: offset=1172992, number=256, buf=0xb77db608
ich_spi_read_page: offset=1173248, number=256, buf=0xb77db708
ich_spi_read_page: offset=1173504, number=256, buf=0xb77db808
ich_spi_read_page: offset=1173760, number=256, buf=0xb77db908
ich_spi_read_page: offset=1174016, number=256, buf=0xb77dba08
ich_spi_read_page: offset=1174272, number=256, buf=0xb77dbb08
ich_spi_read_page: offset=1174528, number=256, buf=0xb77dbc08
ich_spi_read_page: offset=1174784, number=256, buf=0xb77dbd08
ich_spi_read_page: offset=1175040, number=256, buf=0xb77dbe08
ich_spi_read_page: offset=1175296, number=256, buf=0xb77dbf08
ich_spi_read_page: offset=1175552, number=256, buf=0xb77dc008
ich_spi_read_page: offset=1175808, number=256, buf=0xb77dc108
ich_spi_read_page: offset=1176064, number=256, buf=0xb77dc208
ich_spi_read_page: offset=1176320, number=256, buf=0xb77dc308
ich_spi_read_page: offset=1176576, number=256, buf=0xb77dc408
ich_spi_read_page: offset=1176832, number=256, buf=0xb77dc508
ich_spi_read_page: offset=1177088, number=256, buf=0xb77dc608
ich_spi_read_page: offset=1177344, number=256, buf=0xb77dc708
ich_spi_read_page: offset=1177600, number=256, buf=0xb77dc808
ich_spi_read_page: offset=1177856, number=256, buf=0xb77dc908
ich_spi_read_page: offset=1178112, number=256, buf=0xb77dca08
ich_spi_read_page: offset=1178368, number=256, buf=0xb77dcb08
ich_spi_read_page: offset=1178624, number=256, buf=0xb77dcc08
ich_spi_read_page: offset=1178880, number=256, buf=0xb77dcd08
ich_spi_read_page: offset=1179136, number=256, buf=0xb77dce08
ich_spi_read_page: offset=1179392, number=256, buf=0xb77dcf08
ich_spi_read_page: offset=1179648, number=256, buf=0xb77dd008
ich_spi_read_page: offset=1179904, number=256, buf=0xb77dd108
ich_spi_read_page: offset=1180160, number=256, buf=0xb77dd208
ich_spi_read_page: offset=1180416, number=256, buf=0xb77dd308
ich_spi_read_page: offset=1180672, number=256, buf=0xb77dd408
ich_spi_read_page: offset=1180928, number=256, buf=0xb77dd508
ich_spi_read_page: offset=1181184, number=256, buf=0xb77dd608
ich_spi_read_page: offset=1181440, number=256, buf=0xb77dd708
ich_spi_read_page: offset=1181696, number=256, buf=0xb77dd808
ich_spi_read_page: offset=1181952, number=256, buf=0xb77dd908
ich_spi_read_page: offset=1182208, number=256, buf=0xb77dda08
ich_spi_read_page: offset=1182464, number=256, buf=0xb77ddb08
ich_spi_read_page: offset=1182720, number=256, buf=0xb77ddc08
ich_spi_read_page: offset=1182976, number=256, buf=0xb77ddd08
ich_spi_read_page: offset=1183232, number=256, buf=0xb77dde08
ich_spi_read_page: offset=1183488, number=256, buf=0xb77ddf08
ich_spi_read_page: offset=1183744, number=256, buf=0xb77de008
ich_spi_read_page: offset=1184000, number=256, buf=0xb77de108
ich_spi_read_page: offset=1184256, number=256, buf=0xb77de208
ich_spi_read_page: offset=1184512, number=256, buf=0xb77de308
ich_spi_read_page: offset=1184768, number=256, buf=0xb77de408
ich_spi_read_page: offset=1185024, number=256, buf=0xb77de508
ich_spi_read_page: offset=1185280, number=256, buf=0xb77de608
ich_spi_read_page: offset=1185536, number=256, buf=0xb77de708
ich_spi_read_page: offset=1185792, number=256, buf=0xb77de808
ich_spi_read_page: offset=1186048, number=256, buf=0xb77de908
ich_spi_read_page: offset=1186304, number=256, buf=0xb77dea08
ich_spi_read_page: offset=1186560, number=256, buf=0xb77deb08
ich_spi_read_page: offset=1186816, number=256, buf=0xb77dec08
ich_spi_read_page: offset=1187072, number=256, buf=0xb77ded08
ich_spi_read_page: offset=1187328, number=256, buf=0xb77dee08
ich_spi_read_page: offset=1187584, number=256, buf=0xb77def08
ich_spi_read_page: offset=1187840, number=256, buf=0xb77df008
ich_spi_read_page: offset=1188096, number=256, buf=0xb77df108
ich_spi_read_page: offset=1188352, number=256, buf=0xb77df208
ich_spi_read_page: offset=1188608, number=256, buf=0xb77df308
ich_spi_read_page: offset=1188864, number=256, buf=0xb77df408
ich_spi_read_page: offset=1189120, number=256, buf=0xb77df508
ich_spi_read_page: offset=1189376, number=256, buf=0xb77df608
ich_spi_read_page: offset=1189632, number=256, buf=0xb77df708
ich_spi_read_page: offset=1189888, number=256, buf=0xb77df808
ich_spi_read_page: offset=1190144, number=256, buf=0xb77df908
ich_spi_read_page: offset=1190400, number=256, buf=0xb77dfa08
ich_spi_read_page: offset=1190656, number=256, buf=0xb77dfb08
ich_spi_read_page: offset=1190912, number=256, buf=0xb77dfc08
ich_spi_read_page: offset=1191168, number=256, buf=0xb77dfd08
ich_spi_read_page: offset=1191424, number=256, buf=0xb77dfe08
ich_spi_read_page: offset=1191680, number=256, buf=0xb77dff08
ich_spi_read_page: offset=1191936, number=256, buf=0xb77e0008
ich_spi_read_page: offset=1192192, number=256, buf=0xb77e0108
ich_spi_read_page: offset=1192448, number=256, buf=0xb77e0208
ich_spi_read_page: offset=1192704, number=256, buf=0xb77e0308
ich_spi_read_page: offset=1192960, number=256, buf=0xb77e0408
ich_spi_read_page: offset=1193216, number=256, buf=0xb77e0508
ich_spi_read_page: offset=1193472, number=256, buf=0xb77e0608
ich_spi_read_page: offset=1193728, number=256, buf=0xb77e0708
ich_spi_read_page: offset=1193984, number=256, buf=0xb77e0808
ich_spi_read_page: offset=1194240, number=256, buf=0xb77e0908
ich_spi_read_page: offset=1194496, number=256, buf=0xb77e0a08
ich_spi_read_page: offset=1194752, number=256, buf=0xb77e0b08
ich_spi_read_page: offset=1195008, number=256, buf=0xb77e0c08
ich_spi_read_page: offset=1195264, number=256, buf=0xb77e0d08
ich_spi_read_page: offset=1195520, number=256, buf=0xb77e0e08
ich_spi_read_page: offset=1195776, number=256, buf=0xb77e0f08
ich_spi_read_page: offset=1196032, number=256, buf=0xb77e1008
ich_spi_read_page: offset=1196288, number=256, buf=0xb77e1108
ich_spi_read_page: offset=1196544, number=256, buf=0xb77e1208
ich_spi_read_page: offset=1196800, number=256, buf=0xb77e1308
ich_spi_read_page: offset=1197056, number=256, buf=0xb77e1408
ich_spi_read_page: offset=1197312, number=256, buf=0xb77e1508
ich_spi_read_page: offset=1197568, number=256, buf=0xb77e1608
ich_spi_read_page: offset=1197824, number=256, buf=0xb77e1708
ich_spi_read_page: offset=1198080, number=256, buf=0xb77e1808
ich_spi_read_page: offset=1198336, number=256, buf=0xb77e1908
ich_spi_read_page: offset=1198592, number=256, buf=0xb77e1a08
ich_spi_read_page: offset=1198848, number=256, buf=0xb77e1b08
ich_spi_read_page: offset=1199104, number=256, buf=0xb77e1c08
ich_spi_read_page: offset=1199360, number=256, buf=0xb77e1d08
ich_spi_read_page: offset=1199616, number=256, buf=0xb77e1e08
ich_spi_read_page: offset=1199872, number=256, buf=0xb77e1f08
ich_spi_read_page: offset=1200128, number=256, buf=0xb77e2008
ich_spi_read_page: offset=1200384, number=256, buf=0xb77e2108
ich_spi_read_page: offset=1200640, number=256, buf=0xb77e2208
ich_spi_read_page: offset=1200896, number=256, buf=0xb77e2308
ich_spi_read_page: offset=1201152, number=256, buf=0xb77e2408
ich_spi_read_page: offset=1201408, number=256, buf=0xb77e2508
ich_spi_read_page: offset=1201664, number=256, buf=0xb77e2608
ich_spi_read_page: offset=1201920, number=256, buf=0xb77e2708
ich_spi_read_page: offset=1202176, number=256, buf=0xb77e2808
ich_spi_read_page: offset=1202432, number=256, buf=0xb77e2908
ich_spi_read_page: offset=1202688, number=256, buf=0xb77e2a08
ich_spi_read_page: offset=1202944, number=256, buf=0xb77e2b08
ich_spi_read_page: offset=1203200, number=256, buf=0xb77e2c08
ich_spi_read_page: offset=1203456, number=256, buf=0xb77e2d08
ich_spi_read_page: offset=1203712, number=256, buf=0xb77e2e08
ich_spi_read_page: offset=1203968, number=256, buf=0xb77e2f08
ich_spi_read_page: offset=1204224, number=256, buf=0xb77e3008
ich_spi_read_page: offset=1204480, number=256, buf=0xb77e3108
ich_spi_read_page: offset=1204736, number=256, buf=0xb77e3208
ich_spi_read_page: offset=1204992, number=256, buf=0xb77e3308
ich_spi_read_page: offset=1205248, number=256, buf=0xb77e3408
ich_spi_read_page: offset=1205504, number=256, buf=0xb77e3508
ich_spi_read_page: offset=1205760, number=256, buf=0xb77e3608
ich_spi_read_page: offset=1206016, number=256, buf=0xb77e3708
ich_spi_read_page: offset=1206272, number=256, buf=0xb77e3808
ich_spi_read_page: offset=1206528, number=256, buf=0xb77e3908
ich_spi_read_page: offset=1206784, number=256, buf=0xb77e3a08
ich_spi_read_page: offset=1207040, number=256, buf=0xb77e3b08
ich_spi_read_page: offset=1207296, number=256, buf=0xb77e3c08
ich_spi_read_page: offset=1207552, number=256, buf=0xb77e3d08
ich_spi_read_page: offset=1207808, number=256, buf=0xb77e3e08
ich_spi_read_page: offset=1208064, number=256, buf=0xb77e3f08
ich_spi_read_page: offset=1208320, number=256, buf=0xb77e4008
ich_spi_read_page: offset=1208576, number=256, buf=0xb77e4108
ich_spi_read_page: offset=1208832, number=256, buf=0xb77e4208
ich_spi_read_page: offset=1209088, number=256, buf=0xb77e4308
ich_spi_read_page: offset=1209344, number=256, buf=0xb77e4408
ich_spi_read_page: offset=1209600, number=256, buf=0xb77e4508
ich_spi_read_page: offset=1209856, number=256, buf=0xb77e4608
ich_spi_read_page: offset=1210112, number=256, buf=0xb77e4708
ich_spi_read_page: offset=1210368, number=256, buf=0xb77e4808
ich_spi_read_page: offset=1210624, number=256, buf=0xb77e4908
ich_spi_read_page: offset=1210880, number=256, buf=0xb77e4a08
ich_spi_read_page: offset=1211136, number=256, buf=0xb77e4b08
ich_spi_read_page: offset=1211392, number=256, buf=0xb77e4c08
ich_spi_read_page: offset=1211648, number=256, buf=0xb77e4d08
ich_spi_read_page: offset=1211904, number=256, buf=0xb77e4e08
ich_spi_read_page: offset=1212160, number=256, buf=0xb77e4f08
ich_spi_read_page: offset=1212416, number=256, buf=0xb77e5008
ich_spi_read_page: offset=1212672, number=256, buf=0xb77e5108
ich_spi_read_page: offset=1212928, number=256, buf=0xb77e5208
ich_spi_read_page: offset=1213184, number=256, buf=0xb77e5308
ich_spi_read_page: offset=1213440, number=256, buf=0xb77e5408
ich_spi_read_page: offset=1213696, number=256, buf=0xb77e5508
ich_spi_read_page: offset=1213952, number=256, buf=0xb77e5608
ich_spi_read_page: offset=1214208, number=256, buf=0xb77e5708
ich_spi_read_page: offset=1214464, number=256, buf=0xb77e5808
ich_spi_read_page: offset=1214720, number=256, buf=0xb77e5908
ich_spi_read_page: offset=1214976, number=256, buf=0xb77e5a08
ich_spi_read_page: offset=1215232, number=256, buf=0xb77e5b08
ich_spi_read_page: offset=1215488, number=256, buf=0xb77e5c08
ich_spi_read_page: offset=1215744, number=256, buf=0xb77e5d08
ich_spi_read_page: offset=1216000, number=256, buf=0xb77e5e08
ich_spi_read_page: offset=1216256, number=256, buf=0xb77e5f08
ich_spi_read_page: offset=1216512, number=256, buf=0xb77e6008
ich_spi_read_page: offset=1216768, number=256, buf=0xb77e6108
ich_spi_read_page: offset=1217024, number=256, buf=0xb77e6208
ich_spi_read_page: offset=1217280, number=256, buf=0xb77e6308
ich_spi_read_page: offset=1217536, number=256, buf=0xb77e6408
ich_spi_read_page: offset=1217792, number=256, buf=0xb77e6508
ich_spi_read_page: offset=1218048, number=256, buf=0xb77e6608
ich_spi_read_page: offset=1218304, number=256, buf=0xb77e6708
ich_spi_read_page: offset=1218560, number=256, buf=0xb77e6808
ich_spi_read_page: offset=1218816, number=256, buf=0xb77e6908
ich_spi_read_page: offset=1219072, number=256, buf=0xb77e6a08
ich_spi_read_page: offset=1219328, number=256, buf=0xb77e6b08
ich_spi_read_page: offset=1219584, number=256, buf=0xb77e6c08
ich_spi_read_page: offset=1219840, number=256, buf=0xb77e6d08
ich_spi_read_page: offset=1220096, number=256, buf=0xb77e6e08
ich_spi_read_page: offset=1220352, number=256, buf=0xb77e6f08
ich_spi_read_page: offset=1220608, number=256, buf=0xb77e7008
ich_spi_read_page: offset=1220864, number=256, buf=0xb77e7108
ich_spi_read_page: offset=1221120, number=256, buf=0xb77e7208
ich_spi_read_page: offset=1221376, number=256, buf=0xb77e7308
ich_spi_read_page: offset=1221632, number=256, buf=0xb77e7408
ich_spi_read_page: offset=1221888, number=256, buf=0xb77e7508
ich_spi_read_page: offset=1222144, number=256, buf=0xb77e7608
ich_spi_read_page: offset=1222400, number=256, buf=0xb77e7708
ich_spi_read_page: offset=1222656, number=256, buf=0xb77e7808
ich_spi_read_page: offset=1222912, number=256, buf=0xb77e7908
ich_spi_read_page: offset=1223168, number=256, buf=0xb77e7a08
ich_spi_read_page: offset=1223424, number=256, buf=0xb77e7b08
ich_spi_read_page: offset=1223680, number=256, buf=0xb77e7c08
ich_spi_read_page: offset=1223936, number=256, buf=0xb77e7d08
ich_spi_read_page: offset=1224192, number=256, buf=0xb77e7e08
ich_spi_read_page: offset=1224448, number=256, buf=0xb77e7f08
ich_spi_read_page: offset=1224704, number=256, buf=0xb77e8008
ich_spi_read_page: offset=1224960, number=256, buf=0xb77e8108
ich_spi_read_page: offset=1225216, number=256, buf=0xb77e8208
ich_spi_read_page: offset=1225472, number=256, buf=0xb77e8308
ich_spi_read_page: offset=1225728, number=256, buf=0xb77e8408
ich_spi_read_page: offset=1225984, number=256, buf=0xb77e8508
ich_spi_read_page: offset=1226240, number=256, buf=0xb77e8608
ich_spi_read_page: offset=1226496, number=256, buf=0xb77e8708
ich_spi_read_page: offset=1226752, number=256, buf=0xb77e8808
ich_spi_read_page: offset=1227008, number=256, buf=0xb77e8908
ich_spi_read_page: offset=1227264, number=256, buf=0xb77e8a08
ich_spi_read_page: offset=1227520, number=256, buf=0xb77e8b08
ich_spi_read_page: offset=1227776, number=256, buf=0xb77e8c08
ich_spi_read_page: offset=1228032, number=256, buf=0xb77e8d08
ich_spi_read_page: offset=1228288, number=256, buf=0xb77e8e08
ich_spi_read_page: offset=1228544, number=256, buf=0xb77e8f08
ich_spi_read_page: offset=1228800, number=256, buf=0xb77e9008
ich_spi_read_page: offset=1229056, number=256, buf=0xb77e9108
ich_spi_read_page: offset=1229312, number=256, buf=0xb77e9208
ich_spi_read_page: offset=1229568, number=256, buf=0xb77e9308
ich_spi_read_page: offset=1229824, number=256, buf=0xb77e9408
ich_spi_read_page: offset=1230080, number=256, buf=0xb77e9508
ich_spi_read_page: offset=1230336, number=256, buf=0xb77e9608
ich_spi_read_page: offset=1230592, number=256, buf=0xb77e9708
ich_spi_read_page: offset=1230848, number=256, buf=0xb77e9808
ich_spi_read_page: offset=1231104, number=256, buf=0xb77e9908
ich_spi_read_page: offset=1231360, number=256, buf=0xb77e9a08
ich_spi_read_page: offset=1231616, number=256, buf=0xb77e9b08
ich_spi_read_page: offset=1231872, number=256, buf=0xb77e9c08
ich_spi_read_page: offset=1232128, number=256, buf=0xb77e9d08
ich_spi_read_page: offset=1232384, number=256, buf=0xb77e9e08
ich_spi_read_page: offset=1232640, number=256, buf=0xb77e9f08
ich_spi_read_page: offset=1232896, number=256, buf=0xb77ea008
ich_spi_read_page: offset=1233152, number=256, buf=0xb77ea108
ich_spi_read_page: offset=1233408, number=256, buf=0xb77ea208
ich_spi_read_page: offset=1233664, number=256, buf=0xb77ea308
ich_spi_read_page: offset=1233920, number=256, buf=0xb77ea408
ich_spi_read_page: offset=1234176, number=256, buf=0xb77ea508
ich_spi_read_page: offset=1234432, number=256, buf=0xb77ea608
ich_spi_read_page: offset=1234688, number=256, buf=0xb77ea708
ich_spi_read_page: offset=1234944, number=256, buf=0xb77ea808
ich_spi_read_page: offset=1235200, number=256, buf=0xb77ea908
ich_spi_read_page: offset=1235456, number=256, buf=0xb77eaa08
ich_spi_read_page: offset=1235712, number=256, buf=0xb77eab08
ich_spi_read_page: offset=1235968, number=256, buf=0xb77eac08
ich_spi_read_page: offset=1236224, number=256, buf=0xb77ead08
ich_spi_read_page: offset=1236480, number=256, buf=0xb77eae08
ich_spi_read_page: offset=1236736, number=256, buf=0xb77eaf08
ich_spi_read_page: offset=1236992, number=256, buf=0xb77eb008
ich_spi_read_page: offset=1237248, number=256, buf=0xb77eb108
ich_spi_read_page: offset=1237504, number=256, buf=0xb77eb208
ich_spi_read_page: offset=1237760, number=256, buf=0xb77eb308
ich_spi_read_page: offset=1238016, number=256, buf=0xb77eb408
ich_spi_read_page: offset=1238272, number=256, buf=0xb77eb508
ich_spi_read_page: offset=1238528, number=256, buf=0xb77eb608
ich_spi_read_page: offset=1238784, number=256, buf=0xb77eb708
ich_spi_read_page: offset=1239040, number=256, buf=0xb77eb808
ich_spi_read_page: offset=1239296, number=256, buf=0xb77eb908
ich_spi_read_page: offset=1239552, number=256, buf=0xb77eba08
ich_spi_read_page: offset=1239808, number=256, buf=0xb77ebb08
ich_spi_read_page: offset=1240064, number=256, buf=0xb77ebc08
ich_spi_read_page: offset=1240320, number=256, buf=0xb77ebd08
ich_spi_read_page: offset=1240576, number=256, buf=0xb77ebe08
ich_spi_read_page: offset=1240832, number=256, buf=0xb77ebf08
ich_spi_read_page: offset=1241088, number=256, buf=0xb77ec008
ich_spi_read_page: offset=1241344, number=256, buf=0xb77ec108
ich_spi_read_page: offset=1241600, number=256, buf=0xb77ec208
ich_spi_read_page: offset=1241856, number=256, buf=0xb77ec308
ich_spi_read_page: offset=1242112, number=256, buf=0xb77ec408
ich_spi_read_page: offset=1242368, number=256, buf=0xb77ec508
ich_spi_read_page: offset=1242624, number=256, buf=0xb77ec608
ich_spi_read_page: offset=1242880, number=256, buf=0xb77ec708
ich_spi_read_page: offset=1243136, number=256, buf=0xb77ec808
ich_spi_read_page: offset=1243392, number=256, buf=0xb77ec908
ich_spi_read_page: offset=1243648, number=256, buf=0xb77eca08
ich_spi_read_page: offset=1243904, number=256, buf=0xb77ecb08
ich_spi_read_page: offset=1244160, number=256, buf=0xb77ecc08
ich_spi_read_page: offset=1244416, number=256, buf=0xb77ecd08
ich_spi_read_page: offset=1244672, number=256, buf=0xb77ece08
ich_spi_read_page: offset=1244928, number=256, buf=0xb77ecf08
ich_spi_read_page: offset=1245184, number=256, buf=0xb77ed008
ich_spi_read_page: offset=1245440, number=256, buf=0xb77ed108
ich_spi_read_page: offset=1245696, number=256, buf=0xb77ed208
ich_spi_read_page: offset=1245952, number=256, buf=0xb77ed308
ich_spi_read_page: offset=1246208, number=256, buf=0xb77ed408
ich_spi_read_page: offset=1246464, number=256, buf=0xb77ed508
ich_spi_read_page: offset=1246720, number=256, buf=0xb77ed608
ich_spi_read_page: offset=1246976, number=256, buf=0xb77ed708
ich_spi_read_page: offset=1247232, number=256, buf=0xb77ed808
ich_spi_read_page: offset=1247488, number=256, buf=0xb77ed908
ich_spi_read_page: offset=1247744, number=256, buf=0xb77eda08
ich_spi_read_page: offset=1248000, number=256, buf=0xb77edb08
ich_spi_read_page: offset=1248256, number=256, buf=0xb77edc08
ich_spi_read_page: offset=1248512, number=256, buf=0xb77edd08
ich_spi_read_page: offset=1248768, number=256, buf=0xb77ede08
ich_spi_read_page: offset=1249024, number=256, buf=0xb77edf08
ich_spi_read_page: offset=1249280, number=256, buf=0xb77ee008
ich_spi_read_page: offset=1249536, number=256, buf=0xb77ee108
ich_spi_read_page: offset=1249792, number=256, buf=0xb77ee208
ich_spi_read_page: offset=1250048, number=256, buf=0xb77ee308
ich_spi_read_page: offset=1250304, number=256, buf=0xb77ee408
ich_spi_read_page: offset=1250560, number=256, buf=0xb77ee508
ich_spi_read_page: offset=1250816, number=256, buf=0xb77ee608
ich_spi_read_page: offset=1251072, number=256, buf=0xb77ee708
ich_spi_read_page: offset=1251328, number=256, buf=0xb77ee808
ich_spi_read_page: offset=1251584, number=256, buf=0xb77ee908
ich_spi_read_page: offset=1251840, number=256, buf=0xb77eea08
ich_spi_read_page: offset=1252096, number=256, buf=0xb77eeb08
ich_spi_read_page: offset=1252352, number=256, buf=0xb77eec08
ich_spi_read_page: offset=1252608, number=256, buf=0xb77eed08
ich_spi_read_page: offset=1252864, number=256, buf=0xb77eee08
ich_spi_read_page: offset=1253120, number=256, buf=0xb77eef08
ich_spi_read_page: offset=1253376, number=256, buf=0xb77ef008
ich_spi_read_page: offset=1253632, number=256, buf=0xb77ef108
ich_spi_read_page: offset=1253888, number=256, buf=0xb77ef208
ich_spi_read_page: offset=1254144, number=256, buf=0xb77ef308
ich_spi_read_page: offset=1254400, number=256, buf=0xb77ef408
ich_spi_read_page: offset=1254656, number=256, buf=0xb77ef508
ich_spi_read_page: offset=1254912, number=256, buf=0xb77ef608
ich_spi_read_page: offset=1255168, number=256, buf=0xb77ef708
ich_spi_read_page: offset=1255424, number=256, buf=0xb77ef808
ich_spi_read_page: offset=1255680, number=256, buf=0xb77ef908
ich_spi_read_page: offset=1255936, number=256, buf=0xb77efa08
ich_spi_read_page: offset=1256192, number=256, buf=0xb77efb08
ich_spi_read_page: offset=1256448, number=256, buf=0xb77efc08
ich_spi_read_page: offset=1256704, number=256, buf=0xb77efd08
ich_spi_read_page: offset=1256960, number=256, buf=0xb77efe08
ich_spi_read_page: offset=1257216, number=256, buf=0xb77eff08
ich_spi_read_page: offset=1257472, number=256, buf=0xb77f0008
ich_spi_read_page: offset=1257728, number=256, buf=0xb77f0108
ich_spi_read_page: offset=1257984, number=256, buf=0xb77f0208
ich_spi_read_page: offset=1258240, number=256, buf=0xb77f0308
ich_spi_read_page: offset=1258496, number=256, buf=0xb77f0408
ich_spi_read_page: offset=1258752, number=256, buf=0xb77f0508
ich_spi_read_page: offset=1259008, number=256, buf=0xb77f0608
ich_spi_read_page: offset=1259264, number=256, buf=0xb77f0708
ich_spi_read_page: offset=1259520, number=256, buf=0xb77f0808
ich_spi_read_page: offset=1259776, number=256, buf=0xb77f0908
ich_spi_read_page: offset=1260032, number=256, buf=0xb77f0a08
ich_spi_read_page: offset=1260288, number=256, buf=0xb77f0b08
ich_spi_read_page: offset=1260544, number=256, buf=0xb77f0c08
ich_spi_read_page: offset=1260800, number=256, buf=0xb77f0d08
ich_spi_read_page: offset=1261056, number=256, buf=0xb77f0e08
ich_spi_read_page: offset=1261312, number=256, buf=0xb77f0f08
ich_spi_read_page: offset=1261568, number=256, buf=0xb77f1008
ich_spi_read_page: offset=1261824, number=256, buf=0xb77f1108
ich_spi_read_page: offset=1262080, number=256, buf=0xb77f1208
ich_spi_read_page: offset=1262336, number=256, buf=0xb77f1308
ich_spi_read_page: offset=1262592, number=256, buf=0xb77f1408
ich_spi_read_page: offset=1262848, number=256, buf=0xb77f1508
ich_spi_read_page: offset=1263104, number=256, buf=0xb77f1608
ich_spi_read_page: offset=1263360, number=256, buf=0xb77f1708
ich_spi_read_page: offset=1263616, number=256, buf=0xb77f1808
ich_spi_read_page: offset=1263872, number=256, buf=0xb77f1908
ich_spi_read_page: offset=1264128, number=256, buf=0xb77f1a08
ich_spi_read_page: offset=1264384, number=256, buf=0xb77f1b08
ich_spi_read_page: offset=1264640, number=256, buf=0xb77f1c08
ich_spi_read_page: offset=1264896, number=256, buf=0xb77f1d08
ich_spi_read_page: offset=1265152, number=256, buf=0xb77f1e08
ich_spi_read_page: offset=1265408, number=256, buf=0xb77f1f08
ich_spi_read_page: offset=1265664, number=256, buf=0xb77f2008
ich_spi_read_page: offset=1265920, number=256, buf=0xb77f2108
ich_spi_read_page: offset=1266176, number=256, buf=0xb77f2208
ich_spi_read_page: offset=1266432, number=256, buf=0xb77f2308
ich_spi_read_page: offset=1266688, number=256, buf=0xb77f2408
ich_spi_read_page: offset=1266944, number=256, buf=0xb77f2508
ich_spi_read_page: offset=1267200, number=256, buf=0xb77f2608
ich_spi_read_page: offset=1267456, number=256, buf=0xb77f2708
ich_spi_read_page: offset=1267712, number=256, buf=0xb77f2808
ich_spi_read_page: offset=1267968, number=256, buf=0xb77f2908
ich_spi_read_page: offset=1268224, number=256, buf=0xb77f2a08
ich_spi_read_page: offset=1268480, number=256, buf=0xb77f2b08
ich_spi_read_page: offset=1268736, number=256, buf=0xb77f2c08
ich_spi_read_page: offset=1268992, number=256, buf=0xb77f2d08
ich_spi_read_page: offset=1269248, number=256, buf=0xb77f2e08
ich_spi_read_page: offset=1269504, number=256, buf=0xb77f2f08
ich_spi_read_page: offset=1269760, number=256, buf=0xb77f3008
ich_spi_read_page: offset=1270016, number=256, buf=0xb77f3108
ich_spi_read_page: offset=1270272, number=256, buf=0xb77f3208
ich_spi_read_page: offset=1270528, number=256, buf=0xb77f3308
ich_spi_read_page: offset=1270784, number=256, buf=0xb77f3408
ich_spi_read_page: offset=1271040, number=256, buf=0xb77f3508
ich_spi_read_page: offset=1271296, number=256, buf=0xb77f3608
ich_spi_read_page: offset=1271552, number=256, buf=0xb77f3708
ich_spi_read_page: offset=1271808, number=256, buf=0xb77f3808
ich_spi_read_page: offset=1272064, number=256, buf=0xb77f3908
ich_spi_read_page: offset=1272320, number=256, buf=0xb77f3a08
ich_spi_read_page: offset=1272576, number=256, buf=0xb77f3b08
ich_spi_read_page: offset=1272832, number=256, buf=0xb77f3c08
ich_spi_read_page: offset=1273088, number=256, buf=0xb77f3d08
ich_spi_read_page: offset=1273344, number=256, buf=0xb77f3e08
ich_spi_read_page: offset=1273600, number=256, buf=0xb77f3f08
ich_spi_read_page: offset=1273856, number=256, buf=0xb77f4008
ich_spi_read_page: offset=1274112, number=256, buf=0xb77f4108
ich_spi_read_page: offset=1274368, number=256, buf=0xb77f4208
ich_spi_read_page: offset=1274624, number=256, buf=0xb77f4308
ich_spi_read_page: offset=1274880, number=256, buf=0xb77f4408
ich_spi_read_page: offset=1275136, number=256, buf=0xb77f4508
ich_spi_read_page: offset=1275392, number=256, buf=0xb77f4608
ich_spi_read_page: offset=1275648, number=256, buf=0xb77f4708
ich_spi_read_page: offset=1275904, number=256, buf=0xb77f4808
ich_spi_read_page: offset=1276160, number=256, buf=0xb77f4908
ich_spi_read_page: offset=1276416, number=256, buf=0xb77f4a08
ich_spi_read_page: offset=1276672, number=256, buf=0xb77f4b08
ich_spi_read_page: offset=1276928, number=256, buf=0xb77f4c08
ich_spi_read_page: offset=1277184, number=256, buf=0xb77f4d08
ich_spi_read_page: offset=1277440, number=256, buf=0xb77f4e08
ich_spi_read_page: offset=1277696, number=256, buf=0xb77f4f08
ich_spi_read_page: offset=1277952, number=256, buf=0xb77f5008
ich_spi_read_page: offset=1278208, number=256, buf=0xb77f5108
ich_spi_read_page: offset=1278464, number=256, buf=0xb77f5208
ich_spi_read_page: offset=1278720, number=256, buf=0xb77f5308
ich_spi_read_page: offset=1278976, number=256, buf=0xb77f5408
ich_spi_read_page: offset=1279232, number=256, buf=0xb77f5508
ich_spi_read_page: offset=1279488, number=256, buf=0xb77f5608
ich_spi_read_page: offset=1279744, number=256, buf=0xb77f5708
ich_spi_read_page: offset=1280000, number=256, buf=0xb77f5808
ich_spi_read_page: offset=1280256, number=256, buf=0xb77f5908
ich_spi_read_page: offset=1280512, number=256, buf=0xb77f5a08
ich_spi_read_page: offset=1280768, number=256, buf=0xb77f5b08
ich_spi_read_page: offset=1281024, number=256, buf=0xb77f5c08
ich_spi_read_page: offset=1281280, number=256, buf=0xb77f5d08
ich_spi_read_page: offset=1281536, number=256, buf=0xb77f5e08
ich_spi_read_page: offset=1281792, number=256, buf=0xb77f5f08
ich_spi_read_page: offset=1282048, number=256, buf=0xb77f6008
ich_spi_read_page: offset=1282304, number=256, buf=0xb77f6108
ich_spi_read_page: offset=1282560, number=256, buf=0xb77f6208
ich_spi_read_page: offset=1282816, number=256, buf=0xb77f6308
ich_spi_read_page: offset=1283072, number=256, buf=0xb77f6408
ich_spi_read_page: offset=1283328, number=256, buf=0xb77f6508
ich_spi_read_page: offset=1283584, number=256, buf=0xb77f6608
ich_spi_read_page: offset=1283840, number=256, buf=0xb77f6708
ich_spi_read_page: offset=1284096, number=256, buf=0xb77f6808
ich_spi_read_page: offset=1284352, number=256, buf=0xb77f6908
ich_spi_read_page: offset=1284608, number=256, buf=0xb77f6a08
ich_spi_read_page: offset=1284864, number=256, buf=0xb77f6b08
ich_spi_read_page: offset=1285120, number=256, buf=0xb77f6c08
ich_spi_read_page: offset=1285376, number=256, buf=0xb77f6d08
ich_spi_read_page: offset=1285632, number=256, buf=0xb77f6e08
ich_spi_read_page: offset=1285888, number=256, buf=0xb77f6f08
ich_spi_read_page: offset=1286144, number=256, buf=0xb77f7008
ich_spi_read_page: offset=1286400, number=256, buf=0xb77f7108
ich_spi_read_page: offset=1286656, number=256, buf=0xb77f7208
ich_spi_read_page: offset=1286912, number=256, buf=0xb77f7308
ich_spi_read_page: offset=1287168, number=256, buf=0xb77f7408
ich_spi_read_page: offset=1287424, number=256, buf=0xb77f7508
ich_spi_read_page: offset=1287680, number=256, buf=0xb77f7608
ich_spi_read_page: offset=1287936, number=256, buf=0xb77f7708
ich_spi_read_page: offset=1288192, number=256, buf=0xb77f7808
ich_spi_read_page: offset=1288448, number=256, buf=0xb77f7908
ich_spi_read_page: offset=1288704, number=256, buf=0xb77f7a08
ich_spi_read_page: offset=1288960, number=256, buf=0xb77f7b08
ich_spi_read_page: offset=1289216, number=256, buf=0xb77f7c08
ich_spi_read_page: offset=1289472, number=256, buf=0xb77f7d08
ich_spi_read_page: offset=1289728, number=256, buf=0xb77f7e08
ich_spi_read_page: offset=1289984, number=256, buf=0xb77f7f08
ich_spi_read_page: offset=1290240, number=256, buf=0xb77f8008
ich_spi_read_page: offset=1290496, number=256, buf=0xb77f8108
ich_spi_read_page: offset=1290752, number=256, buf=0xb77f8208
ich_spi_read_page: offset=1291008, number=256, buf=0xb77f8308
ich_spi_read_page: offset=1291264, number=256, buf=0xb77f8408
ich_spi_read_page: offset=1291520, number=256, buf=0xb77f8508
ich_spi_read_page: offset=1291776, number=256, buf=0xb77f8608
ich_spi_read_page: offset=1292032, number=256, buf=0xb77f8708
ich_spi_read_page: offset=1292288, number=256, buf=0xb77f8808
ich_spi_read_page: offset=1292544, number=256, buf=0xb77f8908
ich_spi_read_page: offset=1292800, number=256, buf=0xb77f8a08
ich_spi_read_page: offset=1293056, number=256, buf=0xb77f8b08
ich_spi_read_page: offset=1293312, number=256, buf=0xb77f8c08
ich_spi_read_page: offset=1293568, number=256, buf=0xb77f8d08
ich_spi_read_page: offset=1293824, number=256, buf=0xb77f8e08
ich_spi_read_page: offset=1294080, number=256, buf=0xb77f8f08
ich_spi_read_page: offset=1294336, number=256, buf=0xb77f9008
ich_spi_read_page: offset=1294592, number=256, buf=0xb77f9108
ich_spi_read_page: offset=1294848, number=256, buf=0xb77f9208
ich_spi_read_page: offset=1295104, number=256, buf=0xb77f9308
ich_spi_read_page: offset=1295360, number=256, buf=0xb77f9408
ich_spi_read_page: offset=1295616, number=256, buf=0xb77f9508
ich_spi_read_page: offset=1295872, number=256, buf=0xb77f9608
ich_spi_read_page: offset=1296128, number=256, buf=0xb77f9708
ich_spi_read_page: offset=1296384, number=256, buf=0xb77f9808
ich_spi_read_page: offset=1296640, number=256, buf=0xb77f9908
ich_spi_read_page: offset=1296896, number=256, buf=0xb77f9a08
ich_spi_read_page: offset=1297152, number=256, buf=0xb77f9b08
ich_spi_read_page: offset=1297408, number=256, buf=0xb77f9c08
ich_spi_read_page: offset=1297664, number=256, buf=0xb77f9d08
ich_spi_read_page: offset=1297920, number=256, buf=0xb77f9e08
ich_spi_read_page: offset=1298176, number=256, buf=0xb77f9f08
ich_spi_read_page: offset=1298432, number=256, buf=0xb77fa008
ich_spi_read_page: offset=1298688, number=256, buf=0xb77fa108
ich_spi_read_page: offset=1298944, number=256, buf=0xb77fa208
ich_spi_read_page: offset=1299200, number=256, buf=0xb77fa308
ich_spi_read_page: offset=1299456, number=256, buf=0xb77fa408
ich_spi_read_page: offset=1299712, number=256, buf=0xb77fa508
ich_spi_read_page: offset=1299968, number=256, buf=0xb77fa608
ich_spi_read_page: offset=1300224, number=256, buf=0xb77fa708
ich_spi_read_page: offset=1300480, number=256, buf=0xb77fa808
ich_spi_read_page: offset=1300736, number=256, buf=0xb77fa908
ich_spi_read_page: offset=1300992, number=256, buf=0xb77faa08
ich_spi_read_page: offset=1301248, number=256, buf=0xb77fab08
ich_spi_read_page: offset=1301504, number=256, buf=0xb77fac08
ich_spi_read_page: offset=1301760, number=256, buf=0xb77fad08
ich_spi_read_page: offset=1302016, number=256, buf=0xb77fae08
ich_spi_read_page: offset=1302272, number=256, buf=0xb77faf08
ich_spi_read_page: offset=1302528, number=256, buf=0xb77fb008
ich_spi_read_page: offset=1302784, number=256, buf=0xb77fb108
ich_spi_read_page: offset=1303040, number=256, buf=0xb77fb208
ich_spi_read_page: offset=1303296, number=256, buf=0xb77fb308
ich_spi_read_page: offset=1303552, number=256, buf=0xb77fb408
ich_spi_read_page: offset=1303808, number=256, buf=0xb77fb508
ich_spi_read_page: offset=1304064, number=256, buf=0xb77fb608
ich_spi_read_page: offset=1304320, number=256, buf=0xb77fb708
ich_spi_read_page: offset=1304576, number=256, buf=0xb77fb808
ich_spi_read_page: offset=1304832, number=256, buf=0xb77fb908
ich_spi_read_page: offset=1305088, number=256, buf=0xb77fba08
ich_spi_read_page: offset=1305344, number=256, buf=0xb77fbb08
ich_spi_read_page: offset=1305600, number=256, buf=0xb77fbc08
ich_spi_read_page: offset=1305856, number=256, buf=0xb77fbd08
ich_spi_read_page: offset=1306112, number=256, buf=0xb77fbe08
ich_spi_read_page: offset=1306368, number=256, buf=0xb77fbf08
ich_spi_read_page: offset=1306624, number=256, buf=0xb77fc008
ich_spi_read_page: offset=1306880, number=256, buf=0xb77fc108
ich_spi_read_page: offset=1307136, number=256, buf=0xb77fc208
ich_spi_read_page: offset=1307392, number=256, buf=0xb77fc308
ich_spi_read_page: offset=1307648, number=256, buf=0xb77fc408
ich_spi_read_page: offset=1307904, number=256, buf=0xb77fc508
ich_spi_read_page: offset=1308160, number=256, buf=0xb77fc608
ich_spi_read_page: offset=1308416, number=256, buf=0xb77fc708
ich_spi_read_page: offset=1308672, number=256, buf=0xb77fc808
ich_spi_read_page: offset=1308928, number=256, buf=0xb77fc908
ich_spi_read_page: offset=1309184, number=256, buf=0xb77fca08
ich_spi_read_page: offset=1309440, number=256, buf=0xb77fcb08
ich_spi_read_page: offset=1309696, number=256, buf=0xb77fcc08
ich_spi_read_page: offset=1309952, number=256, buf=0xb77fcd08
ich_spi_read_page: offset=1310208, number=256, buf=0xb77fce08
ich_spi_read_page: offset=1310464, number=256, buf=0xb77fcf08
ich_spi_read_page: offset=1310720, number=256, buf=0xb77fd008
ich_spi_read_page: offset=1310976, number=256, buf=0xb77fd108
ich_spi_read_page: offset=1311232, number=256, buf=0xb77fd208
ich_spi_read_page: offset=1311488, number=256, buf=0xb77fd308
ich_spi_read_page: offset=1311744, number=256, buf=0xb77fd408
ich_spi_read_page: offset=1312000, number=256, buf=0xb77fd508
ich_spi_read_page: offset=1312256, number=256, buf=0xb77fd608
ich_spi_read_page: offset=1312512, number=256, buf=0xb77fd708
ich_spi_read_page: offset=1312768, number=256, buf=0xb77fd808
ich_spi_read_page: offset=1313024, number=256, buf=0xb77fd908
ich_spi_read_page: offset=1313280, number=256, buf=0xb77fda08
ich_spi_read_page: offset=1313536, number=256, buf=0xb77fdb08
ich_spi_read_page: offset=1313792, number=256, buf=0xb77fdc08
ich_spi_read_page: offset=1314048, number=256, buf=0xb77fdd08
ich_spi_read_page: offset=1314304, number=256, buf=0xb77fde08
ich_spi_read_page: offset=1314560, number=256, buf=0xb77fdf08
ich_spi_read_page: offset=1314816, number=256, buf=0xb77fe008
ich_spi_read_page: offset=1315072, number=256, buf=0xb77fe108
ich_spi_read_page: offset=1315328, number=256, buf=0xb77fe208
ich_spi_read_page: offset=1315584, number=256, buf=0xb77fe308
ich_spi_read_page: offset=1315840, number=256, buf=0xb77fe408
ich_spi_read_page: offset=1316096, number=256, buf=0xb77fe508
ich_spi_read_page: offset=1316352, number=256, buf=0xb77fe608
ich_spi_read_page: offset=1316608, number=256, buf=0xb77fe708
ich_spi_read_page: offset=1316864, number=256, buf=0xb77fe808
ich_spi_read_page: offset=1317120, number=256, buf=0xb77fe908
ich_spi_read_page: offset=1317376, number=256, buf=0xb77fea08
ich_spi_read_page: offset=1317632, number=256, buf=0xb77feb08
ich_spi_read_page: offset=1317888, number=256, buf=0xb77fec08
ich_spi_read_page: offset=1318144, number=256, buf=0xb77fed08
ich_spi_read_page: offset=1318400, number=256, buf=0xb77fee08
ich_spi_read_page: offset=1318656, number=256, buf=0xb77fef08
ich_spi_read_page: offset=1318912, number=256, buf=0xb77ff008
ich_spi_read_page: offset=1319168, number=256, buf=0xb77ff108
ich_spi_read_page: offset=1319424, number=256, buf=0xb77ff208
ich_spi_read_page: offset=1319680, number=256, buf=0xb77ff308
ich_spi_read_page: offset=1319936, number=256, buf=0xb77ff408
ich_spi_read_page: offset=1320192, number=256, buf=0xb77ff508
ich_spi_read_page: offset=1320448, number=256, buf=0xb77ff608
ich_spi_read_page: offset=1320704, number=256, buf=0xb77ff708
ich_spi_read_page: offset=1320960, number=256, buf=0xb77ff808
ich_spi_read_page: offset=1321216, number=256, buf=0xb77ff908
ich_spi_read_page: offset=1321472, number=256, buf=0xb77ffa08
ich_spi_read_page: offset=1321728, number=256, buf=0xb77ffb08
ich_spi_read_page: offset=1321984, number=256, buf=0xb77ffc08
ich_spi_read_page: offset=1322240, number=256, buf=0xb77ffd08
ich_spi_read_page: offset=1322496, number=256, buf=0xb77ffe08
ich_spi_read_page: offset=1322752, number=256, buf=0xb77fff08
ich_spi_read_page: offset=1323008, number=256, buf=0xb7800008
ich_spi_read_page: offset=1323264, number=256, buf=0xb7800108
ich_spi_read_page: offset=1323520, number=256, buf=0xb7800208
ich_spi_read_page: offset=1323776, number=256, buf=0xb7800308
ich_spi_read_page: offset=1324032, number=256, buf=0xb7800408
ich_spi_read_page: offset=1324288, number=256, buf=0xb7800508
ich_spi_read_page: offset=1324544, number=256, buf=0xb7800608
ich_spi_read_page: offset=1324800, number=256, buf=0xb7800708
ich_spi_read_page: offset=1325056, number=256, buf=0xb7800808
ich_spi_read_page: offset=1325312, number=256, buf=0xb7800908
ich_spi_read_page: offset=1325568, number=256, buf=0xb7800a08
ich_spi_read_page: offset=1325824, number=256, buf=0xb7800b08
ich_spi_read_page: offset=1326080, number=256, buf=0xb7800c08
ich_spi_read_page: offset=1326336, number=256, buf=0xb7800d08
ich_spi_read_page: offset=1326592, number=256, buf=0xb7800e08
ich_spi_read_page: offset=1326848, number=256, buf=0xb7800f08
ich_spi_read_page: offset=1327104, number=256, buf=0xb7801008
ich_spi_read_page: offset=1327360, number=256, buf=0xb7801108
ich_spi_read_page: offset=1327616, number=256, buf=0xb7801208
ich_spi_read_page: offset=1327872, number=256, buf=0xb7801308
ich_spi_read_page: offset=1328128, number=256, buf=0xb7801408
ich_spi_read_page: offset=1328384, number=256, buf=0xb7801508
ich_spi_read_page: offset=1328640, number=256, buf=0xb7801608
ich_spi_read_page: offset=1328896, number=256, buf=0xb7801708
ich_spi_read_page: offset=1329152, number=256, buf=0xb7801808
ich_spi_read_page: offset=1329408, number=256, buf=0xb7801908
ich_spi_read_page: offset=1329664, number=256, buf=0xb7801a08
ich_spi_read_page: offset=1329920, number=256, buf=0xb7801b08
ich_spi_read_page: offset=1330176, number=256, buf=0xb7801c08
ich_spi_read_page: offset=1330432, number=256, buf=0xb7801d08
ich_spi_read_page: offset=1330688, number=256, buf=0xb7801e08
ich_spi_read_page: offset=1330944, number=256, buf=0xb7801f08
ich_spi_read_page: offset=1331200, number=256, buf=0xb7802008
ich_spi_read_page: offset=1331456, number=256, buf=0xb7802108
ich_spi_read_page: offset=1331712, number=256, buf=0xb7802208
ich_spi_read_page: offset=1331968, number=256, buf=0xb7802308
ich_spi_read_page: offset=1332224, number=256, buf=0xb7802408
ich_spi_read_page: offset=1332480, number=256, buf=0xb7802508
ich_spi_read_page: offset=1332736, number=256, buf=0xb7802608
ich_spi_read_page: offset=1332992, number=256, buf=0xb7802708
ich_spi_read_page: offset=1333248, number=256, buf=0xb7802808
ich_spi_read_page: offset=1333504, number=256, buf=0xb7802908
ich_spi_read_page: offset=1333760, number=256, buf=0xb7802a08
ich_spi_read_page: offset=1334016, number=256, buf=0xb7802b08
ich_spi_read_page: offset=1334272, number=256, buf=0xb7802c08
ich_spi_read_page: offset=1334528, number=256, buf=0xb7802d08
ich_spi_read_page: offset=1334784, number=256, buf=0xb7802e08
ich_spi_read_page: offset=1335040, number=256, buf=0xb7802f08
ich_spi_read_page: offset=1335296, number=256, buf=0xb7803008
ich_spi_read_page: offset=1335552, number=256, buf=0xb7803108
ich_spi_read_page: offset=1335808, number=256, buf=0xb7803208
ich_spi_read_page: offset=1336064, number=256, buf=0xb7803308
ich_spi_read_page: offset=1336320, number=256, buf=0xb7803408
ich_spi_read_page: offset=1336576, number=256, buf=0xb7803508
ich_spi_read_page: offset=1336832, number=256, buf=0xb7803608
ich_spi_read_page: offset=1337088, number=256, buf=0xb7803708
ich_spi_read_page: offset=1337344, number=256, buf=0xb7803808
ich_spi_read_page: offset=1337600, number=256, buf=0xb7803908
ich_spi_read_page: offset=1337856, number=256, buf=0xb7803a08
ich_spi_read_page: offset=1338112, number=256, buf=0xb7803b08
ich_spi_read_page: offset=1338368, number=256, buf=0xb7803c08
ich_spi_read_page: offset=1338624, number=256, buf=0xb7803d08
ich_spi_read_page: offset=1338880, number=256, buf=0xb7803e08
ich_spi_read_page: offset=1339136, number=256, buf=0xb7803f08
ich_spi_read_page: offset=1339392, number=256, buf=0xb7804008
ich_spi_read_page: offset=1339648, number=256, buf=0xb7804108
ich_spi_read_page: offset=1339904, number=256, buf=0xb7804208
ich_spi_read_page: offset=1340160, number=256, buf=0xb7804308
ich_spi_read_page: offset=1340416, number=256, buf=0xb7804408
ich_spi_read_page: offset=1340672, number=256, buf=0xb7804508
ich_spi_read_page: offset=1340928, number=256, buf=0xb7804608
ich_spi_read_page: offset=1341184, number=256, buf=0xb7804708
ich_spi_read_page: offset=1341440, number=256, buf=0xb7804808
ich_spi_read_page: offset=1341696, number=256, buf=0xb7804908
ich_spi_read_page: offset=1341952, number=256, buf=0xb7804a08
ich_spi_read_page: offset=1342208, number=256, buf=0xb7804b08
ich_spi_read_page: offset=1342464, number=256, buf=0xb7804c08
ich_spi_read_page: offset=1342720, number=256, buf=0xb7804d08
ich_spi_read_page: offset=1342976, number=256, buf=0xb7804e08
ich_spi_read_page: offset=1343232, number=256, buf=0xb7804f08
ich_spi_read_page: offset=1343488, number=256, buf=0xb7805008
ich_spi_read_page: offset=1343744, number=256, buf=0xb7805108
ich_spi_read_page: offset=1344000, number=256, buf=0xb7805208
ich_spi_read_page: offset=1344256, number=256, buf=0xb7805308
ich_spi_read_page: offset=1344512, number=256, buf=0xb7805408
ich_spi_read_page: offset=1344768, number=256, buf=0xb7805508
ich_spi_read_page: offset=1345024, number=256, buf=0xb7805608
ich_spi_read_page: offset=1345280, number=256, buf=0xb7805708
ich_spi_read_page: offset=1345536, number=256, buf=0xb7805808
ich_spi_read_page: offset=1345792, number=256, buf=0xb7805908
ich_spi_read_page: offset=1346048, number=256, buf=0xb7805a08
ich_spi_read_page: offset=1346304, number=256, buf=0xb7805b08
ich_spi_read_page: offset=1346560, number=256, buf=0xb7805c08
ich_spi_read_page: offset=1346816, number=256, buf=0xb7805d08
ich_spi_read_page: offset=1347072, number=256, buf=0xb7805e08
ich_spi_read_page: offset=1347328, number=256, buf=0xb7805f08
ich_spi_read_page: offset=1347584, number=256, buf=0xb7806008
ich_spi_read_page: offset=1347840, number=256, buf=0xb7806108
ich_spi_read_page: offset=1348096, number=256, buf=0xb7806208
ich_spi_read_page: offset=1348352, number=256, buf=0xb7806308
ich_spi_read_page: offset=1348608, number=256, buf=0xb7806408
ich_spi_read_page: offset=1348864, number=256, buf=0xb7806508
ich_spi_read_page: offset=1349120, number=256, buf=0xb7806608
ich_spi_read_page: offset=1349376, number=256, buf=0xb7806708
ich_spi_read_page: offset=1349632, number=256, buf=0xb7806808
ich_spi_read_page: offset=1349888, number=256, buf=0xb7806908
ich_spi_read_page: offset=1350144, number=256, buf=0xb7806a08
ich_spi_read_page: offset=1350400, number=256, buf=0xb7806b08
ich_spi_read_page: offset=1350656, number=256, buf=0xb7806c08
ich_spi_read_page: offset=1350912, number=256, buf=0xb7806d08
ich_spi_read_page: offset=1351168, number=256, buf=0xb7806e08
ich_spi_read_page: offset=1351424, number=256, buf=0xb7806f08
ich_spi_read_page: offset=1351680, number=256, buf=0xb7807008
ich_spi_read_page: offset=1351936, number=256, buf=0xb7807108
ich_spi_read_page: offset=1352192, number=256, buf=0xb7807208
ich_spi_read_page: offset=1352448, number=256, buf=0xb7807308
ich_spi_read_page: offset=1352704, number=256, buf=0xb7807408
ich_spi_read_page: offset=1352960, number=256, buf=0xb7807508
ich_spi_read_page: offset=1353216, number=256, buf=0xb7807608
ich_spi_read_page: offset=1353472, number=256, buf=0xb7807708
ich_spi_read_page: offset=1353728, number=256, buf=0xb7807808
ich_spi_read_page: offset=1353984, number=256, buf=0xb7807908
ich_spi_read_page: offset=1354240, number=256, buf=0xb7807a08
ich_spi_read_page: offset=1354496, number=256, buf=0xb7807b08
ich_spi_read_page: offset=1354752, number=256, buf=0xb7807c08
ich_spi_read_page: offset=1355008, number=256, buf=0xb7807d08
ich_spi_read_page: offset=1355264, number=256, buf=0xb7807e08
ich_spi_read_page: offset=1355520, number=256, buf=0xb7807f08
ich_spi_read_page: offset=1355776, number=256, buf=0xb7808008
ich_spi_read_page: offset=1356032, number=256, buf=0xb7808108
ich_spi_read_page: offset=1356288, number=256, buf=0xb7808208
ich_spi_read_page: offset=1356544, number=256, buf=0xb7808308
ich_spi_read_page: offset=1356800, number=256, buf=0xb7808408
ich_spi_read_page: offset=1357056, number=256, buf=0xb7808508
ich_spi_read_page: offset=1357312, number=256, buf=0xb7808608
ich_spi_read_page: offset=1357568, number=256, buf=0xb7808708
ich_spi_read_page: offset=1357824, number=256, buf=0xb7808808
ich_spi_read_page: offset=1358080, number=256, buf=0xb7808908
ich_spi_read_page: offset=1358336, number=256, buf=0xb7808a08
ich_spi_read_page: offset=1358592, number=256, buf=0xb7808b08
ich_spi_read_page: offset=1358848, number=256, buf=0xb7808c08
ich_spi_read_page: offset=1359104, number=256, buf=0xb7808d08
ich_spi_read_page: offset=1359360, number=256, buf=0xb7808e08
ich_spi_read_page: offset=1359616, number=256, buf=0xb7808f08
ich_spi_read_page: offset=1359872, number=256, buf=0xb7809008
ich_spi_read_page: offset=1360128, number=256, buf=0xb7809108
ich_spi_read_page: offset=1360384, number=256, buf=0xb7809208
ich_spi_read_page: offset=1360640, number=256, buf=0xb7809308
ich_spi_read_page: offset=1360896, number=256, buf=0xb7809408
ich_spi_read_page: offset=1361152, number=256, buf=0xb7809508
ich_spi_read_page: offset=1361408, number=256, buf=0xb7809608
ich_spi_read_page: offset=1361664, number=256, buf=0xb7809708
ich_spi_read_page: offset=1361920, number=256, buf=0xb7809808
ich_spi_read_page: offset=1362176, number=256, buf=0xb7809908
ich_spi_read_page: offset=1362432, number=256, buf=0xb7809a08
ich_spi_read_page: offset=1362688, number=256, buf=0xb7809b08
ich_spi_read_page: offset=1362944, number=256, buf=0xb7809c08
ich_spi_read_page: offset=1363200, number=256, buf=0xb7809d08
ich_spi_read_page: offset=1363456, number=256, buf=0xb7809e08
ich_spi_read_page: offset=1363712, number=256, buf=0xb7809f08
ich_spi_read_page: offset=1363968, number=256, buf=0xb780a008
ich_spi_read_page: offset=1364224, number=256, buf=0xb780a108
ich_spi_read_page: offset=1364480, number=256, buf=0xb780a208
ich_spi_read_page: offset=1364736, number=256, buf=0xb780a308
ich_spi_read_page: offset=1364992, number=256, buf=0xb780a408
ich_spi_read_page: offset=1365248, number=256, buf=0xb780a508
ich_spi_read_page: offset=1365504, number=256, buf=0xb780a608
ich_spi_read_page: offset=1365760, number=256, buf=0xb780a708
ich_spi_read_page: offset=1366016, number=256, buf=0xb780a808
ich_spi_read_page: offset=1366272, number=256, buf=0xb780a908
ich_spi_read_page: offset=1366528, number=256, buf=0xb780aa08
ich_spi_read_page: offset=1366784, number=256, buf=0xb780ab08
ich_spi_read_page: offset=1367040, number=256, buf=0xb780ac08
ich_spi_read_page: offset=1367296, number=256, buf=0xb780ad08
ich_spi_read_page: offset=1367552, number=256, buf=0xb780ae08
ich_spi_read_page: offset=1367808, number=256, buf=0xb780af08
ich_spi_read_page: offset=1368064, number=256, buf=0xb780b008
ich_spi_read_page: offset=1368320, number=256, buf=0xb780b108
ich_spi_read_page: offset=1368576, number=256, buf=0xb780b208
ich_spi_read_page: offset=1368832, number=256, buf=0xb780b308
ich_spi_read_page: offset=1369088, number=256, buf=0xb780b408
ich_spi_read_page: offset=1369344, number=256, buf=0xb780b508
ich_spi_read_page: offset=1369600, number=256, buf=0xb780b608
ich_spi_read_page: offset=1369856, number=256, buf=0xb780b708
ich_spi_read_page: offset=1370112, number=256, buf=0xb780b808
ich_spi_read_page: offset=1370368, number=256, buf=0xb780b908
ich_spi_read_page: offset=1370624, number=256, buf=0xb780ba08
ich_spi_read_page: offset=1370880, number=256, buf=0xb780bb08
ich_spi_read_page: offset=1371136, number=256, buf=0xb780bc08
ich_spi_read_page: offset=1371392, number=256, buf=0xb780bd08
ich_spi_read_page: offset=1371648, number=256, buf=0xb780be08
ich_spi_read_page: offset=1371904, number=256, buf=0xb780bf08
ich_spi_read_page: offset=1372160, number=256, buf=0xb780c008
ich_spi_read_page: offset=1372416, number=256, buf=0xb780c108
ich_spi_read_page: offset=1372672, number=256, buf=0xb780c208
ich_spi_read_page: offset=1372928, number=256, buf=0xb780c308
ich_spi_read_page: offset=1373184, number=256, buf=0xb780c408
ich_spi_read_page: offset=1373440, number=256, buf=0xb780c508
ich_spi_read_page: offset=1373696, number=256, buf=0xb780c608
ich_spi_read_page: offset=1373952, number=256, buf=0xb780c708
ich_spi_read_page: offset=1374208, number=256, buf=0xb780c808
ich_spi_read_page: offset=1374464, number=256, buf=0xb780c908
ich_spi_read_page: offset=1374720, number=256, buf=0xb780ca08
ich_spi_read_page: offset=1374976, number=256, buf=0xb780cb08
ich_spi_read_page: offset=1375232, number=256, buf=0xb780cc08
ich_spi_read_page: offset=1375488, number=256, buf=0xb780cd08
ich_spi_read_page: offset=1375744, number=256, buf=0xb780ce08
ich_spi_read_page: offset=1376000, number=256, buf=0xb780cf08
ich_spi_read_page: offset=1376256, number=256, buf=0xb780d008
ich_spi_read_page: offset=1376512, number=256, buf=0xb780d108
ich_spi_read_page: offset=1376768, number=256, buf=0xb780d208
ich_spi_read_page: offset=1377024, number=256, buf=0xb780d308
ich_spi_read_page: offset=1377280, number=256, buf=0xb780d408
ich_spi_read_page: offset=1377536, number=256, buf=0xb780d508
ich_spi_read_page: offset=1377792, number=256, buf=0xb780d608
ich_spi_read_page: offset=1378048, number=256, buf=0xb780d708
ich_spi_read_page: offset=1378304, number=256, buf=0xb780d808
ich_spi_read_page: offset=1378560, number=256, buf=0xb780d908
ich_spi_read_page: offset=1378816, number=256, buf=0xb780da08
ich_spi_read_page: offset=1379072, number=256, buf=0xb780db08
ich_spi_read_page: offset=1379328, number=256, buf=0xb780dc08
ich_spi_read_page: offset=1379584, number=256, buf=0xb780dd08
ich_spi_read_page: offset=1379840, number=256, buf=0xb780de08
ich_spi_read_page: offset=1380096, number=256, buf=0xb780df08
ich_spi_read_page: offset=1380352, number=256, buf=0xb780e008
ich_spi_read_page: offset=1380608, number=256, buf=0xb780e108
ich_spi_read_page: offset=1380864, number=256, buf=0xb780e208
ich_spi_read_page: offset=1381120, number=256, buf=0xb780e308
ich_spi_read_page: offset=1381376, number=256, buf=0xb780e408
ich_spi_read_page: offset=1381632, number=256, buf=0xb780e508
ich_spi_read_page: offset=1381888, number=256, buf=0xb780e608
ich_spi_read_page: offset=1382144, number=256, buf=0xb780e708
ich_spi_read_page: offset=1382400, number=256, buf=0xb780e808
ich_spi_read_page: offset=1382656, number=256, buf=0xb780e908
ich_spi_read_page: offset=1382912, number=256, buf=0xb780ea08
ich_spi_read_page: offset=1383168, number=256, buf=0xb780eb08
ich_spi_read_page: offset=1383424, number=256, buf=0xb780ec08
ich_spi_read_page: offset=1383680, number=256, buf=0xb780ed08
ich_spi_read_page: offset=1383936, number=256, buf=0xb780ee08
ich_spi_read_page: offset=1384192, number=256, buf=0xb780ef08
ich_spi_read_page: offset=1384448, number=256, buf=0xb780f008
ich_spi_read_page: offset=1384704, number=256, buf=0xb780f108
ich_spi_read_page: offset=1384960, number=256, buf=0xb780f208
ich_spi_read_page: offset=1385216, number=256, buf=0xb780f308
ich_spi_read_page: offset=1385472, number=256, buf=0xb780f408
ich_spi_read_page: offset=1385728, number=256, buf=0xb780f508
ich_spi_read_page: offset=1385984, number=256, buf=0xb780f608
ich_spi_read_page: offset=1386240, number=256, buf=0xb780f708
ich_spi_read_page: offset=1386496, number=256, buf=0xb780f808
ich_spi_read_page: offset=1386752, number=256, buf=0xb780f908
ich_spi_read_page: offset=1387008, number=256, buf=0xb780fa08
ich_spi_read_page: offset=1387264, number=256, buf=0xb780fb08
ich_spi_read_page: offset=1387520, number=256, buf=0xb780fc08
ich_spi_read_page: offset=1387776, number=256, buf=0xb780fd08
ich_spi_read_page: offset=1388032, number=256, buf=0xb780fe08
ich_spi_read_page: offset=1388288, number=256, buf=0xb780ff08
ich_spi_read_page: offset=1388544, number=256, buf=0xb7810008
ich_spi_read_page: offset=1388800, number=256, buf=0xb7810108
ich_spi_read_page: offset=1389056, number=256, buf=0xb7810208
ich_spi_read_page: offset=1389312, number=256, buf=0xb7810308
ich_spi_read_page: offset=1389568, number=256, buf=0xb7810408
ich_spi_read_page: offset=1389824, number=256, buf=0xb7810508
ich_spi_read_page: offset=1390080, number=256, buf=0xb7810608
ich_spi_read_page: offset=1390336, number=256, buf=0xb7810708
ich_spi_read_page: offset=1390592, number=256, buf=0xb7810808
ich_spi_read_page: offset=1390848, number=256, buf=0xb7810908
ich_spi_read_page: offset=1391104, number=256, buf=0xb7810a08
ich_spi_read_page: offset=1391360, number=256, buf=0xb7810b08
ich_spi_read_page: offset=1391616, number=256, buf=0xb7810c08
ich_spi_read_page: offset=1391872, number=256, buf=0xb7810d08
ich_spi_read_page: offset=1392128, number=256, buf=0xb7810e08
ich_spi_read_page: offset=1392384, number=256, buf=0xb7810f08
ich_spi_read_page: offset=1392640, number=256, buf=0xb7811008
ich_spi_read_page: offset=1392896, number=256, buf=0xb7811108
ich_spi_read_page: offset=1393152, number=256, buf=0xb7811208
ich_spi_read_page: offset=1393408, number=256, buf=0xb7811308
ich_spi_read_page: offset=1393664, number=256, buf=0xb7811408
ich_spi_read_page: offset=1393920, number=256, buf=0xb7811508
ich_spi_read_page: offset=1394176, number=256, buf=0xb7811608
ich_spi_read_page: offset=1394432, number=256, buf=0xb7811708
ich_spi_read_page: offset=1394688, number=256, buf=0xb7811808
ich_spi_read_page: offset=1394944, number=256, buf=0xb7811908
ich_spi_read_page: offset=1395200, number=256, buf=0xb7811a08
ich_spi_read_page: offset=1395456, number=256, buf=0xb7811b08
ich_spi_read_page: offset=1395712, number=256, buf=0xb7811c08
ich_spi_read_page: offset=1395968, number=256, buf=0xb7811d08
ich_spi_read_page: offset=1396224, number=256, buf=0xb7811e08
ich_spi_read_page: offset=1396480, number=256, buf=0xb7811f08
ich_spi_read_page: offset=1396736, number=256, buf=0xb7812008
ich_spi_read_page: offset=1396992, number=256, buf=0xb7812108
ich_spi_read_page: offset=1397248, number=256, buf=0xb7812208
ich_spi_read_page: offset=1397504, number=256, buf=0xb7812308
ich_spi_read_page: offset=1397760, number=256, buf=0xb7812408
ich_spi_read_page: offset=1398016, number=256, buf=0xb7812508
ich_spi_read_page: offset=1398272, number=256, buf=0xb7812608
ich_spi_read_page: offset=1398528, number=256, buf=0xb7812708
ich_spi_read_page: offset=1398784, number=256, buf=0xb7812808
ich_spi_read_page: offset=1399040, number=256, buf=0xb7812908
ich_spi_read_page: offset=1399296, number=256, buf=0xb7812a08
ich_spi_read_page: offset=1399552, number=256, buf=0xb7812b08
ich_spi_read_page: offset=1399808, number=256, buf=0xb7812c08
ich_spi_read_page: offset=1400064, number=256, buf=0xb7812d08
ich_spi_read_page: offset=1400320, number=256, buf=0xb7812e08
ich_spi_read_page: offset=1400576, number=256, buf=0xb7812f08
ich_spi_read_page: offset=1400832, number=256, buf=0xb7813008
ich_spi_read_page: offset=1401088, number=256, buf=0xb7813108
ich_spi_read_page: offset=1401344, number=256, buf=0xb7813208
ich_spi_read_page: offset=1401600, number=256, buf=0xb7813308
ich_spi_read_page: offset=1401856, number=256, buf=0xb7813408
ich_spi_read_page: offset=1402112, number=256, buf=0xb7813508
ich_spi_read_page: offset=1402368, number=256, buf=0xb7813608
ich_spi_read_page: offset=1402624, number=256, buf=0xb7813708
ich_spi_read_page: offset=1402880, number=256, buf=0xb7813808
ich_spi_read_page: offset=1403136, number=256, buf=0xb7813908
ich_spi_read_page: offset=1403392, number=256, buf=0xb7813a08
ich_spi_read_page: offset=1403648, number=256, buf=0xb7813b08
ich_spi_read_page: offset=1403904, number=256, buf=0xb7813c08
ich_spi_read_page: offset=1404160, number=256, buf=0xb7813d08
ich_spi_read_page: offset=1404416, number=256, buf=0xb7813e08
ich_spi_read_page: offset=1404672, number=256, buf=0xb7813f08
ich_spi_read_page: offset=1404928, number=256, buf=0xb7814008
ich_spi_read_page: offset=1405184, number=256, buf=0xb7814108
ich_spi_read_page: offset=1405440, number=256, buf=0xb7814208
ich_spi_read_page: offset=1405696, number=256, buf=0xb7814308
ich_spi_read_page: offset=1405952, number=256, buf=0xb7814408
ich_spi_read_page: offset=1406208, number=256, buf=0xb7814508
ich_spi_read_page: offset=1406464, number=256, buf=0xb7814608
ich_spi_read_page: offset=1406720, number=256, buf=0xb7814708
ich_spi_read_page: offset=1406976, number=256, buf=0xb7814808
ich_spi_read_page: offset=1407232, number=256, buf=0xb7814908
ich_spi_read_page: offset=1407488, number=256, buf=0xb7814a08
ich_spi_read_page: offset=1407744, number=256, buf=0xb7814b08
ich_spi_read_page: offset=1408000, number=256, buf=0xb7814c08
ich_spi_read_page: offset=1408256, number=256, buf=0xb7814d08
ich_spi_read_page: offset=1408512, number=256, buf=0xb7814e08
ich_spi_read_page: offset=1408768, number=256, buf=0xb7814f08
ich_spi_read_page: offset=1409024, number=256, buf=0xb7815008
ich_spi_read_page: offset=1409280, number=256, buf=0xb7815108
ich_spi_read_page: offset=1409536, number=256, buf=0xb7815208
ich_spi_read_page: offset=1409792, number=256, buf=0xb7815308
ich_spi_read_page: offset=1410048, number=256, buf=0xb7815408
ich_spi_read_page: offset=1410304, number=256, buf=0xb7815508
ich_spi_read_page: offset=1410560, number=256, buf=0xb7815608
ich_spi_read_page: offset=1410816, number=256, buf=0xb7815708
ich_spi_read_page: offset=1411072, number=256, buf=0xb7815808
ich_spi_read_page: offset=1411328, number=256, buf=0xb7815908
ich_spi_read_page: offset=1411584, number=256, buf=0xb7815a08
ich_spi_read_page: offset=1411840, number=256, buf=0xb7815b08
ich_spi_read_page: offset=1412096, number=256, buf=0xb7815c08
ich_spi_read_page: offset=1412352, number=256, buf=0xb7815d08
ich_spi_read_page: offset=1412608, number=256, buf=0xb7815e08
ich_spi_read_page: offset=1412864, number=256, buf=0xb7815f08
ich_spi_read_page: offset=1413120, number=256, buf=0xb7816008
ich_spi_read_page: offset=1413376, number=256, buf=0xb7816108
ich_spi_read_page: offset=1413632, number=256, buf=0xb7816208
ich_spi_read_page: offset=1413888, number=256, buf=0xb7816308
ich_spi_read_page: offset=1414144, number=256, buf=0xb7816408
ich_spi_read_page: offset=1414400, number=256, buf=0xb7816508
ich_spi_read_page: offset=1414656, number=256, buf=0xb7816608
ich_spi_read_page: offset=1414912, number=256, buf=0xb7816708
ich_spi_read_page: offset=1415168, number=256, buf=0xb7816808
ich_spi_read_page: offset=1415424, number=256, buf=0xb7816908
ich_spi_read_page: offset=1415680, number=256, buf=0xb7816a08
ich_spi_read_page: offset=1415936, number=256, buf=0xb7816b08
ich_spi_read_page: offset=1416192, number=256, buf=0xb7816c08
ich_spi_read_page: offset=1416448, number=256, buf=0xb7816d08
ich_spi_read_page: offset=1416704, number=256, buf=0xb7816e08
ich_spi_read_page: offset=1416960, number=256, buf=0xb7816f08
ich_spi_read_page: offset=1417216, number=256, buf=0xb7817008
ich_spi_read_page: offset=1417472, number=256, buf=0xb7817108
ich_spi_read_page: offset=1417728, number=256, buf=0xb7817208
ich_spi_read_page: offset=1417984, number=256, buf=0xb7817308
ich_spi_read_page: offset=1418240, number=256, buf=0xb7817408
ich_spi_read_page: offset=1418496, number=256, buf=0xb7817508
ich_spi_read_page: offset=1418752, number=256, buf=0xb7817608
ich_spi_read_page: offset=1419008, number=256, buf=0xb7817708
ich_spi_read_page: offset=1419264, number=256, buf=0xb7817808
ich_spi_read_page: offset=1419520, number=256, buf=0xb7817908
ich_spi_read_page: offset=1419776, number=256, buf=0xb7817a08
ich_spi_read_page: offset=1420032, number=256, buf=0xb7817b08
ich_spi_read_page: offset=1420288, number=256, buf=0xb7817c08
ich_spi_read_page: offset=1420544, number=256, buf=0xb7817d08
ich_spi_read_page: offset=1420800, number=256, buf=0xb7817e08
ich_spi_read_page: offset=1421056, number=256, buf=0xb7817f08
ich_spi_read_page: offset=1421312, number=256, buf=0xb7818008
ich_spi_read_page: offset=1421568, number=256, buf=0xb7818108
ich_spi_read_page: offset=1421824, number=256, buf=0xb7818208
ich_spi_read_page: offset=1422080, number=256, buf=0xb7818308
ich_spi_read_page: offset=1422336, number=256, buf=0xb7818408
ich_spi_read_page: offset=1422592, number=256, buf=0xb7818508
ich_spi_read_page: offset=1422848, number=256, buf=0xb7818608
ich_spi_read_page: offset=1423104, number=256, buf=0xb7818708
ich_spi_read_page: offset=1423360, number=256, buf=0xb7818808
ich_spi_read_page: offset=1423616, number=256, buf=0xb7818908
ich_spi_read_page: offset=1423872, number=256, buf=0xb7818a08
ich_spi_read_page: offset=1424128, number=256, buf=0xb7818b08
ich_spi_read_page: offset=1424384, number=256, buf=0xb7818c08
ich_spi_read_page: offset=1424640, number=256, buf=0xb7818d08
ich_spi_read_page: offset=1424896, number=256, buf=0xb7818e08
ich_spi_read_page: offset=1425152, number=256, buf=0xb7818f08
ich_spi_read_page: offset=1425408, number=256, buf=0xb7819008
ich_spi_read_page: offset=1425664, number=256, buf=0xb7819108
ich_spi_read_page: offset=1425920, number=256, buf=0xb7819208
ich_spi_read_page: offset=1426176, number=256, buf=0xb7819308
ich_spi_read_page: offset=1426432, number=256, buf=0xb7819408
ich_spi_read_page: offset=1426688, number=256, buf=0xb7819508
ich_spi_read_page: offset=1426944, number=256, buf=0xb7819608
ich_spi_read_page: offset=1427200, number=256, buf=0xb7819708
ich_spi_read_page: offset=1427456, number=256, buf=0xb7819808
ich_spi_read_page: offset=1427712, number=256, buf=0xb7819908
ich_spi_read_page: offset=1427968, number=256, buf=0xb7819a08
ich_spi_read_page: offset=1428224, number=256, buf=0xb7819b08
ich_spi_read_page: offset=1428480, number=256, buf=0xb7819c08
ich_spi_read_page: offset=1428736, number=256, buf=0xb7819d08
ich_spi_read_page: offset=1428992, number=256, buf=0xb7819e08
ich_spi_read_page: offset=1429248, number=256, buf=0xb7819f08
ich_spi_read_page: offset=1429504, number=256, buf=0xb781a008
ich_spi_read_page: offset=1429760, number=256, buf=0xb781a108
ich_spi_read_page: offset=1430016, number=256, buf=0xb781a208
ich_spi_read_page: offset=1430272, number=256, buf=0xb781a308
ich_spi_read_page: offset=1430528, number=256, buf=0xb781a408
ich_spi_read_page: offset=1430784, number=256, buf=0xb781a508
ich_spi_read_page: offset=1431040, number=256, buf=0xb781a608
ich_spi_read_page: offset=1431296, number=256, buf=0xb781a708
ich_spi_read_page: offset=1431552, number=256, buf=0xb781a808
ich_spi_read_page: offset=1431808, number=256, buf=0xb781a908
ich_spi_read_page: offset=1432064, number=256, buf=0xb781aa08
ich_spi_read_page: offset=1432320, number=256, buf=0xb781ab08
ich_spi_read_page: offset=1432576, number=256, buf=0xb781ac08
ich_spi_read_page: offset=1432832, number=256, buf=0xb781ad08
ich_spi_read_page: offset=1433088, number=256, buf=0xb781ae08
ich_spi_read_page: offset=1433344, number=256, buf=0xb781af08
ich_spi_read_page: offset=1433600, number=256, buf=0xb781b008
ich_spi_read_page: offset=1433856, number=256, buf=0xb781b108
ich_spi_read_page: offset=1434112, number=256, buf=0xb781b208
ich_spi_read_page: offset=1434368, number=256, buf=0xb781b308
ich_spi_read_page: offset=1434624, number=256, buf=0xb781b408
ich_spi_read_page: offset=1434880, number=256, buf=0xb781b508
ich_spi_read_page: offset=1435136, number=256, buf=0xb781b608
ich_spi_read_page: offset=1435392, number=256, buf=0xb781b708
ich_spi_read_page: offset=1435648, number=256, buf=0xb781b808
ich_spi_read_page: offset=1435904, number=256, buf=0xb781b908
ich_spi_read_page: offset=1436160, number=256, buf=0xb781ba08
ich_spi_read_page: offset=1436416, number=256, buf=0xb781bb08
ich_spi_read_page: offset=1436672, number=256, buf=0xb781bc08
ich_spi_read_page: offset=1436928, number=256, buf=0xb781bd08
ich_spi_read_page: offset=1437184, number=256, buf=0xb781be08
ich_spi_read_page: offset=1437440, number=256, buf=0xb781bf08
ich_spi_read_page: offset=1437696, number=256, buf=0xb781c008
ich_spi_read_page: offset=1437952, number=256, buf=0xb781c108
ich_spi_read_page: offset=1438208, number=256, buf=0xb781c208
ich_spi_read_page: offset=1438464, number=256, buf=0xb781c308
ich_spi_read_page: offset=1438720, number=256, buf=0xb781c408
ich_spi_read_page: offset=1438976, number=256, buf=0xb781c508
ich_spi_read_page: offset=1439232, number=256, buf=0xb781c608
ich_spi_read_page: offset=1439488, number=256, buf=0xb781c708
ich_spi_read_page: offset=1439744, number=256, buf=0xb781c808
ich_spi_read_page: offset=1440000, number=256, buf=0xb781c908
ich_spi_read_page: offset=1440256, number=256, buf=0xb781ca08
ich_spi_read_page: offset=1440512, number=256, buf=0xb781cb08
ich_spi_read_page: offset=1440768, number=256, buf=0xb781cc08
ich_spi_read_page: offset=1441024, number=256, buf=0xb781cd08
ich_spi_read_page: offset=1441280, number=256, buf=0xb781ce08
ich_spi_read_page: offset=1441536, number=256, buf=0xb781cf08
ich_spi_read_page: offset=1441792, number=256, buf=0xb781d008
ich_spi_read_page: offset=1442048, number=256, buf=0xb781d108
ich_spi_read_page: offset=1442304, number=256, buf=0xb781d208
ich_spi_read_page: offset=1442560, number=256, buf=0xb781d308
ich_spi_read_page: offset=1442816, number=256, buf=0xb781d408
ich_spi_read_page: offset=1443072, number=256, buf=0xb781d508
ich_spi_read_page: offset=1443328, number=256, buf=0xb781d608
ich_spi_read_page: offset=1443584, number=256, buf=0xb781d708
ich_spi_read_page: offset=1443840, number=256, buf=0xb781d808
ich_spi_read_page: offset=1444096, number=256, buf=0xb781d908
ich_spi_read_page: offset=1444352, number=256, buf=0xb781da08
ich_spi_read_page: offset=1444608, number=256, buf=0xb781db08
ich_spi_read_page: offset=1444864, number=256, buf=0xb781dc08
ich_spi_read_page: offset=1445120, number=256, buf=0xb781dd08
ich_spi_read_page: offset=1445376, number=256, buf=0xb781de08
ich_spi_read_page: offset=1445632, number=256, buf=0xb781df08
ich_spi_read_page: offset=1445888, number=256, buf=0xb781e008
ich_spi_read_page: offset=1446144, number=256, buf=0xb781e108
ich_spi_read_page: offset=1446400, number=256, buf=0xb781e208
ich_spi_read_page: offset=1446656, number=256, buf=0xb781e308
ich_spi_read_page: offset=1446912, number=256, buf=0xb781e408
ich_spi_read_page: offset=1447168, number=256, buf=0xb781e508
ich_spi_read_page: offset=1447424, number=256, buf=0xb781e608
ich_spi_read_page: offset=1447680, number=256, buf=0xb781e708
ich_spi_read_page: offset=1447936, number=256, buf=0xb781e808
ich_spi_read_page: offset=1448192, number=256, buf=0xb781e908
ich_spi_read_page: offset=1448448, number=256, buf=0xb781ea08
ich_spi_read_page: offset=1448704, number=256, buf=0xb781eb08
ich_spi_read_page: offset=1448960, number=256, buf=0xb781ec08
ich_spi_read_page: offset=1449216, number=256, buf=0xb781ed08
ich_spi_read_page: offset=1449472, number=256, buf=0xb781ee08
ich_spi_read_page: offset=1449728, number=256, buf=0xb781ef08
ich_spi_read_page: offset=1449984, number=256, buf=0xb781f008
ich_spi_read_page: offset=1450240, number=256, buf=0xb781f108
ich_spi_read_page: offset=1450496, number=256, buf=0xb781f208
ich_spi_read_page: offset=1450752, number=256, buf=0xb781f308
ich_spi_read_page: offset=1451008, number=256, buf=0xb781f408
ich_spi_read_page: offset=1451264, number=256, buf=0xb781f508
ich_spi_read_page: offset=1451520, number=256, buf=0xb781f608
ich_spi_read_page: offset=1451776, number=256, buf=0xb781f708
ich_spi_read_page: offset=1452032, number=256, buf=0xb781f808
ich_spi_read_page: offset=1452288, number=256, buf=0xb781f908
ich_spi_read_page: offset=1452544, number=256, buf=0xb781fa08
ich_spi_read_page: offset=1452800, number=256, buf=0xb781fb08
ich_spi_read_page: offset=1453056, number=256, buf=0xb781fc08
ich_spi_read_page: offset=1453312, number=256, buf=0xb781fd08
ich_spi_read_page: offset=1453568, number=256, buf=0xb781fe08
ich_spi_read_page: offset=1453824, number=256, buf=0xb781ff08
ich_spi_read_page: offset=1454080, number=256, buf=0xb7820008
ich_spi_read_page: offset=1454336, number=256, buf=0xb7820108
ich_spi_read_page: offset=1454592, number=256, buf=0xb7820208
ich_spi_read_page: offset=1454848, number=256, buf=0xb7820308
ich_spi_read_page: offset=1455104, number=256, buf=0xb7820408
ich_spi_read_page: offset=1455360, number=256, buf=0xb7820508
ich_spi_read_page: offset=1455616, number=256, buf=0xb7820608
ich_spi_read_page: offset=1455872, number=256, buf=0xb7820708
ich_spi_read_page: offset=1456128, number=256, buf=0xb7820808
ich_spi_read_page: offset=1456384, number=256, buf=0xb7820908
ich_spi_read_page: offset=1456640, number=256, buf=0xb7820a08
ich_spi_read_page: offset=1456896, number=256, buf=0xb7820b08
ich_spi_read_page: offset=1457152, number=256, buf=0xb7820c08
ich_spi_read_page: offset=1457408, number=256, buf=0xb7820d08
ich_spi_read_page: offset=1457664, number=256, buf=0xb7820e08
ich_spi_read_page: offset=1457920, number=256, buf=0xb7820f08
ich_spi_read_page: offset=1458176, number=256, buf=0xb7821008
ich_spi_read_page: offset=1458432, number=256, buf=0xb7821108
ich_spi_read_page: offset=1458688, number=256, buf=0xb7821208
ich_spi_read_page: offset=1458944, number=256, buf=0xb7821308
ich_spi_read_page: offset=1459200, number=256, buf=0xb7821408
ich_spi_read_page: offset=1459456, number=256, buf=0xb7821508
ich_spi_read_page: offset=1459712, number=256, buf=0xb7821608
ich_spi_read_page: offset=1459968, number=256, buf=0xb7821708
ich_spi_read_page: offset=1460224, number=256, buf=0xb7821808
ich_spi_read_page: offset=1460480, number=256, buf=0xb7821908
ich_spi_read_page: offset=1460736, number=256, buf=0xb7821a08
ich_spi_read_page: offset=1460992, number=256, buf=0xb7821b08
ich_spi_read_page: offset=1461248, number=256, buf=0xb7821c08
ich_spi_read_page: offset=1461504, number=256, buf=0xb7821d08
ich_spi_read_page: offset=1461760, number=256, buf=0xb7821e08
ich_spi_read_page: offset=1462016, number=256, buf=0xb7821f08
ich_spi_read_page: offset=1462272, number=256, buf=0xb7822008
ich_spi_read_page: offset=1462528, number=256, buf=0xb7822108
ich_spi_read_page: offset=1462784, number=256, buf=0xb7822208
ich_spi_read_page: offset=1463040, number=256, buf=0xb7822308
ich_spi_read_page: offset=1463296, number=256, buf=0xb7822408
ich_spi_read_page: offset=1463552, number=256, buf=0xb7822508
ich_spi_read_page: offset=1463808, number=256, buf=0xb7822608
ich_spi_read_page: offset=1464064, number=256, buf=0xb7822708
ich_spi_read_page: offset=1464320, number=256, buf=0xb7822808
ich_spi_read_page: offset=1464576, number=256, buf=0xb7822908
ich_spi_read_page: offset=1464832, number=256, buf=0xb7822a08
ich_spi_read_page: offset=1465088, number=256, buf=0xb7822b08
ich_spi_read_page: offset=1465344, number=256, buf=0xb7822c08
ich_spi_read_page: offset=1465600, number=256, buf=0xb7822d08
ich_spi_read_page: offset=1465856, number=256, buf=0xb7822e08
ich_spi_read_page: offset=1466112, number=256, buf=0xb7822f08
ich_spi_read_page: offset=1466368, number=256, buf=0xb7823008
ich_spi_read_page: offset=1466624, number=256, buf=0xb7823108
ich_spi_read_page: offset=1466880, number=256, buf=0xb7823208
ich_spi_read_page: offset=1467136, number=256, buf=0xb7823308
ich_spi_read_page: offset=1467392, number=256, buf=0xb7823408
ich_spi_read_page: offset=1467648, number=256, buf=0xb7823508
ich_spi_read_page: offset=1467904, number=256, buf=0xb7823608
ich_spi_read_page: offset=1468160, number=256, buf=0xb7823708
ich_spi_read_page: offset=1468416, number=256, buf=0xb7823808
ich_spi_read_page: offset=1468672, number=256, buf=0xb7823908
ich_spi_read_page: offset=1468928, number=256, buf=0xb7823a08
ich_spi_read_page: offset=1469184, number=256, buf=0xb7823b08
ich_spi_read_page: offset=1469440, number=256, buf=0xb7823c08
ich_spi_read_page: offset=1469696, number=256, buf=0xb7823d08
ich_spi_read_page: offset=1469952, number=256, buf=0xb7823e08
ich_spi_read_page: offset=1470208, number=256, buf=0xb7823f08
ich_spi_read_page: offset=1470464, number=256, buf=0xb7824008
ich_spi_read_page: offset=1470720, number=256, buf=0xb7824108
ich_spi_read_page: offset=1470976, number=256, buf=0xb7824208
ich_spi_read_page: offset=1471232, number=256, buf=0xb7824308
ich_spi_read_page: offset=1471488, number=256, buf=0xb7824408
ich_spi_read_page: offset=1471744, number=256, buf=0xb7824508
ich_spi_read_page: offset=1472000, number=256, buf=0xb7824608
ich_spi_read_page: offset=1472256, number=256, buf=0xb7824708
ich_spi_read_page: offset=1472512, number=256, buf=0xb7824808
ich_spi_read_page: offset=1472768, number=256, buf=0xb7824908
ich_spi_read_page: offset=1473024, number=256, buf=0xb7824a08
ich_spi_read_page: offset=1473280, number=256, buf=0xb7824b08
ich_spi_read_page: offset=1473536, number=256, buf=0xb7824c08
ich_spi_read_page: offset=1473792, number=256, buf=0xb7824d08
ich_spi_read_page: offset=1474048, number=256, buf=0xb7824e08
ich_spi_read_page: offset=1474304, number=256, buf=0xb7824f08
ich_spi_read_page: offset=1474560, number=256, buf=0xb7825008
ich_spi_read_page: offset=1474816, number=256, buf=0xb7825108
ich_spi_read_page: offset=1475072, number=256, buf=0xb7825208
ich_spi_read_page: offset=1475328, number=256, buf=0xb7825308
ich_spi_read_page: offset=1475584, number=256, buf=0xb7825408
ich_spi_read_page: offset=1475840, number=256, buf=0xb7825508
ich_spi_read_page: offset=1476096, number=256, buf=0xb7825608
ich_spi_read_page: offset=1476352, number=256, buf=0xb7825708
ich_spi_read_page: offset=1476608, number=256, buf=0xb7825808
ich_spi_read_page: offset=1476864, number=256, buf=0xb7825908
ich_spi_read_page: offset=1477120, number=256, buf=0xb7825a08
ich_spi_read_page: offset=1477376, number=256, buf=0xb7825b08
ich_spi_read_page: offset=1477632, number=256, buf=0xb7825c08
ich_spi_read_page: offset=1477888, number=256, buf=0xb7825d08
ich_spi_read_page: offset=1478144, number=256, buf=0xb7825e08
ich_spi_read_page: offset=1478400, number=256, buf=0xb7825f08
ich_spi_read_page: offset=1478656, number=256, buf=0xb7826008
ich_spi_read_page: offset=1478912, number=256, buf=0xb7826108
ich_spi_read_page: offset=1479168, number=256, buf=0xb7826208
ich_spi_read_page: offset=1479424, number=256, buf=0xb7826308
ich_spi_read_page: offset=1479680, number=256, buf=0xb7826408
ich_spi_read_page: offset=1479936, number=256, buf=0xb7826508
ich_spi_read_page: offset=1480192, number=256, buf=0xb7826608
ich_spi_read_page: offset=1480448, number=256, buf=0xb7826708
ich_spi_read_page: offset=1480704, number=256, buf=0xb7826808
ich_spi_read_page: offset=1480960, number=256, buf=0xb7826908
ich_spi_read_page: offset=1481216, number=256, buf=0xb7826a08
ich_spi_read_page: offset=1481472, number=256, buf=0xb7826b08
ich_spi_read_page: offset=1481728, number=256, buf=0xb7826c08
ich_spi_read_page: offset=1481984, number=256, buf=0xb7826d08
ich_spi_read_page: offset=1482240, number=256, buf=0xb7826e08
ich_spi_read_page: offset=1482496, number=256, buf=0xb7826f08
ich_spi_read_page: offset=1482752, number=256, buf=0xb7827008
ich_spi_read_page: offset=1483008, number=256, buf=0xb7827108
ich_spi_read_page: offset=1483264, number=256, buf=0xb7827208
ich_spi_read_page: offset=1483520, number=256, buf=0xb7827308
ich_spi_read_page: offset=1483776, number=256, buf=0xb7827408
ich_spi_read_page: offset=1484032, number=256, buf=0xb7827508
ich_spi_read_page: offset=1484288, number=256, buf=0xb7827608
ich_spi_read_page: offset=1484544, number=256, buf=0xb7827708
ich_spi_read_page: offset=1484800, number=256, buf=0xb7827808
ich_spi_read_page: offset=1485056, number=256, buf=0xb7827908
ich_spi_read_page: offset=1485312, number=256, buf=0xb7827a08
ich_spi_read_page: offset=1485568, number=256, buf=0xb7827b08
ich_spi_read_page: offset=1485824, number=256, buf=0xb7827c08
ich_spi_read_page: offset=1486080, number=256, buf=0xb7827d08
ich_spi_read_page: offset=1486336, number=256, buf=0xb7827e08
ich_spi_read_page: offset=1486592, number=256, buf=0xb7827f08
ich_spi_read_page: offset=1486848, number=256, buf=0xb7828008
ich_spi_read_page: offset=1487104, number=256, buf=0xb7828108
ich_spi_read_page: offset=1487360, number=256, buf=0xb7828208
ich_spi_read_page: offset=1487616, number=256, buf=0xb7828308
ich_spi_read_page: offset=1487872, number=256, buf=0xb7828408
ich_spi_read_page: offset=1488128, number=256, buf=0xb7828508
ich_spi_read_page: offset=1488384, number=256, buf=0xb7828608
ich_spi_read_page: offset=1488640, number=256, buf=0xb7828708
ich_spi_read_page: offset=1488896, number=256, buf=0xb7828808
ich_spi_read_page: offset=1489152, number=256, buf=0xb7828908
ich_spi_read_page: offset=1489408, number=256, buf=0xb7828a08
ich_spi_read_page: offset=1489664, number=256, buf=0xb7828b08
ich_spi_read_page: offset=1489920, number=256, buf=0xb7828c08
ich_spi_read_page: offset=1490176, number=256, buf=0xb7828d08
ich_spi_read_page: offset=1490432, number=256, buf=0xb7828e08
ich_spi_read_page: offset=1490688, number=256, buf=0xb7828f08
ich_spi_read_page: offset=1490944, number=256, buf=0xb7829008
ich_spi_read_page: offset=1491200, number=256, buf=0xb7829108
ich_spi_read_page: offset=1491456, number=256, buf=0xb7829208
ich_spi_read_page: offset=1491712, number=256, buf=0xb7829308
ich_spi_read_page: offset=1491968, number=256, buf=0xb7829408
ich_spi_read_page: offset=1492224, number=256, buf=0xb7829508
ich_spi_read_page: offset=1492480, number=256, buf=0xb7829608
ich_spi_read_page: offset=1492736, number=256, buf=0xb7829708
ich_spi_read_page: offset=1492992, number=256, buf=0xb7829808
ich_spi_read_page: offset=1493248, number=256, buf=0xb7829908
ich_spi_read_page: offset=1493504, number=256, buf=0xb7829a08
ich_spi_read_page: offset=1493760, number=256, buf=0xb7829b08
ich_spi_read_page: offset=1494016, number=256, buf=0xb7829c08
ich_spi_read_page: offset=1494272, number=256, buf=0xb7829d08
ich_spi_read_page: offset=1494528, number=256, buf=0xb7829e08
ich_spi_read_page: offset=1494784, number=256, buf=0xb7829f08
ich_spi_read_page: offset=1495040, number=256, buf=0xb782a008
ich_spi_read_page: offset=1495296, number=256, buf=0xb782a108
ich_spi_read_page: offset=1495552, number=256, buf=0xb782a208
ich_spi_read_page: offset=1495808, number=256, buf=0xb782a308
ich_spi_read_page: offset=1496064, number=256, buf=0xb782a408
ich_spi_read_page: offset=1496320, number=256, buf=0xb782a508
ich_spi_read_page: offset=1496576, number=256, buf=0xb782a608
ich_spi_read_page: offset=1496832, number=256, buf=0xb782a708
ich_spi_read_page: offset=1497088, number=256, buf=0xb782a808
ich_spi_read_page: offset=1497344, number=256, buf=0xb782a908
ich_spi_read_page: offset=1497600, number=256, buf=0xb782aa08
ich_spi_read_page: offset=1497856, number=256, buf=0xb782ab08
ich_spi_read_page: offset=1498112, number=256, buf=0xb782ac08
ich_spi_read_page: offset=1498368, number=256, buf=0xb782ad08
ich_spi_read_page: offset=1498624, number=256, buf=0xb782ae08
ich_spi_read_page: offset=1498880, number=256, buf=0xb782af08
ich_spi_read_page: offset=1499136, number=256, buf=0xb782b008
ich_spi_read_page: offset=1499392, number=256, buf=0xb782b108
ich_spi_read_page: offset=1499648, number=256, buf=0xb782b208
ich_spi_read_page: offset=1499904, number=256, buf=0xb782b308
ich_spi_read_page: offset=1500160, number=256, buf=0xb782b408
ich_spi_read_page: offset=1500416, number=256, buf=0xb782b508
ich_spi_read_page: offset=1500672, number=256, buf=0xb782b608
ich_spi_read_page: offset=1500928, number=256, buf=0xb782b708
ich_spi_read_page: offset=1501184, number=256, buf=0xb782b808
ich_spi_read_page: offset=1501440, number=256, buf=0xb782b908
ich_spi_read_page: offset=1501696, number=256, buf=0xb782ba08
ich_spi_read_page: offset=1501952, number=256, buf=0xb782bb08
ich_spi_read_page: offset=1502208, number=256, buf=0xb782bc08
ich_spi_read_page: offset=1502464, number=256, buf=0xb782bd08
ich_spi_read_page: offset=1502720, number=256, buf=0xb782be08
ich_spi_read_page: offset=1502976, number=256, buf=0xb782bf08
ich_spi_read_page: offset=1503232, number=256, buf=0xb782c008
ich_spi_read_page: offset=1503488, number=256, buf=0xb782c108
ich_spi_read_page: offset=1503744, number=256, buf=0xb782c208
ich_spi_read_page: offset=1504000, number=256, buf=0xb782c308
ich_spi_read_page: offset=1504256, number=256, buf=0xb782c408
ich_spi_read_page: offset=1504512, number=256, buf=0xb782c508
ich_spi_read_page: offset=1504768, number=256, buf=0xb782c608
ich_spi_read_page: offset=1505024, number=256, buf=0xb782c708
ich_spi_read_page: offset=1505280, number=256, buf=0xb782c808
ich_spi_read_page: offset=1505536, number=256, buf=0xb782c908
ich_spi_read_page: offset=1505792, number=256, buf=0xb782ca08
ich_spi_read_page: offset=1506048, number=256, buf=0xb782cb08
ich_spi_read_page: offset=1506304, number=256, buf=0xb782cc08
ich_spi_read_page: offset=1506560, number=256, buf=0xb782cd08
ich_spi_read_page: offset=1506816, number=256, buf=0xb782ce08
ich_spi_read_page: offset=1507072, number=256, buf=0xb782cf08
ich_spi_read_page: offset=1507328, number=256, buf=0xb782d008
ich_spi_read_page: offset=1507584, number=256, buf=0xb782d108
ich_spi_read_page: offset=1507840, number=256, buf=0xb782d208
ich_spi_read_page: offset=1508096, number=256, buf=0xb782d308
ich_spi_read_page: offset=1508352, number=256, buf=0xb782d408
ich_spi_read_page: offset=1508608, number=256, buf=0xb782d508
ich_spi_read_page: offset=1508864, number=256, buf=0xb782d608
ich_spi_read_page: offset=1509120, number=256, buf=0xb782d708
ich_spi_read_page: offset=1509376, number=256, buf=0xb782d808
ich_spi_read_page: offset=1509632, number=256, buf=0xb782d908
ich_spi_read_page: offset=1509888, number=256, buf=0xb782da08
ich_spi_read_page: offset=1510144, number=256, buf=0xb782db08
ich_spi_read_page: offset=1510400, number=256, buf=0xb782dc08
ich_spi_read_page: offset=1510656, number=256, buf=0xb782dd08
ich_spi_read_page: offset=1510912, number=256, buf=0xb782de08
ich_spi_read_page: offset=1511168, number=256, buf=0xb782df08
ich_spi_read_page: offset=1511424, number=256, buf=0xb782e008
ich_spi_read_page: offset=1511680, number=256, buf=0xb782e108
ich_spi_read_page: offset=1511936, number=256, buf=0xb782e208
ich_spi_read_page: offset=1512192, number=256, buf=0xb782e308
ich_spi_read_page: offset=1512448, number=256, buf=0xb782e408
ich_spi_read_page: offset=1512704, number=256, buf=0xb782e508
ich_spi_read_page: offset=1512960, number=256, buf=0xb782e608
ich_spi_read_page: offset=1513216, number=256, buf=0xb782e708
ich_spi_read_page: offset=1513472, number=256, buf=0xb782e808
ich_spi_read_page: offset=1513728, number=256, buf=0xb782e908
ich_spi_read_page: offset=1513984, number=256, buf=0xb782ea08
ich_spi_read_page: offset=1514240, number=256, buf=0xb782eb08
ich_spi_read_page: offset=1514496, number=256, buf=0xb782ec08
ich_spi_read_page: offset=1514752, number=256, buf=0xb782ed08
ich_spi_read_page: offset=1515008, number=256, buf=0xb782ee08
ich_spi_read_page: offset=1515264, number=256, buf=0xb782ef08
ich_spi_read_page: offset=1515520, number=256, buf=0xb782f008
ich_spi_read_page: offset=1515776, number=256, buf=0xb782f108
ich_spi_read_page: offset=1516032, number=256, buf=0xb782f208
ich_spi_read_page: offset=1516288, number=256, buf=0xb782f308
ich_spi_read_page: offset=1516544, number=256, buf=0xb782f408
ich_spi_read_page: offset=1516800, number=256, buf=0xb782f508
ich_spi_read_page: offset=1517056, number=256, buf=0xb782f608
ich_spi_read_page: offset=1517312, number=256, buf=0xb782f708
ich_spi_read_page: offset=1517568, number=256, buf=0xb782f808
ich_spi_read_page: offset=1517824, number=256, buf=0xb782f908
ich_spi_read_page: offset=1518080, number=256, buf=0xb782fa08
ich_spi_read_page: offset=1518336, number=256, buf=0xb782fb08
ich_spi_read_page: offset=1518592, number=256, buf=0xb782fc08
ich_spi_read_page: offset=1518848, number=256, buf=0xb782fd08
ich_spi_read_page: offset=1519104, number=256, buf=0xb782fe08
ich_spi_read_page: offset=1519360, number=256, buf=0xb782ff08
ich_spi_read_page: offset=1519616, number=256, buf=0xb7830008
ich_spi_read_page: offset=1519872, number=256, buf=0xb7830108
ich_spi_read_page: offset=1520128, number=256, buf=0xb7830208
ich_spi_read_page: offset=1520384, number=256, buf=0xb7830308
ich_spi_read_page: offset=1520640, number=256, buf=0xb7830408
ich_spi_read_page: offset=1520896, number=256, buf=0xb7830508
ich_spi_read_page: offset=1521152, number=256, buf=0xb7830608
ich_spi_read_page: offset=1521408, number=256, buf=0xb7830708
ich_spi_read_page: offset=1521664, number=256, buf=0xb7830808
ich_spi_read_page: offset=1521920, number=256, buf=0xb7830908
ich_spi_read_page: offset=1522176, number=256, buf=0xb7830a08
ich_spi_read_page: offset=1522432, number=256, buf=0xb7830b08
ich_spi_read_page: offset=1522688, number=256, buf=0xb7830c08
ich_spi_read_page: offset=1522944, number=256, buf=0xb7830d08
ich_spi_read_page: offset=1523200, number=256, buf=0xb7830e08
ich_spi_read_page: offset=1523456, number=256, buf=0xb7830f08
ich_spi_read_page: offset=1523712, number=256, buf=0xb7831008
ich_spi_read_page: offset=1523968, number=256, buf=0xb7831108
ich_spi_read_page: offset=1524224, number=256, buf=0xb7831208
ich_spi_read_page: offset=1524480, number=256, buf=0xb7831308
ich_spi_read_page: offset=1524736, number=256, buf=0xb7831408
ich_spi_read_page: offset=1524992, number=256, buf=0xb7831508
ich_spi_read_page: offset=1525248, number=256, buf=0xb7831608
ich_spi_read_page: offset=1525504, number=256, buf=0xb7831708
ich_spi_read_page: offset=1525760, number=256, buf=0xb7831808
ich_spi_read_page: offset=1526016, number=256, buf=0xb7831908
ich_spi_read_page: offset=1526272, number=256, buf=0xb7831a08
ich_spi_read_page: offset=1526528, number=256, buf=0xb7831b08
ich_spi_read_page: offset=1526784, number=256, buf=0xb7831c08
ich_spi_read_page: offset=1527040, number=256, buf=0xb7831d08
ich_spi_read_page: offset=1527296, number=256, buf=0xb7831e08
ich_spi_read_page: offset=1527552, number=256, buf=0xb7831f08
ich_spi_read_page: offset=1527808, number=256, buf=0xb7832008
ich_spi_read_page: offset=1528064, number=256, buf=0xb7832108
ich_spi_read_page: offset=1528320, number=256, buf=0xb7832208
ich_spi_read_page: offset=1528576, number=256, buf=0xb7832308
ich_spi_read_page: offset=1528832, number=256, buf=0xb7832408
ich_spi_read_page: offset=1529088, number=256, buf=0xb7832508
ich_spi_read_page: offset=1529344, number=256, buf=0xb7832608
ich_spi_read_page: offset=1529600, number=256, buf=0xb7832708
ich_spi_read_page: offset=1529856, number=256, buf=0xb7832808
ich_spi_read_page: offset=1530112, number=256, buf=0xb7832908
ich_spi_read_page: offset=1530368, number=256, buf=0xb7832a08
ich_spi_read_page: offset=1530624, number=256, buf=0xb7832b08
ich_spi_read_page: offset=1530880, number=256, buf=0xb7832c08
ich_spi_read_page: offset=1531136, number=256, buf=0xb7832d08
ich_spi_read_page: offset=1531392, number=256, buf=0xb7832e08
ich_spi_read_page: offset=1531648, number=256, buf=0xb7832f08
ich_spi_read_page: offset=1531904, number=256, buf=0xb7833008
ich_spi_read_page: offset=1532160, number=256, buf=0xb7833108
ich_spi_read_page: offset=1532416, number=256, buf=0xb7833208
ich_spi_read_page: offset=1532672, number=256, buf=0xb7833308
ich_spi_read_page: offset=1532928, number=256, buf=0xb7833408
ich_spi_read_page: offset=1533184, number=256, buf=0xb7833508
ich_spi_read_page: offset=1533440, number=256, buf=0xb7833608
ich_spi_read_page: offset=1533696, number=256, buf=0xb7833708
ich_spi_read_page: offset=1533952, number=256, buf=0xb7833808
ich_spi_read_page: offset=1534208, number=256, buf=0xb7833908
ich_spi_read_page: offset=1534464, number=256, buf=0xb7833a08
ich_spi_read_page: offset=1534720, number=256, buf=0xb7833b08
ich_spi_read_page: offset=1534976, number=256, buf=0xb7833c08
ich_spi_read_page: offset=1535232, number=256, buf=0xb7833d08
ich_spi_read_page: offset=1535488, number=256, buf=0xb7833e08
ich_spi_read_page: offset=1535744, number=256, buf=0xb7833f08
ich_spi_read_page: offset=1536000, number=256, buf=0xb7834008
ich_spi_read_page: offset=1536256, number=256, buf=0xb7834108
ich_spi_read_page: offset=1536512, number=256, buf=0xb7834208
ich_spi_read_page: offset=1536768, number=256, buf=0xb7834308
ich_spi_read_page: offset=1537024, number=256, buf=0xb7834408
ich_spi_read_page: offset=1537280, number=256, buf=0xb7834508
ich_spi_read_page: offset=1537536, number=256, buf=0xb7834608
ich_spi_read_page: offset=1537792, number=256, buf=0xb7834708
ich_spi_read_page: offset=1538048, number=256, buf=0xb7834808
ich_spi_read_page: offset=1538304, number=256, buf=0xb7834908
ich_spi_read_page: offset=1538560, number=256, buf=0xb7834a08
ich_spi_read_page: offset=1538816, number=256, buf=0xb7834b08
ich_spi_read_page: offset=1539072, number=256, buf=0xb7834c08
ich_spi_read_page: offset=1539328, number=256, buf=0xb7834d08
ich_spi_read_page: offset=1539584, number=256, buf=0xb7834e08
ich_spi_read_page: offset=1539840, number=256, buf=0xb7834f08
ich_spi_read_page: offset=1540096, number=256, buf=0xb7835008
ich_spi_read_page: offset=1540352, number=256, buf=0xb7835108
ich_spi_read_page: offset=1540608, number=256, buf=0xb7835208
ich_spi_read_page: offset=1540864, number=256, buf=0xb7835308
ich_spi_read_page: offset=1541120, number=256, buf=0xb7835408
ich_spi_read_page: offset=1541376, number=256, buf=0xb7835508
ich_spi_read_page: offset=1541632, number=256, buf=0xb7835608
ich_spi_read_page: offset=1541888, number=256, buf=0xb7835708
ich_spi_read_page: offset=1542144, number=256, buf=0xb7835808
ich_spi_read_page: offset=1542400, number=256, buf=0xb7835908
ich_spi_read_page: offset=1542656, number=256, buf=0xb7835a08
ich_spi_read_page: offset=1542912, number=256, buf=0xb7835b08
ich_spi_read_page: offset=1543168, number=256, buf=0xb7835c08
ich_spi_read_page: offset=1543424, number=256, buf=0xb7835d08
ich_spi_read_page: offset=1543680, number=256, buf=0xb7835e08
ich_spi_read_page: offset=1543936, number=256, buf=0xb7835f08
ich_spi_read_page: offset=1544192, number=256, buf=0xb7836008
ich_spi_read_page: offset=1544448, number=256, buf=0xb7836108
ich_spi_read_page: offset=1544704, number=256, buf=0xb7836208
ich_spi_read_page: offset=1544960, number=256, buf=0xb7836308
ich_spi_read_page: offset=1545216, number=256, buf=0xb7836408
ich_spi_read_page: offset=1545472, number=256, buf=0xb7836508
ich_spi_read_page: offset=1545728, number=256, buf=0xb7836608
ich_spi_read_page: offset=1545984, number=256, buf=0xb7836708
ich_spi_read_page: offset=1546240, number=256, buf=0xb7836808
ich_spi_read_page: offset=1546496, number=256, buf=0xb7836908
ich_spi_read_page: offset=1546752, number=256, buf=0xb7836a08
ich_spi_read_page: offset=1547008, number=256, buf=0xb7836b08
ich_spi_read_page: offset=1547264, number=256, buf=0xb7836c08
ich_spi_read_page: offset=1547520, number=256, buf=0xb7836d08
ich_spi_read_page: offset=1547776, number=256, buf=0xb7836e08
ich_spi_read_page: offset=1548032, number=256, buf=0xb7836f08
ich_spi_read_page: offset=1548288, number=256, buf=0xb7837008
ich_spi_read_page: offset=1548544, number=256, buf=0xb7837108
ich_spi_read_page: offset=1548800, number=256, buf=0xb7837208
ich_spi_read_page: offset=1549056, number=256, buf=0xb7837308
ich_spi_read_page: offset=1549312, number=256, buf=0xb7837408
ich_spi_read_page: offset=1549568, number=256, buf=0xb7837508
ich_spi_read_page: offset=1549824, number=256, buf=0xb7837608
ich_spi_read_page: offset=1550080, number=256, buf=0xb7837708
ich_spi_read_page: offset=1550336, number=256, buf=0xb7837808
ich_spi_read_page: offset=1550592, number=256, buf=0xb7837908
ich_spi_read_page: offset=1550848, number=256, buf=0xb7837a08
ich_spi_read_page: offset=1551104, number=256, buf=0xb7837b08
ich_spi_read_page: offset=1551360, number=256, buf=0xb7837c08
ich_spi_read_page: offset=1551616, number=256, buf=0xb7837d08
ich_spi_read_page: offset=1551872, number=256, buf=0xb7837e08
ich_spi_read_page: offset=1552128, number=256, buf=0xb7837f08
ich_spi_read_page: offset=1552384, number=256, buf=0xb7838008
ich_spi_read_page: offset=1552640, number=256, buf=0xb7838108
ich_spi_read_page: offset=1552896, number=256, buf=0xb7838208
ich_spi_read_page: offset=1553152, number=256, buf=0xb7838308
ich_spi_read_page: offset=1553408, number=256, buf=0xb7838408
ich_spi_read_page: offset=1553664, number=256, buf=0xb7838508
ich_spi_read_page: offset=1553920, number=256, buf=0xb7838608
ich_spi_read_page: offset=1554176, number=256, buf=0xb7838708
ich_spi_read_page: offset=1554432, number=256, buf=0xb7838808
ich_spi_read_page: offset=1554688, number=256, buf=0xb7838908
ich_spi_read_page: offset=1554944, number=256, buf=0xb7838a08
ich_spi_read_page: offset=1555200, number=256, buf=0xb7838b08
ich_spi_read_page: offset=1555456, number=256, buf=0xb7838c08
ich_spi_read_page: offset=1555712, number=256, buf=0xb7838d08
ich_spi_read_page: offset=1555968, number=256, buf=0xb7838e08
ich_spi_read_page: offset=1556224, number=256, buf=0xb7838f08
ich_spi_read_page: offset=1556480, number=256, buf=0xb7839008
ich_spi_read_page: offset=1556736, number=256, buf=0xb7839108
ich_spi_read_page: offset=1556992, number=256, buf=0xb7839208
ich_spi_read_page: offset=1557248, number=256, buf=0xb7839308
ich_spi_read_page: offset=1557504, number=256, buf=0xb7839408
ich_spi_read_page: offset=1557760, number=256, buf=0xb7839508
ich_spi_read_page: offset=1558016, number=256, buf=0xb7839608
ich_spi_read_page: offset=1558272, number=256, buf=0xb7839708
ich_spi_read_page: offset=1558528, number=256, buf=0xb7839808
ich_spi_read_page: offset=1558784, number=256, buf=0xb7839908
ich_spi_read_page: offset=1559040, number=256, buf=0xb7839a08
ich_spi_read_page: offset=1559296, number=256, buf=0xb7839b08
ich_spi_read_page: offset=1559552, number=256, buf=0xb7839c08
ich_spi_read_page: offset=1559808, number=256, buf=0xb7839d08
ich_spi_read_page: offset=1560064, number=256, buf=0xb7839e08
ich_spi_read_page: offset=1560320, number=256, buf=0xb7839f08
ich_spi_read_page: offset=1560576, number=256, buf=0xb783a008
ich_spi_read_page: offset=1560832, number=256, buf=0xb783a108
ich_spi_read_page: offset=1561088, number=256, buf=0xb783a208
ich_spi_read_page: offset=1561344, number=256, buf=0xb783a308
ich_spi_read_page: offset=1561600, number=256, buf=0xb783a408
ich_spi_read_page: offset=1561856, number=256, buf=0xb783a508
ich_spi_read_page: offset=1562112, number=256, buf=0xb783a608
ich_spi_read_page: offset=1562368, number=256, buf=0xb783a708
ich_spi_read_page: offset=1562624, number=256, buf=0xb783a808
ich_spi_read_page: offset=1562880, number=256, buf=0xb783a908
ich_spi_read_page: offset=1563136, number=256, buf=0xb783aa08
ich_spi_read_page: offset=1563392, number=256, buf=0xb783ab08
ich_spi_read_page: offset=1563648, number=256, buf=0xb783ac08
ich_spi_read_page: offset=1563904, number=256, buf=0xb783ad08
ich_spi_read_page: offset=1564160, number=256, buf=0xb783ae08
ich_spi_read_page: offset=1564416, number=256, buf=0xb783af08
ich_spi_read_page: offset=1564672, number=256, buf=0xb783b008
ich_spi_read_page: offset=1564928, number=256, buf=0xb783b108
ich_spi_read_page: offset=1565184, number=256, buf=0xb783b208
ich_spi_read_page: offset=1565440, number=256, buf=0xb783b308
ich_spi_read_page: offset=1565696, number=256, buf=0xb783b408
ich_spi_read_page: offset=1565952, number=256, buf=0xb783b508
ich_spi_read_page: offset=1566208, number=256, buf=0xb783b608
ich_spi_read_page: offset=1566464, number=256, buf=0xb783b708
ich_spi_read_page: offset=1566720, number=256, buf=0xb783b808
ich_spi_read_page: offset=1566976, number=256, buf=0xb783b908
ich_spi_read_page: offset=1567232, number=256, buf=0xb783ba08
ich_spi_read_page: offset=1567488, number=256, buf=0xb783bb08
ich_spi_read_page: offset=1567744, number=256, buf=0xb783bc08
ich_spi_read_page: offset=1568000, number=256, buf=0xb783bd08
ich_spi_read_page: offset=1568256, number=256, buf=0xb783be08
ich_spi_read_page: offset=1568512, number=256, buf=0xb783bf08
ich_spi_read_page: offset=1568768, number=256, buf=0xb783c008
ich_spi_read_page: offset=1569024, number=256, buf=0xb783c108
ich_spi_read_page: offset=1569280, number=256, buf=0xb783c208
ich_spi_read_page: offset=1569536, number=256, buf=0xb783c308
ich_spi_read_page: offset=1569792, number=256, buf=0xb783c408
ich_spi_read_page: offset=1570048, number=256, buf=0xb783c508
ich_spi_read_page: offset=1570304, number=256, buf=0xb783c608
ich_spi_read_page: offset=1570560, number=256, buf=0xb783c708
ich_spi_read_page: offset=1570816, number=256, buf=0xb783c808
ich_spi_read_page: offset=1571072, number=256, buf=0xb783c908
ich_spi_read_page: offset=1571328, number=256, buf=0xb783ca08
ich_spi_read_page: offset=1571584, number=256, buf=0xb783cb08
ich_spi_read_page: offset=1571840, number=256, buf=0xb783cc08
ich_spi_read_page: offset=1572096, number=256, buf=0xb783cd08
ich_spi_read_page: offset=1572352, number=256, buf=0xb783ce08
ich_spi_read_page: offset=1572608, number=256, buf=0xb783cf08
ich_spi_read_page: offset=1572864, number=256, buf=0xb783d008
ich_spi_read_page: offset=1573120, number=256, buf=0xb783d108
ich_spi_read_page: offset=1573376, number=256, buf=0xb783d208
ich_spi_read_page: offset=1573632, number=256, buf=0xb783d308
ich_spi_read_page: offset=1573888, number=256, buf=0xb783d408
ich_spi_read_page: offset=1574144, number=256, buf=0xb783d508
ich_spi_read_page: offset=1574400, number=256, buf=0xb783d608
ich_spi_read_page: offset=1574656, number=256, buf=0xb783d708
ich_spi_read_page: offset=1574912, number=256, buf=0xb783d808
ich_spi_read_page: offset=1575168, number=256, buf=0xb783d908
ich_spi_read_page: offset=1575424, number=256, buf=0xb783da08
ich_spi_read_page: offset=1575680, number=256, buf=0xb783db08
ich_spi_read_page: offset=1575936, number=256, buf=0xb783dc08
ich_spi_read_page: offset=1576192, number=256, buf=0xb783dd08
ich_spi_read_page: offset=1576448, number=256, buf=0xb783de08
ich_spi_read_page: offset=1576704, number=256, buf=0xb783df08
ich_spi_read_page: offset=1576960, number=256, buf=0xb783e008
ich_spi_read_page: offset=1577216, number=256, buf=0xb783e108
ich_spi_read_page: offset=1577472, number=256, buf=0xb783e208
ich_spi_read_page: offset=1577728, number=256, buf=0xb783e308
ich_spi_read_page: offset=1577984, number=256, buf=0xb783e408
ich_spi_read_page: offset=1578240, number=256, buf=0xb783e508
ich_spi_read_page: offset=1578496, number=256, buf=0xb783e608
ich_spi_read_page: offset=1578752, number=256, buf=0xb783e708
ich_spi_read_page: offset=1579008, number=256, buf=0xb783e808
ich_spi_read_page: offset=1579264, number=256, buf=0xb783e908
ich_spi_read_page: offset=1579520, number=256, buf=0xb783ea08
ich_spi_read_page: offset=1579776, number=256, buf=0xb783eb08
ich_spi_read_page: offset=1580032, number=256, buf=0xb783ec08
ich_spi_read_page: offset=1580288, number=256, buf=0xb783ed08
ich_spi_read_page: offset=1580544, number=256, buf=0xb783ee08
ich_spi_read_page: offset=1580800, number=256, buf=0xb783ef08
ich_spi_read_page: offset=1581056, number=256, buf=0xb783f008
ich_spi_read_page: offset=1581312, number=256, buf=0xb783f108
ich_spi_read_page: offset=1581568, number=256, buf=0xb783f208
ich_spi_read_page: offset=1581824, number=256, buf=0xb783f308
ich_spi_read_page: offset=1582080, number=256, buf=0xb783f408
ich_spi_read_page: offset=1582336, number=256, buf=0xb783f508
ich_spi_read_page: offset=1582592, number=256, buf=0xb783f608
ich_spi_read_page: offset=1582848, number=256, buf=0xb783f708
ich_spi_read_page: offset=1583104, number=256, buf=0xb783f808
ich_spi_read_page: offset=1583360, number=256, buf=0xb783f908
ich_spi_read_page: offset=1583616, number=256, buf=0xb783fa08
ich_spi_read_page: offset=1583872, number=256, buf=0xb783fb08
ich_spi_read_page: offset=1584128, number=256, buf=0xb783fc08
ich_spi_read_page: offset=1584384, number=256, buf=0xb783fd08
ich_spi_read_page: offset=1584640, number=256, buf=0xb783fe08
ich_spi_read_page: offset=1584896, number=256, buf=0xb783ff08
ich_spi_read_page: offset=1585152, number=256, buf=0xb7840008
ich_spi_read_page: offset=1585408, number=256, buf=0xb7840108
ich_spi_read_page: offset=1585664, number=256, buf=0xb7840208
ich_spi_read_page: offset=1585920, number=256, buf=0xb7840308
ich_spi_read_page: offset=1586176, number=256, buf=0xb7840408
ich_spi_read_page: offset=1586432, number=256, buf=0xb7840508
ich_spi_read_page: offset=1586688, number=256, buf=0xb7840608
ich_spi_read_page: offset=1586944, number=256, buf=0xb7840708
ich_spi_read_page: offset=1587200, number=256, buf=0xb7840808
ich_spi_read_page: offset=1587456, number=256, buf=0xb7840908
ich_spi_read_page: offset=1587712, number=256, buf=0xb7840a08
ich_spi_read_page: offset=1587968, number=256, buf=0xb7840b08
ich_spi_read_page: offset=1588224, number=256, buf=0xb7840c08
ich_spi_read_page: offset=1588480, number=256, buf=0xb7840d08
ich_spi_read_page: offset=1588736, number=256, buf=0xb7840e08
ich_spi_read_page: offset=1588992, number=256, buf=0xb7840f08
ich_spi_read_page: offset=1589248, number=256, buf=0xb7841008
ich_spi_read_page: offset=1589504, number=256, buf=0xb7841108
ich_spi_read_page: offset=1589760, number=256, buf=0xb7841208
ich_spi_read_page: offset=1590016, number=256, buf=0xb7841308
ich_spi_read_page: offset=1590272, number=256, buf=0xb7841408
ich_spi_read_page: offset=1590528, number=256, buf=0xb7841508
ich_spi_read_page: offset=1590784, number=256, buf=0xb7841608
ich_spi_read_page: offset=1591040, number=256, buf=0xb7841708
ich_spi_read_page: offset=1591296, number=256, buf=0xb7841808
ich_spi_read_page: offset=1591552, number=256, buf=0xb7841908
ich_spi_read_page: offset=1591808, number=256, buf=0xb7841a08
ich_spi_read_page: offset=1592064, number=256, buf=0xb7841b08
ich_spi_read_page: offset=1592320, number=256, buf=0xb7841c08
ich_spi_read_page: offset=1592576, number=256, buf=0xb7841d08
ich_spi_read_page: offset=1592832, number=256, buf=0xb7841e08
ich_spi_read_page: offset=1593088, number=256, buf=0xb7841f08
ich_spi_read_page: offset=1593344, number=256, buf=0xb7842008
ich_spi_read_page: offset=1593600, number=256, buf=0xb7842108
ich_spi_read_page: offset=1593856, number=256, buf=0xb7842208
ich_spi_read_page: offset=1594112, number=256, buf=0xb7842308
ich_spi_read_page: offset=1594368, number=256, buf=0xb7842408
ich_spi_read_page: offset=1594624, number=256, buf=0xb7842508
ich_spi_read_page: offset=1594880, number=256, buf=0xb7842608
ich_spi_read_page: offset=1595136, number=256, buf=0xb7842708
ich_spi_read_page: offset=1595392, number=256, buf=0xb7842808
ich_spi_read_page: offset=1595648, number=256, buf=0xb7842908
ich_spi_read_page: offset=1595904, number=256, buf=0xb7842a08
ich_spi_read_page: offset=1596160, number=256, buf=0xb7842b08
ich_spi_read_page: offset=1596416, number=256, buf=0xb7842c08
ich_spi_read_page: offset=1596672, number=256, buf=0xb7842d08
ich_spi_read_page: offset=1596928, number=256, buf=0xb7842e08
ich_spi_read_page: offset=1597184, number=256, buf=0xb7842f08
ich_spi_read_page: offset=1597440, number=256, buf=0xb7843008
ich_spi_read_page: offset=1597696, number=256, buf=0xb7843108
ich_spi_read_page: offset=1597952, number=256, buf=0xb7843208
ich_spi_read_page: offset=1598208, number=256, buf=0xb7843308
ich_spi_read_page: offset=1598464, number=256, buf=0xb7843408
ich_spi_read_page: offset=1598720, number=256, buf=0xb7843508
ich_spi_read_page: offset=1598976, number=256, buf=0xb7843608
ich_spi_read_page: offset=1599232, number=256, buf=0xb7843708
ich_spi_read_page: offset=1599488, number=256, buf=0xb7843808
ich_spi_read_page: offset=1599744, number=256, buf=0xb7843908
ich_spi_read_page: offset=1600000, number=256, buf=0xb7843a08
ich_spi_read_page: offset=1600256, number=256, buf=0xb7843b08
ich_spi_read_page: offset=1600512, number=256, buf=0xb7843c08
ich_spi_read_page: offset=1600768, number=256, buf=0xb7843d08
ich_spi_read_page: offset=1601024, number=256, buf=0xb7843e08
ich_spi_read_page: offset=1601280, number=256, buf=0xb7843f08
ich_spi_read_page: offset=1601536, number=256, buf=0xb7844008
ich_spi_read_page: offset=1601792, number=256, buf=0xb7844108
ich_spi_read_page: offset=1602048, number=256, buf=0xb7844208
ich_spi_read_page: offset=1602304, number=256, buf=0xb7844308
ich_spi_read_page: offset=1602560, number=256, buf=0xb7844408
ich_spi_read_page: offset=1602816, number=256, buf=0xb7844508
ich_spi_read_page: offset=1603072, number=256, buf=0xb7844608
ich_spi_read_page: offset=1603328, number=256, buf=0xb7844708
ich_spi_read_page: offset=1603584, number=256, buf=0xb7844808
ich_spi_read_page: offset=1603840, number=256, buf=0xb7844908
ich_spi_read_page: offset=1604096, number=256, buf=0xb7844a08
ich_spi_read_page: offset=1604352, number=256, buf=0xb7844b08
ich_spi_read_page: offset=1604608, number=256, buf=0xb7844c08
ich_spi_read_page: offset=1604864, number=256, buf=0xb7844d08
ich_spi_read_page: offset=1605120, number=256, buf=0xb7844e08
ich_spi_read_page: offset=1605376, number=256, buf=0xb7844f08
ich_spi_read_page: offset=1605632, number=256, buf=0xb7845008
ich_spi_read_page: offset=1605888, number=256, buf=0xb7845108
ich_spi_read_page: offset=1606144, number=256, buf=0xb7845208
ich_spi_read_page: offset=1606400, number=256, buf=0xb7845308
ich_spi_read_page: offset=1606656, number=256, buf=0xb7845408
ich_spi_read_page: offset=1606912, number=256, buf=0xb7845508
ich_spi_read_page: offset=1607168, number=256, buf=0xb7845608
ich_spi_read_page: offset=1607424, number=256, buf=0xb7845708
ich_spi_read_page: offset=1607680, number=256, buf=0xb7845808
ich_spi_read_page: offset=1607936, number=256, buf=0xb7845908
ich_spi_read_page: offset=1608192, number=256, buf=0xb7845a08
ich_spi_read_page: offset=1608448, number=256, buf=0xb7845b08
ich_spi_read_page: offset=1608704, number=256, buf=0xb7845c08
ich_spi_read_page: offset=1608960, number=256, buf=0xb7845d08
ich_spi_read_page: offset=1609216, number=256, buf=0xb7845e08
ich_spi_read_page: offset=1609472, number=256, buf=0xb7845f08
ich_spi_read_page: offset=1609728, number=256, buf=0xb7846008
ich_spi_read_page: offset=1609984, number=256, buf=0xb7846108
ich_spi_read_page: offset=1610240, number=256, buf=0xb7846208
ich_spi_read_page: offset=1610496, number=256, buf=0xb7846308
ich_spi_read_page: offset=1610752, number=256, buf=0xb7846408
ich_spi_read_page: offset=1611008, number=256, buf=0xb7846508
ich_spi_read_page: offset=1611264, number=256, buf=0xb7846608
ich_spi_read_page: offset=1611520, number=256, buf=0xb7846708
ich_spi_read_page: offset=1611776, number=256, buf=0xb7846808
ich_spi_read_page: offset=1612032, number=256, buf=0xb7846908
ich_spi_read_page: offset=1612288, number=256, buf=0xb7846a08
ich_spi_read_page: offset=1612544, number=256, buf=0xb7846b08
ich_spi_read_page: offset=1612800, number=256, buf=0xb7846c08
ich_spi_read_page: offset=1613056, number=256, buf=0xb7846d08
ich_spi_read_page: offset=1613312, number=256, buf=0xb7846e08
ich_spi_read_page: offset=1613568, number=256, buf=0xb7846f08
ich_spi_read_page: offset=1613824, number=256, buf=0xb7847008
ich_spi_read_page: offset=1614080, number=256, buf=0xb7847108
ich_spi_read_page: offset=1614336, number=256, buf=0xb7847208
ich_spi_read_page: offset=1614592, number=256, buf=0xb7847308
ich_spi_read_page: offset=1614848, number=256, buf=0xb7847408
ich_spi_read_page: offset=1615104, number=256, buf=0xb7847508
ich_spi_read_page: offset=1615360, number=256, buf=0xb7847608
ich_spi_read_page: offset=1615616, number=256, buf=0xb7847708
ich_spi_read_page: offset=1615872, number=256, buf=0xb7847808
ich_spi_read_page: offset=1616128, number=256, buf=0xb7847908
ich_spi_read_page: offset=1616384, number=256, buf=0xb7847a08
ich_spi_read_page: offset=1616640, number=256, buf=0xb7847b08
ich_spi_read_page: offset=1616896, number=256, buf=0xb7847c08
ich_spi_read_page: offset=1617152, number=256, buf=0xb7847d08
ich_spi_read_page: offset=1617408, number=256, buf=0xb7847e08
ich_spi_read_page: offset=1617664, number=256, buf=0xb7847f08
ich_spi_read_page: offset=1617920, number=256, buf=0xb7848008
ich_spi_read_page: offset=1618176, number=256, buf=0xb7848108
ich_spi_read_page: offset=1618432, number=256, buf=0xb7848208
ich_spi_read_page: offset=1618688, number=256, buf=0xb7848308
ich_spi_read_page: offset=1618944, number=256, buf=0xb7848408
ich_spi_read_page: offset=1619200, number=256, buf=0xb7848508
ich_spi_read_page: offset=1619456, number=256, buf=0xb7848608
ich_spi_read_page: offset=1619712, number=256, buf=0xb7848708
ich_spi_read_page: offset=1619968, number=256, buf=0xb7848808
ich_spi_read_page: offset=1620224, number=256, buf=0xb7848908
ich_spi_read_page: offset=1620480, number=256, buf=0xb7848a08
ich_spi_read_page: offset=1620736, number=256, buf=0xb7848b08
ich_spi_read_page: offset=1620992, number=256, buf=0xb7848c08
ich_spi_read_page: offset=1621248, number=256, buf=0xb7848d08
ich_spi_read_page: offset=1621504, number=256, buf=0xb7848e08
ich_spi_read_page: offset=1621760, number=256, buf=0xb7848f08
ich_spi_read_page: offset=1622016, number=256, buf=0xb7849008
ich_spi_read_page: offset=1622272, number=256, buf=0xb7849108
ich_spi_read_page: offset=1622528, number=256, buf=0xb7849208
ich_spi_read_page: offset=1622784, number=256, buf=0xb7849308
ich_spi_read_page: offset=1623040, number=256, buf=0xb7849408
ich_spi_read_page: offset=1623296, number=256, buf=0xb7849508
ich_spi_read_page: offset=1623552, number=256, buf=0xb7849608
ich_spi_read_page: offset=1623808, number=256, buf=0xb7849708
ich_spi_read_page: offset=1624064, number=256, buf=0xb7849808
ich_spi_read_page: offset=1624320, number=256, buf=0xb7849908
ich_spi_read_page: offset=1624576, number=256, buf=0xb7849a08
ich_spi_read_page: offset=1624832, number=256, buf=0xb7849b08
ich_spi_read_page: offset=1625088, number=256, buf=0xb7849c08
ich_spi_read_page: offset=1625344, number=256, buf=0xb7849d08
ich_spi_read_page: offset=1625600, number=256, buf=0xb7849e08
ich_spi_read_page: offset=1625856, number=256, buf=0xb7849f08
ich_spi_read_page: offset=1626112, number=256, buf=0xb784a008
ich_spi_read_page: offset=1626368, number=256, buf=0xb784a108
ich_spi_read_page: offset=1626624, number=256, buf=0xb784a208
ich_spi_read_page: offset=1626880, number=256, buf=0xb784a308
ich_spi_read_page: offset=1627136, number=256, buf=0xb784a408
ich_spi_read_page: offset=1627392, number=256, buf=0xb784a508
ich_spi_read_page: offset=1627648, number=256, buf=0xb784a608
ich_spi_read_page: offset=1627904, number=256, buf=0xb784a708
ich_spi_read_page: offset=1628160, number=256, buf=0xb784a808
ich_spi_read_page: offset=1628416, number=256, buf=0xb784a908
ich_spi_read_page: offset=1628672, number=256, buf=0xb784aa08
ich_spi_read_page: offset=1628928, number=256, buf=0xb784ab08
ich_spi_read_page: offset=1629184, number=256, buf=0xb784ac08
ich_spi_read_page: offset=1629440, number=256, buf=0xb784ad08
ich_spi_read_page: offset=1629696, number=256, buf=0xb784ae08
ich_spi_read_page: offset=1629952, number=256, buf=0xb784af08
ich_spi_read_page: offset=1630208, number=256, buf=0xb784b008
ich_spi_read_page: offset=1630464, number=256, buf=0xb784b108
ich_spi_read_page: offset=1630720, number=256, buf=0xb784b208
ich_spi_read_page: offset=1630976, number=256, buf=0xb784b308
ich_spi_read_page: offset=1631232, number=256, buf=0xb784b408
ich_spi_read_page: offset=1631488, number=256, buf=0xb784b508
ich_spi_read_page: offset=1631744, number=256, buf=0xb784b608
ich_spi_read_page: offset=1632000, number=256, buf=0xb784b708
ich_spi_read_page: offset=1632256, number=256, buf=0xb784b808
ich_spi_read_page: offset=1632512, number=256, buf=0xb784b908
ich_spi_read_page: offset=1632768, number=256, buf=0xb784ba08
ich_spi_read_page: offset=1633024, number=256, buf=0xb784bb08
ich_spi_read_page: offset=1633280, number=256, buf=0xb784bc08
ich_spi_read_page: offset=1633536, number=256, buf=0xb784bd08
ich_spi_read_page: offset=1633792, number=256, buf=0xb784be08
ich_spi_read_page: offset=1634048, number=256, buf=0xb784bf08
ich_spi_read_page: offset=1634304, number=256, buf=0xb784c008
ich_spi_read_page: offset=1634560, number=256, buf=0xb784c108
ich_spi_read_page: offset=1634816, number=256, buf=0xb784c208
ich_spi_read_page: offset=1635072, number=256, buf=0xb784c308
ich_spi_read_page: offset=1635328, number=256, buf=0xb784c408
ich_spi_read_page: offset=1635584, number=256, buf=0xb784c508
ich_spi_read_page: offset=1635840, number=256, buf=0xb784c608
ich_spi_read_page: offset=1636096, number=256, buf=0xb784c708
ich_spi_read_page: offset=1636352, number=256, buf=0xb784c808
ich_spi_read_page: offset=1636608, number=256, buf=0xb784c908
ich_spi_read_page: offset=1636864, number=256, buf=0xb784ca08
ich_spi_read_page: offset=1637120, number=256, buf=0xb784cb08
ich_spi_read_page: offset=1637376, number=256, buf=0xb784cc08
ich_spi_read_page: offset=1637632, number=256, buf=0xb784cd08
ich_spi_read_page: offset=1637888, number=256, buf=0xb784ce08
ich_spi_read_page: offset=1638144, number=256, buf=0xb784cf08
ich_spi_read_page: offset=1638400, number=256, buf=0xb784d008
ich_spi_read_page: offset=1638656, number=256, buf=0xb784d108
ich_spi_read_page: offset=1638912, number=256, buf=0xb784d208
ich_spi_read_page: offset=1639168, number=256, buf=0xb784d308
ich_spi_read_page: offset=1639424, number=256, buf=0xb784d408
ich_spi_read_page: offset=1639680, number=256, buf=0xb784d508
ich_spi_read_page: offset=1639936, number=256, buf=0xb784d608
ich_spi_read_page: offset=1640192, number=256, buf=0xb784d708
ich_spi_read_page: offset=1640448, number=256, buf=0xb784d808
ich_spi_read_page: offset=1640704, number=256, buf=0xb784d908
ich_spi_read_page: offset=1640960, number=256, buf=0xb784da08
ich_spi_read_page: offset=1641216, number=256, buf=0xb784db08
ich_spi_read_page: offset=1641472, number=256, buf=0xb784dc08
ich_spi_read_page: offset=1641728, number=256, buf=0xb784dd08
ich_spi_read_page: offset=1641984, number=256, buf=0xb784de08
ich_spi_read_page: offset=1642240, number=256, buf=0xb784df08
ich_spi_read_page: offset=1642496, number=256, buf=0xb784e008
ich_spi_read_page: offset=1642752, number=256, buf=0xb784e108
ich_spi_read_page: offset=1643008, number=256, buf=0xb784e208
ich_spi_read_page: offset=1643264, number=256, buf=0xb784e308
ich_spi_read_page: offset=1643520, number=256, buf=0xb784e408
ich_spi_read_page: offset=1643776, number=256, buf=0xb784e508
ich_spi_read_page: offset=1644032, number=256, buf=0xb784e608
ich_spi_read_page: offset=1644288, number=256, buf=0xb784e708
ich_spi_read_page: offset=1644544, number=256, buf=0xb784e808
ich_spi_read_page: offset=1644800, number=256, buf=0xb784e908
ich_spi_read_page: offset=1645056, number=256, buf=0xb784ea08
ich_spi_read_page: offset=1645312, number=256, buf=0xb784eb08
ich_spi_read_page: offset=1645568, number=256, buf=0xb784ec08
ich_spi_read_page: offset=1645824, number=256, buf=0xb784ed08
ich_spi_read_page: offset=1646080, number=256, buf=0xb784ee08
ich_spi_read_page: offset=1646336, number=256, buf=0xb784ef08
ich_spi_read_page: offset=1646592, number=256, buf=0xb784f008
ich_spi_read_page: offset=1646848, number=256, buf=0xb784f108
ich_spi_read_page: offset=1647104, number=256, buf=0xb784f208
ich_spi_read_page: offset=1647360, number=256, buf=0xb784f308
ich_spi_read_page: offset=1647616, number=256, buf=0xb784f408
ich_spi_read_page: offset=1647872, number=256, buf=0xb784f508
ich_spi_read_page: offset=1648128, number=256, buf=0xb784f608
ich_spi_read_page: offset=1648384, number=256, buf=0xb784f708
ich_spi_read_page: offset=1648640, number=256, buf=0xb784f808
ich_spi_read_page: offset=1648896, number=256, buf=0xb784f908
ich_spi_read_page: offset=1649152, number=256, buf=0xb784fa08
ich_spi_read_page: offset=1649408, number=256, buf=0xb784fb08
ich_spi_read_page: offset=1649664, number=256, buf=0xb784fc08
ich_spi_read_page: offset=1649920, number=256, buf=0xb784fd08
ich_spi_read_page: offset=1650176, number=256, buf=0xb784fe08
ich_spi_read_page: offset=1650432, number=256, buf=0xb784ff08
ich_spi_read_page: offset=1650688, number=256, buf=0xb7850008
ich_spi_read_page: offset=1650944, number=256, buf=0xb7850108
ich_spi_read_page: offset=1651200, number=256, buf=0xb7850208
ich_spi_read_page: offset=1651456, number=256, buf=0xb7850308
ich_spi_read_page: offset=1651712, number=256, buf=0xb7850408
ich_spi_read_page: offset=1651968, number=256, buf=0xb7850508
ich_spi_read_page: offset=1652224, number=256, buf=0xb7850608
ich_spi_read_page: offset=1652480, number=256, buf=0xb7850708
ich_spi_read_page: offset=1652736, number=256, buf=0xb7850808
ich_spi_read_page: offset=1652992, number=256, buf=0xb7850908
ich_spi_read_page: offset=1653248, number=256, buf=0xb7850a08
ich_spi_read_page: offset=1653504, number=256, buf=0xb7850b08
ich_spi_read_page: offset=1653760, number=256, buf=0xb7850c08
ich_spi_read_page: offset=1654016, number=256, buf=0xb7850d08
ich_spi_read_page: offset=1654272, number=256, buf=0xb7850e08
ich_spi_read_page: offset=1654528, number=256, buf=0xb7850f08
ich_spi_read_page: offset=1654784, number=256, buf=0xb7851008
ich_spi_read_page: offset=1655040, number=256, buf=0xb7851108
ich_spi_read_page: offset=1655296, number=256, buf=0xb7851208
ich_spi_read_page: offset=1655552, number=256, buf=0xb7851308
ich_spi_read_page: offset=1655808, number=256, buf=0xb7851408
ich_spi_read_page: offset=1656064, number=256, buf=0xb7851508
ich_spi_read_page: offset=1656320, number=256, buf=0xb7851608
ich_spi_read_page: offset=1656576, number=256, buf=0xb7851708
ich_spi_read_page: offset=1656832, number=256, buf=0xb7851808
ich_spi_read_page: offset=1657088, number=256, buf=0xb7851908
ich_spi_read_page: offset=1657344, number=256, buf=0xb7851a08
ich_spi_read_page: offset=1657600, number=256, buf=0xb7851b08
ich_spi_read_page: offset=1657856, number=256, buf=0xb7851c08
ich_spi_read_page: offset=1658112, number=256, buf=0xb7851d08
ich_spi_read_page: offset=1658368, number=256, buf=0xb7851e08
ich_spi_read_page: offset=1658624, number=256, buf=0xb7851f08
ich_spi_read_page: offset=1658880, number=256, buf=0xb7852008
ich_spi_read_page: offset=1659136, number=256, buf=0xb7852108
ich_spi_read_page: offset=1659392, number=256, buf=0xb7852208
ich_spi_read_page: offset=1659648, number=256, buf=0xb7852308
ich_spi_read_page: offset=1659904, number=256, buf=0xb7852408
ich_spi_read_page: offset=1660160, number=256, buf=0xb7852508
ich_spi_read_page: offset=1660416, number=256, buf=0xb7852608
ich_spi_read_page: offset=1660672, number=256, buf=0xb7852708
ich_spi_read_page: offset=1660928, number=256, buf=0xb7852808
ich_spi_read_page: offset=1661184, number=256, buf=0xb7852908
ich_spi_read_page: offset=1661440, number=256, buf=0xb7852a08
ich_spi_read_page: offset=1661696, number=256, buf=0xb7852b08
ich_spi_read_page: offset=1661952, number=256, buf=0xb7852c08
ich_spi_read_page: offset=1662208, number=256, buf=0xb7852d08
ich_spi_read_page: offset=1662464, number=256, buf=0xb7852e08
ich_spi_read_page: offset=1662720, number=256, buf=0xb7852f08
ich_spi_read_page: offset=1662976, number=256, buf=0xb7853008
ich_spi_read_page: offset=1663232, number=256, buf=0xb7853108
ich_spi_read_page: offset=1663488, number=256, buf=0xb7853208
ich_spi_read_page: offset=1663744, number=256, buf=0xb7853308
ich_spi_read_page: offset=1664000, number=256, buf=0xb7853408
ich_spi_read_page: offset=1664256, number=256, buf=0xb7853508
ich_spi_read_page: offset=1664512, number=256, buf=0xb7853608
ich_spi_read_page: offset=1664768, number=256, buf=0xb7853708
ich_spi_read_page: offset=1665024, number=256, buf=0xb7853808
ich_spi_read_page: offset=1665280, number=256, buf=0xb7853908
ich_spi_read_page: offset=1665536, number=256, buf=0xb7853a08
ich_spi_read_page: offset=1665792, number=256, buf=0xb7853b08
ich_spi_read_page: offset=1666048, number=256, buf=0xb7853c08
ich_spi_read_page: offset=1666304, number=256, buf=0xb7853d08
ich_spi_read_page: offset=1666560, number=256, buf=0xb7853e08
ich_spi_read_page: offset=1666816, number=256, buf=0xb7853f08
ich_spi_read_page: offset=1667072, number=256, buf=0xb7854008
ich_spi_read_page: offset=1667328, number=256, buf=0xb7854108
ich_spi_read_page: offset=1667584, number=256, buf=0xb7854208
ich_spi_read_page: offset=1667840, number=256, buf=0xb7854308
ich_spi_read_page: offset=1668096, number=256, buf=0xb7854408
ich_spi_read_page: offset=1668352, number=256, buf=0xb7854508
ich_spi_read_page: offset=1668608, number=256, buf=0xb7854608
ich_spi_read_page: offset=1668864, number=256, buf=0xb7854708
ich_spi_read_page: offset=1669120, number=256, buf=0xb7854808
ich_spi_read_page: offset=1669376, number=256, buf=0xb7854908
ich_spi_read_page: offset=1669632, number=256, buf=0xb7854a08
ich_spi_read_page: offset=1669888, number=256, buf=0xb7854b08
ich_spi_read_page: offset=1670144, number=256, buf=0xb7854c08
ich_spi_read_page: offset=1670400, number=256, buf=0xb7854d08
ich_spi_read_page: offset=1670656, number=256, buf=0xb7854e08
ich_spi_read_page: offset=1670912, number=256, buf=0xb7854f08
ich_spi_read_page: offset=1671168, number=256, buf=0xb7855008
ich_spi_read_page: offset=1671424, number=256, buf=0xb7855108
ich_spi_read_page: offset=1671680, number=256, buf=0xb7855208
ich_spi_read_page: offset=1671936, number=256, buf=0xb7855308
ich_spi_read_page: offset=1672192, number=256, buf=0xb7855408
ich_spi_read_page: offset=1672448, number=256, buf=0xb7855508
ich_spi_read_page: offset=1672704, number=256, buf=0xb7855608
ich_spi_read_page: offset=1672960, number=256, buf=0xb7855708
ich_spi_read_page: offset=1673216, number=256, buf=0xb7855808
ich_spi_read_page: offset=1673472, number=256, buf=0xb7855908
ich_spi_read_page: offset=1673728, number=256, buf=0xb7855a08
ich_spi_read_page: offset=1673984, number=256, buf=0xb7855b08
ich_spi_read_page: offset=1674240, number=256, buf=0xb7855c08
ich_spi_read_page: offset=1674496, number=256, buf=0xb7855d08
ich_spi_read_page: offset=1674752, number=256, buf=0xb7855e08
ich_spi_read_page: offset=1675008, number=256, buf=0xb7855f08
ich_spi_read_page: offset=1675264, number=256, buf=0xb7856008
ich_spi_read_page: offset=1675520, number=256, buf=0xb7856108
ich_spi_read_page: offset=1675776, number=256, buf=0xb7856208
ich_spi_read_page: offset=1676032, number=256, buf=0xb7856308
ich_spi_read_page: offset=1676288, number=256, buf=0xb7856408
ich_spi_read_page: offset=1676544, number=256, buf=0xb7856508
ich_spi_read_page: offset=1676800, number=256, buf=0xb7856608
ich_spi_read_page: offset=1677056, number=256, buf=0xb7856708
ich_spi_read_page: offset=1677312, number=256, buf=0xb7856808
ich_spi_read_page: offset=1677568, number=256, buf=0xb7856908
ich_spi_read_page: offset=1677824, number=256, buf=0xb7856a08
ich_spi_read_page: offset=1678080, number=256, buf=0xb7856b08
ich_spi_read_page: offset=1678336, number=256, buf=0xb7856c08
ich_spi_read_page: offset=1678592, number=256, buf=0xb7856d08
ich_spi_read_page: offset=1678848, number=256, buf=0xb7856e08
ich_spi_read_page: offset=1679104, number=256, buf=0xb7856f08
ich_spi_read_page: offset=1679360, number=256, buf=0xb7857008
ich_spi_read_page: offset=1679616, number=256, buf=0xb7857108
ich_spi_read_page: offset=1679872, number=256, buf=0xb7857208
ich_spi_read_page: offset=1680128, number=256, buf=0xb7857308
ich_spi_read_page: offset=1680384, number=256, buf=0xb7857408
ich_spi_read_page: offset=1680640, number=256, buf=0xb7857508
ich_spi_read_page: offset=1680896, number=256, buf=0xb7857608
ich_spi_read_page: offset=1681152, number=256, buf=0xb7857708
ich_spi_read_page: offset=1681408, number=256, buf=0xb7857808
ich_spi_read_page: offset=1681664, number=256, buf=0xb7857908
ich_spi_read_page: offset=1681920, number=256, buf=0xb7857a08
ich_spi_read_page: offset=1682176, number=256, buf=0xb7857b08
ich_spi_read_page: offset=1682432, number=256, buf=0xb7857c08
ich_spi_read_page: offset=1682688, number=256, buf=0xb7857d08
ich_spi_read_page: offset=1682944, number=256, buf=0xb7857e08
ich_spi_read_page: offset=1683200, number=256, buf=0xb7857f08
ich_spi_read_page: offset=1683456, number=256, buf=0xb7858008
ich_spi_read_page: offset=1683712, number=256, buf=0xb7858108
ich_spi_read_page: offset=1683968, number=256, buf=0xb7858208
ich_spi_read_page: offset=1684224, number=256, buf=0xb7858308
ich_spi_read_page: offset=1684480, number=256, buf=0xb7858408
ich_spi_read_page: offset=1684736, number=256, buf=0xb7858508
ich_spi_read_page: offset=1684992, number=256, buf=0xb7858608
ich_spi_read_page: offset=1685248, number=256, buf=0xb7858708
ich_spi_read_page: offset=1685504, number=256, buf=0xb7858808
ich_spi_read_page: offset=1685760, number=256, buf=0xb7858908
ich_spi_read_page: offset=1686016, number=256, buf=0xb7858a08
ich_spi_read_page: offset=1686272, number=256, buf=0xb7858b08
ich_spi_read_page: offset=1686528, number=256, buf=0xb7858c08
ich_spi_read_page: offset=1686784, number=256, buf=0xb7858d08
ich_spi_read_page: offset=1687040, number=256, buf=0xb7858e08
ich_spi_read_page: offset=1687296, number=256, buf=0xb7858f08
ich_spi_read_page: offset=1687552, number=256, buf=0xb7859008
ich_spi_read_page: offset=1687808, number=256, buf=0xb7859108
ich_spi_read_page: offset=1688064, number=256, buf=0xb7859208
ich_spi_read_page: offset=1688320, number=256, buf=0xb7859308
ich_spi_read_page: offset=1688576, number=256, buf=0xb7859408
ich_spi_read_page: offset=1688832, number=256, buf=0xb7859508
ich_spi_read_page: offset=1689088, number=256, buf=0xb7859608
ich_spi_read_page: offset=1689344, number=256, buf=0xb7859708
ich_spi_read_page: offset=1689600, number=256, buf=0xb7859808
ich_spi_read_page: offset=1689856, number=256, buf=0xb7859908
ich_spi_read_page: offset=1690112, number=256, buf=0xb7859a08
ich_spi_read_page: offset=1690368, number=256, buf=0xb7859b08
ich_spi_read_page: offset=1690624, number=256, buf=0xb7859c08
ich_spi_read_page: offset=1690880, number=256, buf=0xb7859d08
ich_spi_read_page: offset=1691136, number=256, buf=0xb7859e08
ich_spi_read_page: offset=1691392, number=256, buf=0xb7859f08
ich_spi_read_page: offset=1691648, number=256, buf=0xb785a008
ich_spi_read_page: offset=1691904, number=256, buf=0xb785a108
ich_spi_read_page: offset=1692160, number=256, buf=0xb785a208
ich_spi_read_page: offset=1692416, number=256, buf=0xb785a308
ich_spi_read_page: offset=1692672, number=256, buf=0xb785a408
ich_spi_read_page: offset=1692928, number=256, buf=0xb785a508
ich_spi_read_page: offset=1693184, number=256, buf=0xb785a608
ich_spi_read_page: offset=1693440, number=256, buf=0xb785a708
ich_spi_read_page: offset=1693696, number=256, buf=0xb785a808
ich_spi_read_page: offset=1693952, number=256, buf=0xb785a908
ich_spi_read_page: offset=1694208, number=256, buf=0xb785aa08
ich_spi_read_page: offset=1694464, number=256, buf=0xb785ab08
ich_spi_read_page: offset=1694720, number=256, buf=0xb785ac08
ich_spi_read_page: offset=1694976, number=256, buf=0xb785ad08
ich_spi_read_page: offset=1695232, number=256, buf=0xb785ae08
ich_spi_read_page: offset=1695488, number=256, buf=0xb785af08
ich_spi_read_page: offset=1695744, number=256, buf=0xb785b008
ich_spi_read_page: offset=1696000, number=256, buf=0xb785b108
ich_spi_read_page: offset=1696256, number=256, buf=0xb785b208
ich_spi_read_page: offset=1696512, number=256, buf=0xb785b308
ich_spi_read_page: offset=1696768, number=256, buf=0xb785b408
ich_spi_read_page: offset=1697024, number=256, buf=0xb785b508
ich_spi_read_page: offset=1697280, number=256, buf=0xb785b608
ich_spi_read_page: offset=1697536, number=256, buf=0xb785b708
ich_spi_read_page: offset=1697792, number=256, buf=0xb785b808
ich_spi_read_page: offset=1698048, number=256, buf=0xb785b908
ich_spi_read_page: offset=1698304, number=256, buf=0xb785ba08
ich_spi_read_page: offset=1698560, number=256, buf=0xb785bb08
ich_spi_read_page: offset=1698816, number=256, buf=0xb785bc08
ich_spi_read_page: offset=1699072, number=256, buf=0xb785bd08
ich_spi_read_page: offset=1699328, number=256, buf=0xb785be08
ich_spi_read_page: offset=1699584, number=256, buf=0xb785bf08
ich_spi_read_page: offset=1699840, number=256, buf=0xb785c008
ich_spi_read_page: offset=1700096, number=256, buf=0xb785c108
ich_spi_read_page: offset=1700352, number=256, buf=0xb785c208
ich_spi_read_page: offset=1700608, number=256, buf=0xb785c308
ich_spi_read_page: offset=1700864, number=256, buf=0xb785c408
ich_spi_read_page: offset=1701120, number=256, buf=0xb785c508
ich_spi_read_page: offset=1701376, number=256, buf=0xb785c608
ich_spi_read_page: offset=1701632, number=256, buf=0xb785c708
ich_spi_read_page: offset=1701888, number=256, buf=0xb785c808
ich_spi_read_page: offset=1702144, number=256, buf=0xb785c908
ich_spi_read_page: offset=1702400, number=256, buf=0xb785ca08
ich_spi_read_page: offset=1702656, number=256, buf=0xb785cb08
ich_spi_read_page: offset=1702912, number=256, buf=0xb785cc08
ich_spi_read_page: offset=1703168, number=256, buf=0xb785cd08
ich_spi_read_page: offset=1703424, number=256, buf=0xb785ce08
ich_spi_read_page: offset=1703680, number=256, buf=0xb785cf08
ich_spi_read_page: offset=1703936, number=256, buf=0xb785d008
ich_spi_read_page: offset=1704192, number=256, buf=0xb785d108
ich_spi_read_page: offset=1704448, number=256, buf=0xb785d208
ich_spi_read_page: offset=1704704, number=256, buf=0xb785d308
ich_spi_read_page: offset=1704960, number=256, buf=0xb785d408
ich_spi_read_page: offset=1705216, number=256, buf=0xb785d508
ich_spi_read_page: offset=1705472, number=256, buf=0xb785d608
ich_spi_read_page: offset=1705728, number=256, buf=0xb785d708
ich_spi_read_page: offset=1705984, number=256, buf=0xb785d808
ich_spi_read_page: offset=1706240, number=256, buf=0xb785d908
ich_spi_read_page: offset=1706496, number=256, buf=0xb785da08
ich_spi_read_page: offset=1706752, number=256, buf=0xb785db08
ich_spi_read_page: offset=1707008, number=256, buf=0xb785dc08
ich_spi_read_page: offset=1707264, number=256, buf=0xb785dd08
ich_spi_read_page: offset=1707520, number=256, buf=0xb785de08
ich_spi_read_page: offset=1707776, number=256, buf=0xb785df08
ich_spi_read_page: offset=1708032, number=256, buf=0xb785e008
ich_spi_read_page: offset=1708288, number=256, buf=0xb785e108
ich_spi_read_page: offset=1708544, number=256, buf=0xb785e208
ich_spi_read_page: offset=1708800, number=256, buf=0xb785e308
ich_spi_read_page: offset=1709056, number=256, buf=0xb785e408
ich_spi_read_page: offset=1709312, number=256, buf=0xb785e508
ich_spi_read_page: offset=1709568, number=256, buf=0xb785e608
ich_spi_read_page: offset=1709824, number=256, buf=0xb785e708
ich_spi_read_page: offset=1710080, number=256, buf=0xb785e808
ich_spi_read_page: offset=1710336, number=256, buf=0xb785e908
ich_spi_read_page: offset=1710592, number=256, buf=0xb785ea08
ich_spi_read_page: offset=1710848, number=256, buf=0xb785eb08
ich_spi_read_page: offset=1711104, number=256, buf=0xb785ec08
ich_spi_read_page: offset=1711360, number=256, buf=0xb785ed08
ich_spi_read_page: offset=1711616, number=256, buf=0xb785ee08
ich_spi_read_page: offset=1711872, number=256, buf=0xb785ef08
ich_spi_read_page: offset=1712128, number=256, buf=0xb785f008
ich_spi_read_page: offset=1712384, number=256, buf=0xb785f108
ich_spi_read_page: offset=1712640, number=256, buf=0xb785f208
ich_spi_read_page: offset=1712896, number=256, buf=0xb785f308
ich_spi_read_page: offset=1713152, number=256, buf=0xb785f408
ich_spi_read_page: offset=1713408, number=256, buf=0xb785f508
ich_spi_read_page: offset=1713664, number=256, buf=0xb785f608
ich_spi_read_page: offset=1713920, number=256, buf=0xb785f708
ich_spi_read_page: offset=1714176, number=256, buf=0xb785f808
ich_spi_read_page: offset=1714432, number=256, buf=0xb785f908
ich_spi_read_page: offset=1714688, number=256, buf=0xb785fa08
ich_spi_read_page: offset=1714944, number=256, buf=0xb785fb08
ich_spi_read_page: offset=1715200, number=256, buf=0xb785fc08
ich_spi_read_page: offset=1715456, number=256, buf=0xb785fd08
ich_spi_read_page: offset=1715712, number=256, buf=0xb785fe08
ich_spi_read_page: offset=1715968, number=256, buf=0xb785ff08
ich_spi_read_page: offset=1716224, number=256, buf=0xb7860008
ich_spi_read_page: offset=1716480, number=256, buf=0xb7860108
ich_spi_read_page: offset=1716736, number=256, buf=0xb7860208
ich_spi_read_page: offset=1716992, number=256, buf=0xb7860308
ich_spi_read_page: offset=1717248, number=256, buf=0xb7860408
ich_spi_read_page: offset=1717504, number=256, buf=0xb7860508
ich_spi_read_page: offset=1717760, number=256, buf=0xb7860608
ich_spi_read_page: offset=1718016, number=256, buf=0xb7860708
ich_spi_read_page: offset=1718272, number=256, buf=0xb7860808
ich_spi_read_page: offset=1718528, number=256, buf=0xb7860908
ich_spi_read_page: offset=1718784, number=256, buf=0xb7860a08
ich_spi_read_page: offset=1719040, number=256, buf=0xb7860b08
ich_spi_read_page: offset=1719296, number=256, buf=0xb7860c08
ich_spi_read_page: offset=1719552, number=256, buf=0xb7860d08
ich_spi_read_page: offset=1719808, number=256, buf=0xb7860e08
ich_spi_read_page: offset=1720064, number=256, buf=0xb7860f08
ich_spi_read_page: offset=1720320, number=256, buf=0xb7861008
ich_spi_read_page: offset=1720576, number=256, buf=0xb7861108
ich_spi_read_page: offset=1720832, number=256, buf=0xb7861208
ich_spi_read_page: offset=1721088, number=256, buf=0xb7861308
ich_spi_read_page: offset=1721344, number=256, buf=0xb7861408
ich_spi_read_page: offset=1721600, number=256, buf=0xb7861508
ich_spi_read_page: offset=1721856, number=256, buf=0xb7861608
ich_spi_read_page: offset=1722112, number=256, buf=0xb7861708
ich_spi_read_page: offset=1722368, number=256, buf=0xb7861808
ich_spi_read_page: offset=1722624, number=256, buf=0xb7861908
ich_spi_read_page: offset=1722880, number=256, buf=0xb7861a08
ich_spi_read_page: offset=1723136, number=256, buf=0xb7861b08
ich_spi_read_page: offset=1723392, number=256, buf=0xb7861c08
ich_spi_read_page: offset=1723648, number=256, buf=0xb7861d08
ich_spi_read_page: offset=1723904, number=256, buf=0xb7861e08
ich_spi_read_page: offset=1724160, number=256, buf=0xb7861f08
ich_spi_read_page: offset=1724416, number=256, buf=0xb7862008
ich_spi_read_page: offset=1724672, number=256, buf=0xb7862108
ich_spi_read_page: offset=1724928, number=256, buf=0xb7862208
ich_spi_read_page: offset=1725184, number=256, buf=0xb7862308
ich_spi_read_page: offset=1725440, number=256, buf=0xb7862408
ich_spi_read_page: offset=1725696, number=256, buf=0xb7862508
ich_spi_read_page: offset=1725952, number=256, buf=0xb7862608
ich_spi_read_page: offset=1726208, number=256, buf=0xb7862708
ich_spi_read_page: offset=1726464, number=256, buf=0xb7862808
ich_spi_read_page: offset=1726720, number=256, buf=0xb7862908
ich_spi_read_page: offset=1726976, number=256, buf=0xb7862a08
ich_spi_read_page: offset=1727232, number=256, buf=0xb7862b08
ich_spi_read_page: offset=1727488, number=256, buf=0xb7862c08
ich_spi_read_page: offset=1727744, number=256, buf=0xb7862d08
ich_spi_read_page: offset=1728000, number=256, buf=0xb7862e08
ich_spi_read_page: offset=1728256, number=256, buf=0xb7862f08
ich_spi_read_page: offset=1728512, number=256, buf=0xb7863008
ich_spi_read_page: offset=1728768, number=256, buf=0xb7863108
ich_spi_read_page: offset=1729024, number=256, buf=0xb7863208
ich_spi_read_page: offset=1729280, number=256, buf=0xb7863308
ich_spi_read_page: offset=1729536, number=256, buf=0xb7863408
ich_spi_read_page: offset=1729792, number=256, buf=0xb7863508
ich_spi_read_page: offset=1730048, number=256, buf=0xb7863608
ich_spi_read_page: offset=1730304, number=256, buf=0xb7863708
ich_spi_read_page: offset=1730560, number=256, buf=0xb7863808
ich_spi_read_page: offset=1730816, number=256, buf=0xb7863908
ich_spi_read_page: offset=1731072, number=256, buf=0xb7863a08
ich_spi_read_page: offset=1731328, number=256, buf=0xb7863b08
ich_spi_read_page: offset=1731584, number=256, buf=0xb7863c08
ich_spi_read_page: offset=1731840, number=256, buf=0xb7863d08
ich_spi_read_page: offset=1732096, number=256, buf=0xb7863e08
ich_spi_read_page: offset=1732352, number=256, buf=0xb7863f08
ich_spi_read_page: offset=1732608, number=256, buf=0xb7864008
ich_spi_read_page: offset=1732864, number=256, buf=0xb7864108
ich_spi_read_page: offset=1733120, number=256, buf=0xb7864208
ich_spi_read_page: offset=1733376, number=256, buf=0xb7864308
ich_spi_read_page: offset=1733632, number=256, buf=0xb7864408
ich_spi_read_page: offset=1733888, number=256, buf=0xb7864508
ich_spi_read_page: offset=1734144, number=256, buf=0xb7864608
ich_spi_read_page: offset=1734400, number=256, buf=0xb7864708
ich_spi_read_page: offset=1734656, number=256, buf=0xb7864808
ich_spi_read_page: offset=1734912, number=256, buf=0xb7864908
ich_spi_read_page: offset=1735168, number=256, buf=0xb7864a08
ich_spi_read_page: offset=1735424, number=256, buf=0xb7864b08
ich_spi_read_page: offset=1735680, number=256, buf=0xb7864c08
ich_spi_read_page: offset=1735936, number=256, buf=0xb7864d08
ich_spi_read_page: offset=1736192, number=256, buf=0xb7864e08
ich_spi_read_page: offset=1736448, number=256, buf=0xb7864f08
ich_spi_read_page: offset=1736704, number=256, buf=0xb7865008
ich_spi_read_page: offset=1736960, number=256, buf=0xb7865108
ich_spi_read_page: offset=1737216, number=256, buf=0xb7865208
ich_spi_read_page: offset=1737472, number=256, buf=0xb7865308
ich_spi_read_page: offset=1737728, number=256, buf=0xb7865408
ich_spi_read_page: offset=1737984, number=256, buf=0xb7865508
ich_spi_read_page: offset=1738240, number=256, buf=0xb7865608
ich_spi_read_page: offset=1738496, number=256, buf=0xb7865708
ich_spi_read_page: offset=1738752, number=256, buf=0xb7865808
ich_spi_read_page: offset=1739008, number=256, buf=0xb7865908
ich_spi_read_page: offset=1739264, number=256, buf=0xb7865a08
ich_spi_read_page: offset=1739520, number=256, buf=0xb7865b08
ich_spi_read_page: offset=1739776, number=256, buf=0xb7865c08
ich_spi_read_page: offset=1740032, number=256, buf=0xb7865d08
ich_spi_read_page: offset=1740288, number=256, buf=0xb7865e08
ich_spi_read_page: offset=1740544, number=256, buf=0xb7865f08
ich_spi_read_page: offset=1740800, number=256, buf=0xb7866008
ich_spi_read_page: offset=1741056, number=256, buf=0xb7866108
ich_spi_read_page: offset=1741312, number=256, buf=0xb7866208
ich_spi_read_page: offset=1741568, number=256, buf=0xb7866308
ich_spi_read_page: offset=1741824, number=256, buf=0xb7866408
ich_spi_read_page: offset=1742080, number=256, buf=0xb7866508
ich_spi_read_page: offset=1742336, number=256, buf=0xb7866608
ich_spi_read_page: offset=1742592, number=256, buf=0xb7866708
ich_spi_read_page: offset=1742848, number=256, buf=0xb7866808
ich_spi_read_page: offset=1743104, number=256, buf=0xb7866908
ich_spi_read_page: offset=1743360, number=256, buf=0xb7866a08
ich_spi_read_page: offset=1743616, number=256, buf=0xb7866b08
ich_spi_read_page: offset=1743872, number=256, buf=0xb7866c08
ich_spi_read_page: offset=1744128, number=256, buf=0xb7866d08
ich_spi_read_page: offset=1744384, number=256, buf=0xb7866e08
ich_spi_read_page: offset=1744640, number=256, buf=0xb7866f08
ich_spi_read_page: offset=1744896, number=256, buf=0xb7867008
ich_spi_read_page: offset=1745152, number=256, buf=0xb7867108
ich_spi_read_page: offset=1745408, number=256, buf=0xb7867208
ich_spi_read_page: offset=1745664, number=256, buf=0xb7867308
ich_spi_read_page: offset=1745920, number=256, buf=0xb7867408
ich_spi_read_page: offset=1746176, number=256, buf=0xb7867508
ich_spi_read_page: offset=1746432, number=256, buf=0xb7867608
ich_spi_read_page: offset=1746688, number=256, buf=0xb7867708
ich_spi_read_page: offset=1746944, number=256, buf=0xb7867808
ich_spi_read_page: offset=1747200, number=256, buf=0xb7867908
ich_spi_read_page: offset=1747456, number=256, buf=0xb7867a08
ich_spi_read_page: offset=1747712, number=256, buf=0xb7867b08
ich_spi_read_page: offset=1747968, number=256, buf=0xb7867c08
ich_spi_read_page: offset=1748224, number=256, buf=0xb7867d08
ich_spi_read_page: offset=1748480, number=256, buf=0xb7867e08
ich_spi_read_page: offset=1748736, number=256, buf=0xb7867f08
ich_spi_read_page: offset=1748992, number=256, buf=0xb7868008
ich_spi_read_page: offset=1749248, number=256, buf=0xb7868108
ich_spi_read_page: offset=1749504, number=256, buf=0xb7868208
ich_spi_read_page: offset=1749760, number=256, buf=0xb7868308
ich_spi_read_page: offset=1750016, number=256, buf=0xb7868408
ich_spi_read_page: offset=1750272, number=256, buf=0xb7868508
ich_spi_read_page: offset=1750528, number=256, buf=0xb7868608
ich_spi_read_page: offset=1750784, number=256, buf=0xb7868708
ich_spi_read_page: offset=1751040, number=256, buf=0xb7868808
ich_spi_read_page: offset=1751296, number=256, buf=0xb7868908
ich_spi_read_page: offset=1751552, number=256, buf=0xb7868a08
ich_spi_read_page: offset=1751808, number=256, buf=0xb7868b08
ich_spi_read_page: offset=1752064, number=256, buf=0xb7868c08
ich_spi_read_page: offset=1752320, number=256, buf=0xb7868d08
ich_spi_read_page: offset=1752576, number=256, buf=0xb7868e08
ich_spi_read_page: offset=1752832, number=256, buf=0xb7868f08
ich_spi_read_page: offset=1753088, number=256, buf=0xb7869008
ich_spi_read_page: offset=1753344, number=256, buf=0xb7869108
ich_spi_read_page: offset=1753600, number=256, buf=0xb7869208
ich_spi_read_page: offset=1753856, number=256, buf=0xb7869308
ich_spi_read_page: offset=1754112, number=256, buf=0xb7869408
ich_spi_read_page: offset=1754368, number=256, buf=0xb7869508
ich_spi_read_page: offset=1754624, number=256, buf=0xb7869608
ich_spi_read_page: offset=1754880, number=256, buf=0xb7869708
ich_spi_read_page: offset=1755136, number=256, buf=0xb7869808
ich_spi_read_page: offset=1755392, number=256, buf=0xb7869908
ich_spi_read_page: offset=1755648, number=256, buf=0xb7869a08
ich_spi_read_page: offset=1755904, number=256, buf=0xb7869b08
ich_spi_read_page: offset=1756160, number=256, buf=0xb7869c08
ich_spi_read_page: offset=1756416, number=256, buf=0xb7869d08
ich_spi_read_page: offset=1756672, number=256, buf=0xb7869e08
ich_spi_read_page: offset=1756928, number=256, buf=0xb7869f08
ich_spi_read_page: offset=1757184, number=256, buf=0xb786a008
ich_spi_read_page: offset=1757440, number=256, buf=0xb786a108
ich_spi_read_page: offset=1757696, number=256, buf=0xb786a208
ich_spi_read_page: offset=1757952, number=256, buf=0xb786a308
ich_spi_read_page: offset=1758208, number=256, buf=0xb786a408
ich_spi_read_page: offset=1758464, number=256, buf=0xb786a508
ich_spi_read_page: offset=1758720, number=256, buf=0xb786a608
ich_spi_read_page: offset=1758976, number=256, buf=0xb786a708
ich_spi_read_page: offset=1759232, number=256, buf=0xb786a808
ich_spi_read_page: offset=1759488, number=256, buf=0xb786a908
ich_spi_read_page: offset=1759744, number=256, buf=0xb786aa08
ich_spi_read_page: offset=1760000, number=256, buf=0xb786ab08
ich_spi_read_page: offset=1760256, number=256, buf=0xb786ac08
ich_spi_read_page: offset=1760512, number=256, buf=0xb786ad08
ich_spi_read_page: offset=1760768, number=256, buf=0xb786ae08
ich_spi_read_page: offset=1761024, number=256, buf=0xb786af08
ich_spi_read_page: offset=1761280, number=256, buf=0xb786b008
ich_spi_read_page: offset=1761536, number=256, buf=0xb786b108
ich_spi_read_page: offset=1761792, number=256, buf=0xb786b208
ich_spi_read_page: offset=1762048, number=256, buf=0xb786b308
ich_spi_read_page: offset=1762304, number=256, buf=0xb786b408
ich_spi_read_page: offset=1762560, number=256, buf=0xb786b508
ich_spi_read_page: offset=1762816, number=256, buf=0xb786b608
ich_spi_read_page: offset=1763072, number=256, buf=0xb786b708
ich_spi_read_page: offset=1763328, number=256, buf=0xb786b808
ich_spi_read_page: offset=1763584, number=256, buf=0xb786b908
ich_spi_read_page: offset=1763840, number=256, buf=0xb786ba08
ich_spi_read_page: offset=1764096, number=256, buf=0xb786bb08
ich_spi_read_page: offset=1764352, number=256, buf=0xb786bc08
ich_spi_read_page: offset=1764608, number=256, buf=0xb786bd08
ich_spi_read_page: offset=1764864, number=256, buf=0xb786be08
ich_spi_read_page: offset=1765120, number=256, buf=0xb786bf08
ich_spi_read_page: offset=1765376, number=256, buf=0xb786c008
ich_spi_read_page: offset=1765632, number=256, buf=0xb786c108
ich_spi_read_page: offset=1765888, number=256, buf=0xb786c208
ich_spi_read_page: offset=1766144, number=256, buf=0xb786c308
ich_spi_read_page: offset=1766400, number=256, buf=0xb786c408
ich_spi_read_page: offset=1766656, number=256, buf=0xb786c508
ich_spi_read_page: offset=1766912, number=256, buf=0xb786c608
ich_spi_read_page: offset=1767168, number=256, buf=0xb786c708
ich_spi_read_page: offset=1767424, number=256, buf=0xb786c808
ich_spi_read_page: offset=1767680, number=256, buf=0xb786c908
ich_spi_read_page: offset=1767936, number=256, buf=0xb786ca08
ich_spi_read_page: offset=1768192, number=256, buf=0xb786cb08
ich_spi_read_page: offset=1768448, number=256, buf=0xb786cc08
ich_spi_read_page: offset=1768704, number=256, buf=0xb786cd08
ich_spi_read_page: offset=1768960, number=256, buf=0xb786ce08
ich_spi_read_page: offset=1769216, number=256, buf=0xb786cf08
ich_spi_read_page: offset=1769472, number=256, buf=0xb786d008
ich_spi_read_page: offset=1769728, number=256, buf=0xb786d108
ich_spi_read_page: offset=1769984, number=256, buf=0xb786d208
ich_spi_read_page: offset=1770240, number=256, buf=0xb786d308
ich_spi_read_page: offset=1770496, number=256, buf=0xb786d408
ich_spi_read_page: offset=1770752, number=256, buf=0xb786d508
ich_spi_read_page: offset=1771008, number=256, buf=0xb786d608
ich_spi_read_page: offset=1771264, number=256, buf=0xb786d708
ich_spi_read_page: offset=1771520, number=256, buf=0xb786d808
ich_spi_read_page: offset=1771776, number=256, buf=0xb786d908
ich_spi_read_page: offset=1772032, number=256, buf=0xb786da08
ich_spi_read_page: offset=1772288, number=256, buf=0xb786db08
ich_spi_read_page: offset=1772544, number=256, buf=0xb786dc08
ich_spi_read_page: offset=1772800, number=256, buf=0xb786dd08
ich_spi_read_page: offset=1773056, number=256, buf=0xb786de08
ich_spi_read_page: offset=1773312, number=256, buf=0xb786df08
ich_spi_read_page: offset=1773568, number=256, buf=0xb786e008
ich_spi_read_page: offset=1773824, number=256, buf=0xb786e108
ich_spi_read_page: offset=1774080, number=256, buf=0xb786e208
ich_spi_read_page: offset=1774336, number=256, buf=0xb786e308
ich_spi_read_page: offset=1774592, number=256, buf=0xb786e408
ich_spi_read_page: offset=1774848, number=256, buf=0xb786e508
ich_spi_read_page: offset=1775104, number=256, buf=0xb786e608
ich_spi_read_page: offset=1775360, number=256, buf=0xb786e708
ich_spi_read_page: offset=1775616, number=256, buf=0xb786e808
ich_spi_read_page: offset=1775872, number=256, buf=0xb786e908
ich_spi_read_page: offset=1776128, number=256, buf=0xb786ea08
ich_spi_read_page: offset=1776384, number=256, buf=0xb786eb08
ich_spi_read_page: offset=1776640, number=256, buf=0xb786ec08
ich_spi_read_page: offset=1776896, number=256, buf=0xb786ed08
ich_spi_read_page: offset=1777152, number=256, buf=0xb786ee08
ich_spi_read_page: offset=1777408, number=256, buf=0xb786ef08
ich_spi_read_page: offset=1777664, number=256, buf=0xb786f008
ich_spi_read_page: offset=1777920, number=256, buf=0xb786f108
ich_spi_read_page: offset=1778176, number=256, buf=0xb786f208
ich_spi_read_page: offset=1778432, number=256, buf=0xb786f308
ich_spi_read_page: offset=1778688, number=256, buf=0xb786f408
ich_spi_read_page: offset=1778944, number=256, buf=0xb786f508
ich_spi_read_page: offset=1779200, number=256, buf=0xb786f608
ich_spi_read_page: offset=1779456, number=256, buf=0xb786f708
ich_spi_read_page: offset=1779712, number=256, buf=0xb786f808
ich_spi_read_page: offset=1779968, number=256, buf=0xb786f908
ich_spi_read_page: offset=1780224, number=256, buf=0xb786fa08
ich_spi_read_page: offset=1780480, number=256, buf=0xb786fb08
ich_spi_read_page: offset=1780736, number=256, buf=0xb786fc08
ich_spi_read_page: offset=1780992, number=256, buf=0xb786fd08
ich_spi_read_page: offset=1781248, number=256, buf=0xb786fe08
ich_spi_read_page: offset=1781504, number=256, buf=0xb786ff08
ich_spi_read_page: offset=1781760, number=256, buf=0xb7870008
ich_spi_read_page: offset=1782016, number=256, buf=0xb7870108
ich_spi_read_page: offset=1782272, number=256, buf=0xb7870208
ich_spi_read_page: offset=1782528, number=256, buf=0xb7870308
ich_spi_read_page: offset=1782784, number=256, buf=0xb7870408
ich_spi_read_page: offset=1783040, number=256, buf=0xb7870508
ich_spi_read_page: offset=1783296, number=256, buf=0xb7870608
ich_spi_read_page: offset=1783552, number=256, buf=0xb7870708
ich_spi_read_page: offset=1783808, number=256, buf=0xb7870808
ich_spi_read_page: offset=1784064, number=256, buf=0xb7870908
ich_spi_read_page: offset=1784320, number=256, buf=0xb7870a08
ich_spi_read_page: offset=1784576, number=256, buf=0xb7870b08
ich_spi_read_page: offset=1784832, number=256, buf=0xb7870c08
ich_spi_read_page: offset=1785088, number=256, buf=0xb7870d08
ich_spi_read_page: offset=1785344, number=256, buf=0xb7870e08
ich_spi_read_page: offset=1785600, number=256, buf=0xb7870f08
ich_spi_read_page: offset=1785856, number=256, buf=0xb7871008
ich_spi_read_page: offset=1786112, number=256, buf=0xb7871108
ich_spi_read_page: offset=1786368, number=256, buf=0xb7871208
ich_spi_read_page: offset=1786624, number=256, buf=0xb7871308
ich_spi_read_page: offset=1786880, number=256, buf=0xb7871408
ich_spi_read_page: offset=1787136, number=256, buf=0xb7871508
ich_spi_read_page: offset=1787392, number=256, buf=0xb7871608
ich_spi_read_page: offset=1787648, number=256, buf=0xb7871708
ich_spi_read_page: offset=1787904, number=256, buf=0xb7871808
ich_spi_read_page: offset=1788160, number=256, buf=0xb7871908
ich_spi_read_page: offset=1788416, number=256, buf=0xb7871a08
ich_spi_read_page: offset=1788672, number=256, buf=0xb7871b08
ich_spi_read_page: offset=1788928, number=256, buf=0xb7871c08
ich_spi_read_page: offset=1789184, number=256, buf=0xb7871d08
ich_spi_read_page: offset=1789440, number=256, buf=0xb7871e08
ich_spi_read_page: offset=1789696, number=256, buf=0xb7871f08
ich_spi_read_page: offset=1789952, number=256, buf=0xb7872008
ich_spi_read_page: offset=1790208, number=256, buf=0xb7872108
ich_spi_read_page: offset=1790464, number=256, buf=0xb7872208
ich_spi_read_page: offset=1790720, number=256, buf=0xb7872308
ich_spi_read_page: offset=1790976, number=256, buf=0xb7872408
ich_spi_read_page: offset=1791232, number=256, buf=0xb7872508
ich_spi_read_page: offset=1791488, number=256, buf=0xb7872608
ich_spi_read_page: offset=1791744, number=256, buf=0xb7872708
ich_spi_read_page: offset=1792000, number=256, buf=0xb7872808
ich_spi_read_page: offset=1792256, number=256, buf=0xb7872908
ich_spi_read_page: offset=1792512, number=256, buf=0xb7872a08
ich_spi_read_page: offset=1792768, number=256, buf=0xb7872b08
ich_spi_read_page: offset=1793024, number=256, buf=0xb7872c08
ich_spi_read_page: offset=1793280, number=256, buf=0xb7872d08
ich_spi_read_page: offset=1793536, number=256, buf=0xb7872e08
ich_spi_read_page: offset=1793792, number=256, buf=0xb7872f08
ich_spi_read_page: offset=1794048, number=256, buf=0xb7873008
ich_spi_read_page: offset=1794304, number=256, buf=0xb7873108
ich_spi_read_page: offset=1794560, number=256, buf=0xb7873208
ich_spi_read_page: offset=1794816, number=256, buf=0xb7873308
ich_spi_read_page: offset=1795072, number=256, buf=0xb7873408
ich_spi_read_page: offset=1795328, number=256, buf=0xb7873508
ich_spi_read_page: offset=1795584, number=256, buf=0xb7873608
ich_spi_read_page: offset=1795840, number=256, buf=0xb7873708
ich_spi_read_page: offset=1796096, number=256, buf=0xb7873808
ich_spi_read_page: offset=1796352, number=256, buf=0xb7873908
ich_spi_read_page: offset=1796608, number=256, buf=0xb7873a08
ich_spi_read_page: offset=1796864, number=256, buf=0xb7873b08
ich_spi_read_page: offset=1797120, number=256, buf=0xb7873c08
ich_spi_read_page: offset=1797376, number=256, buf=0xb7873d08
ich_spi_read_page: offset=1797632, number=256, buf=0xb7873e08
ich_spi_read_page: offset=1797888, number=256, buf=0xb7873f08
ich_spi_read_page: offset=1798144, number=256, buf=0xb7874008
ich_spi_read_page: offset=1798400, number=256, buf=0xb7874108
ich_spi_read_page: offset=1798656, number=256, buf=0xb7874208
ich_spi_read_page: offset=1798912, number=256, buf=0xb7874308
ich_spi_read_page: offset=1799168, number=256, buf=0xb7874408
ich_spi_read_page: offset=1799424, number=256, buf=0xb7874508
ich_spi_read_page: offset=1799680, number=256, buf=0xb7874608
ich_spi_read_page: offset=1799936, number=256, buf=0xb7874708
ich_spi_read_page: offset=1800192, number=256, buf=0xb7874808
ich_spi_read_page: offset=1800448, number=256, buf=0xb7874908
ich_spi_read_page: offset=1800704, number=256, buf=0xb7874a08
ich_spi_read_page: offset=1800960, number=256, buf=0xb7874b08
ich_spi_read_page: offset=1801216, number=256, buf=0xb7874c08
ich_spi_read_page: offset=1801472, number=256, buf=0xb7874d08
ich_spi_read_page: offset=1801728, number=256, buf=0xb7874e08
ich_spi_read_page: offset=1801984, number=256, buf=0xb7874f08
ich_spi_read_page: offset=1802240, number=256, buf=0xb7875008
ich_spi_read_page: offset=1802496, number=256, buf=0xb7875108
ich_spi_read_page: offset=1802752, number=256, buf=0xb7875208
ich_spi_read_page: offset=1803008, number=256, buf=0xb7875308
ich_spi_read_page: offset=1803264, number=256, buf=0xb7875408
ich_spi_read_page: offset=1803520, number=256, buf=0xb7875508
ich_spi_read_page: offset=1803776, number=256, buf=0xb7875608
ich_spi_read_page: offset=1804032, number=256, buf=0xb7875708
ich_spi_read_page: offset=1804288, number=256, buf=0xb7875808
ich_spi_read_page: offset=1804544, number=256, buf=0xb7875908
ich_spi_read_page: offset=1804800, number=256, buf=0xb7875a08
ich_spi_read_page: offset=1805056, number=256, buf=0xb7875b08
ich_spi_read_page: offset=1805312, number=256, buf=0xb7875c08
ich_spi_read_page: offset=1805568, number=256, buf=0xb7875d08
ich_spi_read_page: offset=1805824, number=256, buf=0xb7875e08
ich_spi_read_page: offset=1806080, number=256, buf=0xb7875f08
ich_spi_read_page: offset=1806336, number=256, buf=0xb7876008
ich_spi_read_page: offset=1806592, number=256, buf=0xb7876108
ich_spi_read_page: offset=1806848, number=256, buf=0xb7876208
ich_spi_read_page: offset=1807104, number=256, buf=0xb7876308
ich_spi_read_page: offset=1807360, number=256, buf=0xb7876408
ich_spi_read_page: offset=1807616, number=256, buf=0xb7876508
ich_spi_read_page: offset=1807872, number=256, buf=0xb7876608
ich_spi_read_page: offset=1808128, number=256, buf=0xb7876708
ich_spi_read_page: offset=1808384, number=256, buf=0xb7876808
ich_spi_read_page: offset=1808640, number=256, buf=0xb7876908
ich_spi_read_page: offset=1808896, number=256, buf=0xb7876a08
ich_spi_read_page: offset=1809152, number=256, buf=0xb7876b08
ich_spi_read_page: offset=1809408, number=256, buf=0xb7876c08
ich_spi_read_page: offset=1809664, number=256, buf=0xb7876d08
ich_spi_read_page: offset=1809920, number=256, buf=0xb7876e08
ich_spi_read_page: offset=1810176, number=256, buf=0xb7876f08
ich_spi_read_page: offset=1810432, number=256, buf=0xb7877008
ich_spi_read_page: offset=1810688, number=256, buf=0xb7877108
ich_spi_read_page: offset=1810944, number=256, buf=0xb7877208
ich_spi_read_page: offset=1811200, number=256, buf=0xb7877308
ich_spi_read_page: offset=1811456, number=256, buf=0xb7877408
ich_spi_read_page: offset=1811712, number=256, buf=0xb7877508
ich_spi_read_page: offset=1811968, number=256, buf=0xb7877608
ich_spi_read_page: offset=1812224, number=256, buf=0xb7877708
ich_spi_read_page: offset=1812480, number=256, buf=0xb7877808
ich_spi_read_page: offset=1812736, number=256, buf=0xb7877908
ich_spi_read_page: offset=1812992, number=256, buf=0xb7877a08
ich_spi_read_page: offset=1813248, number=256, buf=0xb7877b08
ich_spi_read_page: offset=1813504, number=256, buf=0xb7877c08
ich_spi_read_page: offset=1813760, number=256, buf=0xb7877d08
ich_spi_read_page: offset=1814016, number=256, buf=0xb7877e08
ich_spi_read_page: offset=1814272, number=256, buf=0xb7877f08
ich_spi_read_page: offset=1814528, number=256, buf=0xb7878008
ich_spi_read_page: offset=1814784, number=256, buf=0xb7878108
ich_spi_read_page: offset=1815040, number=256, buf=0xb7878208
ich_spi_read_page: offset=1815296, number=256, buf=0xb7878308
ich_spi_read_page: offset=1815552, number=256, buf=0xb7878408
ich_spi_read_page: offset=1815808, number=256, buf=0xb7878508
ich_spi_read_page: offset=1816064, number=256, buf=0xb7878608
ich_spi_read_page: offset=1816320, number=256, buf=0xb7878708
ich_spi_read_page: offset=1816576, number=256, buf=0xb7878808
ich_spi_read_page: offset=1816832, number=256, buf=0xb7878908
ich_spi_read_page: offset=1817088, number=256, buf=0xb7878a08
ich_spi_read_page: offset=1817344, number=256, buf=0xb7878b08
ich_spi_read_page: offset=1817600, number=256, buf=0xb7878c08
ich_spi_read_page: offset=1817856, number=256, buf=0xb7878d08
ich_spi_read_page: offset=1818112, number=256, buf=0xb7878e08
ich_spi_read_page: offset=1818368, number=256, buf=0xb7878f08
ich_spi_read_page: offset=1818624, number=256, buf=0xb7879008
ich_spi_read_page: offset=1818880, number=256, buf=0xb7879108
ich_spi_read_page: offset=1819136, number=256, buf=0xb7879208
ich_spi_read_page: offset=1819392, number=256, buf=0xb7879308
ich_spi_read_page: offset=1819648, number=256, buf=0xb7879408
ich_spi_read_page: offset=1819904, number=256, buf=0xb7879508
ich_spi_read_page: offset=1820160, number=256, buf=0xb7879608
ich_spi_read_page: offset=1820416, number=256, buf=0xb7879708
ich_spi_read_page: offset=1820672, number=256, buf=0xb7879808
ich_spi_read_page: offset=1820928, number=256, buf=0xb7879908
ich_spi_read_page: offset=1821184, number=256, buf=0xb7879a08
ich_spi_read_page: offset=1821440, number=256, buf=0xb7879b08
ich_spi_read_page: offset=1821696, number=256, buf=0xb7879c08
ich_spi_read_page: offset=1821952, number=256, buf=0xb7879d08
ich_spi_read_page: offset=1822208, number=256, buf=0xb7879e08
ich_spi_read_page: offset=1822464, number=256, buf=0xb7879f08
ich_spi_read_page: offset=1822720, number=256, buf=0xb787a008
ich_spi_read_page: offset=1822976, number=256, buf=0xb787a108
ich_spi_read_page: offset=1823232, number=256, buf=0xb787a208
ich_spi_read_page: offset=1823488, number=256, buf=0xb787a308
ich_spi_read_page: offset=1823744, number=256, buf=0xb787a408
ich_spi_read_page: offset=1824000, number=256, buf=0xb787a508
ich_spi_read_page: offset=1824256, number=256, buf=0xb787a608
ich_spi_read_page: offset=1824512, number=256, buf=0xb787a708
ich_spi_read_page: offset=1824768, number=256, buf=0xb787a808
ich_spi_read_page: offset=1825024, number=256, buf=0xb787a908
ich_spi_read_page: offset=1825280, number=256, buf=0xb787aa08
ich_spi_read_page: offset=1825536, number=256, buf=0xb787ab08
ich_spi_read_page: offset=1825792, number=256, buf=0xb787ac08
ich_spi_read_page: offset=1826048, number=256, buf=0xb787ad08
ich_spi_read_page: offset=1826304, number=256, buf=0xb787ae08
ich_spi_read_page: offset=1826560, number=256, buf=0xb787af08
ich_spi_read_page: offset=1826816, number=256, buf=0xb787b008
ich_spi_read_page: offset=1827072, number=256, buf=0xb787b108
ich_spi_read_page: offset=1827328, number=256, buf=0xb787b208
ich_spi_read_page: offset=1827584, number=256, buf=0xb787b308
ich_spi_read_page: offset=1827840, number=256, buf=0xb787b408
ich_spi_read_page: offset=1828096, number=256, buf=0xb787b508
ich_spi_read_page: offset=1828352, number=256, buf=0xb787b608
ich_spi_read_page: offset=1828608, number=256, buf=0xb787b708
ich_spi_read_page: offset=1828864, number=256, buf=0xb787b808
ich_spi_read_page: offset=1829120, number=256, buf=0xb787b908
ich_spi_read_page: offset=1829376, number=256, buf=0xb787ba08
ich_spi_read_page: offset=1829632, number=256, buf=0xb787bb08
ich_spi_read_page: offset=1829888, number=256, buf=0xb787bc08
ich_spi_read_page: offset=1830144, number=256, buf=0xb787bd08
ich_spi_read_page: offset=1830400, number=256, buf=0xb787be08
ich_spi_read_page: offset=1830656, number=256, buf=0xb787bf08
ich_spi_read_page: offset=1830912, number=256, buf=0xb787c008
ich_spi_read_page: offset=1831168, number=256, buf=0xb787c108
ich_spi_read_page: offset=1831424, number=256, buf=0xb787c208
ich_spi_read_page: offset=1831680, number=256, buf=0xb787c308
ich_spi_read_page: offset=1831936, number=256, buf=0xb787c408
ich_spi_read_page: offset=1832192, number=256, buf=0xb787c508
ich_spi_read_page: offset=1832448, number=256, buf=0xb787c608
ich_spi_read_page: offset=1832704, number=256, buf=0xb787c708
ich_spi_read_page: offset=1832960, number=256, buf=0xb787c808
ich_spi_read_page: offset=1833216, number=256, buf=0xb787c908
ich_spi_read_page: offset=1833472, number=256, buf=0xb787ca08
ich_spi_read_page: offset=1833728, number=256, buf=0xb787cb08
ich_spi_read_page: offset=1833984, number=256, buf=0xb787cc08
ich_spi_read_page: offset=1834240, number=256, buf=0xb787cd08
ich_spi_read_page: offset=1834496, number=256, buf=0xb787ce08
ich_spi_read_page: offset=1834752, number=256, buf=0xb787cf08
ich_spi_read_page: offset=1835008, number=256, buf=0xb787d008
ich_spi_read_page: offset=1835264, number=256, buf=0xb787d108
ich_spi_read_page: offset=1835520, number=256, buf=0xb787d208
ich_spi_read_page: offset=1835776, number=256, buf=0xb787d308
ich_spi_read_page: offset=1836032, number=256, buf=0xb787d408
ich_spi_read_page: offset=1836288, number=256, buf=0xb787d508
ich_spi_read_page: offset=1836544, number=256, buf=0xb787d608
ich_spi_read_page: offset=1836800, number=256, buf=0xb787d708
ich_spi_read_page: offset=1837056, number=256, buf=0xb787d808
ich_spi_read_page: offset=1837312, number=256, buf=0xb787d908
ich_spi_read_page: offset=1837568, number=256, buf=0xb787da08
ich_spi_read_page: offset=1837824, number=256, buf=0xb787db08
ich_spi_read_page: offset=1838080, number=256, buf=0xb787dc08
ich_spi_read_page: offset=1838336, number=256, buf=0xb787dd08
ich_spi_read_page: offset=1838592, number=256, buf=0xb787de08
ich_spi_read_page: offset=1838848, number=256, buf=0xb787df08
ich_spi_read_page: offset=1839104, number=256, buf=0xb787e008
ich_spi_read_page: offset=1839360, number=256, buf=0xb787e108
ich_spi_read_page: offset=1839616, number=256, buf=0xb787e208
ich_spi_read_page: offset=1839872, number=256, buf=0xb787e308
ich_spi_read_page: offset=1840128, number=256, buf=0xb787e408
ich_spi_read_page: offset=1840384, number=256, buf=0xb787e508
ich_spi_read_page: offset=1840640, number=256, buf=0xb787e608
ich_spi_read_page: offset=1840896, number=256, buf=0xb787e708
ich_spi_read_page: offset=1841152, number=256, buf=0xb787e808
ich_spi_read_page: offset=1841408, number=256, buf=0xb787e908
ich_spi_read_page: offset=1841664, number=256, buf=0xb787ea08
ich_spi_read_page: offset=1841920, number=256, buf=0xb787eb08
ich_spi_read_page: offset=1842176, number=256, buf=0xb787ec08
ich_spi_read_page: offset=1842432, number=256, buf=0xb787ed08
ich_spi_read_page: offset=1842688, number=256, buf=0xb787ee08
ich_spi_read_page: offset=1842944, number=256, buf=0xb787ef08
ich_spi_read_page: offset=1843200, number=256, buf=0xb787f008
ich_spi_read_page: offset=1843456, number=256, buf=0xb787f108
ich_spi_read_page: offset=1843712, number=256, buf=0xb787f208
ich_spi_read_page: offset=1843968, number=256, buf=0xb787f308
ich_spi_read_page: offset=1844224, number=256, buf=0xb787f408
ich_spi_read_page: offset=1844480, number=256, buf=0xb787f508
ich_spi_read_page: offset=1844736, number=256, buf=0xb787f608
ich_spi_read_page: offset=1844992, number=256, buf=0xb787f708
ich_spi_read_page: offset=1845248, number=256, buf=0xb787f808
ich_spi_read_page: offset=1845504, number=256, buf=0xb787f908
ich_spi_read_page: offset=1845760, number=256, buf=0xb787fa08
ich_spi_read_page: offset=1846016, number=256, buf=0xb787fb08
ich_spi_read_page: offset=1846272, number=256, buf=0xb787fc08
ich_spi_read_page: offset=1846528, number=256, buf=0xb787fd08
ich_spi_read_page: offset=1846784, number=256, buf=0xb787fe08
ich_spi_read_page: offset=1847040, number=256, buf=0xb787ff08
ich_spi_read_page: offset=1847296, number=256, buf=0xb7880008
ich_spi_read_page: offset=1847552, number=256, buf=0xb7880108
ich_spi_read_page: offset=1847808, number=256, buf=0xb7880208
ich_spi_read_page: offset=1848064, number=256, buf=0xb7880308
ich_spi_read_page: offset=1848320, number=256, buf=0xb7880408
ich_spi_read_page: offset=1848576, number=256, buf=0xb7880508
ich_spi_read_page: offset=1848832, number=256, buf=0xb7880608
ich_spi_read_page: offset=1849088, number=256, buf=0xb7880708
ich_spi_read_page: offset=1849344, number=256, buf=0xb7880808
ich_spi_read_page: offset=1849600, number=256, buf=0xb7880908
ich_spi_read_page: offset=1849856, number=256, buf=0xb7880a08
ich_spi_read_page: offset=1850112, number=256, buf=0xb7880b08
ich_spi_read_page: offset=1850368, number=256, buf=0xb7880c08
ich_spi_read_page: offset=1850624, number=256, buf=0xb7880d08
ich_spi_read_page: offset=1850880, number=256, buf=0xb7880e08
ich_spi_read_page: offset=1851136, number=256, buf=0xb7880f08
ich_spi_read_page: offset=1851392, number=256, buf=0xb7881008
ich_spi_read_page: offset=1851648, number=256, buf=0xb7881108
ich_spi_read_page: offset=1851904, number=256, buf=0xb7881208
ich_spi_read_page: offset=1852160, number=256, buf=0xb7881308
ich_spi_read_page: offset=1852416, number=256, buf=0xb7881408
ich_spi_read_page: offset=1852672, number=256, buf=0xb7881508
ich_spi_read_page: offset=1852928, number=256, buf=0xb7881608
ich_spi_read_page: offset=1853184, number=256, buf=0xb7881708
ich_spi_read_page: offset=1853440, number=256, buf=0xb7881808
ich_spi_read_page: offset=1853696, number=256, buf=0xb7881908
ich_spi_read_page: offset=1853952, number=256, buf=0xb7881a08
ich_spi_read_page: offset=1854208, number=256, buf=0xb7881b08
ich_spi_read_page: offset=1854464, number=256, buf=0xb7881c08
ich_spi_read_page: offset=1854720, number=256, buf=0xb7881d08
ich_spi_read_page: offset=1854976, number=256, buf=0xb7881e08
ich_spi_read_page: offset=1855232, number=256, buf=0xb7881f08
ich_spi_read_page: offset=1855488, number=256, buf=0xb7882008
ich_spi_read_page: offset=1855744, number=256, buf=0xb7882108
ich_spi_read_page: offset=1856000, number=256, buf=0xb7882208
ich_spi_read_page: offset=1856256, number=256, buf=0xb7882308
ich_spi_read_page: offset=1856512, number=256, buf=0xb7882408
ich_spi_read_page: offset=1856768, number=256, buf=0xb7882508
ich_spi_read_page: offset=1857024, number=256, buf=0xb7882608
ich_spi_read_page: offset=1857280, number=256, buf=0xb7882708
ich_spi_read_page: offset=1857536, number=256, buf=0xb7882808
ich_spi_read_page: offset=1857792, number=256, buf=0xb7882908
ich_spi_read_page: offset=1858048, number=256, buf=0xb7882a08
ich_spi_read_page: offset=1858304, number=256, buf=0xb7882b08
ich_spi_read_page: offset=1858560, number=256, buf=0xb7882c08
ich_spi_read_page: offset=1858816, number=256, buf=0xb7882d08
ich_spi_read_page: offset=1859072, number=256, buf=0xb7882e08
ich_spi_read_page: offset=1859328, number=256, buf=0xb7882f08
ich_spi_read_page: offset=1859584, number=256, buf=0xb7883008
ich_spi_read_page: offset=1859840, number=256, buf=0xb7883108
ich_spi_read_page: offset=1860096, number=256, buf=0xb7883208
ich_spi_read_page: offset=1860352, number=256, buf=0xb7883308
ich_spi_read_page: offset=1860608, number=256, buf=0xb7883408
ich_spi_read_page: offset=1860864, number=256, buf=0xb7883508
ich_spi_read_page: offset=1861120, number=256, buf=0xb7883608
ich_spi_read_page: offset=1861376, number=256, buf=0xb7883708
ich_spi_read_page: offset=1861632, number=256, buf=0xb7883808
ich_spi_read_page: offset=1861888, number=256, buf=0xb7883908
ich_spi_read_page: offset=1862144, number=256, buf=0xb7883a08
ich_spi_read_page: offset=1862400, number=256, buf=0xb7883b08
ich_spi_read_page: offset=1862656, number=256, buf=0xb7883c08
ich_spi_read_page: offset=1862912, number=256, buf=0xb7883d08
ich_spi_read_page: offset=1863168, number=256, buf=0xb7883e08
ich_spi_read_page: offset=1863424, number=256, buf=0xb7883f08
ich_spi_read_page: offset=1863680, number=256, buf=0xb7884008
ich_spi_read_page: offset=1863936, number=256, buf=0xb7884108
ich_spi_read_page: offset=1864192, number=256, buf=0xb7884208
ich_spi_read_page: offset=1864448, number=256, buf=0xb7884308
ich_spi_read_page: offset=1864704, number=256, buf=0xb7884408
ich_spi_read_page: offset=1864960, number=256, buf=0xb7884508
ich_spi_read_page: offset=1865216, number=256, buf=0xb7884608
ich_spi_read_page: offset=1865472, number=256, buf=0xb7884708
ich_spi_read_page: offset=1865728, number=256, buf=0xb7884808
ich_spi_read_page: offset=1865984, number=256, buf=0xb7884908
ich_spi_read_page: offset=1866240, number=256, buf=0xb7884a08
ich_spi_read_page: offset=1866496, number=256, buf=0xb7884b08
ich_spi_read_page: offset=1866752, number=256, buf=0xb7884c08
ich_spi_read_page: offset=1867008, number=256, buf=0xb7884d08
ich_spi_read_page: offset=1867264, number=256, buf=0xb7884e08
ich_spi_read_page: offset=1867520, number=256, buf=0xb7884f08
ich_spi_read_page: offset=1867776, number=256, buf=0xb7885008
ich_spi_read_page: offset=1868032, number=256, buf=0xb7885108
ich_spi_read_page: offset=1868288, number=256, buf=0xb7885208
ich_spi_read_page: offset=1868544, number=256, buf=0xb7885308
ich_spi_read_page: offset=1868800, number=256, buf=0xb7885408
ich_spi_read_page: offset=1869056, number=256, buf=0xb7885508
ich_spi_read_page: offset=1869312, number=256, buf=0xb7885608
ich_spi_read_page: offset=1869568, number=256, buf=0xb7885708
ich_spi_read_page: offset=1869824, number=256, buf=0xb7885808
ich_spi_read_page: offset=1870080, number=256, buf=0xb7885908
ich_spi_read_page: offset=1870336, number=256, buf=0xb7885a08
ich_spi_read_page: offset=1870592, number=256, buf=0xb7885b08
ich_spi_read_page: offset=1870848, number=256, buf=0xb7885c08
ich_spi_read_page: offset=1871104, number=256, buf=0xb7885d08
ich_spi_read_page: offset=1871360, number=256, buf=0xb7885e08
ich_spi_read_page: offset=1871616, number=256, buf=0xb7885f08
ich_spi_read_page: offset=1871872, number=256, buf=0xb7886008
ich_spi_read_page: offset=1872128, number=256, buf=0xb7886108
ich_spi_read_page: offset=1872384, number=256, buf=0xb7886208
ich_spi_read_page: offset=1872640, number=256, buf=0xb7886308
ich_spi_read_page: offset=1872896, number=256, buf=0xb7886408
ich_spi_read_page: offset=1873152, number=256, buf=0xb7886508
ich_spi_read_page: offset=1873408, number=256, buf=0xb7886608
ich_spi_read_page: offset=1873664, number=256, buf=0xb7886708
ich_spi_read_page: offset=1873920, number=256, buf=0xb7886808
ich_spi_read_page: offset=1874176, number=256, buf=0xb7886908
ich_spi_read_page: offset=1874432, number=256, buf=0xb7886a08
ich_spi_read_page: offset=1874688, number=256, buf=0xb7886b08
ich_spi_read_page: offset=1874944, number=256, buf=0xb7886c08
ich_spi_read_page: offset=1875200, number=256, buf=0xb7886d08
ich_spi_read_page: offset=1875456, number=256, buf=0xb7886e08
ich_spi_read_page: offset=1875712, number=256, buf=0xb7886f08
ich_spi_read_page: offset=1875968, number=256, buf=0xb7887008
ich_spi_read_page: offset=1876224, number=256, buf=0xb7887108
ich_spi_read_page: offset=1876480, number=256, buf=0xb7887208
ich_spi_read_page: offset=1876736, number=256, buf=0xb7887308
ich_spi_read_page: offset=1876992, number=256, buf=0xb7887408
ich_spi_read_page: offset=1877248, number=256, buf=0xb7887508
ich_spi_read_page: offset=1877504, number=256, buf=0xb7887608
ich_spi_read_page: offset=1877760, number=256, buf=0xb7887708
ich_spi_read_page: offset=1878016, number=256, buf=0xb7887808
ich_spi_read_page: offset=1878272, number=256, buf=0xb7887908
ich_spi_read_page: offset=1878528, number=256, buf=0xb7887a08
ich_spi_read_page: offset=1878784, number=256, buf=0xb7887b08
ich_spi_read_page: offset=1879040, number=256, buf=0xb7887c08
ich_spi_read_page: offset=1879296, number=256, buf=0xb7887d08
ich_spi_read_page: offset=1879552, number=256, buf=0xb7887e08
ich_spi_read_page: offset=1879808, number=256, buf=0xb7887f08
ich_spi_read_page: offset=1880064, number=256, buf=0xb7888008
ich_spi_read_page: offset=1880320, number=256, buf=0xb7888108
ich_spi_read_page: offset=1880576, number=256, buf=0xb7888208
ich_spi_read_page: offset=1880832, number=256, buf=0xb7888308
ich_spi_read_page: offset=1881088, number=256, buf=0xb7888408
ich_spi_read_page: offset=1881344, number=256, buf=0xb7888508
ich_spi_read_page: offset=1881600, number=256, buf=0xb7888608
ich_spi_read_page: offset=1881856, number=256, buf=0xb7888708
ich_spi_read_page: offset=1882112, number=256, buf=0xb7888808
ich_spi_read_page: offset=1882368, number=256, buf=0xb7888908
ich_spi_read_page: offset=1882624, number=256, buf=0xb7888a08
ich_spi_read_page: offset=1882880, number=256, buf=0xb7888b08
ich_spi_read_page: offset=1883136, number=256, buf=0xb7888c08
ich_spi_read_page: offset=1883392, number=256, buf=0xb7888d08
ich_spi_read_page: offset=1883648, number=256, buf=0xb7888e08
ich_spi_read_page: offset=1883904, number=256, buf=0xb7888f08
ich_spi_read_page: offset=1884160, number=256, buf=0xb7889008
ich_spi_read_page: offset=1884416, number=256, buf=0xb7889108
ich_spi_read_page: offset=1884672, number=256, buf=0xb7889208
ich_spi_read_page: offset=1884928, number=256, buf=0xb7889308
ich_spi_read_page: offset=1885184, number=256, buf=0xb7889408
ich_spi_read_page: offset=1885440, number=256, buf=0xb7889508
ich_spi_read_page: offset=1885696, number=256, buf=0xb7889608
ich_spi_read_page: offset=1885952, number=256, buf=0xb7889708
ich_spi_read_page: offset=1886208, number=256, buf=0xb7889808
ich_spi_read_page: offset=1886464, number=256, buf=0xb7889908
ich_spi_read_page: offset=1886720, number=256, buf=0xb7889a08
ich_spi_read_page: offset=1886976, number=256, buf=0xb7889b08
ich_spi_read_page: offset=1887232, number=256, buf=0xb7889c08
ich_spi_read_page: offset=1887488, number=256, buf=0xb7889d08
ich_spi_read_page: offset=1887744, number=256, buf=0xb7889e08
ich_spi_read_page: offset=1888000, number=256, buf=0xb7889f08
ich_spi_read_page: offset=1888256, number=256, buf=0xb788a008
ich_spi_read_page: offset=1888512, number=256, buf=0xb788a108
ich_spi_read_page: offset=1888768, number=256, buf=0xb788a208
ich_spi_read_page: offset=1889024, number=256, buf=0xb788a308
ich_spi_read_page: offset=1889280, number=256, buf=0xb788a408
ich_spi_read_page: offset=1889536, number=256, buf=0xb788a508
ich_spi_read_page: offset=1889792, number=256, buf=0xb788a608
ich_spi_read_page: offset=1890048, number=256, buf=0xb788a708
ich_spi_read_page: offset=1890304, number=256, buf=0xb788a808
ich_spi_read_page: offset=1890560, number=256, buf=0xb788a908
ich_spi_read_page: offset=1890816, number=256, buf=0xb788aa08
ich_spi_read_page: offset=1891072, number=256, buf=0xb788ab08
ich_spi_read_page: offset=1891328, number=256, buf=0xb788ac08
ich_spi_read_page: offset=1891584, number=256, buf=0xb788ad08
ich_spi_read_page: offset=1891840, number=256, buf=0xb788ae08
ich_spi_read_page: offset=1892096, number=256, buf=0xb788af08
ich_spi_read_page: offset=1892352, number=256, buf=0xb788b008
ich_spi_read_page: offset=1892608, number=256, buf=0xb788b108
ich_spi_read_page: offset=1892864, number=256, buf=0xb788b208
ich_spi_read_page: offset=1893120, number=256, buf=0xb788b308
ich_spi_read_page: offset=1893376, number=256, buf=0xb788b408
ich_spi_read_page: offset=1893632, number=256, buf=0xb788b508
ich_spi_read_page: offset=1893888, number=256, buf=0xb788b608
ich_spi_read_page: offset=1894144, number=256, buf=0xb788b708
ich_spi_read_page: offset=1894400, number=256, buf=0xb788b808
ich_spi_read_page: offset=1894656, number=256, buf=0xb788b908
ich_spi_read_page: offset=1894912, number=256, buf=0xb788ba08
ich_spi_read_page: offset=1895168, number=256, buf=0xb788bb08
ich_spi_read_page: offset=1895424, number=256, buf=0xb788bc08
ich_spi_read_page: offset=1895680, number=256, buf=0xb788bd08
ich_spi_read_page: offset=1895936, number=256, buf=0xb788be08
ich_spi_read_page: offset=1896192, number=256, buf=0xb788bf08
ich_spi_read_page: offset=1896448, number=256, buf=0xb788c008
ich_spi_read_page: offset=1896704, number=256, buf=0xb788c108
ich_spi_read_page: offset=1896960, number=256, buf=0xb788c208
ich_spi_read_page: offset=1897216, number=256, buf=0xb788c308
ich_spi_read_page: offset=1897472, number=256, buf=0xb788c408
ich_spi_read_page: offset=1897728, number=256, buf=0xb788c508
ich_spi_read_page: offset=1897984, number=256, buf=0xb788c608
ich_spi_read_page: offset=1898240, number=256, buf=0xb788c708
ich_spi_read_page: offset=1898496, number=256, buf=0xb788c808
ich_spi_read_page: offset=1898752, number=256, buf=0xb788c908
ich_spi_read_page: offset=1899008, number=256, buf=0xb788ca08
ich_spi_read_page: offset=1899264, number=256, buf=0xb788cb08
ich_spi_read_page: offset=1899520, number=256, buf=0xb788cc08
ich_spi_read_page: offset=1899776, number=256, buf=0xb788cd08
ich_spi_read_page: offset=1900032, number=256, buf=0xb788ce08
ich_spi_read_page: offset=1900288, number=256, buf=0xb788cf08
ich_spi_read_page: offset=1900544, number=256, buf=0xb788d008
ich_spi_read_page: offset=1900800, number=256, buf=0xb788d108
ich_spi_read_page: offset=1901056, number=256, buf=0xb788d208
ich_spi_read_page: offset=1901312, number=256, buf=0xb788d308
ich_spi_read_page: offset=1901568, number=256, buf=0xb788d408
ich_spi_read_page: offset=1901824, number=256, buf=0xb788d508
ich_spi_read_page: offset=1902080, number=256, buf=0xb788d608
ich_spi_read_page: offset=1902336, number=256, buf=0xb788d708
ich_spi_read_page: offset=1902592, number=256, buf=0xb788d808
ich_spi_read_page: offset=1902848, number=256, buf=0xb788d908
ich_spi_read_page: offset=1903104, number=256, buf=0xb788da08
ich_spi_read_page: offset=1903360, number=256, buf=0xb788db08
ich_spi_read_page: offset=1903616, number=256, buf=0xb788dc08
ich_spi_read_page: offset=1903872, number=256, buf=0xb788dd08
ich_spi_read_page: offset=1904128, number=256, buf=0xb788de08
ich_spi_read_page: offset=1904384, number=256, buf=0xb788df08
ich_spi_read_page: offset=1904640, number=256, buf=0xb788e008
ich_spi_read_page: offset=1904896, number=256, buf=0xb788e108
ich_spi_read_page: offset=1905152, number=256, buf=0xb788e208
ich_spi_read_page: offset=1905408, number=256, buf=0xb788e308
ich_spi_read_page: offset=1905664, number=256, buf=0xb788e408
ich_spi_read_page: offset=1905920, number=256, buf=0xb788e508
ich_spi_read_page: offset=1906176, number=256, buf=0xb788e608
ich_spi_read_page: offset=1906432, number=256, buf=0xb788e708
ich_spi_read_page: offset=1906688, number=256, buf=0xb788e808
ich_spi_read_page: offset=1906944, number=256, buf=0xb788e908
ich_spi_read_page: offset=1907200, number=256, buf=0xb788ea08
ich_spi_read_page: offset=1907456, number=256, buf=0xb788eb08
ich_spi_read_page: offset=1907712, number=256, buf=0xb788ec08
ich_spi_read_page: offset=1907968, number=256, buf=0xb788ed08
ich_spi_read_page: offset=1908224, number=256, buf=0xb788ee08
ich_spi_read_page: offset=1908480, number=256, buf=0xb788ef08
ich_spi_read_page: offset=1908736, number=256, buf=0xb788f008
ich_spi_read_page: offset=1908992, number=256, buf=0xb788f108
ich_spi_read_page: offset=1909248, number=256, buf=0xb788f208
ich_spi_read_page: offset=1909504, number=256, buf=0xb788f308
ich_spi_read_page: offset=1909760, number=256, buf=0xb788f408
ich_spi_read_page: offset=1910016, number=256, buf=0xb788f508
ich_spi_read_page: offset=1910272, number=256, buf=0xb788f608
ich_spi_read_page: offset=1910528, number=256, buf=0xb788f708
ich_spi_read_page: offset=1910784, number=256, buf=0xb788f808
ich_spi_read_page: offset=1911040, number=256, buf=0xb788f908
ich_spi_read_page: offset=1911296, number=256, buf=0xb788fa08
ich_spi_read_page: offset=1911552, number=256, buf=0xb788fb08
ich_spi_read_page: offset=1911808, number=256, buf=0xb788fc08
ich_spi_read_page: offset=1912064, number=256, buf=0xb788fd08
ich_spi_read_page: offset=1912320, number=256, buf=0xb788fe08
ich_spi_read_page: offset=1912576, number=256, buf=0xb788ff08
ich_spi_read_page: offset=1912832, number=256, buf=0xb7890008
ich_spi_read_page: offset=1913088, number=256, buf=0xb7890108
ich_spi_read_page: offset=1913344, number=256, buf=0xb7890208
ich_spi_read_page: offset=1913600, number=256, buf=0xb7890308
ich_spi_read_page: offset=1913856, number=256, buf=0xb7890408
ich_spi_read_page: offset=1914112, number=256, buf=0xb7890508
ich_spi_read_page: offset=1914368, number=256, buf=0xb7890608
ich_spi_read_page: offset=1914624, number=256, buf=0xb7890708
ich_spi_read_page: offset=1914880, number=256, buf=0xb7890808
ich_spi_read_page: offset=1915136, number=256, buf=0xb7890908
ich_spi_read_page: offset=1915392, number=256, buf=0xb7890a08
ich_spi_read_page: offset=1915648, number=256, buf=0xb7890b08
ich_spi_read_page: offset=1915904, number=256, buf=0xb7890c08
ich_spi_read_page: offset=1916160, number=256, buf=0xb7890d08
ich_spi_read_page: offset=1916416, number=256, buf=0xb7890e08
ich_spi_read_page: offset=1916672, number=256, buf=0xb7890f08
ich_spi_read_page: offset=1916928, number=256, buf=0xb7891008
ich_spi_read_page: offset=1917184, number=256, buf=0xb7891108
ich_spi_read_page: offset=1917440, number=256, buf=0xb7891208
ich_spi_read_page: offset=1917696, number=256, buf=0xb7891308
ich_spi_read_page: offset=1917952, number=256, buf=0xb7891408
ich_spi_read_page: offset=1918208, number=256, buf=0xb7891508
ich_spi_read_page: offset=1918464, number=256, buf=0xb7891608
ich_spi_read_page: offset=1918720, number=256, buf=0xb7891708
ich_spi_read_page: offset=1918976, number=256, buf=0xb7891808
ich_spi_read_page: offset=1919232, number=256, buf=0xb7891908
ich_spi_read_page: offset=1919488, number=256, buf=0xb7891a08
ich_spi_read_page: offset=1919744, number=256, buf=0xb7891b08
ich_spi_read_page: offset=1920000, number=256, buf=0xb7891c08
ich_spi_read_page: offset=1920256, number=256, buf=0xb7891d08
ich_spi_read_page: offset=1920512, number=256, buf=0xb7891e08
ich_spi_read_page: offset=1920768, number=256, buf=0xb7891f08
ich_spi_read_page: offset=1921024, number=256, buf=0xb7892008
ich_spi_read_page: offset=1921280, number=256, buf=0xb7892108
ich_spi_read_page: offset=1921536, number=256, buf=0xb7892208
ich_spi_read_page: offset=1921792, number=256, buf=0xb7892308
ich_spi_read_page: offset=1922048, number=256, buf=0xb7892408
ich_spi_read_page: offset=1922304, number=256, buf=0xb7892508
ich_spi_read_page: offset=1922560, number=256, buf=0xb7892608
ich_spi_read_page: offset=1922816, number=256, buf=0xb7892708
ich_spi_read_page: offset=1923072, number=256, buf=0xb7892808
ich_spi_read_page: offset=1923328, number=256, buf=0xb7892908
ich_spi_read_page: offset=1923584, number=256, buf=0xb7892a08
ich_spi_read_page: offset=1923840, number=256, buf=0xb7892b08
ich_spi_read_page: offset=1924096, number=256, buf=0xb7892c08
ich_spi_read_page: offset=1924352, number=256, buf=0xb7892d08
ich_spi_read_page: offset=1924608, number=256, buf=0xb7892e08
ich_spi_read_page: offset=1924864, number=256, buf=0xb7892f08
ich_spi_read_page: offset=1925120, number=256, buf=0xb7893008
ich_spi_read_page: offset=1925376, number=256, buf=0xb7893108
ich_spi_read_page: offset=1925632, number=256, buf=0xb7893208
ich_spi_read_page: offset=1925888, number=256, buf=0xb7893308
ich_spi_read_page: offset=1926144, number=256, buf=0xb7893408
ich_spi_read_page: offset=1926400, number=256, buf=0xb7893508
ich_spi_read_page: offset=1926656, number=256, buf=0xb7893608
ich_spi_read_page: offset=1926912, number=256, buf=0xb7893708
ich_spi_read_page: offset=1927168, number=256, buf=0xb7893808
ich_spi_read_page: offset=1927424, number=256, buf=0xb7893908
ich_spi_read_page: offset=1927680, number=256, buf=0xb7893a08
ich_spi_read_page: offset=1927936, number=256, buf=0xb7893b08
ich_spi_read_page: offset=1928192, number=256, buf=0xb7893c08
ich_spi_read_page: offset=1928448, number=256, buf=0xb7893d08
ich_spi_read_page: offset=1928704, number=256, buf=0xb7893e08
ich_spi_read_page: offset=1928960, number=256, buf=0xb7893f08
ich_spi_read_page: offset=1929216, number=256, buf=0xb7894008
ich_spi_read_page: offset=1929472, number=256, buf=0xb7894108
ich_spi_read_page: offset=1929728, number=256, buf=0xb7894208
ich_spi_read_page: offset=1929984, number=256, buf=0xb7894308
ich_spi_read_page: offset=1930240, number=256, buf=0xb7894408
ich_spi_read_page: offset=1930496, number=256, buf=0xb7894508
ich_spi_read_page: offset=1930752, number=256, buf=0xb7894608
ich_spi_read_page: offset=1931008, number=256, buf=0xb7894708
ich_spi_read_page: offset=1931264, number=256, buf=0xb7894808
ich_spi_read_page: offset=1931520, number=256, buf=0xb7894908
ich_spi_read_page: offset=1931776, number=256, buf=0xb7894a08
ich_spi_read_page: offset=1932032, number=256, buf=0xb7894b08
ich_spi_read_page: offset=1932288, number=256, buf=0xb7894c08
ich_spi_read_page: offset=1932544, number=256, buf=0xb7894d08
ich_spi_read_page: offset=1932800, number=256, buf=0xb7894e08
ich_spi_read_page: offset=1933056, number=256, buf=0xb7894f08
ich_spi_read_page: offset=1933312, number=256, buf=0xb7895008
ich_spi_read_page: offset=1933568, number=256, buf=0xb7895108
ich_spi_read_page: offset=1933824, number=256, buf=0xb7895208
ich_spi_read_page: offset=1934080, number=256, buf=0xb7895308
ich_spi_read_page: offset=1934336, number=256, buf=0xb7895408
ich_spi_read_page: offset=1934592, number=256, buf=0xb7895508
ich_spi_read_page: offset=1934848, number=256, buf=0xb7895608
ich_spi_read_page: offset=1935104, number=256, buf=0xb7895708
ich_spi_read_page: offset=1935360, number=256, buf=0xb7895808
ich_spi_read_page: offset=1935616, number=256, buf=0xb7895908
ich_spi_read_page: offset=1935872, number=256, buf=0xb7895a08
ich_spi_read_page: offset=1936128, number=256, buf=0xb7895b08
ich_spi_read_page: offset=1936384, number=256, buf=0xb7895c08
ich_spi_read_page: offset=1936640, number=256, buf=0xb7895d08
ich_spi_read_page: offset=1936896, number=256, buf=0xb7895e08
ich_spi_read_page: offset=1937152, number=256, buf=0xb7895f08
ich_spi_read_page: offset=1937408, number=256, buf=0xb7896008
ich_spi_read_page: offset=1937664, number=256, buf=0xb7896108
ich_spi_read_page: offset=1937920, number=256, buf=0xb7896208
ich_spi_read_page: offset=1938176, number=256, buf=0xb7896308
ich_spi_read_page: offset=1938432, number=256, buf=0xb7896408
ich_spi_read_page: offset=1938688, number=256, buf=0xb7896508
ich_spi_read_page: offset=1938944, number=256, buf=0xb7896608
ich_spi_read_page: offset=1939200, number=256, buf=0xb7896708
ich_spi_read_page: offset=1939456, number=256, buf=0xb7896808
ich_spi_read_page: offset=1939712, number=256, buf=0xb7896908
ich_spi_read_page: offset=1939968, number=256, buf=0xb7896a08
ich_spi_read_page: offset=1940224, number=256, buf=0xb7896b08
ich_spi_read_page: offset=1940480, number=256, buf=0xb7896c08
ich_spi_read_page: offset=1940736, number=256, buf=0xb7896d08
ich_spi_read_page: offset=1940992, number=256, buf=0xb7896e08
ich_spi_read_page: offset=1941248, number=256, buf=0xb7896f08
ich_spi_read_page: offset=1941504, number=256, buf=0xb7897008
ich_spi_read_page: offset=1941760, number=256, buf=0xb7897108
ich_spi_read_page: offset=1942016, number=256, buf=0xb7897208
ich_spi_read_page: offset=1942272, number=256, buf=0xb7897308
ich_spi_read_page: offset=1942528, number=256, buf=0xb7897408
ich_spi_read_page: offset=1942784, number=256, buf=0xb7897508
ich_spi_read_page: offset=1943040, number=256, buf=0xb7897608
ich_spi_read_page: offset=1943296, number=256, buf=0xb7897708
ich_spi_read_page: offset=1943552, number=256, buf=0xb7897808
ich_spi_read_page: offset=1943808, number=256, buf=0xb7897908
ich_spi_read_page: offset=1944064, number=256, buf=0xb7897a08
ich_spi_read_page: offset=1944320, number=256, buf=0xb7897b08
ich_spi_read_page: offset=1944576, number=256, buf=0xb7897c08
ich_spi_read_page: offset=1944832, number=256, buf=0xb7897d08
ich_spi_read_page: offset=1945088, number=256, buf=0xb7897e08
ich_spi_read_page: offset=1945344, number=256, buf=0xb7897f08
ich_spi_read_page: offset=1945600, number=256, buf=0xb7898008
ich_spi_read_page: offset=1945856, number=256, buf=0xb7898108
ich_spi_read_page: offset=1946112, number=256, buf=0xb7898208
ich_spi_read_page: offset=1946368, number=256, buf=0xb7898308
ich_spi_read_page: offset=1946624, number=256, buf=0xb7898408
ich_spi_read_page: offset=1946880, number=256, buf=0xb7898508
ich_spi_read_page: offset=1947136, number=256, buf=0xb7898608
ich_spi_read_page: offset=1947392, number=256, buf=0xb7898708
ich_spi_read_page: offset=1947648, number=256, buf=0xb7898808
ich_spi_read_page: offset=1947904, number=256, buf=0xb7898908
ich_spi_read_page: offset=1948160, number=256, buf=0xb7898a08
ich_spi_read_page: offset=1948416, number=256, buf=0xb7898b08
ich_spi_read_page: offset=1948672, number=256, buf=0xb7898c08
ich_spi_read_page: offset=1948928, number=256, buf=0xb7898d08
ich_spi_read_page: offset=1949184, number=256, buf=0xb7898e08
ich_spi_read_page: offset=1949440, number=256, buf=0xb7898f08
ich_spi_read_page: offset=1949696, number=256, buf=0xb7899008
ich_spi_read_page: offset=1949952, number=256, buf=0xb7899108
ich_spi_read_page: offset=1950208, number=256, buf=0xb7899208
ich_spi_read_page: offset=1950464, number=256, buf=0xb7899308
ich_spi_read_page: offset=1950720, number=256, buf=0xb7899408
ich_spi_read_page: offset=1950976, number=256, buf=0xb7899508
ich_spi_read_page: offset=1951232, number=256, buf=0xb7899608
ich_spi_read_page: offset=1951488, number=256, buf=0xb7899708
ich_spi_read_page: offset=1951744, number=256, buf=0xb7899808
ich_spi_read_page: offset=1952000, number=256, buf=0xb7899908
ich_spi_read_page: offset=1952256, number=256, buf=0xb7899a08
ich_spi_read_page: offset=1952512, number=256, buf=0xb7899b08
ich_spi_read_page: offset=1952768, number=256, buf=0xb7899c08
ich_spi_read_page: offset=1953024, number=256, buf=0xb7899d08
ich_spi_read_page: offset=1953280, number=256, buf=0xb7899e08
ich_spi_read_page: offset=1953536, number=256, buf=0xb7899f08
ich_spi_read_page: offset=1953792, number=256, buf=0xb789a008
ich_spi_read_page: offset=1954048, number=256, buf=0xb789a108
ich_spi_read_page: offset=1954304, number=256, buf=0xb789a208
ich_spi_read_page: offset=1954560, number=256, buf=0xb789a308
ich_spi_read_page: offset=1954816, number=256, buf=0xb789a408
ich_spi_read_page: offset=1955072, number=256, buf=0xb789a508
ich_spi_read_page: offset=1955328, number=256, buf=0xb789a608
ich_spi_read_page: offset=1955584, number=256, buf=0xb789a708
ich_spi_read_page: offset=1955840, number=256, buf=0xb789a808
ich_spi_read_page: offset=1956096, number=256, buf=0xb789a908
ich_spi_read_page: offset=1956352, number=256, buf=0xb789aa08
ich_spi_read_page: offset=1956608, number=256, buf=0xb789ab08
ich_spi_read_page: offset=1956864, number=256, buf=0xb789ac08
ich_spi_read_page: offset=1957120, number=256, buf=0xb789ad08
ich_spi_read_page: offset=1957376, number=256, buf=0xb789ae08
ich_spi_read_page: offset=1957632, number=256, buf=0xb789af08
ich_spi_read_page: offset=1957888, number=256, buf=0xb789b008
ich_spi_read_page: offset=1958144, number=256, buf=0xb789b108
ich_spi_read_page: offset=1958400, number=256, buf=0xb789b208
ich_spi_read_page: offset=1958656, number=256, buf=0xb789b308
ich_spi_read_page: offset=1958912, number=256, buf=0xb789b408
ich_spi_read_page: offset=1959168, number=256, buf=0xb789b508
ich_spi_read_page: offset=1959424, number=256, buf=0xb789b608
ich_spi_read_page: offset=1959680, number=256, buf=0xb789b708
ich_spi_read_page: offset=1959936, number=256, buf=0xb789b808
ich_spi_read_page: offset=1960192, number=256, buf=0xb789b908
ich_spi_read_page: offset=1960448, number=256, buf=0xb789ba08
ich_spi_read_page: offset=1960704, number=256, buf=0xb789bb08
ich_spi_read_page: offset=1960960, number=256, buf=0xb789bc08
ich_spi_read_page: offset=1961216, number=256, buf=0xb789bd08
ich_spi_read_page: offset=1961472, number=256, buf=0xb789be08
ich_spi_read_page: offset=1961728, number=256, buf=0xb789bf08
ich_spi_read_page: offset=1961984, number=256, buf=0xb789c008
ich_spi_read_page: offset=1962240, number=256, buf=0xb789c108
ich_spi_read_page: offset=1962496, number=256, buf=0xb789c208
ich_spi_read_page: offset=1962752, number=256, buf=0xb789c308
ich_spi_read_page: offset=1963008, number=256, buf=0xb789c408
ich_spi_read_page: offset=1963264, number=256, buf=0xb789c508
ich_spi_read_page: offset=1963520, number=256, buf=0xb789c608
ich_spi_read_page: offset=1963776, number=256, buf=0xb789c708
ich_spi_read_page: offset=1964032, number=256, buf=0xb789c808
ich_spi_read_page: offset=1964288, number=256, buf=0xb789c908
ich_spi_read_page: offset=1964544, number=256, buf=0xb789ca08
ich_spi_read_page: offset=1964800, number=256, buf=0xb789cb08
ich_spi_read_page: offset=1965056, number=256, buf=0xb789cc08
ich_spi_read_page: offset=1965312, number=256, buf=0xb789cd08
ich_spi_read_page: offset=1965568, number=256, buf=0xb789ce08
ich_spi_read_page: offset=1965824, number=256, buf=0xb789cf08
ich_spi_read_page: offset=1966080, number=256, buf=0xb789d008
ich_spi_read_page: offset=1966336, number=256, buf=0xb789d108
ich_spi_read_page: offset=1966592, number=256, buf=0xb789d208
ich_spi_read_page: offset=1966848, number=256, buf=0xb789d308
ich_spi_read_page: offset=1967104, number=256, buf=0xb789d408
ich_spi_read_page: offset=1967360, number=256, buf=0xb789d508
ich_spi_read_page: offset=1967616, number=256, buf=0xb789d608
ich_spi_read_page: offset=1967872, number=256, buf=0xb789d708
ich_spi_read_page: offset=1968128, number=256, buf=0xb789d808
ich_spi_read_page: offset=1968384, number=256, buf=0xb789d908
ich_spi_read_page: offset=1968640, number=256, buf=0xb789da08
ich_spi_read_page: offset=1968896, number=256, buf=0xb789db08
ich_spi_read_page: offset=1969152, number=256, buf=0xb789dc08
ich_spi_read_page: offset=1969408, number=256, buf=0xb789dd08
ich_spi_read_page: offset=1969664, number=256, buf=0xb789de08
ich_spi_read_page: offset=1969920, number=256, buf=0xb789df08
ich_spi_read_page: offset=1970176, number=256, buf=0xb789e008
ich_spi_read_page: offset=1970432, number=256, buf=0xb789e108
ich_spi_read_page: offset=1970688, number=256, buf=0xb789e208
ich_spi_read_page: offset=1970944, number=256, buf=0xb789e308
ich_spi_read_page: offset=1971200, number=256, buf=0xb789e408
ich_spi_read_page: offset=1971456, number=256, buf=0xb789e508
ich_spi_read_page: offset=1971712, number=256, buf=0xb789e608
ich_spi_read_page: offset=1971968, number=256, buf=0xb789e708
ich_spi_read_page: offset=1972224, number=256, buf=0xb789e808
ich_spi_read_page: offset=1972480, number=256, buf=0xb789e908
ich_spi_read_page: offset=1972736, number=256, buf=0xb789ea08
ich_spi_read_page: offset=1972992, number=256, buf=0xb789eb08
ich_spi_read_page: offset=1973248, number=256, buf=0xb789ec08
ich_spi_read_page: offset=1973504, number=256, buf=0xb789ed08
ich_spi_read_page: offset=1973760, number=256, buf=0xb789ee08
ich_spi_read_page: offset=1974016, number=256, buf=0xb789ef08
ich_spi_read_page: offset=1974272, number=256, buf=0xb789f008
ich_spi_read_page: offset=1974528, number=256, buf=0xb789f108
ich_spi_read_page: offset=1974784, number=256, buf=0xb789f208
ich_spi_read_page: offset=1975040, number=256, buf=0xb789f308
ich_spi_read_page: offset=1975296, number=256, buf=0xb789f408
ich_spi_read_page: offset=1975552, number=256, buf=0xb789f508
ich_spi_read_page: offset=1975808, number=256, buf=0xb789f608
ich_spi_read_page: offset=1976064, number=256, buf=0xb789f708
ich_spi_read_page: offset=1976320, number=256, buf=0xb789f808
ich_spi_read_page: offset=1976576, number=256, buf=0xb789f908
ich_spi_read_page: offset=1976832, number=256, buf=0xb789fa08
ich_spi_read_page: offset=1977088, number=256, buf=0xb789fb08
ich_spi_read_page: offset=1977344, number=256, buf=0xb789fc08
ich_spi_read_page: offset=1977600, number=256, buf=0xb789fd08
ich_spi_read_page: offset=1977856, number=256, buf=0xb789fe08
ich_spi_read_page: offset=1978112, number=256, buf=0xb789ff08
ich_spi_read_page: offset=1978368, number=256, buf=0xb78a0008
ich_spi_read_page: offset=1978624, number=256, buf=0xb78a0108
ich_spi_read_page: offset=1978880, number=256, buf=0xb78a0208
ich_spi_read_page: offset=1979136, number=256, buf=0xb78a0308
ich_spi_read_page: offset=1979392, number=256, buf=0xb78a0408
ich_spi_read_page: offset=1979648, number=256, buf=0xb78a0508
ich_spi_read_page: offset=1979904, number=256, buf=0xb78a0608
ich_spi_read_page: offset=1980160, number=256, buf=0xb78a0708
ich_spi_read_page: offset=1980416, number=256, buf=0xb78a0808
ich_spi_read_page: offset=1980672, number=256, buf=0xb78a0908
ich_spi_read_page: offset=1980928, number=256, buf=0xb78a0a08
ich_spi_read_page: offset=1981184, number=256, buf=0xb78a0b08
ich_spi_read_page: offset=1981440, number=256, buf=0xb78a0c08
ich_spi_read_page: offset=1981696, number=256, buf=0xb78a0d08
ich_spi_read_page: offset=1981952, number=256, buf=0xb78a0e08
ich_spi_read_page: offset=1982208, number=256, buf=0xb78a0f08
ich_spi_read_page: offset=1982464, number=256, buf=0xb78a1008
ich_spi_read_page: offset=1982720, number=256, buf=0xb78a1108
ich_spi_read_page: offset=1982976, number=256, buf=0xb78a1208
ich_spi_read_page: offset=1983232, number=256, buf=0xb78a1308
ich_spi_read_page: offset=1983488, number=256, buf=0xb78a1408
ich_spi_read_page: offset=1983744, number=256, buf=0xb78a1508
ich_spi_read_page: offset=1984000, number=256, buf=0xb78a1608
ich_spi_read_page: offset=1984256, number=256, buf=0xb78a1708
ich_spi_read_page: offset=1984512, number=256, buf=0xb78a1808
ich_spi_read_page: offset=1984768, number=256, buf=0xb78a1908
ich_spi_read_page: offset=1985024, number=256, buf=0xb78a1a08
ich_spi_read_page: offset=1985280, number=256, buf=0xb78a1b08
ich_spi_read_page: offset=1985536, number=256, buf=0xb78a1c08
ich_spi_read_page: offset=1985792, number=256, buf=0xb78a1d08
ich_spi_read_page: offset=1986048, number=256, buf=0xb78a1e08
ich_spi_read_page: offset=1986304, number=256, buf=0xb78a1f08
ich_spi_read_page: offset=1986560, number=256, buf=0xb78a2008
ich_spi_read_page: offset=1986816, number=256, buf=0xb78a2108
ich_spi_read_page: offset=1987072, number=256, buf=0xb78a2208
ich_spi_read_page: offset=1987328, number=256, buf=0xb78a2308
ich_spi_read_page: offset=1987584, number=256, buf=0xb78a2408
ich_spi_read_page: offset=1987840, number=256, buf=0xb78a2508
ich_spi_read_page: offset=1988096, number=256, buf=0xb78a2608
ich_spi_read_page: offset=1988352, number=256, buf=0xb78a2708
ich_spi_read_page: offset=1988608, number=256, buf=0xb78a2808
ich_spi_read_page: offset=1988864, number=256, buf=0xb78a2908
ich_spi_read_page: offset=1989120, number=256, buf=0xb78a2a08
ich_spi_read_page: offset=1989376, number=256, buf=0xb78a2b08
ich_spi_read_page: offset=1989632, number=256, buf=0xb78a2c08
ich_spi_read_page: offset=1989888, number=256, buf=0xb78a2d08
ich_spi_read_page: offset=1990144, number=256, buf=0xb78a2e08
ich_spi_read_page: offset=1990400, number=256, buf=0xb78a2f08
ich_spi_read_page: offset=1990656, number=256, buf=0xb78a3008
ich_spi_read_page: offset=1990912, number=256, buf=0xb78a3108
ich_spi_read_page: offset=1991168, number=256, buf=0xb78a3208
ich_spi_read_page: offset=1991424, number=256, buf=0xb78a3308
ich_spi_read_page: offset=1991680, number=256, buf=0xb78a3408
ich_spi_read_page: offset=1991936, number=256, buf=0xb78a3508
ich_spi_read_page: offset=1992192, number=256, buf=0xb78a3608
ich_spi_read_page: offset=1992448, number=256, buf=0xb78a3708
ich_spi_read_page: offset=1992704, number=256, buf=0xb78a3808
ich_spi_read_page: offset=1992960, number=256, buf=0xb78a3908
ich_spi_read_page: offset=1993216, number=256, buf=0xb78a3a08
ich_spi_read_page: offset=1993472, number=256, buf=0xb78a3b08
ich_spi_read_page: offset=1993728, number=256, buf=0xb78a3c08
ich_spi_read_page: offset=1993984, number=256, buf=0xb78a3d08
ich_spi_read_page: offset=1994240, number=256, buf=0xb78a3e08
ich_spi_read_page: offset=1994496, number=256, buf=0xb78a3f08
ich_spi_read_page: offset=1994752, number=256, buf=0xb78a4008
ich_spi_read_page: offset=1995008, number=256, buf=0xb78a4108
ich_spi_read_page: offset=1995264, number=256, buf=0xb78a4208
ich_spi_read_page: offset=1995520, number=256, buf=0xb78a4308
ich_spi_read_page: offset=1995776, number=256, buf=0xb78a4408
ich_spi_read_page: offset=1996032, number=256, buf=0xb78a4508
ich_spi_read_page: offset=1996288, number=256, buf=0xb78a4608
ich_spi_read_page: offset=1996544, number=256, buf=0xb78a4708
ich_spi_read_page: offset=1996800, number=256, buf=0xb78a4808
ich_spi_read_page: offset=1997056, number=256, buf=0xb78a4908
ich_spi_read_page: offset=1997312, number=256, buf=0xb78a4a08
ich_spi_read_page: offset=1997568, number=256, buf=0xb78a4b08
ich_spi_read_page: offset=1997824, number=256, buf=0xb78a4c08
ich_spi_read_page: offset=1998080, number=256, buf=0xb78a4d08
ich_spi_read_page: offset=1998336, number=256, buf=0xb78a4e08
ich_spi_read_page: offset=1998592, number=256, buf=0xb78a4f08
ich_spi_read_page: offset=1998848, number=256, buf=0xb78a5008
ich_spi_read_page: offset=1999104, number=256, buf=0xb78a5108
ich_spi_read_page: offset=1999360, number=256, buf=0xb78a5208
ich_spi_read_page: offset=1999616, number=256, buf=0xb78a5308
ich_spi_read_page: offset=1999872, number=256, buf=0xb78a5408
ich_spi_read_page: offset=2000128, number=256, buf=0xb78a5508
ich_spi_read_page: offset=2000384, number=256, buf=0xb78a5608
ich_spi_read_page: offset=2000640, number=256, buf=0xb78a5708
ich_spi_read_page: offset=2000896, number=256, buf=0xb78a5808
ich_spi_read_page: offset=2001152, number=256, buf=0xb78a5908
ich_spi_read_page: offset=2001408, number=256, buf=0xb78a5a08
ich_spi_read_page: offset=2001664, number=256, buf=0xb78a5b08
ich_spi_read_page: offset=2001920, number=256, buf=0xb78a5c08
ich_spi_read_page: offset=2002176, number=256, buf=0xb78a5d08
ich_spi_read_page: offset=2002432, number=256, buf=0xb78a5e08
ich_spi_read_page: offset=2002688, number=256, buf=0xb78a5f08
ich_spi_read_page: offset=2002944, number=256, buf=0xb78a6008
ich_spi_read_page: offset=2003200, number=256, buf=0xb78a6108
ich_spi_read_page: offset=2003456, number=256, buf=0xb78a6208
ich_spi_read_page: offset=2003712, number=256, buf=0xb78a6308
ich_spi_read_page: offset=2003968, number=256, buf=0xb78a6408
ich_spi_read_page: offset=2004224, number=256, buf=0xb78a6508
ich_spi_read_page: offset=2004480, number=256, buf=0xb78a6608
ich_spi_read_page: offset=2004736, number=256, buf=0xb78a6708
ich_spi_read_page: offset=2004992, number=256, buf=0xb78a6808
ich_spi_read_page: offset=2005248, number=256, buf=0xb78a6908
ich_spi_read_page: offset=2005504, number=256, buf=0xb78a6a08
ich_spi_read_page: offset=2005760, number=256, buf=0xb78a6b08
ich_spi_read_page: offset=2006016, number=256, buf=0xb78a6c08
ich_spi_read_page: offset=2006272, number=256, buf=0xb78a6d08
ich_spi_read_page: offset=2006528, number=256, buf=0xb78a6e08
ich_spi_read_page: offset=2006784, number=256, buf=0xb78a6f08
ich_spi_read_page: offset=2007040, number=256, buf=0xb78a7008
ich_spi_read_page: offset=2007296, number=256, buf=0xb78a7108
ich_spi_read_page: offset=2007552, number=256, buf=0xb78a7208
ich_spi_read_page: offset=2007808, number=256, buf=0xb78a7308
ich_spi_read_page: offset=2008064, number=256, buf=0xb78a7408
ich_spi_read_page: offset=2008320, number=256, buf=0xb78a7508
ich_spi_read_page: offset=2008576, number=256, buf=0xb78a7608
ich_spi_read_page: offset=2008832, number=256, buf=0xb78a7708
ich_spi_read_page: offset=2009088, number=256, buf=0xb78a7808
ich_spi_read_page: offset=2009344, number=256, buf=0xb78a7908
ich_spi_read_page: offset=2009600, number=256, buf=0xb78a7a08
ich_spi_read_page: offset=2009856, number=256, buf=0xb78a7b08
ich_spi_read_page: offset=2010112, number=256, buf=0xb78a7c08
ich_spi_read_page: offset=2010368, number=256, buf=0xb78a7d08
ich_spi_read_page: offset=2010624, number=256, buf=0xb78a7e08
ich_spi_read_page: offset=2010880, number=256, buf=0xb78a7f08
ich_spi_read_page: offset=2011136, number=256, buf=0xb78a8008
ich_spi_read_page: offset=2011392, number=256, buf=0xb78a8108
ich_spi_read_page: offset=2011648, number=256, buf=0xb78a8208
ich_spi_read_page: offset=2011904, number=256, buf=0xb78a8308
ich_spi_read_page: offset=2012160, number=256, buf=0xb78a8408
ich_spi_read_page: offset=2012416, number=256, buf=0xb78a8508
ich_spi_read_page: offset=2012672, number=256, buf=0xb78a8608
ich_spi_read_page: offset=2012928, number=256, buf=0xb78a8708
ich_spi_read_page: offset=2013184, number=256, buf=0xb78a8808
ich_spi_read_page: offset=2013440, number=256, buf=0xb78a8908
ich_spi_read_page: offset=2013696, number=256, buf=0xb78a8a08
ich_spi_read_page: offset=2013952, number=256, buf=0xb78a8b08
ich_spi_read_page: offset=2014208, number=256, buf=0xb78a8c08
ich_spi_read_page: offset=2014464, number=256, buf=0xb78a8d08
ich_spi_read_page: offset=2014720, number=256, buf=0xb78a8e08
ich_spi_read_page: offset=2014976, number=256, buf=0xb78a8f08
ich_spi_read_page: offset=2015232, number=256, buf=0xb78a9008
ich_spi_read_page: offset=2015488, number=256, buf=0xb78a9108
ich_spi_read_page: offset=2015744, number=256, buf=0xb78a9208
ich_spi_read_page: offset=2016000, number=256, buf=0xb78a9308
ich_spi_read_page: offset=2016256, number=256, buf=0xb78a9408
ich_spi_read_page: offset=2016512, number=256, buf=0xb78a9508
ich_spi_read_page: offset=2016768, number=256, buf=0xb78a9608
ich_spi_read_page: offset=2017024, number=256, buf=0xb78a9708
ich_spi_read_page: offset=2017280, number=256, buf=0xb78a9808
ich_spi_read_page: offset=2017536, number=256, buf=0xb78a9908
ich_spi_read_page: offset=2017792, number=256, buf=0xb78a9a08
ich_spi_read_page: offset=2018048, number=256, buf=0xb78a9b08
ich_spi_read_page: offset=2018304, number=256, buf=0xb78a9c08
ich_spi_read_page: offset=2018560, number=256, buf=0xb78a9d08
ich_spi_read_page: offset=2018816, number=256, buf=0xb78a9e08
ich_spi_read_page: offset=2019072, number=256, buf=0xb78a9f08
ich_spi_read_page: offset=2019328, number=256, buf=0xb78aa008
ich_spi_read_page: offset=2019584, number=256, buf=0xb78aa108
ich_spi_read_page: offset=2019840, number=256, buf=0xb78aa208
ich_spi_read_page: offset=2020096, number=256, buf=0xb78aa308
ich_spi_read_page: offset=2020352, number=256, buf=0xb78aa408
ich_spi_read_page: offset=2020608, number=256, buf=0xb78aa508
ich_spi_read_page: offset=2020864, number=256, buf=0xb78aa608
ich_spi_read_page: offset=2021120, number=256, buf=0xb78aa708
ich_spi_read_page: offset=2021376, number=256, buf=0xb78aa808
ich_spi_read_page: offset=2021632, number=256, buf=0xb78aa908
ich_spi_read_page: offset=2021888, number=256, buf=0xb78aaa08
ich_spi_read_page: offset=2022144, number=256, buf=0xb78aab08
ich_spi_read_page: offset=2022400, number=256, buf=0xb78aac08
ich_spi_read_page: offset=2022656, number=256, buf=0xb78aad08
ich_spi_read_page: offset=2022912, number=256, buf=0xb78aae08
ich_spi_read_page: offset=2023168, number=256, buf=0xb78aaf08
ich_spi_read_page: offset=2023424, number=256, buf=0xb78ab008
ich_spi_read_page: offset=2023680, number=256, buf=0xb78ab108
ich_spi_read_page: offset=2023936, number=256, buf=0xb78ab208
ich_spi_read_page: offset=2024192, number=256, buf=0xb78ab308
ich_spi_read_page: offset=2024448, number=256, buf=0xb78ab408
ich_spi_read_page: offset=2024704, number=256, buf=0xb78ab508
ich_spi_read_page: offset=2024960, number=256, buf=0xb78ab608
ich_spi_read_page: offset=2025216, number=256, buf=0xb78ab708
ich_spi_read_page: offset=2025472, number=256, buf=0xb78ab808
ich_spi_read_page: offset=2025728, number=256, buf=0xb78ab908
ich_spi_read_page: offset=2025984, number=256, buf=0xb78aba08
ich_spi_read_page: offset=2026240, number=256, buf=0xb78abb08
ich_spi_read_page: offset=2026496, number=256, buf=0xb78abc08
ich_spi_read_page: offset=2026752, number=256, buf=0xb78abd08
ich_spi_read_page: offset=2027008, number=256, buf=0xb78abe08
ich_spi_read_page: offset=2027264, number=256, buf=0xb78abf08
ich_spi_read_page: offset=2027520, number=256, buf=0xb78ac008
ich_spi_read_page: offset=2027776, number=256, buf=0xb78ac108
ich_spi_read_page: offset=2028032, number=256, buf=0xb78ac208
ich_spi_read_page: offset=2028288, number=256, buf=0xb78ac308
ich_spi_read_page: offset=2028544, number=256, buf=0xb78ac408
ich_spi_read_page: offset=2028800, number=256, buf=0xb78ac508
ich_spi_read_page: offset=2029056, number=256, buf=0xb78ac608
ich_spi_read_page: offset=2029312, number=256, buf=0xb78ac708
ich_spi_read_page: offset=2029568, number=256, buf=0xb78ac808
ich_spi_read_page: offset=2029824, number=256, buf=0xb78ac908
ich_spi_read_page: offset=2030080, number=256, buf=0xb78aca08
ich_spi_read_page: offset=2030336, number=256, buf=0xb78acb08
ich_spi_read_page: offset=2030592, number=256, buf=0xb78acc08
ich_spi_read_page: offset=2030848, number=256, buf=0xb78acd08
ich_spi_read_page: offset=2031104, number=256, buf=0xb78ace08
ich_spi_read_page: offset=2031360, number=256, buf=0xb78acf08
ich_spi_read_page: offset=2031616, number=256, buf=0xb78ad008
ich_spi_read_page: offset=2031872, number=256, buf=0xb78ad108
ich_spi_read_page: offset=2032128, number=256, buf=0xb78ad208
ich_spi_read_page: offset=2032384, number=256, buf=0xb78ad308
ich_spi_read_page: offset=2032640, number=256, buf=0xb78ad408
ich_spi_read_page: offset=2032896, number=256, buf=0xb78ad508
ich_spi_read_page: offset=2033152, number=256, buf=0xb78ad608
ich_spi_read_page: offset=2033408, number=256, buf=0xb78ad708
ich_spi_read_page: offset=2033664, number=256, buf=0xb78ad808
ich_spi_read_page: offset=2033920, number=256, buf=0xb78ad908
ich_spi_read_page: offset=2034176, number=256, buf=0xb78ada08
ich_spi_read_page: offset=2034432, number=256, buf=0xb78adb08
ich_spi_read_page: offset=2034688, number=256, buf=0xb78adc08
ich_spi_read_page: offset=2034944, number=256, buf=0xb78add08
ich_spi_read_page: offset=2035200, number=256, buf=0xb78ade08
ich_spi_read_page: offset=2035456, number=256, buf=0xb78adf08
ich_spi_read_page: offset=2035712, number=256, buf=0xb78ae008
ich_spi_read_page: offset=2035968, number=256, buf=0xb78ae108
ich_spi_read_page: offset=2036224, number=256, buf=0xb78ae208
ich_spi_read_page: offset=2036480, number=256, buf=0xb78ae308
ich_spi_read_page: offset=2036736, number=256, buf=0xb78ae408
ich_spi_read_page: offset=2036992, number=256, buf=0xb78ae508
ich_spi_read_page: offset=2037248, number=256, buf=0xb78ae608
ich_spi_read_page: offset=2037504, number=256, buf=0xb78ae708
ich_spi_read_page: offset=2037760, number=256, buf=0xb78ae808
ich_spi_read_page: offset=2038016, number=256, buf=0xb78ae908
ich_spi_read_page: offset=2038272, number=256, buf=0xb78aea08
ich_spi_read_page: offset=2038528, number=256, buf=0xb78aeb08
ich_spi_read_page: offset=2038784, number=256, buf=0xb78aec08
ich_spi_read_page: offset=2039040, number=256, buf=0xb78aed08
ich_spi_read_page: offset=2039296, number=256, buf=0xb78aee08
ich_spi_read_page: offset=2039552, number=256, buf=0xb78aef08
ich_spi_read_page: offset=2039808, number=256, buf=0xb78af008
ich_spi_read_page: offset=2040064, number=256, buf=0xb78af108
ich_spi_read_page: offset=2040320, number=256, buf=0xb78af208
ich_spi_read_page: offset=2040576, number=256, buf=0xb78af308
ich_spi_read_page: offset=2040832, number=256, buf=0xb78af408
ich_spi_read_page: offset=2041088, number=256, buf=0xb78af508
ich_spi_read_page: offset=2041344, number=256, buf=0xb78af608
ich_spi_read_page: offset=2041600, number=256, buf=0xb78af708
ich_spi_read_page: offset=2041856, number=256, buf=0xb78af808
ich_spi_read_page: offset=2042112, number=256, buf=0xb78af908
ich_spi_read_page: offset=2042368, number=256, buf=0xb78afa08
ich_spi_read_page: offset=2042624, number=256, buf=0xb78afb08
ich_spi_read_page: offset=2042880, number=256, buf=0xb78afc08
ich_spi_read_page: offset=2043136, number=256, buf=0xb78afd08
ich_spi_read_page: offset=2043392, number=256, buf=0xb78afe08
ich_spi_read_page: offset=2043648, number=256, buf=0xb78aff08
ich_spi_read_page: offset=2043904, number=256, buf=0xb78b0008
ich_spi_read_page: offset=2044160, number=256, buf=0xb78b0108
ich_spi_read_page: offset=2044416, number=256, buf=0xb78b0208
ich_spi_read_page: offset=2044672, number=256, buf=0xb78b0308
ich_spi_read_page: offset=2044928, number=256, buf=0xb78b0408
ich_spi_read_page: offset=2045184, number=256, buf=0xb78b0508
ich_spi_read_page: offset=2045440, number=256, buf=0xb78b0608
ich_spi_read_page: offset=2045696, number=256, buf=0xb78b0708
ich_spi_read_page: offset=2045952, number=256, buf=0xb78b0808
ich_spi_read_page: offset=2046208, number=256, buf=0xb78b0908
ich_spi_read_page: offset=2046464, number=256, buf=0xb78b0a08
ich_spi_read_page: offset=2046720, number=256, buf=0xb78b0b08
ich_spi_read_page: offset=2046976, number=256, buf=0xb78b0c08
ich_spi_read_page: offset=2047232, number=256, buf=0xb78b0d08
ich_spi_read_page: offset=2047488, number=256, buf=0xb78b0e08
ich_spi_read_page: offset=2047744, number=256, buf=0xb78b0f08
ich_spi_read_page: offset=2048000, number=256, buf=0xb78b1008
ich_spi_read_page: offset=2048256, number=256, buf=0xb78b1108
ich_spi_read_page: offset=2048512, number=256, buf=0xb78b1208
ich_spi_read_page: offset=2048768, number=256, buf=0xb78b1308
ich_spi_read_page: offset=2049024, number=256, buf=0xb78b1408
ich_spi_read_page: offset=2049280, number=256, buf=0xb78b1508
ich_spi_read_page: offset=2049536, number=256, buf=0xb78b1608
ich_spi_read_page: offset=2049792, number=256, buf=0xb78b1708
ich_spi_read_page: offset=2050048, number=256, buf=0xb78b1808
ich_spi_read_page: offset=2050304, number=256, buf=0xb78b1908
ich_spi_read_page: offset=2050560, number=256, buf=0xb78b1a08
ich_spi_read_page: offset=2050816, number=256, buf=0xb78b1b08
ich_spi_read_page: offset=2051072, number=256, buf=0xb78b1c08
ich_spi_read_page: offset=2051328, number=256, buf=0xb78b1d08
ich_spi_read_page: offset=2051584, number=256, buf=0xb78b1e08
ich_spi_read_page: offset=2051840, number=256, buf=0xb78b1f08
ich_spi_read_page: offset=2052096, number=256, buf=0xb78b2008
ich_spi_read_page: offset=2052352, number=256, buf=0xb78b2108
ich_spi_read_page: offset=2052608, number=256, buf=0xb78b2208
ich_spi_read_page: offset=2052864, number=256, buf=0xb78b2308
ich_spi_read_page: offset=2053120, number=256, buf=0xb78b2408
ich_spi_read_page: offset=2053376, number=256, buf=0xb78b2508
ich_spi_read_page: offset=2053632, number=256, buf=0xb78b2608
ich_spi_read_page: offset=2053888, number=256, buf=0xb78b2708
ich_spi_read_page: offset=2054144, number=256, buf=0xb78b2808
ich_spi_read_page: offset=2054400, number=256, buf=0xb78b2908
ich_spi_read_page: offset=2054656, number=256, buf=0xb78b2a08
ich_spi_read_page: offset=2054912, number=256, buf=0xb78b2b08
ich_spi_read_page: offset=2055168, number=256, buf=0xb78b2c08
ich_spi_read_page: offset=2055424, number=256, buf=0xb78b2d08
ich_spi_read_page: offset=2055680, number=256, buf=0xb78b2e08
ich_spi_read_page: offset=2055936, number=256, buf=0xb78b2f08
ich_spi_read_page: offset=2056192, number=256, buf=0xb78b3008
ich_spi_read_page: offset=2056448, number=256, buf=0xb78b3108
ich_spi_read_page: offset=2056704, number=256, buf=0xb78b3208
ich_spi_read_page: offset=2056960, number=256, buf=0xb78b3308
ich_spi_read_page: offset=2057216, number=256, buf=0xb78b3408
ich_spi_read_page: offset=2057472, number=256, buf=0xb78b3508
ich_spi_read_page: offset=2057728, number=256, buf=0xb78b3608
ich_spi_read_page: offset=2057984, number=256, buf=0xb78b3708
ich_spi_read_page: offset=2058240, number=256, buf=0xb78b3808
ich_spi_read_page: offset=2058496, number=256, buf=0xb78b3908
ich_spi_read_page: offset=2058752, number=256, buf=0xb78b3a08
ich_spi_read_page: offset=2059008, number=256, buf=0xb78b3b08
ich_spi_read_page: offset=2059264, number=256, buf=0xb78b3c08
ich_spi_read_page: offset=2059520, number=256, buf=0xb78b3d08
ich_spi_read_page: offset=2059776, number=256, buf=0xb78b3e08
ich_spi_read_page: offset=2060032, number=256, buf=0xb78b3f08
ich_spi_read_page: offset=2060288, number=256, buf=0xb78b4008
ich_spi_read_page: offset=2060544, number=256, buf=0xb78b4108
ich_spi_read_page: offset=2060800, number=256, buf=0xb78b4208
ich_spi_read_page: offset=2061056, number=256, buf=0xb78b4308
ich_spi_read_page: offset=2061312, number=256, buf=0xb78b4408
ich_spi_read_page: offset=2061568, number=256, buf=0xb78b4508
ich_spi_read_page: offset=2061824, number=256, buf=0xb78b4608
ich_spi_read_page: offset=2062080, number=256, buf=0xb78b4708
ich_spi_read_page: offset=2062336, number=256, buf=0xb78b4808
ich_spi_read_page: offset=2062592, number=256, buf=0xb78b4908
ich_spi_read_page: offset=2062848, number=256, buf=0xb78b4a08
ich_spi_read_page: offset=2063104, number=256, buf=0xb78b4b08
ich_spi_read_page: offset=2063360, number=256, buf=0xb78b4c08
ich_spi_read_page: offset=2063616, number=256, buf=0xb78b4d08
ich_spi_read_page: offset=2063872, number=256, buf=0xb78b4e08
ich_spi_read_page: offset=2064128, number=256, buf=0xb78b4f08
ich_spi_read_page: offset=2064384, number=256, buf=0xb78b5008
ich_spi_read_page: offset=2064640, number=256, buf=0xb78b5108
ich_spi_read_page: offset=2064896, number=256, buf=0xb78b5208
ich_spi_read_page: offset=2065152, number=256, buf=0xb78b5308
ich_spi_read_page: offset=2065408, number=256, buf=0xb78b5408
ich_spi_read_page: offset=2065664, number=256, buf=0xb78b5508
ich_spi_read_page: offset=2065920, number=256, buf=0xb78b5608
ich_spi_read_page: offset=2066176, number=256, buf=0xb78b5708
ich_spi_read_page: offset=2066432, number=256, buf=0xb78b5808
ich_spi_read_page: offset=2066688, number=256, buf=0xb78b5908
ich_spi_read_page: offset=2066944, number=256, buf=0xb78b5a08
ich_spi_read_page: offset=2067200, number=256, buf=0xb78b5b08
ich_spi_read_page: offset=2067456, number=256, buf=0xb78b5c08
ich_spi_read_page: offset=2067712, number=256, buf=0xb78b5d08
ich_spi_read_page: offset=2067968, number=256, buf=0xb78b5e08
ich_spi_read_page: offset=2068224, number=256, buf=0xb78b5f08
ich_spi_read_page: offset=2068480, number=256, buf=0xb78b6008
ich_spi_read_page: offset=2068736, number=256, buf=0xb78b6108
ich_spi_read_page: offset=2068992, number=256, buf=0xb78b6208
ich_spi_read_page: offset=2069248, number=256, buf=0xb78b6308
ich_spi_read_page: offset=2069504, number=256, buf=0xb78b6408
ich_spi_read_page: offset=2069760, number=256, buf=0xb78b6508
ich_spi_read_page: offset=2070016, number=256, buf=0xb78b6608
ich_spi_read_page: offset=2070272, number=256, buf=0xb78b6708
ich_spi_read_page: offset=2070528, number=256, buf=0xb78b6808
ich_spi_read_page: offset=2070784, number=256, buf=0xb78b6908
ich_spi_read_page: offset=2071040, number=256, buf=0xb78b6a08
ich_spi_read_page: offset=2071296, number=256, buf=0xb78b6b08
ich_spi_read_page: offset=2071552, number=256, buf=0xb78b6c08
ich_spi_read_page: offset=2071808, number=256, buf=0xb78b6d08
ich_spi_read_page: offset=2072064, number=256, buf=0xb78b6e08
ich_spi_read_page: offset=2072320, number=256, buf=0xb78b6f08
ich_spi_read_page: offset=2072576, number=256, buf=0xb78b7008
ich_spi_read_page: offset=2072832, number=256, buf=0xb78b7108
ich_spi_read_page: offset=2073088, number=256, buf=0xb78b7208
ich_spi_read_page: offset=2073344, number=256, buf=0xb78b7308
ich_spi_read_page: offset=2073600, number=256, buf=0xb78b7408
ich_spi_read_page: offset=2073856, number=256, buf=0xb78b7508
ich_spi_read_page: offset=2074112, number=256, buf=0xb78b7608
ich_spi_read_page: offset=2074368, number=256, buf=0xb78b7708
ich_spi_read_page: offset=2074624, number=256, buf=0xb78b7808
ich_spi_read_page: offset=2074880, number=256, buf=0xb78b7908
ich_spi_read_page: offset=2075136, number=256, buf=0xb78b7a08
ich_spi_read_page: offset=2075392, number=256, buf=0xb78b7b08
ich_spi_read_page: offset=2075648, number=256, buf=0xb78b7c08
ich_spi_read_page: offset=2075904, number=256, buf=0xb78b7d08
ich_spi_read_page: offset=2076160, number=256, buf=0xb78b7e08
ich_spi_read_page: offset=2076416, number=256, buf=0xb78b7f08
ich_spi_read_page: offset=2076672, number=256, buf=0xb78b8008
ich_spi_read_page: offset=2076928, number=256, buf=0xb78b8108
ich_spi_read_page: offset=2077184, number=256, buf=0xb78b8208
ich_spi_read_page: offset=2077440, number=256, buf=0xb78b8308
ich_spi_read_page: offset=2077696, number=256, buf=0xb78b8408
ich_spi_read_page: offset=2077952, number=256, buf=0xb78b8508
ich_spi_read_page: offset=2078208, number=256, buf=0xb78b8608
ich_spi_read_page: offset=2078464, number=256, buf=0xb78b8708
ich_spi_read_page: offset=2078720, number=256, buf=0xb78b8808
ich_spi_read_page: offset=2078976, number=256, buf=0xb78b8908
ich_spi_read_page: offset=2079232, number=256, buf=0xb78b8a08
ich_spi_read_page: offset=2079488, number=256, buf=0xb78b8b08
ich_spi_read_page: offset=2079744, number=256, buf=0xb78b8c08
ich_spi_read_page: offset=2080000, number=256, buf=0xb78b8d08
ich_spi_read_page: offset=2080256, number=256, buf=0xb78b8e08
ich_spi_read_page: offset=2080512, number=256, buf=0xb78b8f08
ich_spi_read_page: offset=2080768, number=256, buf=0xb78b9008
ich_spi_read_page: offset=2081024, number=256, buf=0xb78b9108
ich_spi_read_page: offset=2081280, number=256, buf=0xb78b9208
ich_spi_read_page: offset=2081536, number=256, buf=0xb78b9308
ich_spi_read_page: offset=2081792, number=256, buf=0xb78b9408
ich_spi_read_page: offset=2082048, number=256, buf=0xb78b9508
ich_spi_read_page: offset=2082304, number=256, buf=0xb78b9608
ich_spi_read_page: offset=2082560, number=256, buf=0xb78b9708
ich_spi_read_page: offset=2082816, number=256, buf=0xb78b9808
ich_spi_read_page: offset=2083072, number=256, buf=0xb78b9908
ich_spi_read_page: offset=2083328, number=256, buf=0xb78b9a08
ich_spi_read_page: offset=2083584, number=256, buf=0xb78b9b08
ich_spi_read_page: offset=2083840, number=256, buf=0xb78b9c08
ich_spi_read_page: offset=2084096, number=256, buf=0xb78b9d08
ich_spi_read_page: offset=2084352, number=256, buf=0xb78b9e08
ich_spi_read_page: offset=2084608, number=256, buf=0xb78b9f08
ich_spi_read_page: offset=2084864, number=256, buf=0xb78ba008
ich_spi_read_page: offset=2085120, number=256, buf=0xb78ba108
ich_spi_read_page: offset=2085376, number=256, buf=0xb78ba208
ich_spi_read_page: offset=2085632, number=256, buf=0xb78ba308
ich_spi_read_page: offset=2085888, number=256, buf=0xb78ba408
ich_spi_read_page: offset=2086144, number=256, buf=0xb78ba508
ich_spi_read_page: offset=2086400, number=256, buf=0xb78ba608
ich_spi_read_page: offset=2086656, number=256, buf=0xb78ba708
ich_spi_read_page: offset=2086912, number=256, buf=0xb78ba808
ich_spi_read_page: offset=2087168, number=256, buf=0xb78ba908
ich_spi_read_page: offset=2087424, number=256, buf=0xb78baa08
ich_spi_read_page: offset=2087680, number=256, buf=0xb78bab08
ich_spi_read_page: offset=2087936, number=256, buf=0xb78bac08
ich_spi_read_page: offset=2088192, number=256, buf=0xb78bad08
ich_spi_read_page: offset=2088448, number=256, buf=0xb78bae08
ich_spi_read_page: offset=2088704, number=256, buf=0xb78baf08
ich_spi_read_page: offset=2088960, number=256, buf=0xb78bb008
ich_spi_read_page: offset=2089216, number=256, buf=0xb78bb108
ich_spi_read_page: offset=2089472, number=256, buf=0xb78bb208
ich_spi_read_page: offset=2089728, number=256, buf=0xb78bb308
ich_spi_read_page: offset=2089984, number=256, buf=0xb78bb408
ich_spi_read_page: offset=2090240, number=256, buf=0xb78bb508
ich_spi_read_page: offset=2090496, number=256, buf=0xb78bb608
ich_spi_read_page: offset=2090752, number=256, buf=0xb78bb708
ich_spi_read_page: offset=2091008, number=256, buf=0xb78bb808
ich_spi_read_page: offset=2091264, number=256, buf=0xb78bb908
ich_spi_read_page: offset=2091520, number=256, buf=0xb78bba08
ich_spi_read_page: offset=2091776, number=256, buf=0xb78bbb08
ich_spi_read_page: offset=2092032, number=256, buf=0xb78bbc08
ich_spi_read_page: offset=2092288, number=256, buf=0xb78bbd08
ich_spi_read_page: offset=2092544, number=256, buf=0xb78bbe08
ich_spi_read_page: offset=2092800, number=256, buf=0xb78bbf08
ich_spi_read_page: offset=2093056, number=256, buf=0xb78bc008
ich_spi_read_page: offset=2093312, number=256, buf=0xb78bc108
ich_spi_read_page: offset=2093568, number=256, buf=0xb78bc208
ich_spi_read_page: offset=2093824, number=256, buf=0xb78bc308
ich_spi_read_page: offset=2094080, number=256, buf=0xb78bc408
ich_spi_read_page: offset=2094336, number=256, buf=0xb78bc508
ich_spi_read_page: offset=2094592, number=256, buf=0xb78bc608
ich_spi_read_page: offset=2094848, number=256, buf=0xb78bc708
ich_spi_read_page: offset=2095104, number=256, buf=0xb78bc808
ich_spi_read_page: offset=2095360, number=256, buf=0xb78bc908
ich_spi_read_page: offset=2095616, number=256, buf=0xb78bca08
ich_spi_read_page: offset=2095872, number=256, buf=0xb78bcb08
ich_spi_read_page: offset=2096128, number=256, buf=0xb78bcc08
ich_spi_read_page: offset=2096384, number=256, buf=0xb78bcd08
ich_spi_read_page: offset=2096640, number=256, buf=0xb78bce08
ich_spi_read_page: offset=2096896, number=256, buf=0xb78bcf08
FAILED!
ERROR at 0x00000000: Expected=0xff, Read=0x41

I have not found any "shadowed bios" or like this option in official AMI bios

I used latest svn revision of flashrom from corebootv3

Thanks
Jon

Hi Jon,
blink at nm.ru wrote:
> Is it normal or am I doing something wrong?

I would say neither.


> addr-75:~/coreboot-v3/util/flashrom # ./flashrom -E
> Calibrating delay loop... OK.
> No coreboot table found.
> Found chipset "Intel ICH9R", enabling flash write... OK.
> Found chip "SST SST25VF016B" (2048 KB) at physical address 0xffe00000.
> Erasing flash chip... FAILED!
> ERROR at 0x00000000: Expected=0xff, Read=0x41

This is the best test right now. Writing doesn't work on your
platform for some reason. It would be helpful to see output from
flashrom -E -V

Possibly the BIOS has restricted flash chip access.

Also, which revision of flashrom is this? It seems a recent one, but
if you haven't already please run svn up to get the very latest
revision.


Thanks!

//Peter

--
coreboot mailing list: coreboot at coreboot.org 
http://www.coreboot.org/mailman/listinfo/coreboot

----- ????? ????????????? ????????? -----

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From r.marek at assembler.cz  Thu Feb  5 13:43:23 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Thu, 05 Feb 2009 13:43:23 +0100
Subject: [coreboot] 780/700 Documentation
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025AD23C@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025AD23C@sbjgexmb1.amd.com>
Message-ID: <498ADEEB.50007@assembler.cz>

Hi,

> We have been working on the RS780/SB700 for about 2 weeks. Before we can
> submit our code, we realized that it doesn't make sense if the
> documentation is not available. 

Well it does. Sometimes code is better than nothing ;)

> We can get the datasheet as an AMD
> engineer. How can the developer in Coreboot.org get? Do we need any
> official procedure to make the document public?

Yes I think so. Maybe ask Marc how it was.

We get manuals from:
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_15137,00.html

Rudolf



From ward at gnu.org  Thu Feb  5 13:59:36 2009
From: ward at gnu.org (Ward Vandewege)
Date: Thu, 5 Feb 2009 07:59:36 -0500
Subject: [coreboot] 780/700 Documentation
In-Reply-To: <498ADEEB.50007@assembler.cz>
References: <DD1CC71B621B004FA76856E5129D6B17025AD23C@sbjgexmb1.amd.com>
	<498ADEEB.50007@assembler.cz>
Message-ID: <20090205125936.GA17055@localdomain>

On Thu, Feb 05, 2009 at 01:43:23PM +0100, Rudolf Marek wrote:
>> We have been working on the RS780/SB700 for about 2 weeks. Before we can
>> submit our code, we realized that it doesn't make sense if the
>> documentation is not available. 
>
> Well it does. Sometimes code is better than nothing ;)

Fully agreed. It's now pretty much impossible to buy 690-based desktop
boards, so we really need the 780/700 code as soon as possible if we want to
support at least some desktops...

>> We can get the datasheet as an AMD
>> engineer. How can the developer in Coreboot.org get? Do we need any
>> official procedure to make the document public?

I hope that can get sorted out soon - having the docs publicly available is
really important as it facilitates coreboot development greatly.

Thanks,
Ward.

-- 
Ward Vandewege <ward at fsf.org>
Free Software Foundation - Senior Systems Administrator



From kevin at koconnor.net  Thu Feb  5 14:36:56 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Thu, 5 Feb 2009 08:36:56 -0500
Subject: [coreboot] FW: Two test result(linux+2G-RAM>10minutes
	and	install ubuntu8.10) of vx800 patch
In-Reply-To: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
Message-ID: <20090205133656.GA8655@morn.localdomain>

On Thu, Feb 05, 2009 at 11:33:02AM +0800, JasonZhao at viatech.com.cn wrote:
> My VX800 bug of "boot linux with 2G mem >10 minutes" has been proved to
> be the problem of MTRR setting.  Thanks for Carldani, Rudolf and Bari.
> 1 The root cause is:
> 1) The free memory I report to coreboot through ram_resource is [0,
> 1983M=2G-64M(Framebuffer)-1M(TOP 1M SM Memory)].  If I report [0,
> 1984M=2G-64M(Framebuffer)], then all is OK.

Is "SM Memory" the memory used by System Management Mode?  Shouldn't
this memory be cached anyway?

-Kevin



From r.marek at assembler.cz  Thu Feb  5 14:43:29 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Thu, 05 Feb 2009 14:43:29 +0100
Subject: [coreboot] FW: Two test
 result(linux+2G-RAM>10minutes	and	install ubuntu8.10) of vx800 patch
In-Reply-To: <20090205133656.GA8655@morn.localdomain>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
	<20090205133656.GA8655@morn.localdomain>
Message-ID: <498AED01.4090808@assembler.cz>

Kevin O'Connor wrote:
> On Thu, Feb 05, 2009 at 11:33:02AM +0800, JasonZhao at viatech.com.cn wrote:
>> My VX800 bug of "boot linux with 2G mem >10 minutes" has been proved to
>> be the problem of MTRR setting.  Thanks for Carldani, Rudolf and Bari.
>> 1 The root cause is:
>> 1) The free memory I report to coreboot through ram_resource is [0,
>> 1983M=2G-64M(Framebuffer)-1M(TOP 1M SM Memory)].  If I report [0,
>> 1984M=2G-64M(Framebuffer)], then all is OK.
> 
> Is "SM Memory" the memory used by System Management Mode?  Shouldn't
> this memory be cached anyway?

This depends on CPU imho.

R.

> 
> -Kevin
> 
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot



From jirik.svoboda at seznam.cz  Thu Feb  5 09:46:18 2009
From: jirik.svoboda at seznam.cz (=?us-ascii?Q?Jiri=20Svoboda?=)
Date: Thu, 05 Feb 2009 09:46:18 +0100 (CET)
Subject: [coreboot] libpayload/libc/memory.c copied from buggy HelenOS code
Message-ID: <5577.10514-5922-686575387-1233823578@seznam.cz>

Hi there folks,

my name is Jiri Svoboda, of HelenOS project. While it delights us that Coreboot makes use of some of our code, I'd like to warn you that  the memxxx() operations in libpayload/libc/memory.c you copied from the HelenOS C library are terribly flawed. They have been fixed in HelenOS since. So I'd suggest either syncing with our code or re-writing them or something. More specifically:

memmove() - this is completely wrong. It will fail when moving by less than 4 bytes.
memcpy() and memmove() - both will only work on word-aligned blocks on non-Intel platforms (this may not be a concern to you)

If you don't care about non-Intel, the easiest way would be to copy a recent version of memmove() from our trunk and that should do the trick - remove the problem when moving by less than word size.

Note that I'm not on this mailing list. If you want to reach me, Cc me.

Cheers,
Jiri



From fengyuning1984 at gmail.com  Thu Feb  5 18:16:53 2009
From: fengyuning1984 at gmail.com (FENG Yu Ning)
Date: Fri, 6 Feb 2009 01:16:53 +0800
Subject: [coreboot] flashrom doesn't work on asus P5K-E wifi, ICH9-R
In-Reply-To: <12338269855072.558129970.blink@nm.ru>
References: <20090205012703.15980.qmail@stuge.se>
	<12338265084321.1784999684.blink@nm.ru>
	<12338269855072.558129970.blink@nm.ru>
Message-ID: <a505dc9d0902050916n4751e1dvdf4c7fb8408d5240@mail.gmail.com>

On Thu, Feb 5, 2009 at 5:43 PM,  <blink at nm.ru> wrote:
> Erasing flash chip... Some block protection in effect, disabling
> Invalid OPCODE 0x50
> spi_write_status_enable failed
> spi_disable_blockprotect failed

IIRC that "block protection" is implemented by the flash chip. If
opcode 0x50 succeeded, erase may work.

The problem is our prepared OPMENU does not contain 0x50. My idea is
to improve the opcode generating mechanism further. It may be better
to do lazy opcode programming and minimal opcode programming. That is,
do not program opcode at chipset initialization even when programming
is allowed. Only when we found a failed opcode, we try to modify one
opcode in OPMENU to the failed one, and then resend the opcode.

yu ning



From mylesgw at gmail.com  Thu Feb  5 21:21:25 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Thu, 5 Feb 2009 13:21:25 -0700
Subject: [coreboot] Bridge Mem Window/Prefetch Window
In-Reply-To: <875545.29478.qm@web57007.mail.re3.yahoo.com>
References: <347511.79954.qm@web57008.mail.re3.yahoo.com>
	<498643CA.2080101@coresystems.de>
	<875545.29478.qm@web57007.mail.re3.yahoo.com>
Message-ID: <2831fecf0902051221g66293159h7907042a6c0ae597@mail.gmail.com>

On Mon, Feb 2, 2009 at 9:01 AM, Dan Lykowski <engineerguy3737 at yahoo.com> wrote:
> CoreBoot Kernel Log:
> [    0.412025] PCI: Bridge: 0000:00:01.0
> [    0.416027]   IO window: 1000-1fff
> [    0.420032]   MEM window: 0xfc500000-0xfc6fffff
> [    0.427975]   PREFETCH window: 0x00000000f0000000- 0x00000000f7ffffff
> [    0.440718] PCI: Bridge: 0000:00:04.0
> [    0.448082]   IO window: 2000-2fff
> [    0.454929]   MEM window: 0xfc700000-0xfc7fffff
> [    0.464029]   PREFETCH window: disabled.
> [    0.471919] PCI: Bridge: 0000:00:07.0
> [    0.479285]   IO window: 3000-3fff
> [    0.486133]   MEM window: 0xfc000000-0xfc4fffff
> [    0.495233]   PREFETCH window: disabled.
> [    0.503122] PCI: Bridge: 0000:00:14.4
> [    0.510485]   IO window: disabled.
> [    0.517322]   MEM window: disabled.
> [    0.524338]   PREFETCH window: disabled.
>
> Closed BIOS:
> [    0.412025] PCI: Bridge: 0000:00:01.0
> [    0.416027]   IO window: c000-cfff
> [    0.420032]   MEM window: 0xfdd00000-0xfdefffff
> [    0.427975]   PREFETCH window: 0x00000000d0000000- 0x00000000dfffffff
> [    0.440718] PCI: Bridge: 0000:00:04.0
> [    0.448082]   IO window: e000-efff
> [    0.454929]   MEM window: 0xfda00000-0xfdafffff
> [    0.464029]   PREFETCH window: 0x00000000fd900000 - 0x00000000fd9fffff
> [    0.471919] PCI: Bridge: 0000:00:07.0
> [    0.479285]   IO window: d000-dfff
> [    0.486133]   MEM window: 0xfd000000-0xfd7fffff
> [    0.495233]   PREFETCH window: 0x00000000fdf00000-0x00000000fdffffff
> [    0.503122] PCI: Bridge: 0000:00:14.4
> [    0.510485]   IO window: b000-bffff
> [    0.517322]   MEM window: 0xfdc00000-0xfdcfffff
> [    0.524338]   PREFETCH window: 0x00000000fdb00000-0x00000000fdbfffff

I think lspci -tv would help us know what's going on here.

What devices are behind the bridges that don't have prefetchable
memory allocated to them?  Is it space reserved for hot-plug?

Thanks,
Myles



From mylesgw at gmail.com  Thu Feb  5 21:26:28 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Thu, 5 Feb 2009 13:26:28 -0700
Subject: [coreboot] flashrom: Can't mmap memory
Message-ID: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>

When I boot using the factory BIOS on my s2895 flashrom works.  When I
boot with Coreboot, I get the Error:

Can't mmap memory using /dev/mem: Operation not permitted

It shouldn't be kernel parameters since I'm using the same grub2 entry
to boot either way.

This sounds a little too familiar, but I can't find a thread where
this isn't linked to a newer, more restrictive kernel.

Thanks,
Myles



From ebiederm at xmission.com  Thu Feb  5 22:22:55 2009
From: ebiederm at xmission.com (Eric W. Biederman)
Date: Thu, 05 Feb 2009 13:22:55 -0800
Subject: [coreboot] CoreBoot and Payloads
In-Reply-To: <13426df10902030801w21d1e7adh51d4a1b8e96bd986@mail.gmail.com>
	(ron minnich's message of "Tue\, 3 Feb 2009 08\:01\:44 -0800")
References: <49870D6C.3040608@levigo.de> <20090202152615.29495.qmail@stuge.se>
	<4988620E.8050308@levigo.de> <20090203155535.26595.qmail@stuge.se>
	<13426df10902030801w21d1e7adh51d4a1b8e96bd986@mail.gmail.com>
Message-ID: <m1hc38tw7k.fsf@fess.ebiederm.org>

ron minnich <rminnich at gmail.com> writes:

> On Tue, Feb 3, 2009 at 7:55 AM, Peter Stuge <peter at stuge.se> wrote:
>> Piotr Brostovski wrote:
>>> I'm asking myself if it is possible that mkelfImage simply isn't
>>> compatible with current gPXE releases?
>>
>> mkelfImage is strictly for Linux.
>>
>> Upstream gPXE can not be built for coreboot, but here is a web page
>> with some information that may still be useful:
>>
>
> I'm puzzled about that. Was gPXE derived from etherboot and, if so,
> why did they drop support?

Yes etherboot transformed into gpxe. To achieve their goals
in gpxe it took something very similar to a complete rewrite.
Sort of like the linuxbios v1 to linuxbios v2 transition.

> If not, how bad does it look to add coreboot support the way Eric
> added it for etherboot?

There are two ways this is interesting.

1) Integrate SeaBIOS and gpxe.  Which will nicely add pxe booting
support to SeaBIOS in the ``BIOS'' way.  
   This should be almost trivial as this is the mode gpxe is designed
   to be run in.

2) As a pure linuxBIOS payload that will work on multiple
   architectures.  If we care about non-x86 non-SEABIOS there are the
   patches that were listed, and you can find where the linuxBIOS
   support was removed in the repository so anyone who wants a start
   can see what the code used to look like.

Eric



From peter at stuge.se  Fri Feb  6 00:01:57 2009
From: peter at stuge.se (Peter Stuge)
Date: Fri, 6 Feb 2009 00:01:57 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
Message-ID: <20090205230157.32498.qmail@stuge.se>

Myles Watson wrote:
> When I boot using the factory BIOS on my s2895 flashrom works.  When I
> boot with Coreboot, I get the Error:
> 
> Can't mmap memory using /dev/mem: Operation not permitted

Please try this with the latest revision, which will have a slightly
better error message.


> This sounds a little too familiar, but I can't find a thread where
> this isn't linked to a newer, more restrictive kernel.

I have seen this once before, in a system with a custom BIOS. I did
not invest the time needed to debug why the kernel does not permit
the mmap. printk needs to go into the kernel for that.


//Peter



From peter at stuge.se  Fri Feb  6 00:05:47 2009
From: peter at stuge.se (Peter Stuge)
Date: Fri, 6 Feb 2009 00:05:47 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <20090205230157.32498.qmail@stuge.se>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<20090205230157.32498.qmail@stuge.se>
Message-ID: <20090205230547.972.qmail@stuge.se>

Peter Stuge wrote:
> > Can't mmap memory using /dev/mem: Operation not permitted
> 
> I have seen this once before, in a system with a custom BIOS.

Should mention that it was resolved with lseek()+read() instead of
mmap().


//Peter



From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb  6 00:19:03 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 06 Feb 2009 00:19:03 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
Message-ID: <498B73E7.1000105@gmx.net>

On 05.02.2009 21:26, Myles Watson wrote:
> When I boot using the factory BIOS on my s2895 flashrom works.  When I
> boot with Coreboot, I get the Error:
>
> Can't mmap memory using /dev/mem: Operation not permitted
>
> It shouldn't be kernel parameters since I'm using the same grub2 entry
> to boot either way.
>
> This sounds a little too familiar, but I can't find a thread where
> this isn't linked to a newer, more restrictive kernel.
>   

Could be the memory map passed by cbtable or e820. A diff between dmesg
for each configuration would probably reveal quite a bit of info.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From JasonZhao at viatech.com.cn  Fri Feb  6 02:43:35 2009
From: JasonZhao at viatech.com.cn (JasonZhao at viatech.com.cn)
Date: Fri, 6 Feb 2009 09:43:35 +0800
Subject: [coreboot] FW: Two test result(linux+2G-RAM>10minutes
	andinstall ubuntu8.10) of vx800 patch
In-Reply-To: <20090205133656.GA8655@morn.localdomain>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
	<20090205133656.GA8655@morn.localdomain>
Message-ID: <9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>



-jasonzhao 

> -----Original Message-----
> From: Kevin O'Connor [mailto:kevin at koconnor.net]
> Sent: Thursday, February 05, 2009 9:37 PM
> To: Jason Zhao
> Cc: coreboot at coreboot.org
> Subject: Re: [coreboot] FW: Two test result(linux+2G-RAM>10minutes
andinstall
> ubuntu8.10) of vx800 patch
> 
> On Thu, Feb 05, 2009 at 11:33:02AM +0800, JasonZhao at viatech.com.cn
wrote:
> > My VX800 bug of "boot linux with 2G mem >10 minutes" has been proved
to
> > be the problem of MTRR setting.  Thanks for Carldani, Rudolf and
Bari.
> > 1 The root cause is:
> > 1) The free memory I report to coreboot through ram_resource is [0,
> > 1983M=2G-64M(Framebuffer)-1M(TOP 1M SM Memory)].  If I report [0,
> > 1984M=2G-64M(Framebuffer)], then all is OK.
> 
> Is "SM Memory" the memory used by System Management Mode?  Shouldn't
I think it is. (I do not use System Management Mode in my
vx800/coreboot-v2)

> this memory be cached anyway?
I ask my colleague who work for EFI. He said in his EFI project, SMM
area should not be cached,  and he had tried to cache that area, but
cause system crashed.
I don't	know if he is right, since I can not find any reason why SMM
area should not be cached.

> -Kevin




From rminnich at gmail.com  Fri Feb  6 02:52:57 2009
From: rminnich at gmail.com (ron minnich)
Date: Thu, 5 Feb 2009 17:52:57 -0800
Subject: [coreboot] FW: Two test result(linux+2G-RAM>10minutes
	andinstall ubuntu8.10) of vx800 patch
In-Reply-To: <9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
	<20090205133656.GA8655@morn.localdomain>
	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
Message-ID: <13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>

On Thu, Feb 5, 2009 at 5:43 PM,  <JasonZhao at viatech.com.cn> wrote:

> I ask my colleague who work for EFI. He said in his EFI project, SMM
> area should not be cached,  and he had tried to cache that area, but
> cause system crashed.
> I don't know if he is right, since I can not find any reason why SMM
> area should not be cached.

Stepan can tell us, since he has working smm on kontron, but I can not
believe smm can not be cached.

I am glad you found the problem, now can know that fixing mtrr code
will be very helpful.

thanks

ron



From dchmelik at gmail.com  Fri Feb  6 03:42:27 2009
From: dchmelik at gmail.com (David Melik)
Date: Thu, 5 Feb 2009 18:42:27 -0800
Subject: [coreboot] coreboot on s4882?
Message-ID: <b8cd117e0902051842l1378a078i2eb7962ff14730ff@mail.gmail.com>

Thanks again (Myles & everyone) for discussing coreboot for s4882 until I
could compile & install.  After doing so, my s4882 just has a blank screen
and continually does 2 alternating beeps (like a siren.)

I saw no POST codes on coreboot.org.  I saved coreboot.rom and now have a
Slackware pII system up (no coreboot) as well as a Windows 2.4GHz Athlon.
What next?

I only installed grub2 as payload; grub2 may not be the problem: IIRC, I
included chainloader in grub2.elf: my '/' has LILO.  Coreboot.org has
'official grub' (grub2) and 'grub2' pages, which say different things,
though they likely mean the same thing.

I neither want to re-flash old BIOS nor yet try coreboot on my alternate
Slackware system, though I plan to after any possible functional s4882
build.

Coreboot compiles within about 1 min. on 8-core a880 w/8Gb and would be
relatively quick even on dual pIII.  I am unsure about pII (I skipped from
pI.)  Does DJGPP work well on XP, or are Cygwin or MinGW like it?  I have
never done GUI programming--incl. 'programming on an OS requiring GUI
(except in class)' and would rather not boot Windows until I learn to add it
to BOINC ( http://boinc.berkeley.edu ) on a LAN.

--David
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From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb  6 03:54:34 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 06 Feb 2009 03:54:34 +0100
Subject: [coreboot] FW: Two test
 result(linux+2G-RAM>10minutes	andinstall ubuntu8.10) of vx800 patch
In-Reply-To: <13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>	<20090205133656.GA8655@morn.localdomain>	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
Message-ID: <498BA66A.30400@gmx.net>

On 06.02.2009 02:52, ron minnich wrote:
> On Thu, Feb 5, 2009 at 5:43 PM,  <JasonZhao at viatech.com.cn> wrote:
>
>   
>> I ask my colleague who work for EFI. He said in his EFI project, SMM
>> area should not be cached,  and he had tried to cache that area, but
>> cause system crashed.
>> I don't know if he is right, since I can not find any reason why SMM
>> area should not be cached.
>>     
>
> Stepan can tell us, since he has working smm on kontron, but I can not
> believe smm can not be cached.
>   

Maybe if you have SMM memory hoisted to the same place as other memory.
In that case, the CPU may get confused and accidentially write SMM
memory contents to the normal RAM or video RAM at the same location.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From mylesgw at gmail.com  Fri Feb  6 04:18:47 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Thu, 5 Feb 2009 20:18:47 -0700
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <498B73E7.1000105@gmx.net>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net>
Message-ID: <BB866006A2284DFEB4A356383A48583B@chimp>



> -----Original Message-----
> From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net]
> Sent: Thursday, February 05, 2009 4:19 PM
> To: Myles Watson
> Cc: Coreboot
> Subject: Re: [coreboot] flashrom: Can't mmap memory
> 
> On 05.02.2009 21:26, Myles Watson wrote:
> > When I boot using the factory BIOS on my s2895 flashrom works.  When I
> > boot with Coreboot, I get the Error:
> >
> > Can't mmap memory using /dev/mem: Operation not permitted
> >
> > It shouldn't be kernel parameters since I'm using the same grub2 entry
> > to boot either way.
> >
> > This sounds a little too familiar, but I can't find a thread where
> > this isn't linked to a newer, more restrictive kernel.
> >
> 
> Could be the memory map passed by cbtable or e820. A diff between dmesg
> for each configuration would probably reveal quite a bit of info.

Good idea.  Tomorrow I'll look at that.  The memory maps are quite
different, but in both cases the ROM is marked uncacheable.

Thanks,
Myles




From mylesgw at gmail.com  Fri Feb  6 04:39:47 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Thu, 5 Feb 2009 20:39:47 -0700
Subject: [coreboot] coreboot on s4882?
In-Reply-To: <b8cd117e0902051842l1378a078i2eb7962ff14730ff@mail.gmail.com>
References: <b8cd117e0902051842l1378a078i2eb7962ff14730ff@mail.gmail.com>
Message-ID: <2831fecf0902051939p603c772bub49e99f9c6563f35@mail.gmail.com>

On Thu, Feb 5, 2009 at 7:42 PM, David Melik <dchmelik at gmail.com> wrote:
> Thanks again (Myles & everyone) for discussing coreboot for s4882 until I
> could compile & install.  After doing so, my s4882 just has a blank screen

Do you have a null-modem cable?  Did you see anything on the serial console?

> and continually does 2 alternating beeps (like a siren.)
The siren is the chipset complaining that its timer wasn't touched for
too long.  That sounds like an early problem.


> I saw no POST codes on coreboot.org.
I don't know where there's a list of them, but if you grep the source
for post_code you'll find some.

> I saved coreboot.rom and now have a
> Slackware pII system up (no coreboot) as well as a Windows 2.4GHz Athlon.
> What next?

What size is your coreboot.rom (ls -l)?  What size is your chip?
That's a frequent problem.  If you had to add another ROM, did you
prepend it?

Have you tried it with a warm reset?  It's a bit of a long shot, but
it can affect things sometimes.

> I only installed grub2 as payload; grub2 may not be the problem: IIRC, I
> included chainloader in grub2.elf: my '/' has LILO.  Coreboot.org has
> 'official grub' (grub2) and 'grub2' pages, which say different things,
> though they likely mean the same thing.
It is very unlikely that it is reaching the payload.  If you're
worried about that, use buildrom to build a payload.  Grub2 from
buildrom works well as long as you substitute ata for hd in the
grub.cfg.

> I neither want to re-flash old BIOS nor yet try coreboot on my alternate
> Slackware system, though I plan to after any possible functional s4882
> build.
>
> Coreboot compiles within about 1 min. on 8-core a880 w/8Gb and would be
> relatively quick even on dual pIII.  I am unsure about pII (I skipped from
> pI.)  Does DJGPP work well on XP, or are Cygwin or MinGW like it?  I have
> never done GUI programming--incl. 'programming on an OS requiring GUI
> (except in class)' and would rather not boot Windows until I learn to add it
> to BOINC ( http://boinc.berkeley.edu ) on a LAN.
>
> --David
>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>



From dchmelik at gmail.com  Fri Feb  6 12:21:31 2009
From: dchmelik at gmail.com (David Melik)
Date: Fri, 6 Feb 2009 11:21:31 +0000
Subject: [coreboot] coreboot on s4882?
In-Reply-To: <2831fecf0902051939p603c772bub49e99f9c6563f35@mail.gmail.com>
References: <b8cd117e0902051842l1378a078i2eb7962ff14730ff@mail.gmail.com>
	<2831fecf0902051939p603c772bub49e99f9c6563f35@mail.gmail.com>
Message-ID: <b8cd117e0902060321r11c6ae13tb86c0e8b97c1a3c6@mail.gmail.com>

On 2/6/09, Myles Watson <mylesgw at gmail.com> wrote:
>
> Do you have a null-modem cable?  Did you see anything on the serial
> console?


I have such cables; maybe not a serial console, but away from university I
have some old analog monitors....

[...] if you grep the source for post_code you'll find some.


Good.  I will try this weekend.

What size is your coreboot.rom (ls -l)?  What size is your chip?
> That's a frequent problem.  If you had to add another ROM, did you
> prepend it?


The .rom (saved on a WD 24000 that Slackware 10.2 cannot mount) size had
'5:' over 512 Kb I guess. The manual says 4 MB.  Apparently my ROM is too
small... I doubt I need certain grub2 modules, but I know not what others
do.

Would it help Coreboot more if I make a smaller grub2 to test newer
coreboot2 on s4882 asap or if wait a while and 'prepend' (if it involves
soldering that is alright.)  I know It can be specially configured; maybe
that needs more ROM.

 Have you tried it with a warm reset?  It's a bit of a long shot, but
> it can affect things sometimes.


I think I at least tried or also turned it on later 1 - 3 times.

It is very unlikely that it is reaching the payload.  [...]  Grub2 from
> buildrom works well as long as you substitute ata for hd in the
> grub.cfg.


I may try but would like to try serial consoles:

> I neither want to re-flash [old] BIOS nor yet try coreboot on my alternate
> > Slackware system[....]


--David
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From mylesgw at gmail.com  Fri Feb  6 14:34:15 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 6 Feb 2009 06:34:15 -0700
Subject: [coreboot] coreboot on s4882?
In-Reply-To: <b8cd117e0902060321r11c6ae13tb86c0e8b97c1a3c6@mail.gmail.com>
References: <b8cd117e0902051842l1378a078i2eb7962ff14730ff@mail.gmail.com>
	<2831fecf0902051939p603c772bub49e99f9c6563f35@mail.gmail.com>
	<b8cd117e0902060321r11c6ae13tb86c0e8b97c1a3c6@mail.gmail.com>
Message-ID: <2831fecf0902060534j567623f1k753942d45778b2e7@mail.gmail.com>

On Fri, Feb 6, 2009 at 4:21 AM, David Melik <dchmelik at gmail.com> wrote:
> On 2/6/09, Myles Watson <mylesgw at gmail.com> wrote:
>>
>> Do you have a null-modem cable?  Did you see anything on the serial
>> console?
>
> I have such cables; maybe not a serial console, but away from university I
> have some old analog monitors....

Serial console in this context refers to connecting the serial port of
the s4882 to another machine's via null modem cable and using a
terminal emulator program like minicom, gtkterm, etc. on the other
machine to see what the s4882 is writing to the serial port.

>
>> [...] if you grep the source for post_code you'll find some.
>
> Good.  I will try this weekend.
>
>> What size is your coreboot.rom (ls -l)?  What size is your chip?
>> That's a frequent problem.  If you had to add another ROM, did you
>> prepend it?
>
> The .rom (saved on a WD 24000 that Slackware 10.2 cannot mount) size had
> '5:' over 512 Kb I guess. The manual says 4 MB.  Apparently my ROM is too
> small... I doubt I need certain grub2 modules, but I know not what others
> do.
It's important that the size is exact.  Flash is sized in megabits, so
4 Mbits = 512KB.  This probably isn't the problem, I just wanted to
make sure.

There is a lot of valuable information on coreboot.org.  I recommend
reading through the developer pages.

Thanks,
Myles

> Would it help Coreboot more if I make a smaller grub2 to test newer
> coreboot2 on s4882 asap or if wait a while and 'prepend' (if it involves
> soldering that is alright.)  I know It can be specially configured; maybe
> that needs more ROM.
>
>> Have you tried it with a warm reset?  It's a bit of a long shot, but
>> it can affect things sometimes.
>
> I think I at least tried or also turned it on later 1 - 3 times.
>
>> It is very unlikely that it is reaching the payload.  [...]  Grub2 from
>> buildrom works well as long as you substitute ata for hd in the
>> grub.cfg.
>
> I may try but would like to try serial consoles:
>
>> > I neither want to re-flash [old] BIOS nor yet try coreboot on my
>> > alternate
>> > Slackware system[....]
>
> --David
>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>



From mylesgw at gmail.com  Fri Feb  6 18:19:09 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 6 Feb 2009 10:19:09 -0700
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <BB866006A2284DFEB4A356383A48583B@chimp>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
Message-ID: <2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>

On Thu, Feb 5, 2009 at 8:18 PM, Myles Watson <mylesgw at gmail.com> wrote:
>
>
>> -----Original Message-----
>> From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net]
>> Sent: Thursday, February 05, 2009 4:19 PM
>> To: Myles Watson
>> Cc: Coreboot
>> Subject: Re: [coreboot] flashrom: Can't mmap memory
>>
>> On 05.02.2009 21:26, Myles Watson wrote:
>> > When I boot using the factory BIOS on my s2895 flashrom works.  When I
>> > boot with Coreboot, I get the Error:
>> >
>> > Can't mmap memory using /dev/mem: Operation not permitted
>> >
>> > It shouldn't be kernel parameters since I'm using the same grub2 entry
>> > to boot either way.
>> >
>> > This sounds a little too familiar, but I can't find a thread where
>> > this isn't linked to a newer, more restrictive kernel.
>> >
>>
>> Could be the memory map passed by cbtable or e820. A diff between dmesg
>> for each configuration would probably reveal quite a bit of info.
>
> Good idea.  Tomorrow I'll look at that.  The memory maps are quite
> different, but in both cases the ROM is marked uncacheable.

It turns out that flashrom is getting confused and trying to map
0xfff00000-0x10100000.  The factory BIOS doesn't boost memory up
there, so it was fine.  If I specify the chip with -c SST49LF080A it
succeeds.  I don't know why the size is different depending on whether
you specify the chip or not.

An added printf shows that flash->total_size = 0x800 when it fails,
and 0x400 when it succeeds.

Thanks,
Myles



From mylesgw at gmail.com  Fri Feb  6 18:29:12 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 6 Feb 2009 10:29:12 -0700
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
Message-ID: <2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>

On Fri, Feb 6, 2009 at 10:19 AM, Myles Watson <mylesgw at gmail.com> wrote:
> On Thu, Feb 5, 2009 at 8:18 PM, Myles Watson <mylesgw at gmail.com> wrote:
>>
>>
>>> -----Original Message-----
>>> From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net]
>>> Sent: Thursday, February 05, 2009 4:19 PM
>>> To: Myles Watson
>>> Cc: Coreboot
>>> Subject: Re: [coreboot] flashrom: Can't mmap memory
>>>
>>> On 05.02.2009 21:26, Myles Watson wrote:
>>> > When I boot using the factory BIOS on my s2895 flashrom works.  When I
>>> > boot with Coreboot, I get the Error:
>>> >
>>> > Can't mmap memory using /dev/mem: Operation not permitted
>>> >
>>> > It shouldn't be kernel parameters since I'm using the same grub2 entry
>>> > to boot either way.
>>> >
>>> > This sounds a little too familiar, but I can't find a thread where
>>> > this isn't linked to a newer, more restrictive kernel.
>>> >
>>>
>>> Could be the memory map passed by cbtable or e820. A diff between dmesg
>>> for each configuration would probably reveal quite a bit of info.
>>
>> Good idea.  Tomorrow I'll look at that.  The memory maps are quite
>> different, but in both cases the ROM is marked uncacheable.
>
> It turns out that flashrom is getting confused and trying to map
> 0xfff00000-0x10100000.  The factory BIOS doesn't boost memory up
> there, so it was fine.  If I specify the chip with -c SST49LF080A it
> succeeds.  I don't know why the size is different depending on whether
> you specify the chip or not.
>
> An added printf shows that flash->total_size = 0x800 when it fails,
> and 0x400 when it succeeds.

I should have used flashrom -V earlier.  Here it is:

Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x5b
Probing for SST SST49LF040B, 512 KB: probe_jedec: id1 0xbf, id2 0x5b
Probing for SST SST49LF080A, 1024 KB: probe_jedec: id1 0xbf, id2 0x5b
Found chip "SST SST49LF080A" (1024 KB) at physical address 0xfff00000.
Probing for SST SST49LF160C, 2048 KB: Error accessing flash chip,
0x200000 bytes at 0xfff00000
/dev/mem mmap failed: Operation not permitted

I don't know enough about flashrom to know if it should have stopped,
or if it should have figured out a better base address for the
SST49LF160C.

Hopefully that's enough information to point in the right direction.

Thanks,
Myles



From popkonserve at gmx.de  Fri Feb  6 18:31:25 2009
From: popkonserve at gmx.de (Holger Hesselbarth)
Date: Fri, 06 Feb 2009 18:31:25 +0100
Subject: [coreboot] intel p6 core msrs
In-Reply-To: <20090205233415.8361.qmail@stuge.se>
References: <49847B06.6090408@gmx.de> <20090201013208.28928.qmail@stuge.se>
	<8A81AC62-C18E-47DD-B76C-FC386755FCD8@coresystems.de>
	<20090201170313.21455.qmail@stuge.se> <498B2881.5040802@gmx.de>
	<20090205233415.8361.qmail@stuge.se>
Message-ID: <498C73ED.9020405@gmx.de>

just for a start here is my first real contribution.
here are some answers to questions that Peter Stuge asked..

 >> 		{ 17, 5, "L2PBS", "L2 size per bank", PRESENT_DEC, {
 >> 			{ MSR1(0), "128 kbytes" },
 >> 			{ MSR1(1), "256 kbytes" },
 >> 			{ MSR1(2), "512 kbytes" },
 >> 			{ MSR1(4), "1 Mbytes" },
 >> 			{ MSR1(8), "2 Mbytes" },
 >> 			{ MSR1(16), "4 Mbytes" },
 >> 			{ BITVAL_EOT }
 >> 		}},
 >
 > Hmm, can you explain this field a little more? Will only one bit ever
 > be set at a time?

there's no real info on this in the intel documents i have. welcome to intel's 
msr mystery world :( but based on the available processors with p6 core we can 
assume this: only one bit will be set or none. the intel celerons have 128kB L2 
cache unless they are tualatin cores, then they'll have 256kB cache. all intel 
pentium ii have 512kB L2 cache. all pentium iii processors have 512kB L2 cache 
unless they are coppermine, then they'll have 256kB. pentium iii tualatins have 
512kB L2 cache again. xeons with drake core(derived from pentium ii deschutes) 
have 512kB, 1MB or 2MB cache. tanner (derived from pentium iii katmai) core 
xeons have 1MB or 2MB cache while the cascades cores (derived from pentium iii 
coppermine) have 256kB (!!!) or 2MB cache.
i hope you are not too confused by now.

>>         { 4, 4, "L2LAT", "L2 latency", PRESENT_DEC, NOBITS },
> 
> ..and here. Btw, what unit is this latency expressed in?

the latency is expressed in intel mystery units. since the docs don't say 
anything about the units, my guess is the following. it's in units of cycles of 
the bus speed of the L2 cache bus. on some of the pentium iis and pentium iiis 
the L2 cache was off-chip but on-module. there the latency makes sense and it 
was set to 5 (according to intel's recommendations?). on later models the cache 
went on-chip and the L2 cache latency went down to 1. on abit slot 1 boards the 
cache latency could be adjusted, too.

> A target definition has to be added to msrtool.c as well. A super
> simple entry in struct targetdef alltargets[].

i called it P6 since that's what Intel calls this specific processor core in 
their offical documents. and this msr declaration is for P6 cores only. some tme 
later it should contain all msrs from the P6 core. but you are free to suggest a 
better name :)
Holger
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From rminnich at gmail.com  Fri Feb  6 18:46:00 2009
From: rminnich at gmail.com (ron minnich)
Date: Fri, 6 Feb 2009 09:46:00 -0800
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
Message-ID: <13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>

On Fri, Feb 6, 2009 at 9:29 AM, Myles Watson <mylesgw at gmail.com> wrote:

> Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x5b
> Probing for SST SST49LF040B, 512 KB: probe_jedec: id1 0xbf, id2 0x5b
> Probing for SST SST49LF080A, 1024 KB: probe_jedec: id1 0xbf, id2 0x5b
> Found chip "SST SST49LF080A" (1024 KB) at physical address 0xfff00000.
> Probing for SST SST49LF160C, 2048 KB: Error accessing flash chip,
> 0x200000 bytes at 0xfff00000
> /dev/mem mmap failed: Operation not permitted
>
> I don't know enough about flashrom to know if it should have stopped,
> or if it should have figured out a better base address for the
> SST49LF160C.
>

I think it's a bug.

See this code in probe_flash.

		base = flashbase ? flashbase : (0xffffffff - size + 1);
		flash->virtual_memory = bios = physmap("flash chip", base, size);

It seems to me that if we probed the 1M part and flashbase was
0xfff00000, then the next time through, when we have a 2M part, we'll
use a flashbase that is wrong -- 0xfff00000.

I wonder why we even make this test: flashbase ? flashbase :
(0xffffffff - size + 1)

I think it goes back to the lovely sc520 and other chips that had a
non-standard flashbase. But in that case, we ought to have a better
way to set it than this global.

ron



From mylesgw at gmail.com  Fri Feb  6 22:02:47 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Fri, 6 Feb 2009 14:02:47 -0700
Subject: [coreboot] v2 warnings
Message-ID: <2831fecf0902061302w51f2370fud3201ac61c18a09f@mail.gmail.com>

Remove a couple of warnings (mostly from format strings.)

Signed-off-by: Myles Watson <mylesgw at gmail.com>

Thanks,
Myles
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From rminnich at gmail.com  Fri Feb  6 22:42:32 2009
From: rminnich at gmail.com (ron minnich)
Date: Fri, 6 Feb 2009 13:42:32 -0800
Subject: [coreboot] kontron 9865lcd
Message-ID: <13426df10902061342j40781273pa122463bdaad69c0@mail.gmail.com>

output with X right now is terrible. If anyone was an xconfig file
that works with these boards, let me know.

We're just trying to boot with standard bios first.

thanks

ron



From marcj303 at gmail.com  Fri Feb  6 23:34:53 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Fri, 6 Feb 2009 15:34:53 -0700
Subject: [coreboot] [v3][patch] Fix stdcall for asm to C call.
Message-ID: <534e5dc20902061434j6e52260o6027a1db93efe91f@mail.gmail.com>

Coreboot uses the compiler option -mregparm=3 which causes variables to be
passed in registers. This is good for size and speed but not good when we
call a C function from asm. Force stage1_phase1 to use stdcall and get
variables off the stack.

Note that I didn't change stage1_phase3 because it doesn't use any variables.

Signed-off-by: Marc Jones <marcj303 at gmail.com>
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From marcj303 at gmail.com  Fri Feb  6 23:37:28 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Fri, 6 Feb 2009 15:37:28 -0700
Subject: [coreboot] [v3][patch] Add early MTRR setup
Message-ID: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>

Setup the MTRRs in stage1 so that memory and cache are available throughout
stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
It also sets all system memory to WriteBack cached and sets the ROM
area to cached.

Signed-off-by: Marc Jones <marcj303 at gmail.com>
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From marcj303 at gmail.com  Fri Feb  6 23:40:05 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Fri, 6 Feb 2009 15:40:05 -0700
Subject: [coreboot] [v3][patch] Add AP detection to stage0
Message-ID: <534e5dc20902061440l78b2c450g96329202ac1d677f@mail.gmail.com>

Add AP detection to stage0 to prevent APs from re-initializing mainboard setup
that has already been done by the BSP. For single processor systems the CPU
flag is always 0, BSP. This code also moves the AP stop for K8 mainboards to
after memory setup so the AP's MTRRs can be setup to match system memory.

Signed-off-by: Marc Jones <marcj303 at gmail.com>
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From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb  6 23:47:25 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 06 Feb 2009 23:47:25 +0100
Subject: [coreboot] [v3][patch] Fix stdcall for asm to C call.
In-Reply-To: <534e5dc20902061434j6e52260o6027a1db93efe91f@mail.gmail.com>
References: <534e5dc20902061434j6e52260o6027a1db93efe91f@mail.gmail.com>
Message-ID: <498CBDFD.7040408@gmx.net>

On 06.02.2009 23:34, Marc Jones wrote:
> Coreboot uses the compiler option -mregparm=3 which causes variables to be
> passed in registers. This is good for size and speed but not good when we
> call a C function from asm. Force stage1_phase1 to use stdcall and get
> variables off the stack.
>
> Note that I didn't change stage1_phase3 because it doesn't use any variables.
>
> Signed-off-by: Marc Jones <marcj303 at gmail.com>
>   

Yes please! This is exactly the patch I sent months ago. There were
claims that it broke the Kontron board, but I doubt that. Back then,
nobody was willing to test, so the whole stage0/stage1 handoff patches
were reverted.
Oh, and the intel x86 handoff is wrong, but my fix for that was reverted
as well.

If we fix the buggy intel x86 stage0 code again, this is
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From stepan at coresystems.de  Fri Feb  6 23:50:26 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Fri, 06 Feb 2009 23:50:26 +0100
Subject: [coreboot] cached SMI handler
In-Reply-To: <13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>	<20090205133656.GA8655@morn.localdomain>	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
Message-ID: <498CBEB2.8070104@coresystems.de>

ron minnich wrote:
> On Thu, Feb 5, 2009 at 5:43 PM,  <JasonZhao at viatech.com.cn> wrote:
>
>   
>> I ask my colleague who work for EFI. He said in his EFI project, SMM
>> area should not be cached,  and he had tried to cache that area, but
>> cause system crashed.
>> I don't know if he is right, since I can not find any reason why SMM
>> area should not be cached.
>>     
>
> Stepan can tell us, since he has working smm on kontron, but I can not
> believe smm can not be cached.
Occasionally a CPU might do speculative readahead on the SMRAM memory
while not in SMM. The chipset will generate master aborts on the PCI
bus, so the cached data is incorrect (0xff) and upon SMM entry the CPU
goes to nirvana. The SMM area in ASEG is always uncached. The upper
SMRAM areas can be cached, but they must only be cached while in SMM. A
way to do this could be to set up an MTRR at the beginning of the SMI
handler and restoring it upon exit. When not in in the SMI handler, TSEG
or HSEG (high SMRAM and static address high SMRAM) must be uncached.

Stefan


-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From stepan at coresystems.de  Fri Feb  6 23:53:46 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Fri, 06 Feb 2009 23:53:46 +0100
Subject: [coreboot] kontron 9865lcd
In-Reply-To: <13426df10902061342j40781273pa122463bdaad69c0@mail.gmail.com>
References: <13426df10902061342j40781273pa122463bdaad69c0@mail.gmail.com>
Message-ID: <498CBF7A.5040205@coresystems.de>

ron minnich wrote:
> output with X right now is terrible. If anyone was an xconfig file
> that works with these boards, let me know.
>
> We're just trying to boot with standard bios first.
>
> thanks
>
> ron
This is the one I've been using. Hope it works for you


-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866

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From peter at stuge.se  Sat Feb  7 00:14:21 2009
From: peter at stuge.se (Peter Stuge)
Date: Sat, 7 Feb 2009 00:14:21 +0100
Subject: [coreboot] v2 warnings
In-Reply-To: <2831fecf0902061302w51f2370fud3201ac61c18a09f@mail.gmail.com>
References: <2831fecf0902061302w51f2370fud3201ac61c18a09f@mail.gmail.com>
Message-ID: <20090206231421.7213.qmail@stuge.se>

Myles Watson wrote:
> Remove a couple of warnings (mostly from format strings.)
> 
> Signed-off-by: Myles Watson <mylesgw at gmail.com>

Acked-by: Peter Stuge <peter at stuge.se>



From peter at stuge.se  Sat Feb  7 00:26:48 2009
From: peter at stuge.se (Peter Stuge)
Date: Sat, 7 Feb 2009 00:26:48 +0100
Subject: [coreboot] [v3][patch] Add early MTRR setup
In-Reply-To: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
References: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
Message-ID: <20090206232649.10595.qmail@stuge.se>

Marc Jones wrote:
> Setup the MTRRs in stage1 so that memory and cache are available throughout
> stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
> It also sets all system memory to WriteBack cached and sets the ROM
> area to cached.
> 
> Signed-off-by: Marc Jones <marcj303 at gmail.com>

Acked-by: Peter Stuge <peter at stuge.se>



From peter at stuge.se  Sat Feb  7 00:27:22 2009
From: peter at stuge.se (Peter Stuge)
Date: Sat, 7 Feb 2009 00:27:22 +0100
Subject: [coreboot] [v3][patch] Add AP detection to stage0
In-Reply-To: <534e5dc20902061440l78b2c450g96329202ac1d677f@mail.gmail.com>
References: <534e5dc20902061440l78b2c450g96329202ac1d677f@mail.gmail.com>
Message-ID: <20090206232723.10796.qmail@stuge.se>

Marc Jones wrote:
> Add AP detection to stage0 to prevent APs from re-initializing mainboard setup
> that has already been done by the BSP. For single processor systems the CPU
> flag is always 0, BSP. This code also moves the AP stop for K8 mainboards to
> after memory setup so the AP's MTRRs can be setup to match system memory.
> 
> Signed-off-by: Marc Jones <marcj303 at gmail.com>

Acked-by: Peter Stuge <peter at stuge.se>



From peter at stuge.se  Sat Feb  7 00:27:31 2009
From: peter at stuge.se (Peter Stuge)
Date: Sat, 7 Feb 2009 00:27:31 +0100
Subject: [coreboot] [v3][patch] Fix stdcall for asm to C call.
In-Reply-To: <534e5dc20902061434j6e52260o6027a1db93efe91f@mail.gmail.com>
References: <534e5dc20902061434j6e52260o6027a1db93efe91f@mail.gmail.com>
Message-ID: <20090206232731.10919.qmail@stuge.se>

Marc Jones wrote:
> Coreboot uses the compiler option -mregparm=3 which causes variables to be
> passed in registers. This is good for size and speed but not good when we
> call a C function from asm. Force stage1_phase1 to use stdcall and get
> variables off the stack.
> 
> Note that I didn't change stage1_phase3 because it doesn't use any variables.
> 
> Signed-off-by: Marc Jones <marcj303 at gmail.com>

Acked-by: Peter Stuge <peter at stuge.se>



From kevin at koconnor.net  Sat Feb  7 01:39:04 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Fri, 6 Feb 2009 19:39:04 -0500
Subject: [coreboot] cached SMI handler
In-Reply-To: <498CBEB2.8070104@coresystems.de>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
	<20090205133656.GA8655@morn.localdomain>
	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
	<498CBEB2.8070104@coresystems.de>
Message-ID: <20090207003904.GA13513@morn.localdomain>

On Fri, Feb 06, 2009 at 11:50:26PM +0100, Stefan Reinauer wrote:
> ron minnich wrote:
> > Stepan can tell us, since he has working smm on kontron, but I can not
> > believe smm can not be cached.
> Occasionally a CPU might do speculative readahead on the SMRAM memory
> while not in SMM. The chipset will generate master aborts on the PCI
> bus, so the cached data is incorrect (0xff) and upon SMM entry the CPU
> goes to nirvana. The SMM area in ASEG is always uncached. The upper
> SMRAM areas can be cached, but they must only be cached while in SMM.

If there is memory only accessible from SMM mode, then I agree it
would need to be uncached.  I thought that Jason was just reserving
memory for use by SMM - memory that could also be read/written in
non-SMM mode.  In that case, I did not think caching needed to be
disabled.  Indeed, the intel system programming guide recommends using
some cached memory for SMM.

-Kevin


Random thought - I wonder if the OS could "break into" SMM mode by
turning on caching for the SMM area and then manipulating the cache
contents so that an SMI used icache/dcache contents set by the OS.



From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb  7 01:45:55 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 07 Feb 2009 01:45:55 +0100
Subject: [coreboot] cached SMI handler
In-Reply-To: <20090207003904.GA13513@morn.localdomain>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>	<20090205133656.GA8655@morn.localdomain>	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>	<498CBEB2.8070104@coresystems.de>
	<20090207003904.GA13513@morn.localdomain>
Message-ID: <498CD9C3.9040306@gmx.net>

On 07.02.2009 01:39, Kevin O'Connor wrote:
> On Fri, Feb 06, 2009 at 11:50:26PM +0100, Stefan Reinauer wrote:
>   
>> ron minnich wrote:
>>     
>>> Stepan can tell us, since he has working smm on kontron, but I can not
>>> believe smm can not be cached.
>>>       
>> Occasionally a CPU might do speculative readahead on the SMRAM memory
>> while not in SMM. The chipset will generate master aborts on the PCI
>> bus, so the cached data is incorrect (0xff) and upon SMM entry the CPU
>> goes to nirvana. The SMM area in ASEG is always uncached. The upper
>> SMRAM areas can be cached, but they must only be cached while in SMM.
>>     
>
> If there is memory only accessible from SMM mode, then I agree it
> would need to be uncached.  I thought that Jason was just reserving
> memory for use by SMM - memory that could also be read/written in
> non-SMM mode.  In that case, I did not think caching needed to be
> disabled.  Indeed, the intel system programming guide recommends using
> some cached memory for SMM.
>
> -Kevin
>
>
> Random thought - I wonder if the OS could "break into" SMM mode by
> turning on caching for the SMM area and then manipulating the cache
> contents so that an SMI used icache/dcache contents set by the OS.
>   

AFAICS it should work. CAR would be ideal for that purpose. No idea what
happens if the SMM code plays with the cache regs as well, though.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From kevin at koconnor.net  Sat Feb  7 04:46:02 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Fri, 6 Feb 2009 22:46:02 -0500
Subject: [coreboot] SeaBIOS + SATA
Message-ID: <20090207034602.GA17583@morn.localdomain>

FYI,

The latest SeaBIOS git has a reworked ATA reset.  My epia-cn is now
detecting SATA drives.

-Kevin


init hard drives
ATA controller 0 at 000024a0/000024c0 (dev 00000078 prog_if 0000008f)
ATA controller 1 at 000024b0/000024d0 (dev 00000078 prog_if 0000008f)
ATA controller 2 at 000001f0/000003f0 (dev 00000079 prog_if 0000008a)
ATA controller 3 at 00000170/00000370 (dev 00000079 prog_if 0000008a)

ata0-0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63
ata0 master: Maxtor 6B200M0 ATA-7 Hard-Disk (189 GiBytes)

ata2-1: PCHS=16383/16/63 translation=lba LCHS=1024/255/63
ata2  slave: Maxtor 6Y250P0 ATA-7 Hard-Disk (233 GiBytes)



From corey.osgood at gmail.com  Sat Feb  7 05:58:13 2009
From: corey.osgood at gmail.com (Corey Osgood)
Date: Fri, 6 Feb 2009 23:58:13 -0500
Subject: [coreboot] [v3][patch] Add early MTRR setup
In-Reply-To: <20090206232649.10595.qmail@stuge.se>
References: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
	<20090206232649.10595.qmail@stuge.se>
Message-ID: <dd3c80060902062058x2bfc6f4el93dc6c58b285f664@mail.gmail.com>

On Fri, Feb 6, 2009 at 6:26 PM, Peter Stuge <peter at stuge.se> wrote:

> Marc Jones wrote:
> > Setup the MTRRs in stage1 so that memory and cache are available
> throughout
> > stage2. This fixes problems with VGA graphics ROMs access to
> 0xA0000-0xBFFFF.
> > It also sets all system memory to WriteBack cached and sets the ROM
> > area to cached.
> >
> > Signed-off-by: Marc Jones <marcj303 at gmail.com>
>
> Acked-by: Peter Stuge <peter at stuge.se>


+    /* System ROM (Assume 1MB) */
> +    stage1_set_var_mtrr(1, 0xFFF00000, 0x00100000, MTRR_TYPE_WRTHROUGH);
>

Can we do CONFIG_COREBOOT_ROM_SIZE_KB << 10 instead? Otherwise we'll have
breakage with any rom >1MB.

Thanks,
Corey
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From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb  7 12:05:37 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 07 Feb 2009 12:05:37 +0100
Subject: [coreboot] [v3][patch] Add early MTRR setup
In-Reply-To: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
References: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
Message-ID: <498D6B01.3030401@gmx.net>

On 06.02.2009 23:37, Marc Jones wrote:
> Setup the MTRRs in stage1 so that memory and cache are available throughout
> stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
> It also sets all system memory to WriteBack cached and sets the ROM
> area to cached.
>
> Signed-off-by: Marc Jones <marcj303 at gmail.com>
>   

The code looks scary, especially the part where you disable cache
although memory may not be set up completely yet. Can you explain why
that is not a problem? Thanks.

My general principle is "don't fiddle with cache settings until you know
RAM is fine".

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From popkonserve at gmx.de  Sat Feb  7 12:53:27 2009
From: popkonserve at gmx.de (Holger Hesselbarth)
Date: Sat, 07 Feb 2009 12:53:27 +0100
Subject: [coreboot]  intel p6 core msrs
In-Reply-To: <20090205233415.8361.qmail@stuge.se>
References: <49847B06.6090408@gmx.de> <20090201013208.28928.qmail@stuge.se>
	<8A81AC62-C18E-47DD-B76C-FC386755FCD8@coresystems.de>
	<20090201170313.21455.qmail@stuge.se> <498B2881.5040802@gmx.de>
	<20090205233415.8361.qmail@stuge.se>
Message-ID: <498D7637.6080707@gmx.de>

just for a start here is my first real contribution.
here are some answers to questions that Peter Stuge asked..

  >> 		{ 17, 5, "L2PBS", "L2 size per bank", PRESENT_DEC, {
  >> 			{ MSR1(0), "128 kbytes" },
  >> 			{ MSR1(1), "256 kbytes" },
  >> 			{ MSR1(2), "512 kbytes" },
  >> 			{ MSR1(4), "1 Mbytes" },
  >> 			{ MSR1(8), "2 Mbytes" },
  >> 			{ MSR1(16), "4 Mbytes" },
  >> 			{ BITVAL_EOT }
  >> 		}},
  >
  > Hmm, can you explain this field a little more? Will only one bit ever
  > be set at a time?

there's no real info on this in the intel documents i have. welcome to intel's
msr mystery world :( but based on the available processors with p6 core we can
assume this: only one bit will be set or none. the intel celerons have 128kB L2
cache unless they are tualatin cores, then they'll have 256kB cache. all intel
pentium ii have 512kB L2 cache. all pentium iii processors have 512kB L2 cache
unless they are coppermine, then they'll have 256kB. pentium iii tualatins have
512kB L2 cache again. xeons with drake core(derived from pentium ii deschutes)
have 512kB, 1MB or 2MB cache. tanner (derived from pentium iii katmai) core
xeons have 1MB or 2MB cache while the cascades cores (derived from pentium iii
coppermine) have 256kB (!!!) or 2MB cache.
i hope you are not too confused by now.

>>         { 4, 4, "L2LAT", "L2 latency", PRESENT_DEC, NOBITS },
> 
> ..and here. Btw, what unit is this latency expressed in?

the latency is expressed in intel mystery units. since the docs don't say
anything about the units, my guess is the following. it's in units of cycles of
the bus speed of the L2 cache bus. on some of the pentium iis and pentium iiis
the L2 cache was off-chip but on-module. there the latency makes sense and it
was set to 5 (according to intel's recommendations?). on later models the cache
went on-chip and the L2 cache latency went down to 1. on abit slot 1 boards the
cache latency could be adjusted, too.

> A target definition has to be added to msrtool.c as well. A super
> simple entry in struct targetdef alltargets[].

i called it P6 since that's what Intel calls this specific processor core in
their offical documents. and this msr declaration is for P6 cores only. some tme
later it should contain all msrs from the P6 core. but you are free to suggest a
better name :)
Holger

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From stepan at coresystems.de  Sat Feb  7 13:35:40 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Sat, 07 Feb 2009 13:35:40 +0100
Subject: [coreboot] cached SMI handler
In-Reply-To: <20090207003904.GA13513@morn.localdomain>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
	<20090205133656.GA8655@morn.localdomain>
	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
	<498CBEB2.8070104@coresystems.de>
	<20090207003904.GA13513@morn.localdomain>
Message-ID: <498D801C.5050707@coresystems.de>

Kevin O'Connor wrote:
> On Fri, Feb 06, 2009 at 11:50:26PM +0100, Stefan Reinauer wrote:
>   
>> Occasionally a CPU might do speculative readahead on the SMRAM memory
>> while not in SMM. The chipset will generate master aborts on the PCI
>> bus, so the cached data is incorrect (0xff) and upon SMM entry the CPU
>> goes to nirvana. The SMM area in ASEG is always uncached. The upper
>> SMRAM areas can be cached, but they must only be cached while in SMM.
>>     
>
> If there is memory only accessible from SMM mode, then I agree it
> would need to be uncached.  I thought that Jason was just reserving
> memory for use by SMM - memory that could also be read/written in
> non-SMM mode.  In that case, I did not think caching needed to be
> disabled.  Indeed, the intel system programming guide recommends using
> some cached memory for SMM.
>   
I'm not involved in the details - But you are correct: The issue I
described can only occur when it is "locked" SMM memory, not just normal
RAM that happens to be accessed from SMM as well.
> Random thought - I wonder if the OS could "break into" SMM mode by
> turning on caching for the SMM area and then manipulating the cache
> contents so that an SMI used icache/dcache contents set by the OS
The attack scenario is realistic - the OS might gain control over the
cache contents through setting up MTRRs in some cases. The questions
come up whether this is exploitable and whether it's possible to make an
SMM handler safe against this kind of attack. I don't think you can
reasonably use the prefetchers to put exploit code in the cache by a CAR
approach. On some CPUs it is even explicitly suggested that the
prefetchers are disabled during CAR mode.
This leaves the OS dependent on some PCI device to answer the bus
requests instead leaving the chipset to generate a Master Abort.

The simplest way to avoid this is by putting the main SMI handler at
0xa0000, so it has control over the cache before it accesses the high
SMM memory. Right now the SMI handler I wrote does not use the high SMM
memory at all, so there's no immediate risk.

Stefan


-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From harald.gutmann at gmx.net  Sat Feb  7 16:52:31 2009
From: harald.gutmann at gmx.net (Harald Gutmann)
Date: Sat, 7 Feb 2009 16:52:31 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
Message-ID: <200902071652.31725.harald.gutmann@gmx.net>

----------  Forwarded Message  ----------

Subject: Gigabyte M57SLI-S4 PCI-Initialisation Problems
Date: Saturday 07 February 2009
From: Harald Gutmann <harald.gutmann at gmx.net>
To: echelon at free.fr

Hello Florentin,

some times ago you figured out how to get some PCI ports on the Gigabyte M57SLI 
board initialized. One Port worked with your patch as it should and gets 
interrupts, but the other one doesn't. Also there are until now some problems 
existing with the PCI-E ports.

As time passed by there is until now no solution for the second PCI port and 
for the PCI-E interrupt problems.
After finishing my school, and finding some good job i've more time to work with 
things i'm interested, such as coreboot.

For the following i refer on your post from October 2007 on the LinuxBios 
Mailinglist: http://www.coreboot.org/pipermail/linuxbios/2007-
October/025442.html

My questions to that posting:
*1) Is it necessary/useful to measure somethings on the PCI-bus with an 
oscilloscope?
*4) Do you have the source for that simple custom utility you wrote that time 
to dump the SYSCTRL_REG which you mention in *3)?

I and some other coreboot users are interested in trying to fix that issues 
with coreboot on this mainboard, and i hope you can help us a bit.

Tanks in advance,
kind regards,
Harald Gutmann

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From harald.gutmann at gmx.net  Sat Feb  7 17:07:44 2009
From: harald.gutmann at gmx.net (Harald Gutmann)
Date: Sat, 7 Feb 2009 17:07:44 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
In-Reply-To: <200902071652.31725.harald.gutmann@gmx.net>
References: <200902071652.31725.harald.gutmann@gmx.net>
Message-ID: <200902071707.44457.harald.gutmann@gmx.net>

I sent this message to Florentin (echelon at free.fr), and wanted to CC it to 
the coreboot-ml but i did a typo in the address of the ml, so i sent it a 
second time as forwarded message.
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From kevin at koconnor.net  Sat Feb  7 17:11:35 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Sat, 7 Feb 2009 11:11:35 -0500
Subject: [coreboot] cached SMI handler
In-Reply-To: <498D801C.5050707@coresystems.de>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
	<20090205133656.GA8655@morn.localdomain>
	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
	<498CBEB2.8070104@coresystems.de>
	<20090207003904.GA13513@morn.localdomain>
	<498D801C.5050707@coresystems.de>
Message-ID: <20090207161135.GA24817@morn.localdomain>

On Sat, Feb 07, 2009 at 01:35:40PM +0100, Stefan Reinauer wrote:
> Kevin O'Connor wrote:
> > Random thought - I wonder if the OS could "break into" SMM mode by
> > turning on caching for the SMM area and then manipulating the cache
> > contents so that an SMI used icache/dcache contents set by the OS
[...]
> The simplest way to avoid this is by putting the main SMI handler at
> 0xa0000

We're probably getting off topic.  But here is what I was thinking:

* OS uses mtrr to cache memory at 0xa0000

* OS loads a "jmp 0x10000" insn into L2 cache at 0xa0000

* OS invokes an SMI (acpi defines a way to do this)

If the SMI handler is set to run code at 0xa0000 (ie, it has an SMBASE
of 0x98000), then it would see the 'jmp' insn and start running OS
code at 0x10000.

>so it has control over the cache before it accesses the high
> SMM memory. Right now the SMI handler I wrote does not use the high SMM
> memory at all, so there's no immediate risk.

I don't think there is much risk anyway - if someone has full access
to the machine to change cache settings, then they don't need SMM
mode.

-Kevin



From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb  7 17:31:37 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 07 Feb 2009 17:31:37 +0100
Subject: [coreboot] cached SMI handler
In-Reply-To: <20090207161135.GA24817@morn.localdomain>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>	<20090205133656.GA8655@morn.localdomain>	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>	<498CBEB2.8070104@coresystems.de>	<20090207003904.GA13513@morn.localdomain>	<498D801C.5050707@coresystems.de>
	<20090207161135.GA24817@morn.localdomain>
Message-ID: <498DB769.8080103@gmx.net>

On 07.02.2009 17:11, Kevin O'Connor wrote:
> On Sat, Feb 07, 2009 at 01:35:40PM +0100, Stefan Reinauer wrote:
>   
>> Kevin O'Connor wrote:
>>     
>>> Random thought - I wonder if the OS could "break into" SMM mode by
>>> turning on caching for the SMM area and then manipulating the cache
>>> contents so that an SMI used icache/dcache contents set by the OS
>>>       
> [...]
>   
>> The simplest way to avoid this is by putting the main SMI handler at
>> 0xa0000
>>     
>
> We're probably getting off topic.  But here is what I was thinking:
>
> * OS uses mtrr to cache memory at 0xa0000
>
> * OS loads a "jmp 0x10000" insn into L2 cache at 0xa0000
>
> * OS invokes an SMI (acpi defines a way to do this)
>
> If the SMI handler is set to run code at 0xa0000 (ie, it has an SMBASE
> of 0x98000), then it would see the 'jmp' insn and start running OS
> code at 0x10000.
>   

This needs a unified cache, though.

>> so it has control over the cache before it accesses the high
>> SMM memory. Right now the SMI handler I wrote does not use the high SMM
>> memory at all, so there's no immediate risk.
>>     
>
> I don't think there is much risk anyway - if someone has full access
> to the machine to change cache settings, then they don't need SMM
> mode.
>   

Well, some chipsets allow you to reflash the ROM only in SMM if the
flash interface is locked.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From kevin at koconnor.net  Sat Feb  7 17:40:29 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Sat, 7 Feb 2009 11:40:29 -0500
Subject: [coreboot] cached SMI handler
In-Reply-To: <498DB769.8080103@gmx.net>
References: <9156F9F8217CD44898ABE1E581FAFF88382167@exchbj02.viatech.com.bj>
	<20090205133656.GA8655@morn.localdomain>
	<9156F9F8217CD44898ABE1E581FAFF883822C1@exchbj02.viatech.com.bj>
	<13426df10902051752g2ef848cap2fe99776ec71c596@mail.gmail.com>
	<498CBEB2.8070104@coresystems.de>
	<20090207003904.GA13513@morn.localdomain>
	<498D801C.5050707@coresystems.de>
	<20090207161135.GA24817@morn.localdomain>
	<498DB769.8080103@gmx.net>
Message-ID: <20090207164029.GA25267@morn.localdomain>

On Sat, Feb 07, 2009 at 05:31:37PM +0100, Carl-Daniel Hailfinger wrote:
> > If the SMI handler is set to run code at 0xa0000 (ie, it has an SMBASE
> > of 0x98000), then it would see the 'jmp' insn and start running OS
> > code at 0x10000.
> 
> This needs a unified cache, though.

If you get the jmp insn into the L2 cache, the icache should pull from
L2.  It will be a little tricky to get the insn into L2 (and not just
L1 dcache), but I can think of several ways to try.

-Kevin



From marcj303 at gmail.com  Sat Feb  7 18:13:53 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Sat, 7 Feb 2009 10:13:53 -0700
Subject: [coreboot] [v3][patch] Add early MTRR setup
In-Reply-To: <dd3c80060902062058x2bfc6f4el93dc6c58b285f664@mail.gmail.com>
References: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
	<20090206232649.10595.qmail@stuge.se>
	<dd3c80060902062058x2bfc6f4el93dc6c58b285f664@mail.gmail.com>
Message-ID: <534e5dc20902070913y37b86665vd5da42fa524dc0be@mail.gmail.com>

On Fri, Feb 6, 2009 at 9:58 PM, Corey Osgood <corey.osgood at gmail.com> wrote:
> On Fri, Feb 6, 2009 at 6:26 PM, Peter Stuge <peter at stuge.se> wrote:
>>
>> Marc Jones wrote:
>> > Setup the MTRRs in stage1 so that memory and cache are available
>> > throughout
>> > stage2. This fixes problems with VGA graphics ROMs access to
>> > 0xA0000-0xBFFFF.
>> > It also sets all system memory to WriteBack cached and sets the ROM
>> > area to cached.
>> >
>> > Signed-off-by: Marc Jones <marcj303 at gmail.com>
>>
>> Acked-by: Peter Stuge <peter at stuge.se>
>>
>> +    /* System ROM (Assume 1MB) */
>> +    stage1_set_var_mtrr(1, 0xFFF00000, 0x00100000, MTRR_TYPE_WRTHROUGH);
>
> Can we do CONFIG_COREBOOT_ROM_SIZE_KB << 10 instead? Otherwise we'll have
> breakage with any rom >1MB.
>
> Thanks,
> Corey

Sure, no problem.

Marc



From marcj303 at gmail.com  Sat Feb  7 18:28:58 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Sat, 7 Feb 2009 10:28:58 -0700
Subject: [coreboot] [v3][patch] Add early MTRR setup
In-Reply-To: <498D6B01.3030401@gmx.net>
References: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
	<498D6B01.3030401@gmx.net>
Message-ID: <534e5dc20902070928le4cedd2ubaaae84bbef89b8@mail.gmail.com>

On Sat, Feb 7, 2009 at 4:05 AM, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:
> On 06.02.2009 23:37, Marc Jones wrote:
>> Setup the MTRRs in stage1 so that memory and cache are available throughout
>> stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
>> It also sets all system memory to WriteBack cached and sets the ROM
>> area to cached.
>>
>> Signed-off-by: Marc Jones <marcj303 at gmail.com>
>>
>
> The code looks scary, especially the part where you disable cache
> although memory may not be set up completely yet. Can you explain why
> that is not a problem? Thanks.
>
> My general principle is "don't fiddle with cache settings until you know
> RAM is fine".

I guess that comment could use more clarification. The RAM that is
available will be cached but not all the memory in the system may be
setup when set_mtrr_ram_access is called. It is the job of the
memory/cpu init code to call it again as memory is added. Note the the
cache is being set based on TOM and TOM2.

Marc



From nuklearzelph at gmail.com  Sat Feb  7 18:47:31 2009
From: nuklearzelph at gmail.com (Nuklear Zelph)
Date: Sat, 7 Feb 2009 10:47:31 -0700
Subject: [coreboot] regarding asus a8n-e a8n5x a8z-e
Message-ID: <d6f3f05c0902070947p15e4a818y9df4744948b7cc9d@mail.gmail.com>

a8n-e a8n5x a8z-e
i am kinda interested in buying one of these motherboards and putting
coreboot on it. i see that they have moved into the coreboot 2 section. the
details pages have not changed though and i am wondering if any of them
would be suitable for a primary use machine running coreboot. i know little
about hardware and i tried searcing news archives, but only found initial
support announcements.
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From rmh at aybabtu.com  Sun Feb  8 00:42:31 2009
From: rmh at aybabtu.com (Robert Millan)
Date: Sun, 8 Feb 2009 00:42:31 +0100
Subject: [coreboot] [PATCH] split tar & cpio
In-Reply-To: <20081108161715.GA7474@thorin>
References: <20081108161715.GA7474@thorin>
Message-ID: <20090207234231.GA11319@thorin>

On Sat, Nov 08, 2008 at 05:17:15PM +0100, Robert Millan wrote:
> 
> Hi,
> 
> I thought it would be a good idea to split tar & cpio into separate modules
> to save some space and make things easier to figure out for the users.  I
> managed to do this without duplicating code, with a bit of pre-processor
> magic.
> 
> The saved size is not much, though (~400 bytes).  But users looking for tar
> will find it more easily.  How do you feel about this? Is it worth it?

Committed.

coreboot users: if you're using tar to generate GRUB's memdisk image, with
latest svn you need to include tar.mod instead of cpio.mod.

-- 
Robert Millan

  The DRM opt-in fallacy: "Your data belongs to us. We will decide when (and
  how) you may access your data; but nobody's threatening your freedom: we
  still allow you to remove your data and not access it at all."



From echelon at free.fr  Sun Feb  8 12:54:18 2009
From: echelon at free.fr (Florentin Demetrescu)
Date: Sun, 08 Feb 2009 12:54:18 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
In-Reply-To: <200902071652.31725.harald.gutmann@gmx.net>
References: <200902071652.31725.harald.gutmann@gmx.net>
Message-ID: <1234094058.498ec7eaa1e23@webmail.free.fr>

Hi Harold,

Of course, I would like to contribute again to the coreboot project, but
unfortunately last year I had many personal problems to deal with and not much
time for coreboot.. :/
For your questions:
*1) Probing the PCI bus was usefull to figure out that the "GPIO multiplexer" of
the SB was misconfigured, and the PCI configuration requests weren't understood
by a card plugged in the first PCI slot. I didn't have time to do the same test
for the second PCI slot. What is a little disturbing is that after patching the
coreboot code with GPIO configuration values extracted from the proprietary BIOS
configuration, the second PCI slot is still unfunctional. So, indeed I think
that it is necessary to probe the second PCI slot.. (If you don't have access to
a good oscilloscope, I can do this test maybe later next week, let me know..)
*4) Unfortunately I lost this little quickie, but it is not very complicated to
write from scratch.. What you need to do:
 -1) after booting under Linux/legacy_BIOS, read the SYSCTRL_REG (0x64?) of the
00:01.1 PCI device (the LPC bridge?) to verify that it holds the value 0x1400.
 -2) write a little program which dumps 256 bytes from the IO address 0x1400 (of
course you have to adjust the iopl of your program in order to have access to
the IO space..)

I would try to re-activate my coreboot test platforms this week.. If you have
further questions, Im will try to help you..

Best regards,
 Florentin Demetrescu

Quoting Harald Gutmann <harald.gutmann at gmx.net>:

> ----------  Forwarded Message  ----------
>
> Subject: Gigabyte M57SLI-S4 PCI-Initialisation Problems
> Date: Saturday 07 February 2009
> From: Harald Gutmann <harald.gutmann at gmx.net>
> To: echelon at free.fr
>
> Hello Florentin,
>
> some times ago you figured out how to get some PCI ports on the Gigabyte
> M57SLI
> board initialized. One Port worked with your patch as it should and gets
> interrupts, but the other one doesn't. Also there are until now some problems
> existing with the PCI-E ports.
>
> As time passed by there is until now no solution for the second PCI port and
> for the PCI-E interrupt problems.
> After finishing my school, and finding some good job i've more time to work
> with
> things i'm interested, such as coreboot.
>
> For the following i refer on your post from October 2007 on the LinuxBios
> Mailinglist: http://www.coreboot.org/pipermail/linuxbios/2007-
> October/025442.html
>
> My questions to that posting:
> *1) Is it necessary/useful to measure somethings on the PCI-bus with an
> oscilloscope?
> *4) Do you have the source for that simple custom utility you wrote that time
> to dump the SYSCTRL_REG which you mention in *3)?
>
> I and some other coreboot users are interested in trying to fix that issues
> with coreboot on this mainboard, and i hope you can help us a bit.
>
> Tanks in advance,
> kind regards,
> Harald Gutmann
>
> -------------------------------------------------------
>





From harald.gutmann at gmx.net  Sun Feb  8 18:18:55 2009
From: harald.gutmann at gmx.net (Harald Gutmann)
Date: Sun, 8 Feb 2009 18:18:55 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
In-Reply-To: <1234094058.498ec7eaa1e23@webmail.free.fr>
References: <200902071652.31725.harald.gutmann@gmx.net>
	<1234094058.498ec7eaa1e23@webmail.free.fr>
Message-ID: <200902081819.01065.harald.gutmann@gmx.net>

Hi Florentin,
thanks for your answer, that and Peter Stuge helped me a lot to get further 
informations on that problem.

First, to describe what i did:
Build coreboot from buildrom devel with a filo payload, flashed it and bootet 
coreboot on the gigabyte m57sli v2. 
After that i wrote that little piece of software you described  in that mail 
in point -2). (source below.)

Then i tried to figure out what exactly to do, as you told in point -1).
As i discussed this point with Peter in #coreboot it we/i got to the 
conclusion that the value i need to start reading in coreboot was 3c00.
In the proprietary bios it is the value e000.

I hope you can verify that values according to the lspci outputs i append on 
the end of the mail.

The result of my testing/work/funny Sunday afternoon is the appended file 
data.tar.gz which contains 5x reading the 256bytes with coreboot and 5x the 
same from the proprietary bios. Until now i didn't start to compare them.

What makes me a little worried is that the output on the proprietary bios has 
much more zero values in it.

Here the outputs/sources which i mentioned above:

#include <sys/io.h>
#include <stdio.h>

int main()
{
        iopl(3); //grant access to all io ports - root privileges needed
/*
        ioperm can only give access from 0x000-0x3ff
        ioperm(start_port, range, 1); //set permissions to have access
        ioperm(start_port, range, 0); //set permissions to remove access
*/

        unsigned char input;
        int count=0;

        FILE *output;
        output = fopen("./io_gpio-data", "w");

        for(count=0; count <=255; count++){
                input = inb(0xe000+count);	//starting value for the 
proprietary bios
                fputc(input, output);
        }

        fclose(output);
        iopl(0); //remove access to io ports
}

//on the proprietary bios:
benchvice:/home/hargut/coreboot-stuff# lspci -vvv -s 00:01.1
00:01.1 SMBus: nVidia Corporation MCP55 SMBus (rev a2)
        Subsystem: Giga-byte Technology Device 0c11
        Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 11
        Region 0: I/O ports at e000 [size=64]
        Region 4: I/O ports at 1c00 [size=64]
        Region 5: I/O ports at 1c80 [size=64]
        Capabilities: [44] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA 
PME(D0-,D1-,D2-,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-
        Kernel driver in use: nForce2_smbus
        Kernel modules: i2c-nforce2


//on running coreboot
lspci -v -xxx -s 00:01.1
00:01.1 SMBus: nVidia Corporation MCP55 SMBus (rev a2)
        Subsystem: Advanced Micro Devices [AMD] Device 2b80
        Flags: 66MHz, fast devsel, IRQ 10
        I/O ports at 3c00 [size=64]
        I/O ports at 3c40 [size=64]
        I/O ports at 3c80 [size=64]
        Capabilities: [44] Power Management version 2
        Kernel driver in use: nForce2_smbus
        Kernel modules: i2c-nforce2


On Sunday 08 February 2009 12:54:18 you wrote:
> Hi Harold,
>
> For your questions:
> *1) Probing the PCI bus was usefull to figure out that the "GPIO
> multiplexer" of the SB was misconfigured, and the PCI configuration
> requests weren't understood by a card plugged in the first PCI slot. I
> didn't have time to do the same test for the second PCI slot. What is a
> little disturbing is that after patching the coreboot code with GPIO
> configuration values extracted from the proprietary BIOS configuration, the
> second PCI slot is still unfunctional. So, indeed I think that it is
> necessary to probe the second PCI slot.. (If you don't have access to a
> good oscilloscope, I can do this test maybe later next week, let me know..)
> *4) Unfortunately I lost this little quickie, but it is not very
> complicated to write from scratch.. What you need to do:
>  -1) after booting under Linux/legacy_BIOS, read the SYSCTRL_REG (0x64?) of
> the 00:01.1 PCI device (the LPC bridge?) to verify that it holds the value
> 0x1400. -2) write a little program which dumps 256 bytes from the IO
> address 0x1400 (of course you have to adjust the iopl of your program in
> order to have access to the IO space..)



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From rminnich at gmail.com  Sun Feb  8 18:22:07 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 8 Feb 2009 09:22:07 -0800
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
Message-ID: <13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>

I have not seen a patch for this one so here is mine. Untested. Not signed off.

Thanks
ron

Index: util/flashrom/flashrom.c
===================================================================
--- util/flashrom/flashrom.c	(revision 3930)
+++ util/flashrom/flashrom.c	(working copy)
@@ -122,6 +122,13 @@
 		}

 		base = flashbase ? flashbase : (0xffffffff - size + 1);
+		/* this part might be much larger than the last part.
+ 		 * If so, we have to ignore the flashbase value
+ 		 */
+		if (flashbase && (base + size) < flashbase)
+			base = 0xffffffff - size + 1;
+
 		flash->virtual_memory = bios = physmap("flash chip", base, size);



From peter at stuge.se  Sun Feb  8 18:31:27 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 8 Feb 2009 18:31:27 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
In-Reply-To: <200902081819.01065.harald.gutmann@gmx.net>
References: <200902071652.31725.harald.gutmann@gmx.net>
	<1234094058.498ec7eaa1e23@webmail.free.fr>
	<200902081819.01065.harald.gutmann@gmx.net>
Message-ID: <20090208173127.12041.qmail@stuge.se>

Hi,

Harald Gutmann wrote:
> As i discussed this point with Peter in #coreboot it we/i got to
> the conclusion that the value i need to start reading in coreboot
> was 3c00.

I didn't properly read the background that the I/O base is set by
SYSCTRL_REG 0x64 so I gave Harald some bad advice, but he's reading
out the relevant values as I type. I hope he'll send out an update
in a bit.


//Peter
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From peter at stuge.se  Sun Feb  8 18:45:00 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 8 Feb 2009 18:45:00 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
Message-ID: <20090208174500.15141.qmail@stuge.se>

ron minnich wrote:
> I have not seen a patch for this one so here is mine. Untested. Not
> signed off.

It'll work in this case but the flash chip size can also be smaller
than the last detected chip.

I'll prepare a generic fix tonight. Thanks for the bump.


//Peter



From harald.gutmann at gmx.net  Sun Feb  8 18:50:13 2009
From: harald.gutmann at gmx.net (Harald Gutmann)
Date: Sun, 8 Feb 2009 18:50:13 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
In-Reply-To: <20090208173127.12041.qmail@stuge.se>
References: <200902071652.31725.harald.gutmann@gmx.net>
	<200902081819.01065.harald.gutmann@gmx.net>
	<20090208173127.12041.qmail@stuge.se>
Message-ID: <200902081850.19570.harald.gutmann@gmx.net>

On Sunday 08 February 2009 18:31:27 Peter Stuge wrote:
> Hi,
>
> Harald Gutmann wrote:
> > As i discussed this point with Peter in #coreboot it we/i got to
> > the conclusion that the value i need to start reading in coreboot
> > was 3c00.
>
> I didn't properly read the background that the I/O base is set by
> SYSCTRL_REG 0x64 so I gave Harald some bad advice, but he's reading
> out the relevant values as I type. I hope he'll send out an update
> in a bit.
Here are the new results which should be the right once.
original.txt = proprietary bios
coreboot.txt = coreboot bios

>
> //Peter
Regards,
Harald
-------------- next part --------------
r0x3400=30
r0x3401=00
r0x3402=00
r0x3403=00
r0x3404=00
r0x3405=00
r0x3406=00
r0x3407=00
r0x3408=00
r0x3409=00
r0x340a=00
r0x340b=00
r0x340c=00
r0x340d=00
r0x340e=00
r0x340f=00
r0x3410=00
r0x3411=00
r0x3412=00
r0x3413=00
r0x3414=00
r0x3415=00
r0x3416=00
r0x3417=00
r0x3418=00
r0x3419=00
r0x341a=00
r0x341b=00
r0x341c=00
r0x341d=00
r0x341e=00
r0x341f=00
r0x3420=00
r0x3421=00
r0x3422=00
r0x3423=00
r0x3424=00
r0x3425=00
r0x3426=00
r0x3427=00
r0x3428=00
r0x3429=00
r0x342a=00
r0x342b=00
r0x342c=00
r0x342d=00
r0x342e=00
r0x342f=00
r0x3430=00
r0x3431=00
r0x3432=00
r0x3433=00
r0x3434=00
r0x3435=00
r0x3436=00
r0x3437=00
r0x3438=00
r0x3439=00
r0x343a=00
r0x343b=00
r0x343c=00
r0x343d=00
r0x343e=00
r0x343f=00
r0x3440=02
r0x3441=04
r0x3442=00
r0x3443=00
r0x3444=02
r0x3445=04
r0x3446=00
r0x3447=00
r0x3448=00
r0x3449=00
r0x344a=01
r0x344b=00
r0x344c=00
r0x344d=00
r0x344e=00
r0x344f=00
r0x3450=c0
r0x3451=00
r0x3452=00
r0x3453=00
r0x3454=00
r0x3455=00
r0x3456=00
r0x3457=00
r0x3458=00
r0x3459=00
r0x345a=00
r0x345b=00
r0x345c=00
r0x345d=00
r0x345e=00
r0x345f=02
r0x3460=00
r0x3461=00
r0x3462=00
r0x3463=00
r0x3464=00
r0x3465=00
r0x3466=00
r0x3467=00
r0x3468=00
r0x3469=44
r0x346a=a4
r0x346b=aa
r0x346c=00
r0x346d=00
r0x346e=00
r0x346f=00
r0x3470=00
r0x3471=00
r0x3472=00
r0x3473=00
r0x3474=00
r0x3475=00
r0x3476=00
r0x3477=00
r0x3478=00
r0x3479=00
r0x347a=00
r0x347b=00
r0x347c=00
r0x347d=00
r0x347e=00
r0x347f=00
r0x3480=00
r0x3481=00
r0x3482=00
r0x3483=00
r0x3484=00
r0x3485=00
r0x3486=00
r0x3487=00
r0x3488=00
r0x3489=00
r0x348a=00
r0x348b=00
r0x348c=00
r0x348d=00
r0x348e=00
r0x348f=00
r0x3490=00
r0x3491=00
r0x3492=00
r0x3493=00
r0x3494=00
r0x3495=00
r0x3496=00
r0x3497=00
r0x3498=07
r0x3499=00
r0x349a=00
r0x349b=00
r0x349c=a5
r0x349d=00
r0x349e=00
r0x349f=00
r0x34a0=10
r0x34a1=16
r0x34a2=20
r0x34a3=00
r0x34a4=e0
r0x34a5=1d
r0x34a6=00
r0x34a7=08
r0x34a8=00
r0x34a9=00
r0x34aa=00
r0x34ab=00
r0x34ac=00
r0x34ad=00
r0x34ae=00
r0x34af=00
r0x34b0=00
r0x34b1=00
r0x34b2=00
r0x34b3=00
r0x34b4=00
r0x34b5=00
r0x34b6=00
r0x34b7=00
r0x34b8=00
r0x34b9=00
r0x34ba=00
r0x34bb=00
r0x34bc=00
r0x34bd=00
r0x34be=00
r0x34bf=00
r0x34c0=40
r0x34c1=40
r0x34c2=65
r0x34c3=40
r0x34c4=65
r0x34c5=44
r0x34c6=40
r0x34c7=48
r0x34c8=48
r0x34c9=40
r0x34ca=40
r0x34cb=40
r0x34cc=40
r0x34cd=40
r0x34ce=48
r0x34cf=48
r0x34d0=48
r0x34d1=48
r0x34d2=48
r0x34d3=48
r0x34d4=00
r0x34d5=48
r0x34d6=28
r0x34d7=68
r0x34d8=28
r0x34d9=28
r0x34da=28
r0x34db=28
r0x34dc=28
r0x34dd=48
r0x34de=48
r0x34df=65
r0x34e0=48
r0x34e1=48
r0x34e2=28
r0x34e3=48
r0x34e4=48
r0x34e5=68
r0x34e6=68
r0x34e7=28
r0x34e8=28
r0x34e9=48
r0x34ea=68
r0x34eb=48
r0x34ec=48
r0x34ed=48
r0x34ee=00
r0x34ef=48
r0x34f0=48
r0x34f1=00
r0x34f2=00
r0x34f3=28
r0x34f4=48
r0x34f5=48
r0x34f6=48
r0x34f7=48
r0x34f8=48
r0x34f9=48
r0x34fa=48
r0x34fb=20
r0x34fc=20
r0x34fd=48
r0x34fe=48
r0x34ff=00
-------------- next part --------------
r0x1400=00
r0x1401=00
r0x1402=00
r0x1403=00
r0x1404=09
r0x1405=94
r0x1406=00
r0x1407=00
r0x1408=00
r0x1409=00
r0x140a=00
r0x140b=00
r0x140c=00
r0x140d=00
r0x140e=00
r0x140f=00
r0x1410=00
r0x1411=00
r0x1412=00
r0x1413=00
r0x1414=00
r0x1415=00
r0x1416=00
r0x1417=00
r0x1418=00
r0x1419=00
r0x141a=00
r0x141b=00
r0x141c=00
r0x141d=00
r0x141e=00
r0x141f=00
r0x1420=00
r0x1421=00
r0x1422=00
r0x1423=00
r0x1424=00
r0x1425=00
r0x1426=00
r0x1427=00
r0x1428=00
r0x1429=00
r0x142a=00
r0x142b=00
r0x142c=00
r0x142d=00
r0x142e=59
r0x142f=00
r0x1430=00
r0x1431=00
r0x1432=00
r0x1433=00
r0x1434=00
r0x1435=00
r0x1436=00
r0x1437=00
r0x1438=00
r0x1439=00
r0x143a=00
r0x143b=00
r0x143c=00
r0x143d=00
r0x143e=00
r0x143f=00
r0x1440=3f
r0x1441=3f
r0x1442=00
r0x1443=00
r0x1444=00
r0x1445=00
r0x1446=00
r0x1447=00
r0x1448=00
r0x1449=10
r0x144a=01
r0x144b=00
r0x144c=00
r0x144d=00
r0x144e=00
r0x144f=00
r0x1450=c0
r0x1451=00
r0x1452=00
r0x1453=00
r0x1454=00
r0x1455=00
r0x1456=00
r0x1457=00
r0x1458=00
r0x1459=00
r0x145a=00
r0x145b=00
r0x145c=00
r0x145d=00
r0x145e=00
r0x145f=02
r0x1460=00
r0x1461=00
r0x1462=00
r0x1463=00
r0x1464=00
r0x1465=00
r0x1466=00
r0x1467=00
r0x1468=00
r0x1469=44
r0x146a=a4
r0x146b=aa
r0x146c=00
r0x146d=00
r0x146e=00
r0x146f=00
r0x1470=00
r0x1471=00
r0x1472=00
r0x1473=00
r0x1474=00
r0x1475=00
r0x1476=00
r0x1477=00
r0x1478=00
r0x1479=00
r0x147a=00
r0x147b=00
r0x147c=00
r0x147d=00
r0x147e=00
r0x147f=00
r0x1480=00
r0x1481=00
r0x1482=00
r0x1483=00
r0x1484=00
r0x1485=00
r0x1486=00
r0x1487=00
r0x1488=00
r0x1489=00
r0x148a=00
r0x148b=00
r0x148c=00
r0x148d=00
r0x148e=00
r0x148f=00
r0x1490=00
r0x1491=00
r0x1492=00
r0x1493=00
r0x1494=00
r0x1495=00
r0x1496=00
r0x1497=00
r0x1498=07
r0x1499=00
r0x149a=00
r0x149b=00
r0x149c=00
r0x149d=00
r0x149e=00
r0x149f=00
r0x14a0=00
r0x14a1=00
r0x14a2=00
r0x14a3=00
r0x14a4=00
r0x14a5=00
r0x14a6=00
r0x14a7=00
r0x14a8=00
r0x14a9=00
r0x14aa=00
r0x14ab=00
r0x14ac=00
r0x14ad=00
r0x14ae=00
r0x14af=00
r0x14b0=00
r0x14b1=00
r0x14b2=00
r0x14b3=00
r0x14b4=00
r0x14b5=00
r0x14b6=00
r0x14b7=00
r0x14b8=00
r0x14b9=00
r0x14ba=00
r0x14bb=00
r0x14bc=00
r0x14bd=00
r0x14be=00
r0x14bf=00
r0x14c0=40
r0x14c1=40
r0x14c2=65
r0x14c3=40
r0x14c4=65
r0x14c5=44
r0x14c6=40
r0x14c7=48
r0x14c8=48
r0x14c9=40
r0x14ca=40
r0x14cb=40
r0x14cc=40
r0x14cd=40
r0x14ce=48
r0x14cf=48
r0x14d0=48
r0x14d1=48
r0x14d2=48
r0x14d3=48
r0x14d4=00
r0x14d5=48
r0x14d6=28
r0x14d7=68
r0x14d8=28
r0x14d9=28
r0x14da=28
r0x14db=28
r0x14dc=28
r0x14dd=48
r0x14de=48
r0x14df=65
r0x14e0=48
r0x14e1=48
r0x14e2=28
r0x14e3=48
r0x14e4=48
r0x14e5=68
r0x14e6=68
r0x14e7=68
r0x14e8=68
r0x14e9=48
r0x14ea=68
r0x14eb=48
r0x14ec=48
r0x14ed=48
r0x14ee=00
r0x14ef=48
r0x14f0=48
r0x14f1=00
r0x14f2=00
r0x14f3=28
r0x14f4=48
r0x14f5=48
r0x14f6=48
r0x14f7=48
r0x14f8=48
r0x14f9=48
r0x14fa=48
r0x14fb=48
r0x14fc=48
r0x14fd=48
r0x14fe=48
r0x14ff=00
-------------- next part --------------
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From rminnich at gmail.com  Sun Feb  8 18:53:04 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 8 Feb 2009 09:53:04 -0800
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <20090208174500.15141.qmail@stuge.se>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
Message-ID: <13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>

On Sun, Feb 8, 2009 at 9:45 AM, Peter Stuge <peter at stuge.se> wrote:
> ron minnich wrote:
>> I have not seen a patch for this one so here is mine. Untested. Not
>> signed off.
>
> It'll work in this case but the flash chip size can also be smaller
> than the last detected chip.
>

I'm not sure there is any harm in the smaller case.

ron



From peter at stuge.se  Sun Feb  8 18:54:26 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 8 Feb 2009 18:54:26 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
In-Reply-To: <200902081850.19570.harald.gutmann@gmx.net>
References: <200902071652.31725.harald.gutmann@gmx.net>
	<200902081819.01065.harald.gutmann@gmx.net>
	<20090208173127.12041.qmail@stuge.se>
	<200902081850.19570.harald.gutmann@gmx.net>
Message-ID: <20090208175426.17802.qmail@stuge.se>

Harald Gutmann wrote:
> Here are the new results which should be the right once.
> original.txt = proprietary bios
> coreboot.txt = coreboot bios

And here's a diff.


//Peter
-------------- next part --------------
--- original.txt	Sun Feb  8 18:50:00 2009
+++ coreboot.txt	Sun Feb  8 18:50:00 2009
@@ -1 +1 @@
-r0x_400=00
+r0x_400=30
@@ -5,2 +5,2 @@
-r0x_404=09
-r0x_405=94
+r0x_404=00
+r0x_405=00
@@ -47 +47 @@
-r0x_42e=59
+r0x_42e=00
@@ -65,2 +65,2 @@
-r0x_440=3f
-r0x_441=3f
+r0x_440=02
+r0x_441=04
@@ -69,2 +69,2 @@
-r0x_444=00
-r0x_445=00
+r0x_444=02
+r0x_445=04
@@ -74 +74 @@
-r0x_449=10
+r0x_449=00
@@ -157 +157 @@
-r0x_49c=00
+r0x_49c=a5
@@ -161,3 +161,3 @@
-r0x_4a0=00
-r0x_4a1=00
-r0x_4a2=00
+r0x_4a0=10
+r0x_4a1=16
+r0x_4a2=20
@@ -165,2 +165,2 @@
-r0x_4a4=00
-r0x_4a5=00
+r0x_4a4=e0
+r0x_4a5=1d
@@ -168 +168 @@
-r0x_4a7=00
+r0x_4a7=08
@@ -232,2 +232,2 @@
-r0x_4e7=68
-r0x_4e8=68
+r0x_4e7=28
+r0x_4e8=28
@@ -252,2 +252,2 @@
-r0x_4fb=48
-r0x_4fc=48
+r0x_4fb=20
+r0x_4fc=20
-------------- next part --------------
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From peter at stuge.se  Sun Feb  8 18:55:25 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 8 Feb 2009 18:55:25 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
Message-ID: <20090208175525.18012.qmail@stuge.se>

ron minnich wrote:
> > It'll work in this case but the flash chip size can also be smaller
> > than the last detected chip.
> 
> I'm not sure there is any harm in the smaller case.

Some chips are particular about the addresses that offsets are
written to and e.g. block erase will not work properly.


//Peter



From rminnich at gmail.com  Sun Feb  8 18:58:12 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 8 Feb 2009 09:58:12 -0800
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <20090208175525.18012.qmail@stuge.se>
References: <2831fecf0902051226vc30821cw1b5ef557ce86ec69@mail.gmail.com>
	<498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
Message-ID: <13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>

On Sun, Feb 8, 2009 at 9:55 AM, Peter Stuge <peter at stuge.se> wrote:
> ron minnich wrote:
>> > It'll work in this case but the flash chip size can also be smaller
>> > than the last detected chip.
>>
>> I'm not sure there is any harm in the smaller case.
>
> Some chips are particular about the addresses that offsets are
> written to and e.g. block erase will not work properly.
>

Actually, I'm not that picky about the patch, but ... I doubt the
flash chips themselves know or care. It's the chipsets (e.g. the
sc520) that are the real trouble.

I am not sure why we have that test for flashbase anyway. What's it
matter? Why do we use the old value for the next value?

ron



From peter at stuge.se  Sun Feb  8 19:03:02 2009
From: peter at stuge.se (Peter Stuge)
Date: Sun, 8 Feb 2009 19:03:02 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
References: <498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
Message-ID: <20090208180302.19977.qmail@stuge.se>

ron minnich wrote:
> I doubt the flash chips themselves know or care.

They do. Look at how any LPC/FWH chip does block erase. Which block
to erase depends on the address relative start of chip that is used
in the block erase command.


> I am not sure why we have that test for flashbase anyway. What's it
> matter? Why do we use the old value for the next value?

It's a bug. I'll fix it but need to go off for a bit first.


//Peter



From rmh at aybabtu.com  Sun Feb  8 19:09:53 2009
From: rmh at aybabtu.com (Robert Millan)
Date: Sun, 8 Feb 2009 19:09:53 +0100
Subject: [coreboot] USB support merge (Re: [PATCH] (ata.mod) Fix ATAPI
	protocol)
In-Reply-To: <874ozvsisy.fsf@xs4all.nl>
References: <497376DE.1030302@t-online.de> <874ozvsisy.fsf@xs4all.nl>
Message-ID: <20090208180953.GA22285@thorin>

On Mon, Jan 19, 2009 at 11:15:41AM +0100, Marco Gerards wrote:
> Perhaps my USB code might help in some occasions
> for scsi.c, I am not completely sure if they are in sync.  I sent in
> the USB code earlier.  This code can be committed, although endianess
> is not handled correctly at all places.

Hi,

Alright then.  I just checked in your last USB patch, after reviewing it:

  http://lists.gnu.org/archive/html/grub-devel/2008-08/msg00604.html

I agree it's best to commit it.  It has a few minor problems, but this is
much better than leaving it to bitrot.  Then we can work on fixing them more
easily.

Let's enumerate them again:

  - OHCI works on qemu but hasn't been tested on real hardware.

  - --enable-grub-emu-usb isn't yet known to work.

  - There might be endianess issues affecting powerpc (note: we aren't
    building it there yet, we'd have to move PCI support to i386.rmk first)

  - A few parts of it are marked "XXX".

I'll add one more to the list: keyboard support wasn't included in this
patch.  I'll look into your other pieces of code and retrieve a working
keyboard driver.

Other than this, massive storage on UHCI should work fine.  See
http://grub.enbug.org/USBSupport for details on how to use it.

-- 
Robert Millan

  The DRM opt-in fallacy: "Your data belongs to us. We will decide when (and
  how) you may access your data; but nobody's threatening your freedom: we
  still allow you to remove your data and not access it at all."



From rmh at aybabtu.com  Sun Feb  8 20:53:23 2009
From: rmh at aybabtu.com (Robert Millan)
Date: Sun, 8 Feb 2009 20:53:23 +0100
Subject: [coreboot] [PATCH] USB keyboard
Message-ID: <20090208195323.GA3425@thorin>


Hi,

This patch implements USB keyboard support.  It is based on work by Marco
Gerards, to which I made some adjustments, synced with trunk, and fixed a
pair of bugs.

-- 
Robert Millan

  The DRM opt-in fallacy: "Your data belongs to us. We will decide when (and
  how) you may access your data; but nobody's threatening your freedom: we
  still allow you to remove your data and not access it at all."
-------------- next part --------------
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From rminnich at gmail.com  Sun Feb  8 21:34:18 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 8 Feb 2009 12:34:18 -0800
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <20090208180302.19977.qmail@stuge.se>
References: <498B73E7.1000105@gmx.net>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
	<20090208180302.19977.qmail@stuge.se>
Message-ID: <13426df10902081234lf2f13b2ua6d6d7770fd089ef@mail.gmail.com>

On Sun, Feb 8, 2009 at 10:03 AM, Peter Stuge <peter at stuge.se> wrote:
> ron minnich wrote:
>> I doubt the flash chips themselves know or care.
>
> They do. Look at how any LPC/FWH chip does block erase. Which block
> to erase depends on the address relative start of chip that is used
> in the block erase command.


relative to the start of the chip yes. But the chip itself could be
physically addressed at, e.g., 0x8000000, and all the programming
would be fine.

The only issue I've had with physical chip address was on the sc520,
where the put a bunch of registers in the middle of the flash address
space.

thanks

ron



From peter at stuge.se  Mon Feb  9 01:05:12 2009
From: peter at stuge.se (Peter Stuge)
Date: Mon, 9 Feb 2009 01:05:12 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <13426df10902081234lf2f13b2ua6d6d7770fd089ef@mail.gmail.com>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
References: <498B73E7.1000105@gmx.net> <BB866006A2284DFEB4A356383A48583B@chimp>
	<2831fecf0902060919y1bffcf05q166745d23222414d@mail.gmail.com>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
Message-ID: <20090209000512.19663.qmail@stuge.se>

ron minnich wrote:
> I am not sure why we have that test for flashbase anyway. What's it
> matter? Why do we use the old value for the next value?

The reason it is used like that is that SC520 code runs before all
probes and can set flashbase, which should then be used by the
probes.


ron minnich wrote:
> relative to the start of the chip yes. But the chip itself could be
> physically addressed at, e.g., 0x8000000, and all the programming
> would be fine.

If the chip is at top of 4GB and the base does is not the start of
the chip some if not all commands to the chip will fail.


> The only issue I've had with physical chip address was on the
> sc520, where the put a bunch of registers in the middle of the
> flash address space.

Many flash chips also have registers, and even if they don't at the
very least block erase operations absolutely need the mmap to start
where the flash chip starts.

Attaching my suggested patch. Myles, could you give it a go please?


//Peter
-------------- next part --------------
flashrom: Fix broken flash chip base address logic

Elan SC520 requries us to deal with flash chip base addresses at locations
other than top of 4GB. The logic for that was incorrectly triggered also when
a board had more than one flash chip. This patch will honor flashbase only when
probing for the first flash chip on the board, and look at top of 4GB for later
chips.

Signed-off-by: Peter Stuge <peter at stuge.se>

Index: flashrom.c
===================================================================
--- flashrom.c	(revision 3930)
+++ flashrom.c	(working copy)
@@ -121,7 +121,7 @@
 			size = getpagesize();
 		}
 
-		base = flashbase ? flashbase : (0xffffffff - size + 1);
+		base = flashbase && flashchips == first_flash ? flashbase : (0xffffffff - size + 1);
 		flash->virtual_memory = bios = physmap("flash chip", base, size);
 
 		if (force)

From rminnich at gmail.com  Mon Feb  9 01:31:53 2009
From: rminnich at gmail.com (ron minnich)
Date: Sun, 8 Feb 2009 16:31:53 -0800
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <20090209000512.19663.qmail@stuge.se>
References: <498B73E7.1000105@gmx.net>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
	<13426df10902081234lf2f13b2ua6d6d7770fd089ef@mail.gmail.com>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
	<20090209000512.19663.qmail@stuge.se>
Message-ID: <13426df10902081631v5e2dd13drbead2c6622c7851@mail.gmail.com>

Peter, you're right, I was misunderstanding your point at first.

I'm still a bit concerned about the "sc520 must be probed first" but
it's not even really that important anyway; any sc520's left out
there? Are they still made?

ron



From stepan at coresystems.de  Mon Feb  9 11:14:32 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Mon, 09 Feb 2009 11:14:32 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <13426df10902081631v5e2dd13drbead2c6622c7851@mail.gmail.com>
References: <498B73E7.1000105@gmx.net>	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>	<20090208174500.15141.qmail@stuge.se>	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>	<20090208175525.18012.qmail@stuge.se>	<13426df10902081234lf2f13b2ua6d6d7770fd089ef@mail.gmail.com>	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>	<20090209000512.19663.qmail@stuge.se>
	<13426df10902081631v5e2dd13drbead2c6622c7851@mail.gmail.com>
Message-ID: <49900208.9050505@coresystems.de>

On 09.02.2009 1:31 Uhr, ron minnich wrote:
> Peter, you're right, I was misunderstanding your point at first.
>
> I'm still a bit concerned about the "sc520 must be probed first"
The sc520 rom area is never probed "first".. It's only probed when an
sc520 is detected.

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From mart.raudsepp at artecdesign.ee  Mon Feb  9 11:24:26 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Mon, 09 Feb 2009 12:24:26 +0200
Subject: [coreboot] [PATCH] cs5536: Fix NAND Flash setup.
Message-ID: <1234175066.14901.27.camel@martr-gentoo.artec>

cs5536: Fix NAND Flash setup.

A NAND device may never be mapped above 0xEFFFFFFF, as these addresses never reach
the NAND controller. Only NAND controller, as the only DIVIL component that is
allowed to be memory mapped, is affected - other Geode LX and CS5536 peripherals
(that are separate GLIU devices outside DIVIL component) can use addresses above
that limit (see in-code comment for details).

In combination with a new VSA2 version 1.02 or newer, this makes NAND flash
finally work in coreboot v3.

Signed-off-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
Signed-off-by: Anti Sullin <anti.sullin at artecdesign.ee>
---
 southbridge/amd/cs5536/cs5536.c |   22 +++++++++++++++++++++-
 1 files changed, 21 insertions(+), 1 deletions(-)

diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c
index 729cb7e..5437937 100644
--- a/southbridge/amd/cs5536/cs5536.c
+++ b/southbridge/amd/cs5536/cs5536.c
@@ -114,6 +114,26 @@ static void nand_phase2(struct device *dev)
 	}
 }
 
+static void nand_read_resources(struct device *dev)
+{
+	pci_dev_read_resources(dev);
+
+	/* All memory accesses in the range of 0xF0000000 - 0xFFFFFFFF routed to
+	 * Diverse Integration Logic (DIVIL) get always sent to the device inside
+	 * DIVIL as set in DIVIL_BALL_OPTS PRI_BOOT_LOC and SEC_BOOT_LOC bits
+	 * (see CS5536 data book chapter 6.6.2.10 DIVIL_BALL_OPTS PRI_BOOT_LOC
+	 * description).
+	 * The virtual PCI address limit test gives us a false upper limit of
+	 * 0xFFFFFFFF for this device, but we do not want NAND Flash to be using
+	 * memory addresses 0xF0000000 and above as those accesses would end up
+	 * somewhere else instead. Therefore if VSA2 gave us a MMIO resource for
+	 * NAND Flash, patch this (fixed) resources higher bound to 0xEFFFFFFF.
+	 */
+	if ((dev->resources >= 1) && (dev->resource[0].flags & IORESOURCE_MEM) &&
+		(dev->resource[0].limit > 0xefffffff))
+		dev->resource[0].limit = 0xefffffff;
+}
+
 /**
  * Power button setup.
  *
@@ -737,7 +757,7 @@ struct device_operations cs5536_nand = {
 	.constructor		 = default_device_constructor,
 	.phase2_fixup		 = nand_phase2,
 	.phase3_scan		 = 0,
-	.phase4_read_resources	 = pci_dev_read_resources,
+	.phase4_read_resources	 = nand_read_resources,
 	.phase4_set_resources	 = pci_set_resources,
 	.phase5_enable_resources = pci_dev_enable_resources,
 	.phase6_init		 = 0, /* No Option ROMs */
-- 
1.6.1.1




From svn at coreboot.org  Mon Feb  9 14:40:10 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Mon,  9 Feb 2009 14:40:10 +0100
Subject: [coreboot] r1124 - coreboot-v3/southbridge/amd/cs5536
Message-ID: <mailman.2752.1355071481.16123.coreboot@coreboot.org>

Author: mraudsepp
Date: 2009-02-09 14:40:10 +0100 (Mon, 09 Feb 2009)
New Revision: 1124

Modified:
   coreboot-v3/southbridge/amd/cs5536/cs5536.h
Log:
cs5536: Use NANDF_CTL for NAND Flash Control Timing register constant 5140001Ch define, as in data book, not mis-spelled NADF_CNTL

Trivial: constant currently not used anywhere.

Signed-off-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>

Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.h
===================================================================
--- coreboot-v3/southbridge/amd/cs5536/cs5536.h	2009-01-23 22:18:24 UTC (rev 1123)
+++ coreboot-v3/southbridge/amd/cs5536/cs5536.h	2009-02-09 13:40:10 UTC (rev 1124)
@@ -147,7 +147,7 @@
 #define MDD_NORF_T01			(MSR_SB_MDD + 0x19)
 #define MDD_NORF_T23			(MSR_SB_MDD + 0x1A)
 #define MDD_NANDF_DATA			(MSR_SB_MDD + 0x1B)
-#define MDD_NADF_CNTL			(MSR_SB_MDD + 0x1C)
+#define MDD_NANDF_CTL			(MSR_SB_MDD + 0x1C)
 #define MDD_AC_DMA			(MSR_SB_MDD + 0x1E)
 #define MDD_KEL_CNTRL			(MSR_SB_MDD + 0x1F)
 #define MDD_IRQM_YLOW			(MSR_SB_MDD + 0x20)




From mart.raudsepp at artecdesign.ee  Mon Feb  9 16:15:49 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Mon, 09 Feb 2009 17:15:49 +0200
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing values
 in the dts.
Message-ID: <1234192549.2021.3.camel@martr-gentoo.artec>

cs5536/nand: Allow setting of NAND timing values in the dts.

The reset value for NAND timings is the slowest possible for Flash interface.
Implement optionally setting it to a different value inside the NAND device.
Set it to appropriate values for Artec Group DBE61 and DBE62.
This results in a roughly two times quicker read time as measured by hdparm
for these boards.

Signed-off-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
---
 mainboard/artecgroup/dbe61/dts  |    5 ++++-
 mainboard/artecgroup/dbe62/dts  |    5 ++++-
 southbridge/amd/cs5536/cs5536.c |   18 ++++++++++++++++++
 southbridge/amd/cs5536/nand     |    4 ++++
 4 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/mainboard/artecgroup/dbe61/dts b/mainboard/artecgroup/dbe61/dts
index a6995ce..cb46292 100644
--- a/mainboard/artecgroup/dbe61/dts
+++ b/mainboard/artecgroup/dbe61/dts
@@ -109,8 +109,11 @@ end
 			/* USB Port Power Handling setting. */
 			pph = "0xf5";
 		};
-		pci at f,1 {
+		pci at f,1 { /* NAND Flash */
 			/config/("southbridge/amd/cs5536/nand");
+			/* Timings */
+			nandf_data = "0x01200120";
+			nandf_ctl = "0x00000120";
 		};
 	};
 };
diff --git a/mainboard/artecgroup/dbe62/dts b/mainboard/artecgroup/dbe62/dts
index 8089e79..73dc5a7 100644
--- a/mainboard/artecgroup/dbe62/dts
+++ b/mainboard/artecgroup/dbe62/dts
@@ -63,8 +63,11 @@
 			/* USB Port Power Handling setting. */
 			pph = "0xf5";
 		};
-		pci at f,1 {
+		pci at f,1 { /* NAND Flash */
 			/config/("southbridge/amd/cs5536/nand");
+			/* Timings */
+			nandf_data = "0x01200120";
+			nandf_ctl = "0x00000120";
 		};
 	};
 };
diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c
index 5437937..ea90fd4 100644
--- a/southbridge/amd/cs5536/cs5536.c
+++ b/southbridge/amd/cs5536/cs5536.c
@@ -109,6 +109,24 @@ static void hide_vpci(u32 vpci_devid)
 static void nand_phase2(struct device *dev)
 {
 	if (dev->enabled) {
+		struct southbridge_amd_cs5536_nand_config *nand;
+		struct msr msr;
+
+		/* Set up timings */
+		nand = (struct southbridge_amd_cs5536_nand_config *)dev->device_configuration;
+		msr.hi = 0x0;
+
+		if (nand->nandf_data) {
+			msr.lo = nand->nandf_data;
+			wrmsr(MDD_NANDF_DATA, msr);
+			printk(BIOS_DEBUG, "NANDF_DATA set to 0x%08x\n", msr.lo);
+		}
+		if (nand->nandf_ctl) {
+			msr.lo = nand->nandf_ctl;
+			wrmsr(MDD_NANDF_CTL, msr);
+			printk(BIOS_DEBUG, "NANDF_CTL set to 0x%08x\n", msr.lo);
+		}
+
 		/* Tell VSA to use FLASH PCI header. Not IDE header. */
 		hide_vpci(0x800079C4);
 	}
diff --git a/southbridge/amd/cs5536/nand b/southbridge/amd/cs5536/nand
index 69f4fa4..62c28b0 100644
--- a/southbridge/amd/cs5536/nand
+++ b/southbridge/amd/cs5536/nand
@@ -20,4 +20,8 @@
 
 {
 	device_operations = "cs5536_nand";
+
+	/* NAND timings per data book and NAND chip on board. 0x0 leaves to reset value. */
+	nandf_data = "0x0";
+	nandf_ctl = "0x0";
 };
-- 
1.6.1.1




From rminnich at gmail.com  Mon Feb  9 17:01:35 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 9 Feb 2009 08:01:35 -0800
Subject: [coreboot] [PATCH] cs5536: Fix NAND Flash setup.
In-Reply-To: <1234175066.14901.27.camel@martr-gentoo.artec>
References: <1234175066.14901.27.camel@martr-gentoo.artec>
Message-ID: <13426df10902090801w50367257n4e91ac547f1be9c3@mail.gmail.com>

Acked-by: Ronald G. Minnich <rminnich at gmail.com>



From rminnich at gmail.com  Mon Feb  9 17:04:50 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 9 Feb 2009 08:04:50 -0800
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
	values in the dts.
In-Reply-To: <1234192549.2021.3.camel@martr-gentoo.artec>
References: <1234192549.2021.3.camel@martr-gentoo.artec>
Message-ID: <13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>

nice to see people using the dts now!

Acked-by: Ronald G. Minnich <rminnich at gmail.com>



From peter at stuge.se  Mon Feb  9 17:09:47 2009
From: peter at stuge.se (Peter Stuge)
Date: Mon, 9 Feb 2009 17:09:47 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <49900208.9050505@coresystems.de>
	<13426df10902081631v5e2dd13drbead2c6622c7851@mail.gmail.com>
References: <2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
	<13426df10902081234lf2f13b2ua6d6d7770fd089ef@mail.gmail.com>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
	<20090209000512.19663.qmail@stuge.se>
	<13426df10902081631v5e2dd13drbead2c6622c7851@mail.gmail.com>
Message-ID: <20090209160947.7205.qmail@stuge.se>

ron minnich wrote:
> I'm still a bit concerned about the "sc520 must be probed first"

Stefan Reinauer wrote:
> The sc520 rom area is never probed "first".. It's only probed when
> an sc520 is detected.

Thanks for clarifying Stefan!


flashrom runs chipset enables, then board enables, then finally
probes for flash chips.

The SC520 chipset enable sets flashbase according to hardware
configuration and the chip probes then use that base.

Only the first flash chip base is honored for SC520. For subsequent
probes (after the first found chip) flashrom will again look at top
of 4GB. I don't care too much. Multichip is already a corner case.

For non-SC520 flashrom now consistently looks at top of 4GB.

All this multi chip and moving base stuff is a total hack in flashrom
as it stands. I think that's fine for now.


//Peter



From svn at coreboot.org  Mon Feb  9 17:10:58 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Mon,  9 Feb 2009 17:10:58 +0100
Subject: [coreboot] r1125 - coreboot-v3/southbridge/amd/cs5536
Message-ID: <mailman.2753.1355071481.16123.coreboot@coreboot.org>

Author: mraudsepp
Date: 2009-02-09 17:10:58 +0100 (Mon, 09 Feb 2009)
New Revision: 1125

Modified:
   coreboot-v3/southbridge/amd/cs5536/cs5536.c
Log:
cs5536: Fix NAND Flash setup.

A NAND device may never be mapped above 0xEFFFFFFF, as these addresses never reach
the NAND controller. Only NAND controller, as the only DIVIL component that is
allowed to be memory mapped, is affected - other Geode LX and CS5536 peripherals
(that are separate GLIU devices outside DIVIL component) can use addresses above
that limit (see in-code comment for details).

In combination with a new VSA2 version 1.02 or newer, this makes NAND flash
finally work in coreboot v3.

Signed-off-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
Signed-off-by: Anti Sullin <anti.sullin at artecdesign.ee>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>

Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c
===================================================================
--- coreboot-v3/southbridge/amd/cs5536/cs5536.c	2009-02-09 13:40:10 UTC (rev 1124)
+++ coreboot-v3/southbridge/amd/cs5536/cs5536.c	2009-02-09 16:10:58 UTC (rev 1125)
@@ -114,6 +114,26 @@
 	}
 }
 
+static void nand_read_resources(struct device *dev)
+{
+	pci_dev_read_resources(dev);
+
+	/* All memory accesses in the range of 0xF0000000 - 0xFFFFFFFF routed to
+	 * Diverse Integration Logic (DIVIL) get always sent to the device inside
+	 * DIVIL as set in DIVIL_BALL_OPTS PRI_BOOT_LOC and SEC_BOOT_LOC bits
+	 * (see CS5536 data book chapter 6.6.2.10 DIVIL_BALL_OPTS PRI_BOOT_LOC
+	 * description).
+	 * The virtual PCI address limit test gives us a false upper limit of
+	 * 0xFFFFFFFF for this device, but we do not want NAND Flash to be using
+	 * memory addresses 0xF0000000 and above as those accesses would end up
+	 * somewhere else instead. Therefore if VSA2 gave us a MMIO resource for
+	 * NAND Flash, patch this (fixed) resources higher bound to 0xEFFFFFFF.
+	 */
+	if ((dev->resources >= 1) && (dev->resource[0].flags & IORESOURCE_MEM) &&
+		(dev->resource[0].limit > 0xefffffff))
+		dev->resource[0].limit = 0xefffffff;
+}
+
 /**
  * Power button setup.
  *
@@ -737,7 +757,7 @@
 	.constructor		 = default_device_constructor,
 	.phase2_fixup		 = nand_phase2,
 	.phase3_scan		 = 0,
-	.phase4_read_resources	 = pci_dev_read_resources,
+	.phase4_read_resources	 = nand_read_resources,
 	.phase4_set_resources	 = pci_set_resources,
 	.phase5_enable_resources = pci_dev_enable_resources,
 	.phase6_init		 = 0, /* No Option ROMs */




From mart.raudsepp at artecdesign.ee  Mon Feb  9 17:11:45 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Mon, 09 Feb 2009 18:11:45 +0200
Subject: [coreboot] [PATCH] cs5536: Fix NAND Flash setup.
In-Reply-To: <13426df10902090801w50367257n4e91ac547f1be9c3@mail.gmail.com>
References: <1234175066.14901.27.camel@martr-gentoo.artec>
	<13426df10902090801w50367257n4e91ac547f1be9c3@mail.gmail.com>
Message-ID: <1234195905.2021.12.camel@martr-gentoo.artec>

?hel kenal p?eval, E, 2009-02-09 kell 08:01, kirjutas ron minnich:
> Acked-by: Ronald G. Minnich <rminnich at gmail.com>

Thanks, r1125


Regards,
Mart Raudsepp




From mart.raudsepp at artecdesign.ee  Mon Feb  9 17:21:37 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Mon, 09 Feb 2009 18:21:37 +0200
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
 values in the dts.
In-Reply-To: <13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
References: <1234192549.2021.3.camel@martr-gentoo.artec>
	<13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
Message-ID: <1234196497.2021.23.camel@martr-gentoo.artec>

?hel kenal p?eval, E, 2009-02-09 kell 08:04, kirjutas ron minnich:
> nice to see people using the dts now!

It's a bit hard to use it for the LBAR setup as well (the code in
chipset_flash_setup() in cs5536.c), as it needs to happen before VSA
init, and VSA init is done in northbridge domain phase2_fixup - so we
don't have a phase for NAND device to run before VSA is inited.
Otherwise I'd use the NAND initialization from chipsetinit() to some
nand_phase1 as well.

> Acked-by: Ronald G. Minnich <rminnich at gmail.com>

I'm going to have to NAK this myself, as it doesn't compile with my gcc
if there is no NAND device in the mainboard dts, as there is no
southbridge_amd_cs5536_nand_config in statictree.h then, and gcc
complains about
/home/leio/dev/coreboot-v3/southbridge/amd/cs5536/cs5536.c:119: error:
dereferencing pointer to incomplete type

So the problem here is that while this code is only ran if the static
dts has a NAND device (and it goes inside the conditional where the
struct is dereferenced only if the device is enabled), it is always
compiled in.
Therefore we can't really dereference things in this manner if the
device can ever be missing from statictree.h, which is the case if
omitted from mainboard dts as it is right now.

How should I approach this?
Add dummy NAND devices to all boards that say "disabled;"?
Access the config structure some other way?
Introduce a dirty HAVE_CS5536_NAND that duplicates dts NAND device
enable?
Have dtc emit a structure for it even if nothing sources the southbridge
nand.dts? (that's quite surely a "no" though, just bringing out all
possibilities I can imagine)

On another note, can we cleanly avoid compiling all this NAND init code
in for the boards that surely do not have a NAND device as it can't be a
dynamic device? Same deal with IDE code on boards using NAND. Less
important though, as the code footprint is probably negligible.


Regards,
Mart Raudsepp




From peter at stuge.se  Mon Feb  9 17:21:55 2009
From: peter at stuge.se (Peter Stuge)
Date: Mon, 9 Feb 2009 17:21:55 +0100
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND
	timing	values in the dts.
In-Reply-To: <13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
	<1234192549.2021.3.camel@martr-gentoo.artec>
References: <1234192549.2021.3.camel@martr-gentoo.artec>
	<13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
	<1234192549.2021.3.camel@martr-gentoo.artec>
Message-ID: <20090209162155.10716.qmail@stuge.se>

Mart Raudsepp wrote:
> +			/* Timings */
> +			nandf_data = "0x01200120";
> +			nandf_ctl = "0x00000120";

ron minnich wrote:
> nice to see people using the dts now!

Is there any way those values could be expressed in a more human
readable form? Do we even want to move dts values in that direction?


//Peter



From rminnich at gmail.com  Mon Feb  9 17:24:52 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 9 Feb 2009 08:24:52 -0800
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
	values in the dts.
In-Reply-To: <20090209162155.10716.qmail@stuge.se>
References: <13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
	<1234192549.2021.3.camel@martr-gentoo.artec>
	<20090209162155.10716.qmail@stuge.se>
Message-ID: <13426df10902090824v12ae4382x2ba68498116607ee@mail.gmail.com>

On Mon, Feb 9, 2009 at 8:21 AM, Peter Stuge <peter at stuge.se> wrote:

>
> Is there any way those values could be expressed in a more human
> readable form? Do we even want to move dts values in that direction?

yes, because there will inevitably be chipsets (most likely from
intel) for which we know certain values but we can not say why they
are what they are.

ron



From rminnich at gmail.com  Mon Feb  9 17:35:09 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 9 Feb 2009 08:35:09 -0800
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
	values in the dts.
In-Reply-To: <1234196497.2021.23.camel@martr-gentoo.artec>
References: <1234192549.2021.3.camel@martr-gentoo.artec>
	<13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
	<1234196497.2021.23.camel@martr-gentoo.artec>
Message-ID: <13426df10902090835v6552d4c1n154490e7c380805f@mail.gmail.com>

On Mon, Feb 9, 2009 at 8:21 AM, Mart Raudsepp
<mart.raudsepp at artecdesign.ee> wrote:
> ?hel kenal p?eval, E, 2009-02-09 kell 08:04, kirjutas ron minnich:
>> nice to see people using the dts now!
>
> It's a bit hard to use it for the LBAR setup as well (the code in
> chipset_flash_setup() in cs5536.c), as it needs to happen before VSA
> init, and VSA init is done in northbridge domain phase2_fixup - so we
> don't have a phase for NAND device to run before VSA is inited.
> Otherwise I'd use the NAND initialization from chipsetinit() to some
> nand_phase1 as well.
>
>> Acked-by: Ronald G. Minnich <rminnich at gmail.com>
>
> I'm going to have to NAK this myself, as it doesn't compile with my gcc
> if there is no NAND device in the mainboard dts, as there is no
> southbridge_amd_cs5536_nand_config in statictree.h then, and gcc
> complains about
> /home/leio/dev/coreboot-v3/southbridge/amd/cs5536/cs5536.c:119: error:
> dereferencing pointer to incomplete type

The problem is that you have to have a separate compilation unit if
you have seperate dts objects.

If you really want to separate out the nand dts, as you have done:
                     /config/("southbridge/amd/cs5536/nand");

then you need to have a southbridge/amd/cs5536/nand.c. See the other
parts for example.

If you want to keep the code in cs5536.c, then you'll have to put the
settings in the cs5536 dts.

> How should I approach this?

See what I did in the sb600.

> On another note, can we cleanly avoid compiling all this NAND init code
> in for the boards that surely do not have a NAND device as it can't be a
> dynamic device?

Yes. put it in its own file. That's what makefiles are for. Then those
boards that have nand:

add nand.c to the Makefile
use the nand dts you set up.

(w.r.t. IDE)
>Less
> important though, as the code footprint is probably negligible.

This is the really key point. We decided in a heated discussion a few
months back that on, e.g., sb600, we'd compile all code in, whether
used or not. But in your case, with this nand stuff, you might as
seperate out the code in nand.c

ron



From mylesgw at gmail.com  Mon Feb  9 17:36:19 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 9 Feb 2009 09:36:19 -0700
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
	values in the dts.
In-Reply-To: <1234196497.2021.23.camel@martr-gentoo.artec>
References: <1234192549.2021.3.camel@martr-gentoo.artec><13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
	<1234196497.2021.23.camel@martr-gentoo.artec>
Message-ID: <89B15387B9754370B249916202EB2A3E@chimp>



> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Mart Raudsepp
> Sent: Monday, February 09, 2009 9:22 AM
> To: coreboot at coreboot.org
> Subject: Re: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
> values in the dts.
> 
> ?hel kenal p?eval, E, 2009-02-09 kell 08:04, kirjutas ron minnich:
> > nice to see people using the dts now!
> 
> It's a bit hard to use it for the LBAR setup as well (the code in
> chipset_flash_setup() in cs5536.c), as it needs to happen before VSA
> init, and VSA init is done in northbridge domain phase2_fixup - so we
> don't have a phase for NAND device to run before VSA is inited.
> Otherwise I'd use the NAND initialization from chipsetinit() to some
> nand_phase1 as well.
> 
> > Acked-by: Ronald G. Minnich <rminnich at gmail.com>
> 
> I'm going to have to NAK this myself, as it doesn't compile with my gcc
> if there is no NAND device in the mainboard dts, as there is no
> southbridge_amd_cs5536_nand_config in statictree.h then, and gcc
> complains about
> /home/leio/dev/coreboot-v3/southbridge/amd/cs5536/cs5536.c:119: error:
> dereferencing pointer to incomplete type

We have this problem with IDE flags on the AMD 8111 chipset too.  I'm not
sure what the best way to do it is.  So far we've just been forced to
include the (possibly disabled) device in the dts.

Thanks,
Myles




From rminnich at gmail.com  Mon Feb  9 17:40:09 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 9 Feb 2009 08:40:09 -0800
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
	values in the dts.
In-Reply-To: <89B15387B9754370B249916202EB2A3E@chimp>
References: <1234192549.2021.3.camel@martr-gentoo.artec>
	<13426df10902090804l4b8fc16aq336c31d52999a23c@mail.gmail.com>
	<1234196497.2021.23.camel@martr-gentoo.artec>
	<89B15387B9754370B249916202EB2A3E@chimp>
Message-ID: <13426df10902090840r328a4053s87870b3002fa4ab1@mail.gmail.com>

On Mon, Feb 9, 2009 at 8:36 AM, Myles Watson <mylesgw at gmail.com> wrote:

>
> We have this problem with IDE flags on the AMD 8111 chipset too.  I'm not
> sure what the best way to do it is.  So far we've just been forced to
> include the (possibly disabled) device in the dts.

That was a consequence of the decision we made on this list, just ref.
the sb600 discussion, that the code to be compiled is listed in the
Makefile for the part (e.g. southbridge), not the mainboard.

I don't see a huge problem with putting disabled devices in the
mainboard dts. Yes, we see it all the time as we create the mainboard
dts, but the person who actually builds ROMs won't be paying that much
attention to the mainboard dts.

ron



From mart.raudsepp at artecdesign.ee  Mon Feb  9 18:00:38 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Mon, 9 Feb 2009 19:00:38 +0200 (EET)
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
 values in the dts.
Message-ID: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>

> On Mon, Feb 9, 2009 at 8:21 AM, Mart Raudsepp
> <mart.raudsepp at artecdesign.ee> wrote:
>> ?hel kenal p?eval, E, 2009-02-09 kell 08:04, kirjutas ron minnich:
>>> nice to see people using the dts now!
>>
>> It's a bit hard to use it for the LBAR setup as well (the code in
>> chipset_flash_setup() in cs5536.c), as it needs to happen before VSA
>> init, and VSA init is done in northbridge domain phase2_fixup - so we
>> don't have a phase for NAND device to run before VSA is inited.
>> Otherwise I'd use the NAND initialization from chipsetinit() to some
>> nand_phase1 as well.
>>
>>> Acked-by: Ronald G. Minnich <rminnich at gmail.com>
>>
>> I'm going to have to NAK this myself, as it doesn't compile with my gcc
>> if there is no NAND device in the mainboard dts, as there is no
>> southbridge_amd_cs5536_nand_config in statictree.h then, and gcc
>> complains about
>> /home/leio/dev/coreboot-v3/southbridge/amd/cs5536/cs5536.c:119: error:
>> dereferencing pointer to incomplete type
>
> The problem is that you have to have a separate compilation unit if
> you have seperate dts objects.
>
> If you really want to separate out the nand dts, as you have done:
>                      /config/("southbridge/amd/cs5536/nand");
>
> then you need to have a southbridge/amd/cs5536/nand.c. See the other
> parts for example.

That means also I'm going to have two places where to enable or disable
devices - dts and Makefile. And I need to keep them in sync. And I need to
list southbridge C files in mainboard specific Makefile instead of in the
same directory.
It isn't very nice and scalable and neat.
Could we perhaps have dtc give me a DTS_HAVE_CS5536_NAND or similar
preprocessor definitions if the device is present in the static tree?

> If you want to keep the code in cs5536.c, then you'll have to put the
> settings in the cs5536 dts.

That seems like an abuse of the dts system

>> How should I approach this?
>
> See what I did in the sb600.

For the sake of argument, lets say every kilobyte matters as I might want
to also fit in a LAB in a 1MB limit. We could be talking about a whole lot
more complex code that is unconditionally compiled in unless doing ugly C
file listing in mainboard dir Makefiles than we are dealing with in this
instance.

>> On another note, can we cleanly avoid compiling all this NAND init code
>> in for the boards that surely do not have a NAND device as it can't be a
>> dynamic device?
>
> Yes. put it in its own file. That's what makefiles are for. Then those
> boards that have nand:
>
> add nand.c to the Makefile
> use the nand dts you set up.

The problem is that that listing is in a completely different Makefile
than where the file is at.

> (w.r.t. IDE)
>>Less
>> important though, as the code footprint is probably negligible.
>
> This is the really key point. We decided in a heated discussion a few
> months back that on, e.g., sb600, we'd compile all code in, whether
> used or not. But in your case, with this nand stuff, you might as
> seperate out the code in nand.c

As a completely off-topic slightly related to the above side note, I'm
still slightly annoyed at all loglevel strings getting compiled in now, no
questions asked. A maximum supported loglevel option would be nice. We
need no complete spew loglevel messages in a production ROM we
hypothetically burn into units sold to customers. Just haven't gotten
around to implement that after those changes I didn't manage to raise a
NAK on time :)


Regards,
Mart Raudsepp




From mylesgw at gmail.com  Mon Feb  9 18:48:06 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 9 Feb 2009 10:48:06 -0700
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <20090209000512.19663.qmail@stuge.se>
References: <498B73E7.1000105@gmx.net>
	<2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
	<13426df10902081234lf2f13b2ua6d6d7770fd089ef@mail.gmail.com>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
	<20090209000512.19663.qmail@stuge.se>
Message-ID: <2831fecf0902090948n75ef9926w565ba609504f2dd7@mail.gmail.com>

On Sun, Feb 8, 2009 at 5:05 PM, Peter Stuge <peter at stuge.se> wrote:
> ron minnich wrote:
>> I am not sure why we have that test for flashbase anyway. What's it
>> matter? Why do we use the old value for the next value?
>
> The reason it is used like that is that SC520 code runs before all
> probes and can set flashbase, which should then be used by the
> probes.
>
>
> ron minnich wrote:
>> relative to the start of the chip yes. But the chip itself could be
>> physically addressed at, e.g., 0x8000000, and all the programming
>> would be fine.
>
> If the chip is at top of 4GB and the base does is not the start of
> the chip some if not all commands to the chip will fail.
>
>
>> The only issue I've had with physical chip address was on the
>> sc520, where the put a bunch of registers in the middle of the
>> flash address space.
>
> Many flash chips also have registers, and even if they don't at the
> very least block erase operations absolutely need the mmap to start
> where the flash chip starts.
>
> Attaching my suggested patch. Myles, could you give it a go please?

It works for me.

Acked-by: Myles Watson <mylesgw at gmail.com>

Thanks,
Myles



From svn at coreboot.org  Mon Feb  9 18:52:54 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Mon,  9 Feb 2009 18:52:54 +0100
Subject: [coreboot] r3931 - in trunk/coreboot-v2/src: arch/i386/boot
	arch/i386/lib arch/i386/smp boot cpu/amd/model_fxx
	cpu/x86/lapic cpu/x86/mtrr devices mainboard/tyan/s2895
	southbridge/nvidia/ck804
Message-ID: <mailman.2754.1355071481.16123.coreboot@coreboot.org>

Author: myles
Date: 2009-02-09 18:52:54 +0100 (Mon, 09 Feb 2009)
New Revision: 3931

Modified:
   trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c
   trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c
   trunk/coreboot-v2/src/arch/i386/boot/tables.c
   trunk/coreboot-v2/src/arch/i386/lib/cpu.c
   trunk/coreboot-v2/src/arch/i386/lib/exception.c
   trunk/coreboot-v2/src/arch/i386/smp/mpspec.c
   trunk/coreboot-v2/src/boot/elfboot.c
   trunk/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_init.c
   trunk/coreboot-v2/src/cpu/x86/lapic/lapic.c
   trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c
   trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c
   trunk/coreboot-v2/src/devices/device_util.c
   trunk/coreboot-v2/src/devices/pci_device.c
   trunk/coreboot-v2/src/devices/pci_rom.c
   trunk/coreboot-v2/src/devices/pnp_device.c
   trunk/coreboot-v2/src/mainboard/tyan/s2895/irq_tables.c
   trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c
   trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_sata.c
Log:
Remove some warnings, mainly from format strings which didn't match the
arguments.

Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/arch/i386/boot/coreboot_table.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -251,7 +251,7 @@
 	head->table_checksum = compute_ip_checksum(first_rec, head->table_bytes);
 	head->header_checksum = 0;
 	head->header_checksum = compute_ip_checksum(head, sizeof(*head));
-	printk_debug("Wrote coreboot table at: %p - %p  checksum %lx\n",
+	printk_debug("Wrote coreboot table at: %p - %p  checksum %x\n",
 		head, rec, head->table_checksum);
 	return (unsigned long)rec;
 }
@@ -415,16 +415,16 @@
 		low_table_end = (unsigned long)head;
 	}
  
-	printk_debug("Adjust low_table_end from 0x%08x to ", low_table_end);
+	printk_debug("Adjust low_table_end from 0x%08lx to ", low_table_end);
 	low_table_end += 0xfff; // 4K aligned
 	low_table_end &= ~0xfff;
-	printk_debug("0x%08x \n", low_table_end);
+	printk_debug("0x%08lx \n", low_table_end);
 
 	/* The Linux kernel assumes this region is reserved */
-	printk_debug("Adjust rom_table_end from 0x%08x to ", rom_table_end);
+	printk_debug("Adjust rom_table_end from 0x%08lx to ", rom_table_end);
 	rom_table_end += 0xffff; // 64K align
 	rom_table_end &= ~0xffff;
-	printk_debug("0x%08x \n", rom_table_end);
+	printk_debug("0x%08lx \n", rom_table_end);
 
 #if (HAVE_OPTION_TABLE == 1) 
 	{

Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -91,7 +91,7 @@
 	addr &= ~15;
 
 	/* This table must be betweeen 0xf0000 & 0x100000 */
-	printk_info("Copying Interrupt Routing Table to 0x%08x... ", addr);
+	printk_info("Copying Interrupt Routing Table to 0x%08lx... ", addr);
 	memcpy((void *)addr, &intel_irq_routing_table, intel_irq_routing_table.size);
 	printk_info("done.\n");
 	verify_copy_pirq_routing_table(addr);

Modified: trunk/coreboot-v2/src/arch/i386/boot/tables.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/boot/tables.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/arch/i386/boot/tables.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -92,7 +92,7 @@
 			mpc_start &= ~1023;
 			rom_table_start = mpc_start;
 		}
-		printk_debug("move mptable from 0x%0x to 0x%0x, size 0x%0x\n", low_table_end, mpc_start, mptable_size);
+		printk_debug("move mptable from 0x%0lx to 0x%0x, size 0x%0x\n", low_table_end, mpc_start, mptable_size);
 		memcpy((unsigned char *)mpc_start, (unsigned char *)low_table_end, mptable_size);
 		smp_write_floating_table_physaddr(low_table_end - SMP_FLOATING_TABLE_LEN, mpc_start);
 		memset((unsigned char *)low_table_end, '\0', mptable_size);

Modified: trunk/coreboot-v2/src/arch/i386/lib/cpu.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/lib/cpu.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/arch/i386/lib/cpu.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -225,7 +225,7 @@
 	
 	info = cpu_info();
 
-	printk_notice("Initializing CPU #%d\n", info->index);
+	printk_notice("Initializing CPU #%ld\n", info->index);
 
 	cpu = info->cpu;
 	if (!cpu) {
@@ -261,7 +261,7 @@
 		cpu->ops->init(cpu);
 	}
 
-	printk_info("CPU #%d initialized\n", info->index);
+	printk_info("CPU #%ld initialized\n", info->index);
 
 	return;
 }

Modified: trunk/coreboot-v2/src/arch/i386/lib/exception.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/lib/exception.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/arch/i386/lib/exception.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -481,10 +481,10 @@
 	}
 #else /* !CONFIG_GDB_STUB */
 	printk_emerg(
-		"Unexpected Exception: %d @ %02x:%08lx - Halting\n"
-		"Code: %d eflags: %08lx\n"
-		"eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n"
-		"edi: %08lx esi: %08lx ebp: %08lx esp: %08lx\n",
+		"Unexpected Exception: %d @ %02x:%08x - Halting\n"
+		"Code: %d eflags: %08x\n"
+		"eax: %08x ebx: %08x ecx: %08x edx: %08x\n"
+		"edi: %08x esi: %08x ebp: %08x esp: %08x\n",
 		info->vector, info->cs, info->eip,
 		info->error_code, info->eflags,
 		info->eax, info->ebx, info->ecx, info->edx,

Modified: trunk/coreboot-v2/src/arch/i386/smp/mpspec.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/smp/mpspec.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/arch/i386/smp/mpspec.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -236,7 +236,7 @@
 
 			if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
 				/* pci device */
-				printk_debug("route irq: %s %04x\n", dev_path(child));
+				printk_debug("route irq: %s\n", dev_path(child));
 				for (i = 0; i < 4; i++)
 					smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
 				goto next;
@@ -246,7 +246,7 @@
 			case PCI_CLASS_BRIDGE_PCI:
 			case PCI_CLASS_BRIDGE_PCMCIA:
 			case PCI_CLASS_BRIDGE_CARDBUS:
-				printk_debug("route irq bridge: %s %04x\n", dev_path(child));
+				printk_debug("route irq bridge: %s\n", dev_path(child));
 				smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
 			}
 

Modified: trunk/coreboot-v2/src/boot/elfboot.c
===================================================================
--- trunk/coreboot-v2/src/boot/elfboot.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/boot/elfboot.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -76,7 +76,7 @@
 		memcpy(n_desc, buff, 2);
 	}
 	if (checksum != cb->ip_checksum) {
-		printk_err("Image checksum: %04x != computed checksum: %04x\n",
+		printk_err("Image checksum: %04x != computed checksum: %04lx\n",
 			cb->ip_checksum, checksum);
 	}
 	return checksum == cb->ip_checksum;
@@ -500,7 +500,7 @@
 		/* Zero the extra bytes between middle & end */
 		if (middle < end) {
 			printk_debug("Clearing Segment: addr: 0x%016lx memsz: 0x%016lx\n",
-				(unsigned long)middle, end - middle);
+				(unsigned long)middle, (unsigned long)(end - middle));
 			
 			/* Zero the extra bytes */
 			memset(middle, 0, end - middle);
@@ -590,7 +590,7 @@
 	/* Reset to booting from this image as late as possible */
 	boot_successful();
 
-	printk_debug("Jumping to boot code at 0x%x\n", entry);
+	printk_debug("Jumping to boot code at 0x%p\n", entry);
 	post_code(0xfe);
 
 	/* Jump to kernel */

Modified: trunk/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_init.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_init.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/cpu/amd/model_fxx/model_fxx_init.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -231,7 +231,7 @@
                 size = (limitk - basek) << 10;
                 addr = map_2M_page(basek >> 11);
                 if (addr == MAPPING_ERROR) {
-                        printk_err("Cannot map page: %x\n", basek >> 11);
+                        printk_err("Cannot map page: %lx\n", basek >> 11);
                         return;
                 }
 
@@ -312,7 +312,7 @@
 		begink = CONFIG_LB_MEM_TOPK;
 	}
 
-	printk_debug("Clearing memory %uK - %uK: ", begink, endk);
+	printk_debug("Clearing memory %luK - %luK: ", begink, endk);
 
 	/* Save the normal state */
 	save_mtrr_state(&mtrr_state);
@@ -465,7 +465,9 @@
 extern void model_fxx_update_microcode(unsigned cpu_deviceid);
 int init_processor_name(void);
 
+#if CONFIG_USBDEBUG_DIRECT
 static unsigned ehci_debug_addr;
+#endif
 
 void model_fxx_init(device_t dev)
 {

Modified: trunk/coreboot-v2/src/cpu/x86/lapic/lapic.c
===================================================================
--- trunk/coreboot-v2/src/cpu/x86/lapic/lapic.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/cpu/x86/lapic/lapic.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -55,7 +55,7 @@
 			LAPIC_DELIVERY_MODE_NMI)
 		);
 
-	printk_debug(" apic_id: 0x%02x ", lapicid());
+	printk_debug(" apic_id: 0x%02lx ", lapicid());
 
 #else /* !NEED_LLAPIC */
 	/* Only Pentium Pro and later have those MSR stuff */

Modified: trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c
===================================================================
--- trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -85,14 +85,14 @@
 		send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
 	} while (send_status && (timeout++ < 1000));
 	if (timeout >= 1000) {
-		printk_err("CPU %d: First apic write timed out. Disabling\n",
+		printk_err("CPU %ld: First apic write timed out. Disabling\n",
 			 apicid);
 		// too bad. 
-		printk_err("ESR is 0x%x\n", lapic_read(LAPIC_ESR));
+		printk_err("ESR is 0x%lx\n", lapic_read(LAPIC_ESR));
 		if (lapic_read(LAPIC_ESR)) {
 			printk_err("Try to reset ESR\n");
 			lapic_write_around(LAPIC_ESR, 0);
-			printk_err("ESR is 0x%x\n", lapic_read(LAPIC_ESR));
+			printk_err("ESR is 0x%lx\n", lapic_read(LAPIC_ESR));
 		}
 		return 0;
 	}
@@ -114,7 +114,7 @@
 		send_status = lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
 	} while (send_status && (timeout++ < 1000));
 	if (timeout >= 1000) {
-		printk_err("CPU %d: Second apic write timed out. Disabling\n",
+		printk_err("CPU %ld: Second apic write timed out. Disabling\n",
 			 apicid);
 		// too bad. 
 		return 0;
@@ -345,8 +345,6 @@
 /* C entry point of secondary cpus */
 void secondary_cpu_init(void)
 {
-	unsigned long cpunum;
-
 	atomic_inc(&active_cpus);
 #if SERIAL_CPU_INIT == 1
   #if CONFIG_MAX_CPUS>2

Modified: trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c
===================================================================
--- trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -241,7 +241,7 @@
 			align = max_align;
 		}
 		sizek = 1 << align;
-		printk_debug("Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\n",
+		printk_debug("Setting variable MTRR %d, base: %4ldMB, range: %4ldMB, type %s\n",
 			reg, range_startk >>10, sizek >> 10,
 			(type==MTRR_TYPE_UNCACHEABLE)?"UC":
 			    ((type==MTRR_TYPE_WRBACK)?"WB":"Other")

Modified: trunk/coreboot-v2/src/devices/device_util.c
===================================================================
--- trunk/coreboot-v2/src/devices/device_util.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/devices/device_util.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -467,7 +467,7 @@
 #endif
 		}
 		printk_debug(
-			"%s %02x <- [0x%010Lx - 0x%010Lx] size 0x%08Lx gran 0x%02x %s%s%s\n",
+			"%s %02lx <- [0x%010Lx - 0x%010Lx] size 0x%08Lx gran 0x%02x %s%s%s\n",
 			dev_path(dev),
 			resource->index,
 			base, end,

Modified: trunk/coreboot-v2/src/devices/pci_device.c
===================================================================
--- trunk/coreboot-v2/src/devices/pci_device.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/devices/pci_device.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -207,7 +207,7 @@
 	if (moving == 0) {
 		if (value != 0) {
 			printk_debug(
-				"%s register %02x(%08x), read-only ignoring it\n",
+				"%s register %02lx(%08lx), read-only ignoring it\n",
 				dev_path(dev), index, value);
 		}
 		resource->flags = 0;
@@ -311,7 +311,7 @@
 
 	if (moving == 0) {
 		if (value != 0) {
-			printk_debug("%s register %02x(%08x), read-only ignoring it\n",
+			printk_debug("%s register %02lx(%08lx), read-only ignoring it\n",
 				     dev_path(dev), index, value);
 		}
 		resource->flags = 0;
@@ -459,7 +459,7 @@
 
 	/* Make certain the resource has actually been set */
 	if (!(resource->flags & IORESOURCE_ASSIGNED)) {
-		printk_err("ERROR: %s %02x %s size: 0x%010Lx not assigned\n",
+		printk_err("ERROR: %s %02lx %s size: 0x%010Lx not assigned\n",
 			dev_path(dev), resource->index,
 			resource_type(resource),
 			resource->size);
@@ -546,7 +546,7 @@
 	else {
 		/* Don't let me think I stored the resource */
 		resource->flags &= ~IORESOURCE_STORED;
-		printk_err("ERROR: invalid resource->index %x\n",
+		printk_err("ERROR: invalid resource->index %lx\n",
 			resource->index);
 	}
 	report_resource_stored(dev, resource, "");

Modified: trunk/coreboot-v2/src/devices/pci_rom.c
===================================================================
--- trunk/coreboot-v2/src/devices/pci_rom.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/devices/pci_rom.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -45,7 +45,7 @@
 		return NULL;
 	}
 
-	printk_debug("rom address for %s = %x\n", dev_path(dev), rom_address);
+	printk_debug("rom address for %s = %lx\n", dev_path(dev), rom_address);
 	
 	if(!dev->on_mainboard) {
 		/* enable expansion ROM address decoding */
@@ -110,12 +110,12 @@
 		extern device_t vga_pri;	// the primary vga device, defined in device.c
 		if (dev != vga_pri) return NULL; // only one VGA supported
 #endif
-		printk_debug("copying VGA ROM Image from 0x%x to 0x%x, 0x%x bytes\n",
+		printk_debug("copying VGA ROM Image from %p to 0x%x, 0x%x bytes\n",
 			    rom_header, PCI_VGA_RAM_IMAGE_START, rom_size);
 		memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header, rom_size);
 		return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START);
 	} else {
-		printk_debug("copying non-VGA ROM Image from 0x%x to 0x%x, 0x%x bytes\n",
+		printk_debug("copying non-VGA ROM Image from %p to %p, 0x%x bytes\n",
 			    rom_header, pci_ram_image_start, rom_size);
 		memcpy(pci_ram_image_start, rom_header, rom_size);
 		pci_ram_image_start += rom_size;

Modified: trunk/coreboot-v2/src/devices/pnp_device.c
===================================================================
--- trunk/coreboot-v2/src/devices/pnp_device.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/devices/pnp_device.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -103,7 +103,7 @@
 static void pnp_set_resource(device_t dev, struct resource *resource)
 {
 	if (!(resource->flags & IORESOURCE_ASSIGNED)) {
-		printk_err("ERROR: %s %02x %s size: 0x%010Lx not assigned\n",
+		printk_err("ERROR: %s %02lx %s size: 0x%010Lx not assigned\n",
 			dev_path(dev), resource->index,
 			resource_type(resource),
 			resource->size);
@@ -121,7 +121,7 @@
 		pnp_set_irq(dev, resource->index, resource->base);
 	}
 	else {
-		printk_err("ERROR: %s %02x unknown resource type\n",
+		printk_err("ERROR: %s %02lx unknown resource type\n",
 			dev_path(dev), resource->index);
 		return;
 	}

Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/irq_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/tyan/s2895/irq_tables.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/mainboard/tyan/s2895/irq_tables.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -72,7 +72,7 @@
 	addr &= ~15;
 
 	/* This table must be betweeen 0xf0000 & 0x100000 */
-	printk_info("Writing IRQ routing tables to 0x%x...", addr);
+	printk_info("Writing IRQ routing tables to 0x%lx...", addr);
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);

Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_lpc.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -314,7 +314,7 @@
 						continue;
 					base = res->base;
 					end = resource_end(res);
-					printk_debug("ck804 lpc decode:%s, base=0x%08x, end=0x%08x\r\n", dev_path(child), base, end);
+					printk_debug("ck804 lpc decode:%s, base=0x%08lx, end=0x%08lx\r\n", dev_path(child), base, end);
 					switch (base) {
 					case 0x3f8:	// COM1
 						reg |= (1 << 0);

Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_sata.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_sata.c	2009-02-05 02:18:42 UTC (rev 3930)
+++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_sata.c	2009-02-09 17:52:54 UTC (rev 3931)
@@ -11,6 +11,7 @@
 #include <device/pci_ops.h>
 #include "ck804.h"
 
+#if CK804_SATA_RESET_FOR_ATAPI
 static void sata_com_reset(struct device *dev, unsigned reset)
 // reset = 1 : reset
 // reset = 0 : clear
@@ -21,7 +22,7 @@
 
 	base = (uint32_t *) pci_read_config32(dev, 0x24);
 
-	printk_debug("base = %08x\r\n", base);
+	printk_debug("base = %08lx\n", base);
 
 	if (reset) {
 		*(base + 4) = 0xffffffff;
@@ -71,6 +72,7 @@
 		printk_debug("loop=%d, *(base+0x44)=%08x\r\n", loop, dword);
 	}
 }
+#endif
 
 static void sata_init(struct device *dev)
 {
@@ -132,7 +134,7 @@
 	dword |= 2;
 	pci_write_config32(dev, 0xf8, dword);
 
-#if 0
+#if CK804_SATA_RESET_FOR_ATAPI
 	dword = pci_read_config32(dev, 0xac);
 	dword &= ~((1 << 13) | (1 << 14));
 	dword |= (1 << 13) | (0 << 14);




From mylesgw at gmail.com  Mon Feb  9 18:53:28 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 9 Feb 2009 10:53:28 -0700
Subject: [coreboot] v2 warnings
In-Reply-To: <20090206231421.7213.qmail@stuge.se>
References: <2831fecf0902061302w51f2370fud3201ac61c18a09f@mail.gmail.com>
	<20090206231421.7213.qmail@stuge.se>
Message-ID: <2831fecf0902090953p3bd86244m2d9c5aa2214b6e76@mail.gmail.com>

On Fri, Feb 6, 2009 at 4:14 PM, Peter Stuge <peter at stuge.se> wrote:
> Myles Watson wrote:
>> Remove a couple of warnings (mostly from format strings.)
>>
>> Signed-off-by: Myles Watson <mylesgw at gmail.com>
>
> Acked-by: Peter Stuge <peter at stuge.se>

Rev 3931.

Thanks,
Myles



From rminnich at gmail.com  Mon Feb  9 18:56:47 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 9 Feb 2009 09:56:47 -0800
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
	values in the dts.
In-Reply-To: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>
References: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>
Message-ID: <13426df10902090956n3e99a5cdt12316c707059b0b9@mail.gmail.com>

On Mon, Feb 9, 2009 at 9:00 AM, Mart Raudsepp
<mart.raudsepp at artecdesign.ee> wrote:

> Could we perhaps have dtc give me a DTS_HAVE_CS5536_NAND or similar
> preprocessor definitions if the device is present in the static tree?

sure. We could also have it create a Make variable such that the
nand.c is conditionally compiled in. I prefer that to #ifdef goo in .c
files.

Or we could do something like this:
STAGE2_SOURCE="somefile.c"

and have dtc add that source to e.g. the stage2 source. Of course we
are moving far beyond what dts was intended to do; we're really
starting to put things into it that are in the v2 config tool.

> For the sake of argument, lets say every kilobyte matters as I might want
> to also fit in a LAB in a 1MB limit.
>We could be talking about a whole lot
> more complex code that is unconditionally compiled in unless doing ugly C
> file listing in mainboard dir Makefiles than we are dealing with in this
> instance.

yep. Once again, the v2 config system comes out looking pretty good on
this score.


> As a completely off-topic slightly related to the above side note, I'm
> still slightly annoyed at all loglevel strings getting compiled in now, no
> questions asked. A maximum supported loglevel option would be nice. We
> need no complete spew loglevel messages in a production ROM we
> hypothetically burn into units sold to customers.

In many cases the lack of such compiled in messages was a huge problem
on deployed systems. That's why we went to having them all in as
default. There were many complaints about leaving out messages in v2
...

ron



From mylesgw at gmail.com  Mon Feb  9 19:30:59 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 9 Feb 2009 11:30:59 -0700
Subject: [coreboot] Move Plugin support options
Message-ID: <2831fecf0902091030n6c1ab363lc15e8e1e2c66c694@mail.gmail.com>

Plugin support shouldn't be as visible as it is.

This patch moves it to the device menu and makes it depend on expert.

Signed-off-by: Myles Watson <mylesgw at gmail.com>

Thanks,
Myles



From mylesgw at gmail.com  Mon Feb  9 19:31:26 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 9 Feb 2009 11:31:26 -0700
Subject: [coreboot] Move Plugin support options
In-Reply-To: <2831fecf0902091030n6c1ab363lc15e8e1e2c66c694@mail.gmail.com>
References: <2831fecf0902091030n6c1ab363lc15e8e1e2c66c694@mail.gmail.com>
Message-ID: <2831fecf0902091031x2c3524d0o3bc4ffd3158af0d6@mail.gmail.com>

With the patch.

On Mon, Feb 9, 2009 at 11:30 AM, Myles Watson <mylesgw at gmail.com> wrote:
> Plugin support shouldn't be as visible as it is.
>
> This patch moves it to the device menu and makes it depend on expert.
>
> Signed-off-by: Myles Watson <mylesgw at gmail.com>
>
> Thanks,
> Myles
>
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From peter at stuge.se  Mon Feb  9 21:14:49 2009
From: peter at stuge.se (Peter Stuge)
Date: Mon, 9 Feb 2009 21:14:49 +0100
Subject: [coreboot] Move Plugin support options
In-Reply-To: <2831fecf0902091030n6c1ab363lc15e8e1e2c66c694@mail.gmail.com>
References: <2831fecf0902091030n6c1ab363lc15e8e1e2c66c694@mail.gmail.com>
Message-ID: <20090209201449.868.qmail@stuge.se>

Myles Watson wrote:
> Plugin support shouldn't be as visible as it is.
> 
> This patch moves it to the device menu and makes it depend on expert.
> 
> Signed-off-by: Myles Watson <mylesgw at gmail.com>

Acked-by: Peter Stuge <peter at stuge.se>



From marcj303 at gmail.com  Mon Feb  9 21:18:46 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Mon, 9 Feb 2009 13:18:46 -0700
Subject: [coreboot] [v3][patch] Add early MTRR setup
In-Reply-To: <534e5dc20902070928le4cedd2ubaaae84bbef89b8@mail.gmail.com>
References: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
	<498D6B01.3030401@gmx.net>
	<534e5dc20902070928le4cedd2ubaaae84bbef89b8@mail.gmail.com>
Message-ID: <534e5dc20902091218l18792885vf7365e28a3c6e29d@mail.gmail.com>

On Sat, Feb 7, 2009 at 10:28 AM, Marc Jones <marcj303 at gmail.com> wrote:
> On Sat, Feb 7, 2009 at 4:05 AM, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>> On 06.02.2009 23:37, Marc Jones wrote:
>>> Setup the MTRRs in stage1 so that memory and cache are available throughout
>>> stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
>>> It also sets all system memory to WriteBack cached and sets the ROM
>>> area to cached.
>>>
>>> Signed-off-by: Marc Jones <marcj303 at gmail.com>

Fixed the comment for clarity and the ROM size based on the config.

Marc
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From svn at coreboot.org  Mon Feb  9 21:26:14 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Mon,  9 Feb 2009 21:26:14 +0100
Subject: [coreboot] r3932 - trunk/util/flashrom
Message-ID: <mailman.2755.1355071481.16123.coreboot@coreboot.org>

Author: stuge
Date: 2009-02-09 21:26:14 +0100 (Mon, 09 Feb 2009)
New Revision: 3932

Modified:
   trunk/util/flashrom/flashrom.c
Log:
flashrom: Fix broken flash chip base address logic

Elan SC520 requries us to deal with flash chip base addresses at locations
other than top of 4GB. The logic for that was incorrectly triggered also when
a board had more than one flash chip. This patch will honor flashbase only when
probing for the first flash chip on the board, and look at top of 4GB for later
chips.

Signed-off-by: Peter Stuge <peter at stuge.se>
Acked-by: Myles Watson <mylesgw at gmail.com>


Modified: trunk/util/flashrom/flashrom.c
===================================================================
--- trunk/util/flashrom/flashrom.c	2009-02-09 17:52:54 UTC (rev 3931)
+++ trunk/util/flashrom/flashrom.c	2009-02-09 20:26:14 UTC (rev 3932)
@@ -121,7 +121,7 @@
 			size = getpagesize();
 		}
 
-		base = flashbase ? flashbase : (0xffffffff - size + 1);
+		base = flashbase && flashchips == first_flash ? flashbase : (0xffffffff - size + 1);
 		flash->virtual_memory = bios = physmap("flash chip", base, size);
 
 		if (force)




From peter at stuge.se  Mon Feb  9 21:26:24 2009
From: peter at stuge.se (Peter Stuge)
Date: Mon, 9 Feb 2009 21:26:24 +0100
Subject: [coreboot] flashrom: Can't mmap memory
In-Reply-To: <2831fecf0902090948n75ef9926w565ba609504f2dd7@mail.gmail.com>
References: <2831fecf0902060929l2c1bf22bi9e3cb1c7fece716d@mail.gmail.com>
	<13426df10902060946p52786f9ap36f976314e53355e@mail.gmail.com>
	<13426df10902080922p3d5fb458of722d65a59c5af1a@mail.gmail.com>
	<20090208174500.15141.qmail@stuge.se>
	<13426df10902080953t516ce60foed326de6e72d2eb1@mail.gmail.com>
	<20090208175525.18012.qmail@stuge.se>
	<13426df10902081234lf2f13b2ua6d6d7770fd089ef@mail.gmail.com>
	<13426df10902080958v38a6a9a7o55fe5796c08ff548@mail.gmail.com>
	<20090209000512.19663.qmail@stuge.se>
	<2831fecf0902090948n75ef9926w565ba609504f2dd7@mail.gmail.com>
Message-ID: <20090209202624.4475.qmail@stuge.se>

Myles Watson wrote:
> It works for me.
> 
> Acked-by: Myles Watson <mylesgw at gmail.com>

r3932



From svn at coreboot.org  Mon Feb  9 23:26:00 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Mon,  9 Feb 2009 23:26:00 +0100
Subject: [coreboot] r1126 - coreboot-v3/device
Message-ID: <mailman.2756.1355071481.16123.coreboot@coreboot.org>

Author: myles
Date: 2009-02-09 23:25:59 +0100 (Mon, 09 Feb 2009)
New Revision: 1126

Modified:
   coreboot-v3/device/Kconfig
Log:
Move Plugin menu and make it depend on experimental.

Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: coreboot-v3/device/Kconfig
===================================================================
--- coreboot-v3/device/Kconfig	2009-02-09 16:10:58 UTC (rev 1125)
+++ coreboot-v3/device/Kconfig	2009-02-09 22:25:59 UTC (rev 1126)
@@ -123,9 +123,8 @@
 	  Initialize onboard VGA chips before any plugin VGA cards
 	  are initialized.
 
-endmenu
-
 menu "Plugin Support"
+depends EXPERT
 
 config PCIX_PLUGIN_SUPPORT
 	bool "Support for devices that provide PCI-X and aren't in the dts."
@@ -164,6 +163,8 @@
 
 endmenu
 
+endmenu #Devices
+
 menu "Power management"
 
 config SUSPEND_TO_RAM




From mylesgw at gmail.com  Mon Feb  9 23:26:35 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Mon, 9 Feb 2009 15:26:35 -0700
Subject: [coreboot] Move Plugin support options
In-Reply-To: <20090209201449.868.qmail@stuge.se>
References: <2831fecf0902091030n6c1ab363lc15e8e1e2c66c694@mail.gmail.com>
	<20090209201449.868.qmail@stuge.se>
Message-ID: <2831fecf0902091426p7828e292lb57c67e5d6ec58d0@mail.gmail.com>

On Mon, Feb 9, 2009 at 1:14 PM, Peter Stuge <peter at stuge.se> wrote:
> Myles Watson wrote:
>> Plugin support shouldn't be as visible as it is.
>>
>> This patch moves it to the device menu and makes it depend on expert.
>>
>> Signed-off-by: Myles Watson <mylesgw at gmail.com>
>
> Acked-by: Peter Stuge <peter at stuge.se>


Rev 1126.
Thanks,
Myles



From rminnich at gmail.com  Tue Feb 10 02:12:38 2009
From: rminnich at gmail.com (ron minnich)
Date: Mon, 9 Feb 2009 17:12:38 -0800
Subject: [coreboot] seabios question
Message-ID: <13426df10902091712s362ba2eds4686b8c444d2131e@mail.gmail.com>

Sorry, I'm new to all this and am under ugly deadlines so I'm again
asking for help.

I need to run gpxe. Gpxe needs a bios api. So I need to put together
coreboot v2 + seabios + gpxe.

This is a bit more than I've done and I wonder if someone has done it
already. This needs to all be in ROM. The goal is to have a kontron
booting LTSP or whatever we want, and gpxe is ideal for this purpose.
I need v2 for SMP, SMI, and ACPI.

Thanks in advance ...

ron



From kevin at koconnor.net  Tue Feb 10 02:26:34 2009
From: kevin at koconnor.net (Kevin O'Connor)
Date: Mon, 9 Feb 2009 20:26:34 -0500
Subject: [coreboot] seabios question
In-Reply-To: <13426df10902091712s362ba2eds4686b8c444d2131e@mail.gmail.com>
References: <13426df10902091712s362ba2eds4686b8c444d2131e@mail.gmail.com>
Message-ID: <20090210012634.GA16046@morn.localdomain>

On Mon, Feb 09, 2009 at 05:12:38PM -0800, ron minnich wrote:
> Sorry, I'm new to all this and am under ugly deadlines so I'm again
> asking for help.
> 
> I need to run gpxe. Gpxe needs a bios api. So I need to put together
> coreboot v2 + seabios + gpxe.
> 
> This is a bit more than I've done and I wonder if someone has done it
> already. This needs to all be in ROM. The goal is to have a kontron
> booting LTSP or whatever we want, and gpxe is ideal for this purpose.
> I need v2 for SMP, SMI, and ACPI.

I run gpxe with SeaBIOS.  I outlined the steps I used here:

http://www.coreboot.org/pipermail/coreboot/2009-February/044658.html

-Kevin



From svn at coreboot.org  Tue Feb 10 04:02:06 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue, 10 Feb 2009 04:02:06 +0100
Subject: [coreboot] r3933 - in trunk/coreboot-v2: src/arch/i386/boot
	src/boot util/vgabios/x86emu/src/x86emu
Message-ID: <mailman.2757.1355071481.16123.coreboot@coreboot.org>

Author: myles
Date: 2009-02-10 04:02:05 +0100 (Tue, 10 Feb 2009)
New Revision: 3933

Modified:
   trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c
   trunk/coreboot-v2/src/boot/elfboot.c
   trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c
Log:
Change 0x%p to %p.  Thanks Stefan for catching the one I introduced in 3931.

Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Myles Watson <mylesgw at gmail.com>

Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c
===================================================================
--- trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c	2009-02-09 20:26:14 UTC (rev 3932)
+++ trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c	2009-02-10 03:02:05 UTC (rev 3933)
@@ -25,7 +25,7 @@
 	for (i = 0; i < rt->size; i++)
 		sum += addr[i];
 
-	printk_debug("%s(): Interrupt Routing Table located at 0x%p.\n",
+	printk_debug("%s(): Interrupt Routing Table located at %p.\n",
 		     __FUNCTION__, addr);
 
 	

Modified: trunk/coreboot-v2/src/boot/elfboot.c
===================================================================
--- trunk/coreboot-v2/src/boot/elfboot.c	2009-02-09 20:26:14 UTC (rev 3932)
+++ trunk/coreboot-v2/src/boot/elfboot.c	2009-02-10 03:02:05 UTC (rev 3933)
@@ -590,7 +590,7 @@
 	/* Reset to booting from this image as late as possible */
 	boot_successful();
 
-	printk_debug("Jumping to boot code at 0x%p\n", entry);
+	printk_debug("Jumping to boot code at %p\n", entry);
 	post_code(0xfe);
 
 	/* Jump to kernel */

Modified: trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c
===================================================================
--- trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c	2009-02-09 20:26:14 UTC (rev 3932)
+++ trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c	2009-02-10 03:02:05 UTC (rev 3933)
@@ -196,7 +196,7 @@
 		//printk("It's a0000\n");
 		addr &= ~0xfffe0000;
 		retaddr = (u8 *) (M.abseg + addr);
-		//printk("retaddr now 0x%p\n", retaddr);
+		//printk("retaddr now %p\n", retaddr);
 	} else if (addr < 0x200) {
 		printk("updating int vector 0x%x\n", addr >> 2);
 		retaddr = (u8 *) (M.mem_base + addr);




From mart.raudsepp at artecdesign.ee  Tue Feb 10 10:36:14 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Tue, 10 Feb 2009 11:36:14 +0200
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
 values in the dts.
In-Reply-To: <13426df10902090956n3e99a5cdt12316c707059b0b9@mail.gmail.com>
References: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>
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?hel kenal p?eval, E, 2009-02-09 kell 09:56, kirjutas ron minnich:
> On Mon, Feb 9, 2009 at 9:00 AM, Mart Raudsepp
> <mart.raudsepp at artecdesign.ee> wrote:
> 
> > Could we perhaps have dtc give me a DTS_HAVE_CS5536_NAND or similar
> > preprocessor definitions if the device is present in the static tree?
> 
> sure. We could also have it create a Make variable such that the
> nand.c is conditionally compiled in. I prefer that to #ifdef goo in .c
> files.

Or it would be the #define given by dtc and we can just #ifdef at the
top of nand.c or similar files if they warrant a separate file, and
unconditionally have it in Makefile without any mess.

> Or we could do something like this:
> STAGE2_SOURCE="somefile.c"
> 
> and have dtc add that source to e.g. the stage2 source. Of course we
> are moving far beyond what dts was intended to do; we're really
> starting to put things into it that are in the v2 config tool.

I'm getting a feeling the dts wasn't intended to do a whole lot it has
the power to do, maybe I should re-read Newboot.

> > For the sake of argument, lets say every kilobyte matters as I might want
> > to also fit in a LAB in a 1MB limit.
> >We could be talking about a whole lot
> > more complex code that is unconditionally compiled in unless doing ugly C
> > file listing in mainboard dir Makefiles than we are dealing with in this
> > instance.
> 
> yep. Once again, the v2 config system comes out looking pretty good on
> this score.

So could dtc imho.

> > As a completely off-topic slightly related to the above side note, I'm
> > still slightly annoyed at all loglevel strings getting compiled in now, no
> > questions asked. A maximum supported loglevel option would be nice. We
> > need no complete spew loglevel messages in a production ROM we
> > hypothetically burn into units sold to customers.
> 
> In many cases the lack of such compiled in messages was a huge problem
> on deployed systems. That's why we went to having them all in as
> default. There were many complaints about leaving out messages in v2
> ...

That's all fair, just now we have no option to declare which level
messages should be compiled in - it's always DEBUG_SPEW. With an option
to give the maximum compiled in level, defaulting to SPEW, would be a
win-win :)


Regards,
Mart Raudsepp




From rminnich at gmail.com  Tue Feb 10 17:36:08 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 10 Feb 2009 08:36:08 -0800
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
	values in the dts.
In-Reply-To: <1234258574.4567.4.camel@martr-gentoo.artec>
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On Tue, Feb 10, 2009 at 1:36 AM, Mart Raudsepp
<mart.raudsepp at artecdesign.ee> wrote:

> Or it would be the #define given by dtc and we can just #ifdef at the
> top of nand.c or similar files if they warrant a separate file, and
> unconditionally have it in Makefile without any mess.

I really dislike #ifdef'ing code, again because it confuses the hell
out of tools like kscope, ctags, doxygen and friends. As much as
possible we should make coreboot friendly to those sorts of tools. I
found the bug in flashrom in a few seconds with kscope; kscope has
already saved me tons of time walking code in v3 (as in, e.g., Myles
improved device code).

Linux solved this problem years ago and we have too. Use the Makefile.
That's what it's there for.


> I'm getting a feeling the dts wasn't intended to do a whole lot it has
> the power to do, maybe I should re-read Newboot.

it's out of date now. It needs a thorough going-over and fixup.

>
>> > For the sake of argument, lets say every kilobyte matters as I might want
>> > to also fit in a LAB in a 1MB limit.
>> >We could be talking about a whole lot
>> > more complex code that is unconditionally compiled in unless doing ugly C
>> > file listing in mainboard dir Makefiles than we are dealing with in this
>> > instance.
>>
>> yep. Once again, the v2 config system comes out looking pretty good on
>> this score.
>
> So could dtc imho.

I agree. I think you and I like dts over all, as do others. But the
standard dts from open boot is not quite enough to do what we want.


> That's all fair, just now we have no option to declare which level
> messages should be compiled in - it's always DEBUG_SPEW. With an option
> to give the maximum compiled in level, defaulting to SPEW, would be a
> win-win :)

You have to rewrite all the printk functions to be macros again. It's
a bit more work than changing one setting. But you're a vendor, and
you need this, so if you have a patch then we ought to take a look.
I'm sensitive to size issues.

ron



From peter at stuge.se  Tue Feb 10 17:46:53 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 10 Feb 2009 17:46:53 +0100
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <13426df10902100836p25c6c245v5acd5e7959ca6d10@mail.gmail.com>
References: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>
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Message-ID: <20090210164653.12996.qmail@stuge.se>

ron minnich wrote:
> You have to rewrite all the printk functions to be macros again.
> It's a bit more work than changing one setting.

But it shouldn't be too bad, right?

Just one printk function should need changing, and only at the
definition.

I'm also looking forward to seeing this. :)


//Peter



From rminnich at gmail.com  Tue Feb 10 17:49:27 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 10 Feb 2009 08:49:27 -0800
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <20090210164653.12996.qmail@stuge.se>
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Message-ID: <13426df10902100849o206b1364s3b11735aa47fdb26@mail.gmail.com>

On Tue, Feb 10, 2009 at 8:46 AM, Peter Stuge <peter at stuge.se> wrote:
> ron minnich wrote:
>> You have to rewrite all the printk functions to be macros again.
>> It's a bit more work than changing one setting.
>
> But it shouldn't be too bad, right?
>
> Just one printk function should need changing, and only at the
> definition.


It should not be too bad. I just want to make sure that everyone on
the list understands what we are going to change.

Getting rid of the printk macro, and having all printk messages always
available, was viewed as a reform from v2. We're essentially reforming
the reform :-)

ron



From mart.raudsepp at artecdesign.ee  Tue Feb 10 17:50:48 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Tue, 10 Feb 2009 18:50:48 +0200
Subject: [coreboot] [PATCH] cs5536/nand: Allow setting of NAND timing
 values in the dts.
In-Reply-To: <13426df10902100836p25c6c245v5acd5e7959ca6d10@mail.gmail.com>
References: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>
	<13426df10902090956n3e99a5cdt12316c707059b0b9@mail.gmail.com>
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	<13426df10902100836p25c6c245v5acd5e7959ca6d10@mail.gmail.com>
Message-ID: <1234284648.30821.9.camel@martr-gentoo.artec>

?hel kenal p?eval, T, 2009-02-10 kell 08:36, kirjutas ron minnich:
> On Tue, Feb 10, 2009 at 1:36 AM, Mart Raudsepp
> <mart.raudsepp at artecdesign.ee> wrote:
> 
> > Or it would be the #define given by dtc and we can just #ifdef at the
> > top of nand.c or similar files if they warrant a separate file, and
> > unconditionally have it in Makefile without any mess.
> 
> I really dislike #ifdef'ing code, again because it confuses the hell
> out of tools like kscope, ctags, doxygen and friends. As much as
> possible we should make coreboot friendly to those sorts of tools.

And not having an #ifdef can confuse a human being, because the presence
of the file on the first look would suggest its code gets compiled and
is active, while it isn't. I guess if we can keep the source file
listing in the same dirs Makefile somehow...
One idea is that Kconfig would know about it from selecting of the board
defining HAVE_CS5536_NAND, but then it's still the problem of listing
that fact in two places (Kconfig and dts), so that's not better.

> I found the bug in flashrom in a few seconds with kscope; kscope has
> already saved me tons of time walking code in v3 (as in, e.g., Myles
> improved device code).

Isn't using it coupled with debugging a specific board or the like?

> Linux solved this problem years ago and we have too. Use the Makefile.
> That's what it's there for.

I guess I can use the Makefile and add prominent comments in nand.c
about this file being used only if dts has a device for it, but that's
not a possibility right now either without digging into unfamiliar dtc
territory.

There are theoretical cases where you really can't move it over to a
different file however, and the dts is limiting us there. If it would be
giving those #define's it would be just a matter of good code design,
not a technical limitation, to have it in a separate file when
appropriate.

> > I'm getting a feeling the dts wasn't intended to do a whole lot it has
> > the power to do, maybe I should re-read Newboot.
> 
> it's out of date now. It needs a thorough going-over and fixup.
> 
> >
> >> > For the sake of argument, lets say every kilobyte matters as I might want
> >> > to also fit in a LAB in a 1MB limit.
> >> >We could be talking about a whole lot
> >> > more complex code that is unconditionally compiled in unless doing ugly C
> >> > file listing in mainboard dir Makefiles than we are dealing with in this
> >> > instance.
> >>
> >> yep. Once again, the v2 config system comes out looking pretty good on
> >> this score.
> >
> > So could dtc imho.
> 
> I agree. I think you and I like dts over all, as do others. But the
> standard dts from open boot is not quite enough to do what we want.
> 
> 
> > That's all fair, just now we have no option to declare which level
> > messages should be compiled in - it's always DEBUG_SPEW. With an option
> > to give the maximum compiled in level, defaulting to SPEW, would be a
> > win-win :)
> 
> You have to rewrite all the printk functions to be macros again. It's
> a bit more work than changing one setting. But you're a vendor, and
> you need this, so if you have a patch then we ought to take a look.
> I'm sensitive to size issues.

Maybe we can coerce gcc to optimize out the code to printk calls for
debug levels that aren't supported via that additional config option.


Regards,
Mart Raudsepp




From mart.raudsepp at artecdesign.ee  Tue Feb 10 17:53:03 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Tue, 10 Feb 2009 18:53:03 +0200
Subject: [coreboot] CONFIG_ about which messages to compile in
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?hel kenal p?eval, T, 2009-02-10 kell 08:49, kirjutas ron minnich:
> On Tue, Feb 10, 2009 at 8:46 AM, Peter Stuge <peter at stuge.se> wrote:
> > ron minnich wrote:
> >> You have to rewrite all the printk functions to be macros again.
> >> It's a bit more work than changing one setting.
> >
> > But it shouldn't be too bad, right?
> >
> > Just one printk function should need changing, and only at the
> > definition.

The log level is now given with an argument, so it's trickier to get the
code excluded from the binary completely. Likely can coerce gcc to do
that with specially crafted code.

> It should not be too bad. I just want to make sure that everyone on
> the list understands what we are going to change.
> 
> Getting rid of the printk macro, and having all printk messages always
> available, was viewed as a reform from v2. We're essentially reforming
> the reform :-)

We are giving more possibilities and restoring the possibility of having
a more limited set of debug strings compiled in. Having all loglevel
messages compiled in would still be a possibility and the default for
all I care.


Regards,
Mart Raudsepp




From peter at stuge.se  Tue Feb 10 18:03:48 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 10 Feb 2009 18:03:48 +0100
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <1234284783.30821.11.camel@martr-gentoo.artec>
References: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>
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Mart Raudsepp wrote:
> The log level is now given with an argument, so it's trickier to
> get the code excluded from the binary completely.

Maybe split it up then? (But _only_ statics within the printk code!)


> Likely can coerce gcc to do that with specially crafted code.

I would prefer to avoid that.


//Peter



From rminnich at gmail.com  Tue Feb 10 18:08:41 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 10 Feb 2009 09:08:41 -0800
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <20090210170348.18506.qmail@stuge.se>
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On Tue, Feb 10, 2009 at 9:03 AM, Peter Stuge <peter at stuge.se> wrote:
> Mart Raudsepp wrote:
>> The log level is now given with an argument, so it's trickier to
>> get the code excluded from the binary completely.
>
> Maybe split it up then? (But _only_ statics within the printk code!)

Actually it's not that hard.

You have a global , MAXLOGLEVEL. Turn printk into something like this:

#define printk(a, b, ...) if (a <= MAXLOGLEVEL) print(blah blah)

and then let the compiler optimize it all out.

It's kind of like if (0) { etc. etc. }

>> Likely can coerce gcc to do that with specially crafted code.
>
> I would prefer to avoid that.

This is very non-special

ron



From peter at stuge.se  Tue Feb 10 18:14:11 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 10 Feb 2009 18:14:11 +0100
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <13426df10902100908y32872cc9s7b78978304d32f69@mail.gmail.com>
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Message-ID: <20090210171411.21030.qmail@stuge.se>

ron minnich wrote:
> >> The log level is now given with an argument, so it's trickier to
> >> get the code excluded from the binary completely.
> >
> > Maybe split it up then? (But _only_ statics within the printk code!)
> 
> Actually it's not that hard.

Yep, that's right.


> You have a global , MAXLOGLEVEL. Turn printk into something like this:
> 
> #define printk(a, b, ...) if (a <= MAXLOGLEVEL) print(blah blah)
> 
> and then let the compiler optimize it all out.

That's what I thought of at first too, but I was discouraged by Mart.
Do you see a real problem with this, Mart?


> >> Likely can coerce gcc to do that with specially crafted code.
> >
> > I would prefer to avoid that.
> 
> This is very non-special

Yep, it's all at cpp time and not at all strange. I would prefer
avoiding compiler tricks when we can reach the goal just using cpp.


//Peter



From mart.raudsepp at artecdesign.ee  Tue Feb 10 18:27:19 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Tue, 10 Feb 2009 19:27:19 +0200
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <20090210171411.21030.qmail@stuge.se>
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?hel kenal p?eval, T, 2009-02-10 kell 18:14, kirjutas Peter Stuge:
> ron minnich wrote:
> > >> The log level is now given with an argument, so it's trickier to
> > >> get the code excluded from the binary completely.
> > >
> > > Maybe split it up then? (But _only_ statics within the printk code!)
> > 
> > Actually it's not that hard.
> 
> Yep, that's right.
> 
> 
> > You have a global , MAXLOGLEVEL. Turn printk into something like this:
> > 
> > #define printk(a, b, ...) if (a <= MAXLOGLEVEL) print(blah blah)
> > 
> > and then let the compiler optimize it all out.
> 
> That's what I thought of at first too, but I was discouraged by Mart.
> Do you see a real problem with this, Mart?

Nope. that's similar to what I had in mind.

> 
> > >> Likely can coerce gcc to do that with specially crafted code.
> > >
> > > I would prefer to avoid that.
> > 
> > This is very non-special
> 
> Yep, it's all at cpp time and not at all strange. I would prefer
> avoiding compiler tricks when we can reach the goal just using cpp.

Yeah, and if(0) and the like is coercing gcc :)

However I don't think using cpp for this really flies well if we are
loosing __attribute__((format (printf, 2, 3))) checks then.


Mart




From peter at stuge.se  Tue Feb 10 19:10:41 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 10 Feb 2009 19:10:41 +0100
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <1234286839.19165.2.camel@martr-gentoo.artec>
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Message-ID: <20090210181041.5765.qmail@stuge.se>

Mart Raudsepp wrote:
> > > #define printk(a, b, ...) if (a <= MAXLOGLEVEL) print(blah blah)
> > 
> > That's what I thought of at first too, but I was discouraged by Mart.
> > Do you see a real problem with this, Mart?
> 
> Nope. that's similar to what I had in mind.
..
> > I would prefer avoiding compiler tricks when we can reach the
> > goal just using cpp.
> 
> Yeah, and if(0) and the like is coercing gcc :)

Yes. I didn't write exactly what I meant. I was actually thinking
even one more layer of cpp stuff, to check the condition. In theory
like this;

#define printk(a, b...) \
#if (a) <= CONFIG_MAXLOGINCLUDE
do_printk((a),(b)) \
#endif

Maybe that's too evil?


> However I don't think using cpp for this really flies well if we
> are loosing __attribute__((format (printf, 2, 3))) checks then.

Agree.


//Peter



From rminnich at gmail.com  Tue Feb 10 19:12:28 2009
From: rminnich at gmail.com (ron minnich)
Date: Tue, 10 Feb 2009 10:12:28 -0800
Subject: [coreboot] CONFIG_ about which messages to compile in
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	<20090210181041.5765.qmail@stuge.se>
Message-ID: <13426df10902101012lf98ad83l9ec904cb48e9b725@mail.gmail.com>

On Tue, Feb 10, 2009 at 10:10 AM, Peter Stuge <peter at stuge.se> wrote:

> #define printk(a, b...) \
> #if (a) <= CONFIG_MAXLOGINCLUDE
> do_printk((a),(b)) \
> #endif
>
> Maybe that's too evil?


let's just let gcc do its job.

ron



From peter at stuge.se  Tue Feb 10 19:16:14 2009
From: peter at stuge.se (Peter Stuge)
Date: Tue, 10 Feb 2009 19:16:14 +0100
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <13426df10902101012lf98ad83l9ec904cb48e9b725@mail.gmail.com>
References: <13426df10902100836p25c6c245v5acd5e7959ca6d10@mail.gmail.com>
	<20090210164653.12996.qmail@stuge.se>
	<13426df10902100849o206b1364s3b11735aa47fdb26@mail.gmail.com>
	<1234284783.30821.11.camel@martr-gentoo.artec>
	<20090210170348.18506.qmail@stuge.se>
	<13426df10902100908y32872cc9s7b78978304d32f69@mail.gmail.com>
	<20090210171411.21030.qmail@stuge.se>
	<1234286839.19165.2.camel@martr-gentoo.artec>
	<20090210181041.5765.qmail@stuge.se>
	<13426df10902101012lf98ad83l9ec904cb48e9b725@mail.gmail.com>
Message-ID: <20090210181615.7853.qmail@stuge.se>

ron minnich wrote:
> > Maybe that's too evil?
> 
> let's just let gcc do its job.

Yes. :)


//Peter



From jordan at chalmers.se  Tue Feb 10 20:59:26 2009
From: jordan at chalmers.se (Ulf Jordan)
Date: Tue, 10 Feb 2009 20:59:26 +0100 (CET)
Subject: [coreboot] [PATCH] Fix bayou payload execution
In-Reply-To: <49173E74.6040202@cosmicpenguin.net>
References: <Pine.LNX.4.63.0811091028470.29955@elfpc10.elmagn.chalmers.se>
	<49173E74.6040202@cosmicpenguin.net>
Message-ID: <Pine.LNX.4.63.0902102054270.18641@elfpc10.elmagn.chalmers.se>

On Sun, 9 Nov 2008, Jordan Crouse wrote:

> Ulf Jordan wrote:
>> Bayou svn HEAD cannot execute its payloads correctly, due to payloads 
>> overwriting bayou in memory. This is in turn due to the lpgcc link run 
>> trying to apply both libpayload's and bayou's ldscripts.
>> 
>> The two attached patches a) makes lpgcc's choice of ldscript overridable 
>> and b) adjusts bayou's ldscript to work with the recent MB changes in 
>> libpayload.
>> 
>> Compile and runtime tested with bayou, coreinfo and coreboot-v3 in QEMU.
>
> Both are:  Acked-by: Jordan Crouse <jordan at cosmicpenguin.net>
>
> I'll check them in shortly.

Ping.

These patches are still needed to make bayou svn HEAD execute payloads.


/ulf



From svn at coreboot.org  Tue Feb 10 22:09:04 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue, 10 Feb 2009 22:09:04 +0100
Subject: [coreboot] r3934 - trunk/payloads/bayou
Message-ID: <mailman.2758.1355071481.16123.coreboot@coreboot.org>

Author: myles
Date: 2009-02-10 22:09:03 +0100 (Tue, 10 Feb 2009)
New Revision: 3934

Modified:
   trunk/payloads/bayou/bayou.ldscript
Log:
Fix bayou payload execution.

Bayou must link with its own ldscript to end up at a load address that
doesn't interfere with payloads. Make Bayou's ldscript MB compatible, so
the link with libpayload/lib/i386/head.o succeeds.

Signed-off-by: Ulf Jordan <jordan at chalmers.se>
Acked-by: Jordan Crouse <jordan at cosmicpenguin.net>



Modified: trunk/payloads/bayou/bayou.ldscript
===================================================================
--- trunk/payloads/bayou/bayou.ldscript	2009-02-10 03:02:05 UTC (rev 3933)
+++ trunk/payloads/bayou/bayou.ldscript	2009-02-10 21:09:03 UTC (rev 3934)
@@ -60,6 +60,8 @@
 		*(.data.*)
 	}
 
+	_edata = .;
+
 	.bss : {
 		*(.bss)
 		*(.bss.*)




From svn at coreboot.org  Tue Feb 10 22:12:35 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue, 10 Feb 2009 22:12:35 +0100
Subject: [coreboot] r3935 - trunk/payloads/libpayload/bin
Message-ID: <mailman.2759.1355071481.16123.coreboot@coreboot.org>

Author: myles
Date: 2009-02-10 22:12:35 +0100 (Tue, 10 Feb 2009)
New Revision: 3935

Modified:
   trunk/payloads/libpayload/bin/lpgcc
Log:
Fix bayou payload execution.

Bayou must link with its own ldscript to end up at a load address that
doesn't interfere with payloads. Make Bayou's ldscript MB compatible, so
the link with libpayload/lib/i386/head.o succeeds.

Signed-off-by: Ulf Jordan <jordan at chalmers.se>
Acked-by: Jordan Crouse <jordan at cosmicpenguin.net>



Modified: trunk/payloads/libpayload/bin/lpgcc
===================================================================
--- trunk/payloads/libpayload/bin/lpgcc	2009-02-10 21:09:03 UTC (rev 3934)
+++ trunk/payloads/libpayload/bin/lpgcc	2009-02-10 21:12:35 UTC (rev 3935)
@@ -39,6 +39,8 @@
 # This will set the _LIBDIR and _INCDIR variables used below
 . $BASE/lp.functions
 
+_LDSCRIPT="-Wl,-T,$_LIBDIR/libpayload.ldscript"
+
 trygccoption() {
 	$DEFAULT_CC $1 -S -xc /dev/null -o .$$.tmp &> /dev/null
 	RET=$?
@@ -73,6 +75,11 @@
 		shift
 		continue
 		;;
+	    -Wl,-T,*)
+		_LDSCRIPT="$1"
+		shift
+		continue
+		;;
 	    *)
 		;;
 	esac
@@ -90,7 +97,7 @@
 
 _CFLAGS="$_CFLAGS -I`$DEFAULT_CC -m32 -print-search-dirs | head -n 1 | cut -d' ' -f2`include"
 
-_LDFLAGS="-Wl,-T,$_LIBDIR/libpayload.ldscript -static"
+_LDFLAGS="$_LDSCRIPT -static"
 
 if [ $DOLINK -eq 0 ]; then
     if [ $DEBUGME -eq 1 ]; then




From mylesgw at gmail.com  Tue Feb 10 22:13:21 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Tue, 10 Feb 2009 14:13:21 -0700
Subject: [coreboot] [PATCH] Fix bayou payload execution
In-Reply-To: <Pine.LNX.4.63.0902102054270.18641@elfpc10.elmagn.chalmers.se>
References: <Pine.LNX.4.63.0811091028470.29955@elfpc10.elmagn.chalmers.se>
	<49173E74.6040202@cosmicpenguin.net>
	<Pine.LNX.4.63.0902102054270.18641@elfpc10.elmagn.chalmers.se>
Message-ID: <2831fecf0902101313i542c7818r38747f2d169131cb@mail.gmail.com>

On Tue, Feb 10, 2009 at 12:59 PM, Ulf Jordan <jordan at chalmers.se> wrote:
> On Sun, 9 Nov 2008, Jordan Crouse wrote:
>
>> Ulf Jordan wrote:
>>>
>>> Bayou svn HEAD cannot execute its payloads correctly, due to payloads
>>> overwriting bayou in memory. This is in turn due to the lpgcc link run
>>> trying to apply both libpayload's and bayou's ldscripts.
>>>
>>> The two attached patches a) makes lpgcc's choice of ldscript overridable
>>> and b) adjusts bayou's ldscript to work with the recent MB changes in
>>> libpayload.
>>>
>>> Compile and runtime tested with bayou, coreinfo and coreboot-v3 in QEMU.
>>
>> Both are:  Acked-by: Jordan Crouse <jordan at cosmicpenguin.net>
>>
>> I'll check them in shortly.
>
> Ping.
>
> These patches are still needed to make bayou svn HEAD execute payloads.
Revs 3934 & 3935.

Thanks,
Myles



From r.marek at assembler.cz  Tue Feb 10 22:17:44 2009
From: r.marek at assembler.cz (Rudolf Marek)
Date: Tue, 10 Feb 2009 22:17:44 +0100
Subject: [coreboot] SeaBIOS + SATA
In-Reply-To: <20090207034602.GA17583@morn.localdomain>
References: <20090207034602.GA17583@morn.localdomain>
Message-ID: <4991EEF8.8080708@assembler.cz>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi Kevin!

Yes all works. Even the new priority booting stuff. I did not hesitate and tried
with SATA SiL3114 PCI card!

Here is a short video:

http://assembler.cz/download/SeaBIOS/SeaBIOS-ROM.ogg

And real screenshot:
http://assembler.cz/download/SeaBIOS/IMG_2216.JPG

Congratulation! Great stuff!

Rudolf
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAkmR7vUACgkQ3J9wPJqZRNUcPwCgoOCCOMyd3x71RMZNQimtmcbN
1RMAoMfKRugJn/r6zPM6Rr8ms5BDULFz
=rw42
-----END PGP SIGNATURE-----



From ronald at zonnet.nl  Tue Feb 10 22:35:38 2009
From: ronald at zonnet.nl (Ronald Hoogenboom)
Date: Tue, 10 Feb 2009 22:35:38 +0100
Subject: [coreboot] Obvious bug in mcp55/pci.c
In-Reply-To: <mailman.1.1234263601.15450.coreboot@coreboot.org>
References: <mailman.1.1234263601.15450.coreboot@coreboot.org>
Message-ID: <1234301738.28154.22.camel@amd-x2.grundel>

Hi,

I stumbled on an obvious error in a piece of code (v3) conditional on
CONFIG_PCI_64BIT_PREF_MEM. What is the exact purpose of this config and
why is it obviously never used? (doesn't even compile)


-------------- next part --------------
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From stepan at coresystems.de  Tue Feb 10 22:43:40 2009
From: stepan at coresystems.de (Stefan Reinauer)
Date: Tue, 10 Feb 2009 22:43:40 +0100
Subject: [coreboot] CONFIG_ about which messages to compile in
In-Reply-To: <20090210164653.12996.qmail@stuge.se>
References: <62199.80.235.35.21.1234198838.squirrel@www.artecdesign.ee>	<13426df10902090956n3e99a5cdt12316c707059b0b9@mail.gmail.com>	<1234258574.4567.4.camel@martr-gentoo.artec>	<13426df10902100836p25c6c245v5acd5e7959ca6d10@mail.gmail.com>
	<20090210164653.12996.qmail@stuge.se>
Message-ID: <4991F50C.2040704@coresystems.de>

On 10.02.2009 17:46 Uhr, Peter Stuge wrote:
> ron minnich wrote:
>   
>> You have to rewrite all the printk functions to be macros again.
>> It's a bit more work than changing one setting.
>>     
>
> But it shouldn't be too bad, right?
>
> Just one printk function should need changing, and only at the
> definition.
>
> I'm also looking forward to seeing this. :)
>   

What would it be good for? Does it safe a considerable amount of space?
How much?

I think the binaries should always contain _all_ debug messages so if a
user gets a binary from somewhere she always has the chance to see the
full debug output, no matter what the default is.

Stefan

-- 
coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 ? Fax: +49 761 7664613
Email: info at coresystems.de  ? http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg ? HRB 7656
Gesch?ftsf?hrer: Stefan Reinauer ? Ust-IdNr.: DE245674866




From mylesgw at gmail.com  Tue Feb 10 22:59:51 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Tue, 10 Feb 2009 14:59:51 -0700
Subject: [coreboot] Obvious bug in mcp55/pci.c
In-Reply-To: <1234301738.28154.22.camel@amd-x2.grundel>
References: <mailman.1.1234263601.15450.coreboot@coreboot.org>
	<1234301738.28154.22.camel@amd-x2.grundel>
Message-ID: <5CB8819C1E134A858B49F54AC718C0D3@chimp>



> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Ronald Hoogenboom
> Sent: Tuesday, February 10, 2009 2:36 PM
> To: coreboot at coreboot.org
> Subject: [coreboot] Obvious bug in mcp55/pci.c
> 
> Hi,
> 
> I stumbled on an obvious error in a piece of code (v3) conditional on
> CONFIG_PCI_64BIT_PREF_MEM. What is the exact purpose of this config and
> why is it obviously never used? (doesn't even compile)

It lets you allocate prefetchable memory resources above 4GB.  In v3 it
isn't used, but it has worked in v2, at least for some Tyan boards.  You can
compare the two.

v3 mcp55 support is a WIP.

Myles




From svn at coreboot.org  Tue Feb 10 23:35:49 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue, 10 Feb 2009 23:35:49 +0100
Subject: [coreboot] r1127 - coreboot-v3/arch/x86
Message-ID: <mailman.2760.1355071481.16123.coreboot@coreboot.org>

Author: mjones
Date: 2009-02-10 23:35:49 +0100 (Tue, 10 Feb 2009)
New Revision: 1127

Modified:
   coreboot-v3/arch/x86/stage1.c
Log:
Coreboot uses the compiler option -mregparm=3 which causes variables to 
be passed in registers. This is good for size and speed but not good when
we call a C function from asm. Force stage1_phase1 to use stdcall and get
variables off the stack.

Note that I didn't change stage1_phase3 because it doesn't use any 
variables.

Signed-off-by: Marc Jones <marcj303 at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>



Modified: coreboot-v3/arch/x86/stage1.c
===================================================================
--- coreboot-v3/arch/x86/stage1.c	2009-02-09 22:25:59 UTC (rev 1126)
+++ coreboot-v3/arch/x86/stage1.c	2009-02-10 22:35:49 UTC (rev 1127)
@@ -187,7 +187,7 @@
  * that we are restarting after some sort of reconfiguration. Note that we could use it on geode but 
  * do not at present. 
  */
-void __attribute__((stdcall)) stage1_phase1(u32 bist, u32 init_detected)
+void __attribute__((stdcall, regparm(0))) stage1_phase1(u32 bist, u32 init_detected)
 {
 	struct global_vars globvars;
 	int ret;




From svn at coreboot.org  Tue Feb 10 23:40:10 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue, 10 Feb 2009 23:40:10 +0100
Subject: [coreboot] r1128 - in coreboot-v3: arch/x86 arch/x86/amd/k8
	arch/x86/amd/model_fxx include/arch/x86 include/arch/x86/amd/k8
Message-ID: <mailman.2761.1355071481.16123.coreboot@coreboot.org>

Author: mjones
Date: 2009-02-10 23:40:10 +0100 (Tue, 10 Feb 2009)
New Revision: 1128

Modified:
   coreboot-v3/arch/x86/amd/k8/stage1.c
   coreboot-v3/arch/x86/amd/model_fxx/init_cpus.c
   coreboot-v3/arch/x86/stage1_mtrr.c
   coreboot-v3/include/arch/x86/amd/k8/k8.h
   coreboot-v3/include/arch/x86/cpu.h
   coreboot-v3/include/arch/x86/mtrr.h
Log:
Setup the MTRRs in stage1 so that memory and cache are available throughout
stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
It also sets all system memory to WriteBack cached and sets the ROM
area to cached.

Signed-off-by: Marc Jones <marcj303 at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>



Modified: coreboot-v3/arch/x86/amd/k8/stage1.c
===================================================================
--- coreboot-v3/arch/x86/amd/k8/stage1.c	2009-02-10 22:35:49 UTC (rev 1127)
+++ coreboot-v3/arch/x86/amd/k8/stage1.c	2009-02-10 22:40:10 UTC (rev 1128)
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2007 Advanced Micro Devices, Inc.
+ * Copyright (C) 2009 Marc Jones <marcj303 at gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -29,31 +30,136 @@
 #include <stage1.h>
 
 /**
- * Set the MTRR for initial ram access. 
- * be warned, this will be used by core other than core 0/node 0 or core0/node0 when cpu_reset. 
- * This warning has some significance I don't yet understand. 
+ * Set the MTRRs of the current core for initial ram access.
+ * Be warned, this function is used by the BSP and all AP cores. TOM and TOM2
+ * of the calling core must be setup. This function may be called several times
+ * depending on MEM_TRAIN_SEQ.
  */
-void set_init_ram_access(void)
+void set_mtrr_ram_access(void)
 {
-	stage1_set_var_mtrr(0, 0x00000000, CONFIG_CBMEMK << 10, MTRR_TYPE_WRBACK);
+	struct msr msr;
+
+	disable_cache();
+
+	/* 0 - 640KB */
+	stage1_set_fix_mtrr(MTRRfix64K_00000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix16K_80000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+
+	/* 0xA0000 - 0xC0000 (UC to video card) */
+	stage1_set_fix_mtrr(MTRRfix16K_A0000_MSR, MTRR_TYPE_UNCACHEABLE);
+
+	/* 0xC0000 - 1MB */
+	stage1_set_fix_mtrr(MTRRfix4K_C0000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix4K_C8000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix4K_D0000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix4K_D8000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix4K_E0000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix4K_E8000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix4K_F0000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+	stage1_set_fix_mtrr(MTRRfix4K_F8000_MSR,
+						 MTRR_READ_MEM | MTRR_WRITE_MEM | MTRR_TYPE_WRBACK);
+
+	/* 1MB - TOM */
+	msr = rdmsr(TOP_MEM);
+	stage1_set_var_mtrr_x(0, 0x00100000, 0x0, msr.lo, msr.hi, MTRR_TYPE_WRBACK);
+
+	/* System ROM (Assume 1MB) */
+	stage1_set_var_mtrr(1, 0xFFFFFFFF - (u32)((CONFIG_COREBOOT_ROMSIZE_KB << 10) - 1),
+						CONFIG_COREBOOT_ROMSIZE_KB << 10, MTRR_TYPE_WRTHROUGH);
+
+	/* 4GB - TOM2 */
+	msr = rdmsr(SYSCFG_MSR);
+	if (msr.lo & SYSCFG_MSR_TOM2En) {
+		msr = rdmsr(TOP_MEM2);
+		stage1_set_var_mtrr_x(2, 0x0, 0x00000001, msr.lo, msr.hi,
+							  MTRR_TYPE_WRBACK);
+	}
+
+	/* Enable Fixed and Variable MTRRs MSRs*/
+	msr = rdmsr(SYSCFG_MSR);
+	msr.lo |= (SYSCFG_MSR_MtrrVarDramEn | SYSCFG_MSR_MtrrFixDramEn);
+	wrmsr(SYSCFG_MSR, msr);
+
+	/* Enable Fixed and Variable MTRRs */
+	msr = rdmsr(MTRRdefType_MSR);
+	msr.lo |= 0xC00;
+	wrmsr(MTRRdefType_MSR, msr);
+
+	enable_cache();
 }
 
+
+/* This function MUST be inlined as we can not use a stack -- CAR or real ram */
+/* By yhlu 6.2005 */
+/* Be warned, this function is used by both the BSP and APs to disable the
+ * fixed MTRRs used for CAR.
+ */
+inline __attribute__((always_inline)) void disable_cache_as_ram(void)
+{
+	__asm__ volatile (
+
+	/* Disable the cache while we change MTRRs */
+	"	movl	%cr0, %eax	\n"
+	"	orl	$(0x1<<30),%eax	\n"
+	"	movl	%eax, %cr0	\n"
+
+	/* clear sth */
+	"	movl	$0x269, %ecx	\n"	/* fix4k_c8000 */
+	"	xorl	%edx, %edx	\n"
+	"	xorl	%eax, %eax	\n"
+	"	wrmsr\n\t"
+#if CONFIG_CARSIZE > 0x8000
+	"	movl	$0x268, %ecx	\n"	/* fix4k_c0000 */
+	"	wrmsr	\n"
+#endif
+	/* disable fixed mtrr for now, it will be enabled by coreboot_ram again*/
+	"	movl	$0xC0010010, %ecx	\n"	/*SYSCFG_MSR */
+	"	rdmsr	\n"
+	"	andl	$(~(3<<18)), %eax	\n"	/*~(MtrrFixDramModEn | MtrrFixDramEn) */
+	"	wrmsr	\n"
+
+	/* Set the default memory type to UC, disable fixed MTRRs,
+	 * and leave variable MTRRs enabled */
+	"	movl	$0x2ff, %ecx	\n"	/* $MTRRdefType_MSR */
+	"	xorl	%edx, %edx	\n"
+	"	movl	$0x00000800, %eax	\n"
+	"	wrmsr	\n"
+
+	/* enable cache */
+	"	movl	%cr0, %eax	\n"
+	"	andl	$0x9fffffff,%eax	\n"
+	"	movl	%eax, %cr0	\n"
+	);
+}
+
+
 /**
  * Disable Cache As RAM (CAR) after memory is setup.
  *
- * Unknown how to do this just yet. 
  */
 void disable_car(void)
 {
-	/* call the inlined function */
+	/* inlined function that disables the fixed MTRRs that
+	 * are used for CAR stack space. The cache tags are still
+	 * valid and the stack data is still in place. */
 	disable_cache_as_ram();
 
-	/* The BKDG says that a WBINVD will not flush CAR to RAM (because the
+	/* Now we need to get the cached data to RAM.
+	 * The BKDG says that a WBINVD will not flush CAR to RAM (because the
 	 * cache tags are not dirty).
 	 * Solution:
 	 * - Two subsequent memcpy in the same inline asm block, one from stack
 	 *   to backup, one from backup to stack.
-	 * The solution for geode of using a inline asm memcpy of the stack
+	 * The solution for Geode of using a inline asm memcpy of the stack
 	 * onto itself will not mark the cache tags as dirty on K8.
 	 */
 	__asm__ __volatile__(
@@ -71,8 +177,10 @@
 	   [carsizequads] "i" (CONFIG_CARSIZE/4)
 	: "memory", "%edi", "%esi", "%ecx");
 	banner(BIOS_DEBUG, "Disable_car: done wbinvd");
-	/* we're now running in ram. Although this will be called again, it does no harm to call it here. */
-	set_init_ram_access();
+
+	/* We're now running in ram.
+	 * Setup the cache for normal operation. */
+	set_mtrr_ram_access();
 	banner(BIOS_DEBUG, "disable_car: done");
 	stage1_phase3();
 }

Modified: coreboot-v3/arch/x86/amd/model_fxx/init_cpus.c
===================================================================
--- coreboot-v3/arch/x86/amd/model_fxx/init_cpus.c	2009-02-10 22:35:49 UTC (rev 1127)
+++ coreboot-v3/arch/x86/amd/model_fxx/init_cpus.c	2009-02-10 22:40:10 UTC (rev 1128)
@@ -246,28 +246,7 @@
 	}
 }
 
-/**
- * disable cache as ram on a BSP.
- * For reasons not totally known we are saving ecx and edx.
- * That will work on k8 as we copy the stack and return in the same stack frame.
- */
-void disable_cache_as_ram_bsp(void)
-{
-	__asm__ volatile (
-//		"pushl %eax\n\t"
-		"pushl %edx\n\t"
-		"pushl %ecx\n\t"
-	);
 
-	disable_cache_as_ram();
-	__asm__ volatile (
-		"popl %ecx\n\t"
-		"popl %edx\n\t"
-//		"popl %eax\n\t"
-	);
-}
-
-
 /**
  * wait for all apics to start. Make sure we don't wait on ourself.
  * @param bsp_apicid The BSP APIC ID
@@ -291,7 +270,7 @@
 void STOP_CAR_AND_CPU(void)
 {
 	disable_cache_as_ram();	// inline
-	stop_this_cpu();	// inline, it will stop all cores except node0/core0 the bsp ....
+	stop_this_cpu();	// inline
 }
 
 #ifndef MEM_TRAIN_SEQ
@@ -470,13 +449,18 @@
 			printk(BIOS_DEBUG, "while waiting for BSP signal to STOP, timeout in ap 0x%08x\n",
 				apicid);
 		}
+
 		/* indicate that we are in state 44 as well. We are catching up to the BSP. */
-		// old comment follows -- not sure what this means yet.
-		// bsp can not check it before stop_this_cpu
 		lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x44);
-		/* Now set up so we can use RAM. This will be low memory, i.e. BSP memory, already working. */
-		set_init_ram_access();
-		/* this is not done on Serengeti. */
+
+		/* Now set up so we can use RAM.
+		 * This will be low memory, i.e. BSP memory, already working.
+		 */
+		/* Keep the ap's tom consistent with bsp's */
+		set_top_mem_ap(sysinfo->tom_k, sysinfo->tom2_k);
+		set_mtrr_ram_access();
+
+		/* This is not done on Serengeti. */
 #if MEM_TRAIN_SEQ == 1
 		train_ram_on_node(id.nodeid, id.coreid, sysinfo,
 				  (void *)STOP_CAR_AND_CPU);

Modified: coreboot-v3/arch/x86/stage1_mtrr.c
===================================================================
--- coreboot-v3/arch/x86/stage1_mtrr.c	2009-02-10 22:35:49 UTC (rev 1127)
+++ coreboot-v3/arch/x86/stage1_mtrr.c	2009-02-10 22:40:10 UTC (rev 1128)
@@ -40,25 +40,46 @@
 	wrmsr(MTRRphysMask_MSR(reg), maskm);
 }
 
-void set_var_mtrr_x(
-        unsigned long reg, u32 base_lo, u32 base_hi, u32 size_lo, u32 size_hi, unsigned long type)
+void stage1_set_var_mtrr_x(
+	unsigned long reg, u32 base_lo, u32 base_hi, u32 size_lo, u32 size_hi, unsigned long type)
 
 {
-        /* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
-        struct msr basem, maskm;
-        basem.lo = (base_lo & 0xfffff000) | type;
-        basem.hi = base_hi & ((1<<(CPU_ADDR_BITS-32))-1);
-        wrmsr(MTRRphysBase_MSR(reg), basem);
-       	maskm.hi = (1<<(CPU_ADDR_BITS-32))-1;
+	/* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
+	struct msr basem, maskm;
+	basem.lo = (base_lo & 0xfffff000) | type;
+	basem.hi = base_hi & ((1<<(CPU_ADDR_BITS-32))-1);
+	wrmsr(MTRRphysBase_MSR(reg), basem);
+	maskm.hi = (1<<(CPU_ADDR_BITS-32))-1;
 	if(size_lo) {
-	        maskm.lo = ~(size_lo - 1) | 0x800;
+		maskm.lo = ~(size_lo - 1) | 0x800;
 	} else {
 		maskm.lo = 0x800;
 		maskm.hi &= ~(size_hi - 1);
 	}
-        wrmsr(MTRRphysMask_MSR(reg), maskm);
+	wrmsr(MTRRphysMask_MSR(reg), maskm);
 }
 
+/* Sets the entire fixed mtrr to a cache type. */
+void stage1_set_fix_mtrr(u32 reg, u8 type)
+{
+	struct msr msr;
+
+	/* Enable Modify Extended RdMem and WrMem settings */
+	msr = rdmsr(SYSCFG_MSR);
+	msr.lo |= SYSCFG_MSR_MtrrFixDramModEn;
+	wrmsr(SYSCFG_MSR, msr);
+
+	msr.lo = (type << 24) | (type << 16) | (type << 8) | type;
+	msr.hi = (type << 24) | (type << 16) | (type << 8) | type;
+	wrmsr(reg, msr);
+
+	/* Disable Modify Extended RdMem and WrMem settings */
+	msr = rdmsr(SYSCFG_MSR);
+	msr.lo &= ~SYSCFG_MSR_MtrrFixDramModEn;
+	wrmsr(SYSCFG_MSR, msr);
+
+}
+
 void cache_cbmem(int type)
 {
 	/* Enable caching for 0 - 1MB using variable mtrr */
@@ -92,7 +113,7 @@
 		wrmsr(msr_nr, msr);
 	}
 
-#warning fix the XIP bits in stage1_mtrr.c that  enable write through caching so we can do execute in place on the flash rom.
+#warning fix the XIP bits in stage1_mtrr.c that enable write through caching so we can do execute in place on the flash rom.
 #if 0
 #if defined(XIP_ROM_SIZE)
 	/* enable write through caching so we can do execute in place

Modified: coreboot-v3/include/arch/x86/amd/k8/k8.h
===================================================================
--- coreboot-v3/include/arch/x86/amd/k8/k8.h	2009-02-10 22:35:49 UTC (rev 1127)
+++ coreboot-v3/include/arch/x86/amd/k8/k8.h	2009-02-10 22:40:10 UTC (rev 1128)
@@ -695,56 +695,9 @@
 /* k8/reset_test.c */
 void distinguish_cpu_resets(unsigned nodeid);
 
-/* These are functions that MUST be inlined as we can not use a stack -- CAR or real ram */
-/* by yhlu 6.2005 */
-/* be warned, this file will be used other cores and core 0 / node 0 */
-static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
-{
+inline __attribute__((always_inline)) void disable_cache_as_ram(void);
 
-        __asm__ volatile (
-
-        /* We don't need cache as ram for now on */
-        /* disable cache */
-        "movl    %cr0, %eax\n\t"
-        "orl    $(0x1<<30),%eax\n\t"
-        "movl    %eax, %cr0\n\t"
-
-        /* clear sth */
-        "movl    $0x269, %ecx\n\t"  /* fix4k_c8000*/
-        "xorl    %edx, %edx\n\t"
-        "xorl    %eax, %eax\n\t"
-	"wrmsr\n\t"
-#if CONFIG_CARSIZE > 0x8000
-	"movl    $0x268, %ecx\n\t"  /* fix4k_c0000*/
-        "wrmsr\n\t"
-#endif
-
-        /* disable fixed mtrr from now on, it will be enabled by coreboot_ram again*/
-        "movl    $0xC0010010, %ecx\n\t"
-//        "movl    $SYSCFG_MSR, %ecx\n\t"
-        "rdmsr\n\t"
-        "andl    $(~(3<<18)), %eax\n\t"
-//        "andl    $(~(SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn)), %eax\n\t"
-        "wrmsr\n\t"
-
-        /* Set the default memory type and disable fixed and enable variable MTRRs */
-        "movl    $0x2ff, %ecx\n\t"
-//        "movl    $MTRRdefType_MSR, %ecx\n\t"
-        "xorl    %edx, %edx\n\t"
-        /* Enable Variable and Disable Fixed MTRRs */
-        "movl    $0x00000800, %eax\n\t"
-        "wrmsr\n\t"
-
-        /* enable cache */
-        "movl    %cr0, %eax\n\t"
-        "andl    $0x9fffffff,%eax\n\t"
-        "movl    %eax, %cr0\n\t"
-
-        );
-}
-
-void disable_cache_as_ram_bsp(void);
-
+void set_top_mem_ap(unsigned tom_k, unsigned tom2_k);
 #endif /* ! ASSEMBLY */
 
 #endif /* AMD_K8_H */

Modified: coreboot-v3/include/arch/x86/cpu.h
===================================================================
--- coreboot-v3/include/arch/x86/cpu.h	2009-02-10 22:35:49 UTC (rev 1127)
+++ coreboot-v3/include/arch/x86/cpu.h	2009-02-10 22:40:10 UTC (rev 1128)
@@ -267,7 +267,7 @@
 
 }
 
-void set_init_ram_access(void);
+void set_mtrr_ram_access(void);
 
 void * bottom_of_stack(void);
 EXPORT_SYMBOL(bottom_of_stack);

Modified: coreboot-v3/include/arch/x86/mtrr.h
===================================================================
--- coreboot-v3/include/arch/x86/mtrr.h	2009-02-10 22:35:49 UTC (rev 1127)
+++ coreboot-v3/include/arch/x86/mtrr.h	2009-02-10 22:40:10 UTC (rev 1128)
@@ -37,7 +37,11 @@
 int x86_mtrr_check(void);
 void stage1_set_var_mtrr(unsigned long reg, unsigned long base,
 				unsigned long size, unsigned long type);
+void stage1_set_fix_mtrr(u32 reg, u8 type);
+void stage1_set_var_mtrr_x(unsigned long reg, u32 base_lo, u32 base_hi,
+				 u32 size_lo, u32 size_hi, unsigned long type);
 
+
 #endif
 
 #endif				/* ARCH_X86_MTRR_H */




From marcj303 at gmail.com  Tue Feb 10 23:36:02 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Tue, 10 Feb 2009 15:36:02 -0700
Subject: [coreboot] [v3][patch] Fix stdcall for asm to C call.
In-Reply-To: <20090206232731.10919.qmail@stuge.se>
References: <534e5dc20902061434j6e52260o6027a1db93efe91f@mail.gmail.com>
	<20090206232731.10919.qmail@stuge.se>
Message-ID: <534e5dc20902101436p605f2510s62f8754cf961b7c3@mail.gmail.com>

On Fri, Feb 6, 2009 at 4:27 PM, Peter Stuge <peter at stuge.se> wrote:
> Marc Jones wrote:
>> Coreboot uses the compiler option -mregparm=3 which causes variables to be
>> passed in registers. This is good for size and speed but not good when we
>> call a C function from asm. Force stage1_phase1 to use stdcall and get
>> variables off the stack.
>>
>> Note that I didn't change stage1_phase3 because it doesn't use any variables.
>>
>> Signed-off-by: Marc Jones <marcj303 at gmail.com>
>
> Acked-by: Peter Stuge <peter at stuge.se>
>

r1127



From marcj303 at gmail.com  Tue Feb 10 23:40:23 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Tue, 10 Feb 2009 15:40:23 -0700
Subject: [coreboot] [v3][patch] Add early MTRR setup
In-Reply-To: <534e5dc20902091218l18792885vf7365e28a3c6e29d@mail.gmail.com>
References: <534e5dc20902061437n207f9cfn3dc5ad45cf718f95@mail.gmail.com>
	<498D6B01.3030401@gmx.net>
	<534e5dc20902070928le4cedd2ubaaae84bbef89b8@mail.gmail.com>
	<534e5dc20902091218l18792885vf7365e28a3c6e29d@mail.gmail.com>
Message-ID: <534e5dc20902101440o5408c993ted690ba8dcd352ca@mail.gmail.com>

On Mon, Feb 9, 2009 at 1:18 PM, Marc Jones <marcj303 at gmail.com> wrote:
> On Sat, Feb 7, 2009 at 10:28 AM, Marc Jones <marcj303 at gmail.com> wrote:
>> On Sat, Feb 7, 2009 at 4:05 AM, Carl-Daniel Hailfinger
>> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>>> On 06.02.2009 23:37, Marc Jones wrote:
>>>> Setup the MTRRs in stage1 so that memory and cache are available throughout
>>>> stage2. This fixes problems with VGA graphics ROMs access to 0xA0000-0xBFFFF.
>>>> It also sets all system memory to WriteBack cached and sets the ROM
>>>> area to cached.
>>>>
>>>> Signed-off-by: Marc Jones <marcj303 at gmail.com>
>
> Fixed the comment for clarity and the ROM size based on the config.
>
> Marc
>

r1128



From svn at coreboot.org  Tue Feb 10 23:41:35 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Tue, 10 Feb 2009 23:41:35 +0100
Subject: [coreboot] r1129 - in coreboot-v3: arch/x86 arch/x86/amd
	arch/x86/geodelx arch/x86/i586 arch/x86/intel/core2
	arch/x86/via mainboard/amd/dbm690t mainboard/amd/serengeti
	mainboard/gigabyte/m57sli
Message-ID: <mailman.2762.1355071481.16123.coreboot@coreboot.org>

Author: mjones
Date: 2009-02-10 23:41:35 +0100 (Tue, 10 Feb 2009)
New Revision: 1129

Modified:
   coreboot-v3/arch/x86/amd/stage0.S
   coreboot-v3/arch/x86/geodelx/stage0.S
   coreboot-v3/arch/x86/i586/stage0.S
   coreboot-v3/arch/x86/intel/core2/stage0.S
   coreboot-v3/arch/x86/stage1.c
   coreboot-v3/arch/x86/via/stage0.S
   coreboot-v3/mainboard/amd/dbm690t/initram.c
   coreboot-v3/mainboard/amd/serengeti/initram.c
   coreboot-v3/mainboard/gigabyte/m57sli/initram.c
Log:
Add AP detection to stage0 to prevent APs from re-initializing mainboard setup
that has already been done by the BSP. For single processor systems the CPU
flag is always 0, BSP. This code also moves the AP stop for K8 mainboards to
after memory setup so the AP's MTRRs can be setup to match system memory.

Signed-off-by: Marc Jones <marcj303 at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>



Modified: coreboot-v3/arch/x86/amd/stage0.S
===================================================================
--- coreboot-v3/arch/x86/amd/stage0.S	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/arch/x86/amd/stage0.S	2009-02-10 22:41:35 UTC (rev 1129)
@@ -78,11 +78,6 @@
 	movb	$0xA0, %al
 	outb	%al, $0x80
 
-	/* check if cpu_init_detected */
-	movl	$MTRRdefType_MSR, %ecx
-	rdmsr
-	andl	$(1 << 11), %eax
-	movl	%eax, %ebx	/* We store the status */
 
 #ifdef CONFIG_CPU_AMD_K10
 	/* for GH, CAR need to set DRAM Base/Limit Registers to direct that to node0 */
@@ -248,11 +243,14 @@
 	movl	%eax, %cr0
 
 
-#ifdef CONFIG_CPU_AMD_K10
-	/* So we need to check if it is BSP/BSC */
+	/* Check if it is BSP/BSC and put the result in ebx. */
 	movl	$0x1b, %ecx /* APIC BAR */
 	rdmsr
-	bt	$8, %eax /* BSC */
+	movl	%eax, %ebx
+	shrl	$8, %ebx
+	andl	$1, %ebx
+	btc		$0, %ebx	/* Flip bit zero from BSP/BSC flag to core ID 0. */
+#ifdef CONFIG_CPU_AMD_K10
 	jnc	CAR_FAM10_ap
 #endif
 
@@ -289,9 +287,6 @@
 	/* So need to get the NodeID and CoreID at first */
 	/* If NB_CFG bit 54 is set just use initial apicid, otherwise need to reverse it */
 
-	/* store our init detected */
-	movl	%ebx, %esi
-
 	/* get the coreid bits at first */
 	movl	$0x80000008, %eax
 	cpuid
@@ -315,34 +310,42 @@
 
 	/* calculate stack pointer */
 	movl	$CacheSizeAPStack, %eax
-	mull	%ebx
+	mull	%ebx	/* core ID. */
 	movl	$(CacheBase + (CacheSize - GlobalVarSize)/2), %esp
 	subl	%eax, %esp
 
-	/* retrive init detected */
-	movl	%esi, %ebx
-
 	movb	$0xA4, %al
 	outb	%al, $0x80
 
-CAR_FAM10_ap_out:
 #endif
 
 	movb	$0xA5, %al
 	outb	%al, $0x80
 
+	/* check if cpu_init_detected */
+	movl	$MTRRdefType_MSR, %ecx
+	rdmsr
+	andl	$(1 << 11), %eax
+	movl	%eax, %edx	/* We store the status */
+
 	/* Restore the BIST result. */
 	movl	%ebp, %eax
 
 	/* We need to set ebp? No need. */
 	movl	%esp, %ebp
 
+	/* Push the stage1_phase1 variables onto the stack */
+	/* Third parameter: cpu #: 0 == BSP all other are APs.
+	 */
+	pushl	%ebx
+
 	/* Second parameter: init_detected */
-	pushl	%ebx
+	pushl	%edx
+
 	/* First parameter: bist */
 	pushl	%eax
 	call	stage1_phase1
-	/* We will not go back. */
+	/* We will not come back. */
 
 	movb	$0xAF, %al		/* Should never see this postcode */
 	outb	%al, $0x80

Modified: coreboot-v3/arch/x86/geodelx/stage0.S
===================================================================
--- coreboot-v3/arch/x86/geodelx/stage0.S	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/arch/x86/geodelx/stage0.S	2009-02-10 22:41:35 UTC (rev 1129)
@@ -266,6 +266,10 @@
 	/* We need to set ebp? No need. */
 	movl	%esp, %ebp
 
+	/* Third parameter: cpu #: 0 == BSP all other are APs.
+	 * Always 0 for Geode.
+	 */
+	pushl	$0
 	/* Second parameter: init_detected */
 	/* Store zero for the unused init_detected parameter. */
 	pushl	$0

Modified: coreboot-v3/arch/x86/i586/stage0.S
===================================================================
--- coreboot-v3/arch/x86/i586/stage0.S	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/arch/x86/i586/stage0.S	2009-02-10 22:41:35 UTC (rev 1129)
@@ -334,6 +334,10 @@
 	/* We need to set ebp? No need. */
 	movl	%esp, %ebp
 
+	/* Third parameter: cpu #: 0 == BSP all other are APs.
+	 * 0 until SMP support is added.
+	 */
+	pushl	$0
 	/* Second parameter: init_detected */
 	/* Store zero for the unused init_detected parameter. */
 	pushl	$0

Modified: coreboot-v3/arch/x86/intel/core2/stage0.S
===================================================================
--- coreboot-v3/arch/x86/intel/core2/stage0.S	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/arch/x86/intel/core2/stage0.S	2009-02-10 22:41:35 UTC (rev 1129)
@@ -159,16 +159,26 @@
 	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
 	movl	%eax, %esp
 
+	/* Third parameter: cpu #: 0 == BSP all other are APs.
+	 * 0 until SMP support is added.
+	 */
+	pushl	$0
+	/* Second parameter: init_detected */
+	/* Store zero for the unused init_detected parameter. */
+	pushl	$0
+	/* First parameter: bist */
 	/* Restore the BIST result */
 	movl	%ebp, %eax
 	movl	%esp, %ebp
 	pushl	%eax
 
+
 #if 0
 	/* this will be interpreted as failed bist */
 	port80_post(0x23)
 #endif
 
+
 	call	stage1_phase1
 
 	port80_post(0x2f)

Modified: coreboot-v3/arch/x86/stage1.c
===================================================================
--- coreboot-v3/arch/x86/stage1.c	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/arch/x86/stage1.c	2009-02-10 22:41:35 UTC (rev 1129)
@@ -187,7 +187,7 @@
  * that we are restarting after some sort of reconfiguration. Note that we could use it on geode but 
  * do not at present. 
  */
-void __attribute__((stdcall, regparm(0))) stage1_phase1(u32 bist, u32 init_detected)
+void __attribute__((stdcall, regparm(0))) stage1_phase1(u32 bist, u32 init_detected, u32 cpu)
 {
 	struct global_vars globvars;
 	int ret;
@@ -195,41 +195,36 @@
 
 	post_code(POST_STAGE1_MAIN);
 
-	/* before we do anything, we want to stop if we do not run
-	 * on the bootstrap processor.
-	 * stop_ap is responsible for NOT stopping the BSP
+	/* Only the BSP/BSC should do the following mainboard and global vars setup.
 	 */
-	stop_ap();
+	if (cpu == 0) {
+		/* Initialize global variables before we can think of using them.
+		 */
+		global_vars_init(&globvars);
+		globvars.init_detected = init_detected;
 
-	/* Initialize global variables before we can think of using them.
-	 */
-	global_vars_init(&globvars);
-	globvars.init_detected = init_detected;
+		hardware_stage1();
 
-	hardware_stage1();
+		uart_init();	// initialize serial port
 
-	//
-	uart_init();	// initialize serial port
+		/* Exactly from now on we can use printk to the serial port.
+		 * Celebrate this by printing a LB banner.
+		 */
+		console_init();
 
-	/* Exactly from now on we can use printk to the serial port.
-	 * Celebrate this by printing a LB banner.
-	 */
-	console_init();
-
 #ifdef CONFIG_CHECK_STACK_USAGE
-	printk(BIOS_DEBUG, "Initial lowest stack is %p\n",
-		global_vars()->loweststack);
+		printk(BIOS_DEBUG, "Initial lowest stack is %p\n",
+			global_vars()->loweststack);
 #endif
-	if (bist!=0) {
-		printk(BIOS_INFO, "BIST FAILED: %08x", bist);
+
+		enable_rom();	// enable entire ROM area
+	}
+
+	if (bist != 0) {
+		printk(BIOS_INFO, "BIST FAILED: %08x on CPU: %08x", bist, cpu);
 		die("");
 	}
 
-	// enable rom
-	enable_rom();
-
-	// location and size of image.
-
 	init_archive(&archive);
 
 	// find first initram

Modified: coreboot-v3/arch/x86/via/stage0.S
===================================================================
--- coreboot-v3/arch/x86/via/stage0.S	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/arch/x86/via/stage0.S	2009-02-10 22:41:35 UTC (rev 1129)
@@ -184,6 +184,10 @@
 	/* We need to set ebp? No need. */
 	movl	%esp, %ebp
 
+	/* Third parameter: cpu #: 0 == BSP all other are APs.
+	 * Always 0 for Via.
+	 */
+	pushl	$0
 	/* Second parameter: init_detected */
 	/* Store zero for the unused init_detected parameter. */
 	pushl	$0

Modified: coreboot-v3/mainboard/amd/dbm690t/initram.c
===================================================================
--- coreboot-v3/mainboard/amd/dbm690t/initram.c	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/mainboard/amd/dbm690t/initram.c	2009-02-10 22:41:35 UTC (rev 1129)
@@ -181,7 +181,6 @@
 		soft_reset();
 	}
 #endif
-	allow_all_aps_stop(bsp_apicid);
 
 	//It's the time to set ctrl in sysinfo now;
 	fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
@@ -190,12 +189,11 @@
 
 	memreset_setup();
 
-	//do we need apci timer, tsc...., only debug need it for better output
-	/* all ap stopped? */
-//	init_timer(); // Need to use TMICT to synconize FID/VID
-
 	sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 
+	/* After RAM is setup allow the APs to do RAM and MTRRs setup if needed. */
+	allow_all_aps_stop(bsp_apicid);
+
 #if 0
 	print_pci_devices();
 #endif

Modified: coreboot-v3/mainboard/amd/serengeti/initram.c
===================================================================
--- coreboot-v3/mainboard/amd/serengeti/initram.c	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/mainboard/amd/serengeti/initram.c	2009-02-10 22:41:35 UTC (rev 1129)
@@ -224,7 +224,6 @@
 		soft_reset_x(sysinfo->sbbusn, sysinfo->sbdn);
 	}
 #endif
-	allow_all_aps_stop(bsp_apicid);
 
 	//It's the time to set ctrl in sysinfo now;
 	fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
@@ -233,12 +232,11 @@
 
 	memreset_setup();
 
-	//do we need apci timer, tsc...., only debug need it for better output
-	/* all ap stopped? */
-//	init_timer(); // Need to use TMICT to synconize FID/VID
-
 	sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 
+	/* After RAM is setup allow the APs to do RAM and MTRRs setup if needed. */
+	allow_all_aps_stop(bsp_apicid);
+
 #if 0
 	print_pci_devices();
 #endif

Modified: coreboot-v3/mainboard/gigabyte/m57sli/initram.c
===================================================================
--- coreboot-v3/mainboard/gigabyte/m57sli/initram.c	2009-02-10 22:40:10 UTC (rev 1128)
+++ coreboot-v3/mainboard/gigabyte/m57sli/initram.c	2009-02-10 22:41:35 UTC (rev 1129)
@@ -134,7 +134,6 @@
 		printk(BIOS_INFO, "ht reset -\n");
 		soft_reset();
 	}
-	allow_all_aps_stop(bsp_apicid);
 
 	//It's the time to set ctrl in sysinfo now;
 	fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
@@ -143,12 +142,11 @@
 
 	memreset_setup();
 
-	//do we need apci timer, tsc...., only debug need it for better output
-	/* all ap stopped? */
-//        init_timer(); // Need to use TMICT to synconize FID/VID
-
 	sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 
+	/* After RAM is setup allow the APs to do RAM and MTRRs setup if needed. */
+	allow_all_aps_stop(bsp_apicid);
+
 	printk(BIOS_DEBUG, "initram returns\n");
 	return 0;
 }




From marcj303 at gmail.com  Tue Feb 10 23:41:47 2009
From: marcj303 at gmail.com (Marc Jones)
Date: Tue, 10 Feb 2009 15:41:47 -0700
Subject: [coreboot] [v3][patch] Add AP detection to stage0
In-Reply-To: <20090206232723.10796.qmail@stuge.se>
References: <534e5dc20902061440l78b2c450g96329202ac1d677f@mail.gmail.com>
	<20090206232723.10796.qmail@stuge.se>
Message-ID: <534e5dc20902101441h4d1bf0bfne5ba1545ad31ab71@mail.gmail.com>

On Fri, Feb 6, 2009 at 4:27 PM, Peter Stuge <peter at stuge.se> wrote:
> Marc Jones wrote:
>> Add AP detection to stage0 to prevent APs from re-initializing mainboard setup
>> that has already been done by the BSP. For single processor systems the CPU
>> flag is always 0, BSP. This code also moves the AP stop for K8 mainboards to
>> after memory setup so the AP's MTRRs can be setup to match system memory.
>>
>> Signed-off-by: Marc Jones <marcj303 at gmail.com>
>
> Acked-by: Peter Stuge <peter at stuge.se>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>

r1129



From dchmelik at gmail.com  Wed Feb 11 08:31:40 2009
From: dchmelik at gmail.com (David Melik)
Date: Tue, 10 Feb 2009 23:31:40 -0800
Subject: [coreboot] coreboot on s4882?
In-Reply-To: <F8A9C52CE3F74F80922370F6857CAD2C@chimp>
References: <b8cd117e0902051842l1378a078i2eb7962ff14730ff@mail.gmail.com>
	<2831fecf0902051939p603c772bub49e99f9c6563f35@mail.gmail.com>
	<b8cd117e0902060321r11c6ae13tb86c0e8b97c1a3c6@mail.gmail.com>
	<2831fecf0902060534j567623f1k753942d45778b2e7@mail.gmail.com>
	<b8cd117e0902082218r7578b9a7ncee07915ac42c064@mail.gmail.com>
	<F8A9C52CE3F74F80922370F6857CAD2C@chimp>
Message-ID: <b8cd117e0902102331w415cecd7na2a59683c3eef5de@mail.gmail.com>

> > I tried minicom on ttyS0 and lp0 (then with options I thought would
> output more somewhere.)  It should be lp0, but maybe with a symlink to
> it--so far there was no output.
>
>  It's important to get it working.  It would be a good idea to hook a
> different computer up until you figure out how to get output from a serial
> console.  Once you have that working it will be much easier to debug.
>
> Now I only have 1 other GNU/Linux system besides the s4882, and I do not
see why just trying a different one will help.  Most info (I read tens of
documents) about /dev/lp0 and minicom say lp0 is right and minicom works
automatically (if you remove the modem init. strings.)  If that is not so
because there is something undocumented I must figure out, perhaps I will
re-flash my old BIOS: too much of GNU/Linux that I try to use is
undocumented, and my s4882's 19.2 Gflops could still be helping BOINC or
something rather than going to waste.

I had meant to send this following earlier reply to the list.

 >>> [...] if you grep the source for post_code you'll find some.
>
>That string is there for some boards except s4882.  I looked in src: boot,
console, arch/i386 and could not figure anything out.
>

> >It's important that the size is exact.  Flash is sized in megabits, so
> >4 Mbits = 512KB.  This probably isn't the problem, I just wanted to
> >make sure.

>
>I mounted my usb disc: my coreboot.rom is exactly 512Kb.  I looked up
'prepend:' a page on coreboot.org says one can prepend >VGA ROM that is
either onboard or in a card.  The 64-bit Linux Coreboot instructions and the
compiling pages do not say that, so I >assume compiling or grub2 are
sufficient (unless you had implied I must prepend VGA BIOS....)

--David



>
>
>
>
>
>
-------------- next part --------------
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From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 11 12:49:19 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 11 Feb 2009 12:49:19 +0100
Subject: [coreboot] [PATCH] Fix and clean up DBM690T/Pistachio DSDT
In-Reply-To: <DD1CC71B621B004FA76856E5129D6B17025ADB7D@sbjgexmb1.amd.com>
References: <DD1CC71B621B004FA76856E5129D6B17025ADB7D@sbjgexmb1.amd.com>
Message-ID: <4992BB3F.50506@gmx.net>

Hi Maggie,

On 05.02.2009 04:20, Li, Maggie wrote:
> Carl, 
>
> The patch has been tested on dbm690t and pistachio. It works.
>   

Thank you for testing.

> About the thermal, dbm690t uses adt7461, while pistachio uses adt7475. So, their THOT and TCRT are different. You can get details from their spec.
>   

Good to know. I will leave that unchanged.

Can I have an Ack for the patch?

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From mart.raudsepp at artecdesign.ee  Wed Feb 11 12:52:05 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Wed, 11 Feb 2009 13:52:05 +0200
Subject: [coreboot] Geode LX GPL VSA source and binary
In-Reply-To: <534e5dc20901220955s324089b0p769d838cc6ec5074@mail.gmail.com>
References: <534e5dc20901220955s324089b0p769d838cc6ec5074@mail.gmail.com>
Message-ID: <1234353125.4602.3.camel@martr-gentoo.artec>

?hel kenal p?eval, N, 2009-01-22 kell 10:55, kirjutas Marc Jones:
> This is a tarball and binary of working AMD LX GPL VSA code with the
> addition on a fix to the flash header for a NAND MMIO BAR (thanks
> Mart).
> 
> Their are two reasons that I am sending this to the list.
> 1. The git repository on laptop.org was not current and luckily some
> folks at AMD hooked me up with the good source again. With the
> problems at OLPC I am not sure what will happen with laptop.org. Maybe
> it is time to find a new home for the code.
> 
> 2. The binaries were posted on the AMD embedded Linux support page and
> I don't think that AMD is that interested in maintaining VSA and the
> binaries any longer. We could probably get them to post this one but
> that seems like more work than it is worth. So, we need another place
> to put the binary. Once we have a location, buildrom needs to be
> updated to get it from the new location.

I hope we can find a suitable way forward for this now, especially just
having a public place anyone can download the binary from without
digging through mailing list attachments.
Source being available somewhere more conventional than the attachment
would be good too :)
Just re-raising the topic..


Regards,
Mart Raudsepp




From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 11 12:56:02 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 11 Feb 2009 12:56:02 +0100
Subject: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems
In-Reply-To: <20090208175426.17802.qmail@stuge.se>
References: <200902071652.31725.harald.gutmann@gmx.net>	<200902081819.01065.harald.gutmann@gmx.net>	<20090208173127.12041.qmail@stuge.se>	<200902081850.19570.harald.gutmann@gmx.net>
	<20090208175426.17802.qmail@stuge.se>
Message-ID: <4992BCD2.9020803@gmx.net>

On 08.02.2009 18:54, Peter Stuge wrote:
> Harald Gutmann wrote:
>   
>> Here are the new results which should be the right once.
>> original.txt = proprietary bios
>> coreboot.txt = coreboot bios
>>     
>
> And here's a diff.
>   

That sounds like you could use the mcp55_io.c program Yinghai posted
roughly two years ago to debug such problems. I'll try to look it up.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 11 12:58:27 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 11 Feb 2009 12:58:27 +0100
Subject: [coreboot] Obvious bug in mcp55/pci.c
In-Reply-To: <1234301738.28154.22.camel@amd-x2.grundel>
References: <mailman.1.1234263601.15450.coreboot@coreboot.org>
	<1234301738.28154.22.camel@amd-x2.grundel>
Message-ID: <4992BD63.5000401@gmx.net>

Hi Ronald,

if you add your Signed-off-by tag, I can commit this patch. While that
code may have other bugs to fix, your patch fixes at least one of them.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/




From svn at coreboot.org  Wed Feb 11 13:08:55 2009
From: svn at coreboot.org (svn at coreboot.org)
Date: Wed, 11 Feb 2009 13:08:55 +0100
Subject: [coreboot] r3936 - trunk/coreboot-v2/src/mainboard/amd/dbm690t
Message-ID: <mailman.2763.1355071481.16123.coreboot@coreboot.org>

Author: hailfinger
Date: 2009-02-11 13:08:55 +0100 (Wed, 11 Feb 2009)
New Revision: 3936

Modified:
   trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c
Log:
Fix one leftover reference to AmlCode_ssdt which was forgotten in r3929.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>


Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c	2009-02-10 21:12:35 UTC (rev 3935)
+++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/acpi_tables.c	2009-02-11 12:08:55 UTC (rev 3936)
@@ -55,7 +55,6 @@
 #endif
 
 extern u8 AmlCode[];
-extern u8 AmlCode_ssdt[];
 
 #if ACPI_SSDTX_NUM >= 1
 extern u8 AmlCode_ssdt2[];




From steve at fl-eng.com  Wed Feb 11 14:54:44 2009
From: steve at fl-eng.com (Steve Spano)
Date: Wed, 11 Feb 2009 08:54:44 -0500
Subject: [coreboot] Geode LX GPL VSA source and binary
In-Reply-To: <1234353125.4602.3.camel@martr-gentoo.artec>
Message-ID: <001d01c98c50$4c30d1f0$1701a8c0@flexeon32>

Hello

We can setup an FTP site specific for the Geode LX VSA if that helps

Steve Spano, President
Finger Lakes Engineering



-----Original Message-----
From: coreboot-bounces+steve=fl-eng.com at coreboot.org
[mailto:coreboot-bounces+steve=fl-eng.com at coreboot.org] On Behalf Of Mart
Raudsepp
Sent: Wednesday, February 11, 2009 6:52 AM
To: coreboot at coreboot.org
Subject: Re: [coreboot] Geode LX GPL VSA source and binary


?hel kenal p?eval, N, 2009-01-22 kell 10:55, kirjutas Marc Jones:
> This is a tarball and binary of working AMD LX GPL VSA code with the 
> addition on a fix to the flash header for a NAND MMIO BAR (thanks 
> Mart).
> 
> Their are two reasons that I am sending this to the list.
> 1. The git repository on laptop.org was not current and luckily some 
> folks at AMD hooked me up with the good source again. With the 
> problems at OLPC I am not sure what will happen with laptop.org. Maybe 
> it is time to find a new home for the code.
> 
> 2. The binaries were posted on the AMD embedded Linux support page and 
> I don't think that AMD is that interested in maintaining VSA and the 
> binaries any longer. We could probably get them to post this one but 
> that seems like more work than it is worth. So, we need another place 
> to put the binary. Once we have a location, buildrom needs to be 
> updated to get it from the new location.

I hope we can find a suitable way forward for this now, especially just
having a public place anyone can download the binary from without digging
through mailing list attachments. Source being available somewhere more
conventional than the attachment would be good too :) Just re-raising the
topic..


Regards,
Mart Raudsepp


--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot




From mart.raudsepp at artecdesign.ee  Wed Feb 11 15:02:20 2009
From: mart.raudsepp at artecdesign.ee (Mart Raudsepp)
Date: Wed, 11 Feb 2009 16:02:20 +0200
Subject: [coreboot] Geode LX GPL VSA source and binary
In-Reply-To: <001d01c98c50$4c30d1f0$1701a8c0@flexeon32>
References: <001d01c98c50$4c30d1f0$1701a8c0@flexeon32>
Message-ID: <1234360940.26298.8.camel@martr-gentoo.artec>

?hel kenal p?eval, K, 2009-02-11 kell 08:54, kirjutas Steve Spano:
> Hello
> 
> We can setup an FTP site specific for the Geode LX VSA if that helps

I think we are hoping for a community space in coreboot.org or
laptop.org or such. In the same line we could probably set something
like that up as well from our companies side, but I hope we can put
these in a familiar community domain :)

Stefan?


Regards,
Mart Raudsepp




From mylesgw at gmail.com  Wed Feb 11 15:19:26 2009
From: mylesgw at gmail.com (Myles Watson)
Date: Wed, 11 Feb 2009 07:19:26 -0700
Subject: [coreboot] coreboot on s4882?
In-Reply-To: <b8cd117e0902102331w415cecd7na2a59683c3eef5de@mail.gmail.com>
References: <b8cd117e0902051842l1378a078i2eb7962ff14730ff@mail.gmail.com>
	<2831fecf0902051939p603c772bub49e99f9c6563f35@mail.gmail.com>
	<b8cd117e0902060321r11c6ae13tb86c0e8b97c1a3c6@mail.gmail.com>
	<2831fecf0902060534j567623f1k753942d45778b2e7@mail.gmail.com>
	<b8cd117e0902082218r7578b9a7ncee07915ac42c064@mail.gmail.com>
	<F8A9C52CE3F74F80922370F6857CAD2C@chimp>
	<b8cd117e0902102331w415cecd7na2a59683c3eef5de@mail.gmail.com>
Message-ID: <2831fecf0902110619h469fe6f4ve0afc36dc90f1670@mail.gmail.com>

On Wed, Feb 11, 2009 at 12:31 AM, David Melik <dchmelik at gmail.com> wrote:
>
>>
>> > I tried minicom on ttyS0 and lp0 (then with options I thought would
>> > output more somewhere.)  It should be lp0, but maybe with a symlink to
>> > it--so far there was no output.
>>
>> It's important to get it working.  It would be a good idea to hook a
>> different computer up until you figure out how to get output from a serial
>> console.  Once you have that working it will be much easier to debug.
>
> Now I only have 1 other GNU/Linux system besides the s4882, and I do not see
> why just trying a different one will help.

The point was that it's very strange for nothing to be coming out on
the serial port.  The only reasons I see for that are a BIOS image
that is corrupted (did it verify?) or doesn't match the board, or a
serial port misconfiguration.  I was trying to help you narrow that
down.  Unfortunately it can be difficult to debug someone else's BIOS
when the only console is email :)

Thanks,
Myles



From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 11 15:24:03 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 11 Feb 2009 15:24:03 +0100
Subject: [coreboot] [PATCH] Warn if we run out of MTRRs
Message-ID: <4992DF83.5020906@gmx.net>

Print a loud warning message if we run out of MTRRs.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

==================================================================
--- corebootv2/src/cpu/x86/mtrr/mtrr.c	(revision 3935)
+++ corebootv2/src/cpu/x86/mtrr/mtrr.c	(working copy)
@@ -228,9 +228,14 @@
 	unsigned long range_startk, unsigned long range_sizek,
 	unsigned long next_range_startk, unsigned char type, unsigned address_bits)
 {
-	if (!range_sizek || (reg >= BIOS_MTRRS)) {
+	if (!range_sizek) {
+		printk_debug("range_to_mtrr called for empty range\n");
 		return reg;
 	}
+	if (reg >= BIOS_MTRRS) {
+		printk_emerg("Running out of variable MTRRs!\n");
+		return reg;
+	}
 	while(range_sizek) {
 		unsigned long max_align, align;
 		unsigned long sizek;
@@ -249,8 +254,10 @@
 		set_var_mtrr(reg++, range_startk, sizek, type, address_bits);
 		range_startk += sizek;
 		range_sizek -= sizek;
-		if (reg >= BIOS_MTRRS)
+		if (reg >= BIOS_MTRRS) {
+			printk_emerg("Running out of variable MTRRs!\n");
 			break;
+		}
 	}
 	return reg;
 }


-- 
http://www.hailfinger.org/




From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 11 15:36:09 2009
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 11 Feb 2009 15:36:09 +0100
Subject: [coreboot] [PATCH] Improve DBM690T and Pistachio comments
Message-ID: <4992E259.2070207@gmx.net>

Improve mainboard.c comments for DBM690T and Pistachio.
Fix reference to documentation.
Use __FUNCTION__ instead of hardcoding function names in printk messages.

No functional changes.

I'm slowly getting to the point where adding another RS690 board is
really easy and needs almost no changes to the existing target.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c
===================================================================
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c	(Revision 3936)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c	(Arbeitskopie)
@@ -49,11 +49,11 @@
 * It has a pin named LOW_POWER to enable it into LOW POWER state.
 * In order to run NIC, we should let it out of Low power state. This pin is
 * controlled by GPM8.
-* RPR4.2.3 GPM as GPIO
+* RRG4.2.3 GPM as GPIO
 * GPM pins can be used as GPIO. The GPM I/O functions is controlled by three registers:
 * I/O C50, C51, C52, PM I/O94, 95, 96.
-* RPR4.2.3.1 GPM pins as Input
-* RPR4.2.3.2 GPM pins as Output
+* RRG4.2.3.1 GPM pins as Input
+* RRG4.2.3.2 GPM pins as Output
 * The R77 (on BRASS) / R81 (on Bronze) is not load!
 * So NIC can work whether this function runs.
 ********************************************************/
@@ -191,18 +191,18 @@
 			     sm_dev->path.u.pci.devfn, 0x41, byte);
 
 	/* set GPM5 as input */
-	/* step1: set index register 0C50h to 13h (miscellaneous control) */
+	/* set index register 0C50h to 13h (miscellaneous control) */
 	outb(0x13, 0xC50);	/* CMIndex */
-	/* step2: set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */
+	/* set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */
 	byte = inb(0xC51);	/* CMData */
 	byte &= 0x3f;
 	byte |= 1 << 6;
 	outb(byte, 0xC51);
-	/* step3: set GPM port 0C52h appropriate bits to 1 to tri-state the GPM port */
+	/* set GPM port 0C52h bit 5 to 1 to tri-state the GPM port */
 	byte = inb(0xc52);	/* GpmPort */
 	byte |= 1 << 5;
 	outb(byte, 0xc52);
-	/* step4: set CM data register 0C51h bits [7:6] to 00b to set GPM port for read */
+	/* set CM data register 0C51h bits [7:6] to 00b to set GPM port for read */
 	byte = inb(0xc51);
 	byte &= 0x3f;
 	outb(byte, 0xc51);
@@ -282,14 +282,14 @@
 	/* TOP_MEM: the top of DRAM below 4G */
 	msr = rdmsr(TOP_MEM);
 	printk_info
-	    ("pistachio_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
-	     msr.lo, msr.hi);
+	    ("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
+	     __FUNCTION__, msr.lo, msr.hi)