[coreboot] [PATCH] Warn if we run out of MTRRs
corey.osgood at gmail.com
Thu Feb 12 20:27:56 CET 2009
Sorry, I've skimmed through this thread but I think I'm missing some
messages. If I'm understanding this thread right, we now have special cases
for UMA and SMM memory to mark them as uncachable. But a proper subtractive
mtrr scheme should handle that automatically, right? I guess what it boils
down to is, is memory reserved for SMM reported as a ram resource or no? Can
SMM memory be marked as uncachable or does it need to be untouched by MTRRs?
Also, does the ram resource code properly handle areas that need to be
reserved for ACPI, etc tables and the flash chip?
I've subtractive mtrr setup code that can handle the most basic cases, a
memory of a power of 2 size <4gb minus any number of power of 2 sized areas,
but I'm not sure how to work at around 4GB, and I don't have any systems
that have onboard video and can handle 4GB of ram to poke at.
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