[coreboot] r1137 - in coreboot-v3/arch/x86: . intel/core2
svn at coreboot.org
svn at coreboot.org
Sat Feb 21 18:28:25 CET 2009
Author: rminnich
Date: 2009-02-21 18:28:24 +0100 (Sat, 21 Feb 2009)
New Revision: 1137
Modified:
coreboot-v3/arch/x86/intel/core2/init_cpus.c
coreboot-v3/arch/x86/secondary.S
Log:
This is a trivial commit and I want to get other people to look at the code.
I can still get to linux but core1 is not working.
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>
Modified: coreboot-v3/arch/x86/intel/core2/init_cpus.c
===================================================================
--- coreboot-v3/arch/x86/intel/core2/init_cpus.c 2009-02-21 00:05:20 UTC (rev 1136)
+++ coreboot-v3/arch/x86/intel/core2/init_cpus.c 2009-02-21 17:28:24 UTC (rev 1137)
@@ -77,7 +77,8 @@
if (siblings < 1) {
siblings = 1;
}
- nodes = siblings + 1;
+ /* it seems this is the number of nodes */
+ nodes = siblings;
printk(BIOS_DEBUG, "%s: %d\n", __func__, nodes);
return nodes;
}
@@ -260,9 +261,7 @@
return 0;
}
- /* the first 32 bits of secondary_base is the stack pointer */
- /* N.B.: + 1 because secondary_base is a u32 *! */
- start_eip = (u32) (secondary_base + 1);
+ start_eip = (u32) secondary_base;
num_starts = 2;
/*
@@ -288,6 +287,7 @@
/* Boot on the stack */
/* Kick the second */
+ printk(BIOS_SPEW, "Send start_eip %#lx(%#lx)\n", start_eip, start_eip>>12);
lapic_write_around(LAPIC_ICR, LAPIC_DM_STARTUP
| (start_eip >> 12));
@@ -341,7 +341,7 @@
struct atomic *active_cpus;
struct spinlock *start_cpu_lock;
u32 callerpc;
- u32 data[16384/sizeof(u32) - 4];
+ u32 data[16384/sizeof(u32) - 7];
};
struct stackmem {
@@ -352,7 +352,7 @@
int start_cpu(u32 apicid, struct atomic *active_cpus, struct spinlock *start_cpu_lock, int *last_cpu_index, u32 *secondary_base)
{
- unsigned long stack_end;
+ u32 stack_end;
unsigned long index;
unsigned long count;
int result;
@@ -370,7 +370,7 @@
* can see them.
*/
stack_end = (u32)&stackmem->stacks[index].data;
- printk(BIOS_SPEW, "Stack for AP %ld is %lx\n", index, stack_end);
+ printk(BIOS_SPEW, "Stack for AP %ld is %x\n", index, stack_end);
stackmem->stacks[index].index= index;
stackmem->stacks[index].apicid = apicid;
@@ -378,7 +378,8 @@
stackmem->stacks[index].active_cpus = active_cpus;
stackmem->stacks[index].start_cpu_lock = start_cpu_lock;
/* Advertise the new stack to start_cpu */
- *secondary_base = stack_end;
+ printk(BIOS_SPEW, "Set stack @ %p to %p\n", &secondary_base[-1], (void *)stack_end);
+ secondary_base[-1] = stack_end;
/* Start the cpu */
result = lapic_start_cpu(apicid, secondary_base);
Modified: coreboot-v3/arch/x86/secondary.S
===================================================================
--- coreboot-v3/arch/x86/secondary.S 2009-02-21 00:05:20 UTC (rev 1136)
+++ coreboot-v3/arch/x86/secondary.S 2009-02-21 17:28:24 UTC (rev 1137)
@@ -23,10 +23,9 @@
*/
.text
.globl _secondary_start, _secondary_start_end
- .balign 4096
_secondary_start:
.code16
- .long 0
+ .balign 4096
cli
xorl %eax, %eax
movl %eax, %cr3 /* Invalidate TLB*/
@@ -49,6 +48,7 @@
ljmpl $0x10, $1f
1:
.code32
+secondary32:
movw $0x18, %ax
movw %ax, %ds
movw %ax, %es
@@ -60,7 +60,8 @@
lidt idtarg
/* Set the stack pointer */
- movl _secondary_start, %esp
+ movl $_secondary_start-4,%eax
+ movl 0x0(%eax),%esp
call secondary_cpu_init
1: hlt
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