[coreboot] [PATCH] There's a pciconf.h with PCI conf constants - lets actually use it
Mart Raudsepp
mart.raudsepp at artecdesign.ee
Mon Jan 5 15:49:57 CET 2009
In case it's a good idea to use these constants from that header, here's the proposed commit log and patch:
There's a pciconf.h with PCI conf constants - lets actually use it
PCI_CONF_REG_{INDEX,DATA} constants instead of 0xCF8 and 0xCFF everywhere.
Not touching YABEL as I'm not sure it would want to include that header.
Signed-off-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
---
arch/x86/pci_ops_conf1.c | 24 ++++++++++++------------
southbridge/amd/cs5536/cs5536.c | 5 +++--
2 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/x86/pci_ops_conf1.c b/arch/x86/pci_ops_conf1.c
index a9a7fea..757b6c2 100644
--- a/arch/x86/pci_ops_conf1.c
+++ b/arch/x86/pci_ops_conf1.c
@@ -58,38 +58,38 @@
u8 pci_conf1_read_config8(u32 bdf, int where)
{
- outl(CONFIG_CMD(bdf, where), 0xCF8);
- return inb(0xCFC + (where & 3));
+ outl(CONFIG_CMD(bdf, where), PCI_CONF_REG_INDEX);
+ return inb(PCI_CONF_REG_DATA + (where & 3));
}
u16 pci_conf1_read_config16(u32 bdf, int where)
{
- outl(CONFIG_CMD(bdf, where), 0xCF8);
- return inw(0xCFC + (where & 2));
+ outl(CONFIG_CMD(bdf, where), PCI_CONF_REG_INDEX);
+ return inw(PCI_CONF_REG_DATA + (where & 2));
}
u32 pci_conf1_read_config32(u32 bdf, int where)
{
- outl(CONFIG_CMD(bdf, where), 0xCF8);
- return inl(0xCFC);
+ outl(CONFIG_CMD(bdf, where), PCI_CONF_REG_INDEX);
+ return inl(PCI_CONF_REG_DATA);
}
void pci_conf1_write_config8(u32 bdf, int where, u8 value)
{
- outl(CONFIG_CMD(bdf, where), 0xCF8);
- outb(value, 0xCFC + (where & 3));
+ outl(CONFIG_CMD(bdf, where), PCI_CONF_REG_INDEX);
+ outb(value, PCI_CONF_REG_DATA + (where & 3));
}
void pci_conf1_write_config16(u32 bdf, int where, u16 value)
{
- outl(CONFIG_CMD(bdf, where), 0xCF8);
- outw(value, 0xCFC + (where & 2));
+ outl(CONFIG_CMD(bdf, where), PCI_CONF_REG_INDEX);
+ outw(value, PCI_CONF_REG_DATA + (where & 2));
}
void pci_conf1_write_config32(u32 bdf, int where, u32 value)
{
- outl(CONFIG_CMD(bdf, where), 0xCF8);
- outl(value, 0xCFC);
+ outl(CONFIG_CMD(bdf, where), PCI_CONF_REG_INDEX);
+ outl(value, PCI_CONF_REG_DATA);
}
/**
diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c
index 89d64d6..dacf5c3 100644
--- a/southbridge/amd/cs5536/cs5536.c
+++ b/southbridge/amd/cs5536/cs5536.c
@@ -20,6 +20,7 @@
#include <types.h>
#include <lib.h>
#include <console.h>
+#include <pciconf.h>
#include <device/pci.h>
#include <msr.h>
#include <amd_geodelx.h>
@@ -93,8 +94,8 @@ static void hide_vpci(u32 vpci_devid)
printk(BIOS_DEBUG, "Hiding VPCI device: 0x%08X (%02x:%02x.%01x)\n",
vpci_devid, (vpci_devid >> 16) & 0xff,
(vpci_devid >> 11) & 0x1f, (vpci_devid >> 8) & 0x7);
- outl(vpci_devid + 0x7C, 0xCF8);
- outl(0xDEADBEEF, 0xCFC);
+ outl(vpci_devid + 0x7C, PCI_CONF_REG_INDEX);
+ outl(0xDEADBEEF, PCI_CONF_REG_DATA);
}
/**
--
1.6.0.4
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