[coreboot] v3 stage2 running from flash

ron minnich rminnich at gmail.com
Wed Jan 7 16:29:52 CET 2009

On Wed, Jan 7, 2009 at 7:07 AM, Corey Osgood <corey.osgood at gmail.com> wrote:

> And actually, we already have a config variable and function to do that in
> stage1, the following should make it work (this is inside stage1_phase3).
> All that would be left would be to teach ram_resource to re-set the mtrrs,
> or use the mtrr setup functions I pulled in from v2. The next question
> concerns that though, everything I can find suggests that coreboot uses the
> range from 0MB-CBMEMK. What happens if/when it hits a reserved range? IE the
> range from 768k-1MB which is always reserved on vt8237r, IIRC.

I'm not sure under what circumstances coreboot would use the reserved range.

More information about the coreboot mailing list