[coreboot] r1114 - in coreboot-v3: mainboard/adl/msm800sev mainboard/amd/db800 mainboard/amd/norwich mainboard/amp/tinygx mainboard/artecgroup/dbe61 mainboard/artecgroup/dbe62 mainboard/pcengines/alix1c mainboard/pcengines/alix2c3 southbridge/amd/cs5536
svn at coreboot.org
svn at coreboot.org
Fri Jan 9 19:12:08 CET 2009
Author: mraudsepp
Date: 2009-01-09 19:12:08 +0100 (Fri, 09 Jan 2009)
New Revision: 1114
Modified:
coreboot-v3/mainboard/adl/msm800sev/dts
coreboot-v3/mainboard/amd/db800/dts
coreboot-v3/mainboard/amd/norwich/dts
coreboot-v3/mainboard/amp/tinygx/dts
coreboot-v3/mainboard/artecgroup/dbe61/dts
coreboot-v3/mainboard/artecgroup/dbe62/dts
coreboot-v3/mainboard/pcengines/alix1c/dts
coreboot-v3/mainboard/pcengines/alix2c3/dts
coreboot-v3/southbridge/amd/cs5536/cs5536.c
coreboot-v3/southbridge/amd/cs5536/ide
Log:
cs5536: Remove redundant enable_ide variable from ide device.
The device infrastructure already has an enabled bit, so we don't need to duplicate it in the current form.
cs5536.c:ide_init() is phase6_init, which is called only if the device is enabled, so if the device doesn't
exist, or the mainboard dts says "disabled;" for it, the init is not done and an extra conditional is not
necessary.
Adapt all cs5536 using mainboards to it (removing enable_ide variable) - artecgroup/dbe6[12] gets the whole
IDE device removed, which results in the ide_init() code not being ran as before (before it was called but
early return from enable_ide == 0, now it won't be called in the first place).
Signed-off-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>
Modified: coreboot-v3/mainboard/adl/msm800sev/dts
===================================================================
--- coreboot-v3/mainboard/adl/msm800sev/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/adl/msm800sev/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -39,7 +39,6 @@
};
pci at f,2 {
/config/("southbridge/amd/cs5536/ide");
- enable_ide = "1";
};
ioport at 2e {
/config/("superio/winbond/w83627hf/dts");
Modified: coreboot-v3/mainboard/amd/db800/dts
===================================================================
--- coreboot-v3/mainboard/amd/db800/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/amd/db800/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -54,7 +54,6 @@
};
pci at f,2 {
/config/("southbridge/amd/cs5536/ide");
- enable_ide = "1";
};
ioport at 2e {
/config/("superio/winbond/w83627hf/dts");
Modified: coreboot-v3/mainboard/amd/norwich/dts
===================================================================
--- coreboot-v3/mainboard/amd/norwich/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/amd/norwich/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -57,7 +57,6 @@
};
pci at f,2 {
/config/("southbridge/amd/cs5536/ide");
- enable_ide = "1";
};
};
};
Modified: coreboot-v3/mainboard/amp/tinygx/dts
===================================================================
--- coreboot-v3/mainboard/amp/tinygx/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/amp/tinygx/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -54,7 +54,6 @@
};
pci at f,2 {
/config/("southbridge/amd/cs5536/ide");
- enable_ide = "1";
};
ioport at 2e {
/config/("superio/ite/it8716f/dts");
Modified: coreboot-v3/mainboard/artecgroup/dbe61/dts
===================================================================
--- coreboot-v3/mainboard/artecgroup/dbe61/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/artecgroup/dbe61/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -112,8 +112,5 @@
pci at f,1 {
/config/("southbridge/amd/cs5536/nand");
};
- pci at f,2 {
- /config/("southbridge/amd/cs5536/ide");
- };
};
};
Modified: coreboot-v3/mainboard/artecgroup/dbe62/dts
===================================================================
--- coreboot-v3/mainboard/artecgroup/dbe62/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/artecgroup/dbe62/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -66,8 +66,5 @@
pci at f,1 {
/config/("southbridge/amd/cs5536/nand");
};
- pci at f,2 {
- /config/("southbridge/amd/cs5536/ide");
- };
};
};
Modified: coreboot-v3/mainboard/pcengines/alix1c/dts
===================================================================
--- coreboot-v3/mainboard/pcengines/alix1c/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/pcengines/alix1c/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -51,7 +51,6 @@
};
pci at f,2 {
/config/("southbridge/amd/cs5536/ide");
- enable_ide = "1";
};
ioport at 2e {
/config/("superio/winbond/w83627hf/dts");
Modified: coreboot-v3/mainboard/pcengines/alix2c3/dts
===================================================================
--- coreboot-v3/mainboard/pcengines/alix2c3/dts 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/mainboard/pcengines/alix2c3/dts 2009-01-09 18:12:08 UTC (rev 1114)
@@ -51,7 +51,6 @@
};
pci at f,2 {
/config/("southbridge/amd/cs5536/ide");
- enable_ide = "1";
};
};
};
Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c
===================================================================
--- coreboot-v3/southbridge/amd/cs5536/cs5536.c 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/southbridge/amd/cs5536/cs5536.c 2009-01-09 18:12:08 UTC (rev 1114)
@@ -609,7 +609,7 @@
/**
* Enables the IDE. This is code that is run if there is an ide device in the mainboard
- * device tree and it has set non-zero "enable_ide".
+ * device tree.
*
* @param dev The device
*/
@@ -617,11 +617,6 @@
{
u32 ide_cfg;
- struct southbridge_amd_cs5536_ide_config *ide =
- (struct southbridge_amd_cs5536_ide_config *)dev->device_configuration;
- if (!ide->enable_ide)
- return;
-
printk(BIOS_DEBUG, "cs5536_ide: %s\n", __func__);
/* GPIO and IRQ setup are handled in the main chipset code. */
Modified: coreboot-v3/southbridge/amd/cs5536/ide
===================================================================
--- coreboot-v3/southbridge/amd/cs5536/ide 2009-01-09 18:12:05 UTC (rev 1113)
+++ coreboot-v3/southbridge/amd/cs5536/ide 2009-01-09 18:12:08 UTC (rev 1114)
@@ -20,7 +20,4 @@
{
device_operations = "cs5536_ide";
-
- /* IDE: enable CS5536 IDE. There may be a different IDE controller on board */
- enable_ide = "0";
};
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