[coreboot] [PATCH] Heterogenous dual channel support, part 2

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Tue Jan 20 13:32:21 CET 2009


I believe you are the person who is most proficient in K8 RAM init (no
offense to anyone else intended). Could you take a look at the patch and
give me a few comments?



On 16.01.2009 05:17, Carl-Daniel Hailfinger wrote:
> The check for compatible tCL and associated timing after the parameters
> have already been determined makes sure we don't drive any DIMM with
> incorrect settings.
> In a heterogenous dual channel setup, each DIMM must be checked for that
> criterion.
> Factor out the check to prepare for per-DIMM checks.
> I'd appreciate a thorough review, especially the flow of error and
> default paths of the code. They should be identical.
> Once this is applied, a roughly 10-line change is sufficient to use
> DIMMS with compatible, but not identical tCL timings.
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

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