[coreboot] [PATCH] flashrom: fix off-by-one error in erase

Jody McIntyre scjody at sun.com
Mon Jan 26 17:52:06 CET 2009

There appears to be an off-by-one error when using flashrom's erase:

# flashrom -E
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel 631xESB/632xESB/3100", enabling flash write... OK.
Found chip "SST SST49LF008A" (1024 KB) at physical address 0xfff00000.
Erasing flash chip... FAILED!
ERROR at 0x00100000: Expected=0xff, Read=0x00

Signed-off-by: Jody McIntyre <scjody at sun.com>
This is the same patch with a Signed-off-by: line.

Index: flashrom.c
--- flashrom.c	(revision 3882)
+++ flashrom.c	(working copy)
@@ -592,7 +592,7 @@
 			memcpy(buf, (const char *)flash->virtual_memory, size);
 			flash->read(flash, buf);
-		for (erasedbytes = 0; erasedbytes <= size; erasedbytes++)
+		for (erasedbytes = 0; erasedbytes < size; erasedbytes++)
 			if (0xff != buf[erasedbytes]) {
 				fprintf(stderr, "ERROR at 0x%08x: Expected=0xff, Read=0x%02x\n",

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