[coreboot] option rom problems with DBM690T+VT6202L

Jason Wang wangqingpei at gmail.com
Mon Jul 27 17:42:18 CEST 2009


Hi all,
   Since DBM690T does not have UHCI controller, i bought an PCI-USB card
which contained two UHCI controller. But It always caused rebooting when the
option rom try to initialize the controller. I attached all of the messages,
and looking for some help.
Until now my doubt is the real bus/dev/func is 06/05/01, but while seabios
search it as 00/05/01.


-- 
Jason Wang
Peking University
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coreboot-2.0.0-r4253M Tue Jul 28 03:50:01 CST 2009 starting...
bsp_apicid=0x0
core0 started: 
 01SBLink=00
NC node|link=00
rs690_early_setup()
get_cpu_rev EAX=0x60f82.
CPU Rev is K8_G0.
NB Revision is A12.
k8_optimization()
rs690_por_init
sb600_early_setup()
sb600_devices_por_init()
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
sb600_pmio_por_init()
begin msr fid, vid: hi=0x32111e1e, lo=0x110d0000
Current fid_cur: 0x0, fid_max: 0xd
Requested fid_new: 0xd
FidVid table step fidvid: 0xa
200MHZ step fidvid: 0xc
100MHZ step fidvid: 0xd
end msr fid, vid: hi=0x32111e11, lo=0x110d000d
needs_reset=0x1
ht reset -


coreboot-2.0.0-r4253M Tue Jul 28 03:50:01 CST 2009 starting...
bsp_apicid=0x0
core0 started: 
 01SBLink=00
NC node|link=00
rs690_early_setup()
get_cpu_rev EAX=0x60f82.
CPU Rev is K8_G0.
NB Revision is A12.
k8_optimization()
rs690_por_init
sb600_early_setup()
sb600_devices_por_init()
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
sb600_pmio_por_init()
begin msr fid, vid: hi=0x32111e11, lo=0x110d000d
end msr fid, vid: hi=0x32111e11, lo=0x110d000d
needs_reset=0x0
sysinfo->nodes:  1  sysinfo->ctrl: cf188  spd_addr: ffffa348
Ram1.00
Ram2.00
sdram_set_spd_registers: paramx :000cece4
Unbuffered
400MHz
400MHz
RAM: 0x00100000 kB
Ram3
sdram_enable: tsc0[8]: 000ceda4Initializing memory:  done
Setting variable MTRR 2, base:    0MB, range: 1024MB, type WB
DQS Training:RcvrEn:Pass1: 00
 CTLRMaxDelay=14
 done
DQS Training:DQSPos: 00
TrainDQSRdWrPos: buf_a:000ce870
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
 done
DQS Training:RcvrEn:Pass2: 00
 CTLRMaxDelay=2c
 done
DQS SAVE NVRAM: c2000
DQS Training:tsc[00]=0000000018222dc5
DQS Training:tsc[01]=00000000193b8b80
DQS Training:tsc[02]=000000001942bccb
DQS Training:tsc[03]=000000003adbbca0
DQS Training:tsc[04]=000000003c135061
Ram4
v_esp=000cee78
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now 
Clearing initial memory region: Done
Uncompressing image to RAM.
Jumping to image.
coreboot-2.0.0-r4253M Tue Jul 28 03:50:01 CST 2009 booting...
Enumerating buses...
Mainboard DBM690T Enable. dev=0x00025690
dbm690t_enable, TOP MEM: msr.lo = 0x40000000, msr.hi = 0x00000000
dbm690t_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000
dbm690t_enable: uma size 0x08000000, memory start 0x38000000
enable_onboard_nic.
Init adt7461 end , status 0x02 00
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
  PCI: 00:18.3 siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] enabled
rs690_enable: dev=00027908, VID_DID=0x79101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3()
gpp_sb_init nb_dev=0x00027908, dev=0x00029b68, port=0x8
PCI: 00:00.0 [1002/7910] enabled
PCI: 00:00.0 [1002/7910] enabled next_unitid: 0015
PCI: pci_scan_bus for bus 00
rs690_enable: dev=00027908, VID_DID=0x79101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3()
gpp_sb_init nb_dev=0x00027908, dev=0x00029b68, port=0x8
PCI: 00:00.0 [1002/7910] enabled
rs690_enable: dev=00027d54, VID_DID=0x79121002
Bus-0, Dev-1, Fun-0.
PCI: 00:01.0 [1002/7912] enabled
rs690_enable: dev=000281a0, VID_DID=0x79131002
Bus-0, Dev-2,3, Fun-0. enable=1
rs690_gfx_init, nb_dev=0x00027908, dev=0x000281a0, port=0x2.
rs690_gfx_init step0.
rs690_gfx_init step1.
rs690_gfx_init step2.
rs690_gfx_init step4.
rs690_gfx_init step8.1.
rs690_gfx_init step8.2.
rs690_gfx_init step8.3.
rs690_gfx_init step8.4.
rs690_gfx_init step8.5.
rs690_gfx_init step8.6.
rs690_gfx_init step8.8.
rs690_gfx_init step8.9.
rs690_gfx_init step8.10.
rs690_gfx_init step8.11.
rs690_gfx_init step8.12.
rs690_gfx_init step8.13.
rs690_gfx_init single_port_configuration.
PcieLinkTraining port=2:lc current state=2030400
rs690_gfx_init single_port_configuration step12.
rs690_gfx_init single_port_configuration step13.
rs690_gfx_init single_port_configuration step14.
Disabling static device: PCI: 00:02.0
rs690_enable: dev=000285ec, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=0
rs690_enable: dev=00028a38, VID_DID=0x79141002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x00028a38, port=0x4
PcieLinkTraining port=4:lc current state=4000102
PcieTrainPort port=0x4 result=0
PCI: 00:04.0 subbordinate bus PCI Express
PCI: 00:04.0 [1002/7914] enabled
rs690_enable: dev=00028e84, VID_DID=0x79151002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x00028e84, port=0x5
PcieLinkTraining port=5:lc current state=4000102
PcieTrainPort port=0x5 result=0
PCI: 00:05.0 subbordinate bus PCI Express
PCI: 00:05.0 [1002/7915] enabled
rs690_enable: dev=000292d0, VID_DID=0x79161002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x000292d0, port=0x6
PcieLinkTraining port=6:lc current state=4000102
PcieTrainPort port=0x6 result=0
PCI: 00:06.0 subbordinate bus PCI Express
PCI: 00:06.0 [1002/7916] enabled
rs690_enable: dev=0002971c, VID_DID=0x79171002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x0002971c, port=0x7
PcieLinkTraining port=7:lc current state=a0b0f10
addr=e0000004,bus=0,devfn=38
PcieTrainPort reg=0x0
PcieTrainPort port=0x7 result=1
PCI: 00:07.0 subbordinate bus PCI Express
PCI: 00:07.0 [1002/7917] enabled
rs690_enable: dev=00029b68, VID_DID=0x79181002
Bus-0, Dev-8, Fun-0. enable=0
disable_pcie_bar3()
sb600_enable()
PCI: 00:12.0 [1002/4380] enabled
sb600_enable()
PCI: 00:13.0 [1002/4387] enabled
sb600_enable()
PCI: 00:13.1 [1002/4388] enabled
sb600_enable()
PCI: 00:13.2 [1002/4389] enabled
sb600_enable()
PCI: 00:13.3 [1002/438a] enabled
sb600_enable()
PCI: 00:13.4 [1002/438b] enabled
sb600_enable()
PCI: 00:13.5 [1002/4386] enabled
sb600_enable()
PCI: 00:14.0 [1002/4385] enabled
sb600_enable()
PCI: 00:14.1 [1002/438c] enabled
sb600_enable()
PCI: 00:14.2 [1002/4383] enabled
sb600_enable()
PCI: 00:14.3 [1002/438d] enabled
sb600_enable()
PCI: 00:14.4 [1002/4384] enabled
sb600_enable()
PCI: 00:14.5 [1002/4382] enabled
sb600_enable()
PCI: 00:14.6 [1002/438e] enabled
PCI: pci_scan_bus for bus 01
rs690_internal_gfx_enable dev=0x00029fb8, nb_dev=0x00027908.
nb_dev, 0x8c=0x10002333
PCI: 01:05.0 [1002/791f] enabled
PCI: 01:05.2 [1002/7919] enabled
PCI: pci_scan_bus returning with max=001
PCI: pci_scan_bus for bus 02
PCI: pci_scan_bus returning with max=002
PCI: pci_scan_bus for bus 03
PCI: pci_scan_bus returning with max=003
PCI: pci_scan_bus for bus 04
PCI: pci_scan_bus returning with max=004
PCI: pci_scan_bus for bus 05
PCI: 05:00.0 [14e4/169d] enabled
PCI: pci_scan_bus returning with max=005
PCIe: tuning PCI: 05:00.0
smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled
PNP: 002e.0 disabled
PNP: 002e.1 enabled
PNP: 002e.2 disabled
PNP: 002e.3 disabled
PNP: 002e.4 disabled
PNP: 002e.5 enabled
PNP: 002e.6 enabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.a disabled
PCI: pci_scan_bus for bus 06
PCI: 06:05.0 [1106/3038] enabled
PCI: 06:05.1 [1106/3038] enabled
PCI: 06:05.2 [1106/3104] enabled
PCI: pci_scan_bus returning with max=006
PCI: pci_scan_bus returning with max=006
PCI: pci_scan_bus returning with max=006
done
Allocating resources...
Reading resources...
PCI: 00:00.0 register 1c(e0000004), read-only ignoring it
rs690_gfx_read_resources.
PCI: 00:04.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:04.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:04.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:05.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:05.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:05.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:06.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:06.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:06.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:07.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:07.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:14.4 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 06 prefmem
Done reading resources.
Allocating VGA resource PCI: 01:05.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Setting resources...
0: mmio_basek=003c0000, basek=00000300, limitk=00100000
VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 0>
PCI: 00:18.0 1b8 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 prefmem <node 0 link 0>
PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fc4fffff] size 0x00500000 gran 0x14 mem <node 0 link 0>
PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00fc000000 - 0x00fc1fffff] size 0x00200000 gran 0x14 bus 01 mem
PCI: 01:05.0 10 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x1b prefmem64
PCI: 01:05.0 18 <- [0x00fc100000 - 0x00fc10ffff] size 0x00010000 gran 0x10 mem64
PCI: 01:05.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:05.0 24 <- [0x00fc000000 - 0x00fc0fffff] size 0x00100000 gran 0x14 mem
PCI: 01:05.0 30 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x00 romem
PCI: 01:05.2 10 <- [0x00fc110000 - 0x00fc113fff] size 0x00004000 gran 0x0e mem64
PCI: 00:07.0 20 <- [0x00fc200000 - 0x00fc2fffff] size 0x00100000 gran 0x14 bus 05 mem
PCI: 05:00.0 10 <- [0x00fc200000 - 0x00fc20ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:12.0 10 <- [0x0000003020 - 0x0000003027] size 0x00000008 gran 0x03 io
PCI: 00:12.0 14 <- [0x0000003060 - 0x0000003063] size 0x00000004 gran 0x02 io
PCI: 00:12.0 18 <- [0x0000003030 - 0x0000003037] size 0x00000008 gran 0x03 io
PCI: 00:12.0 1c <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io
PCI: 00:12.0 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io
PCI: 00:12.0 24 <- [0x00fc409000 - 0x00fc4093ff] size 0x00000400 gran 0x0a mem
PCI: 00:13.0 10 <- [0x00fc404000 - 0x00fc404fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.1 10 <- [0x00fc405000 - 0x00fc405fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00fc406000 - 0x00fc406fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.3 10 <- [0x00fc407000 - 0x00fc407fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.4 10 <- [0x00fc408000 - 0x00fc408fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.5 10 <- [0x00fc40a000 - 0x00fc40a0ff] size 0x00000100 gran 0x08 mem
ERROR: PCI: 00:14.0 74 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:14.0 14 mem size: 0x0000000400 not assigned
ERROR: PCI: 00:14.0 10 io size: 0x0000000010 not assigned
PCI: 00:14.1 10 <- [0x0000003040 - 0x0000003047] size 0x00000008 gran 0x03 io
PCI: 00:14.1 14 <- [0x0000003080 - 0x0000003083] size 0x00000004 gran 0x02 io
PCI: 00:14.1 18 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io
PCI: 00:14.1 1c <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:14.1 20 <- [0x0000003010 - 0x000000301f] size 0x00000010 gran 0x04 io
PCI: 00:14.2 10 <- [0x00fc400000 - 0x00fc403fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 a0 <- [0x00fc40d000 - 0x00fc40d01f] size 0x00000020 gran 0x05 mem
PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PCI: 00:14.4 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 06 io
PCI: 00:14.4 20 <- [0x00fc300000 - 0x00fc3fffff] size 0x00100000 gran 0x14 bus 06 mem
PCI: 06:05.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 06:05.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io
PCI: 06:05.2 10 <- [0x00fc300000 - 0x00fc3000ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.5 10 <- [0x00fc40b000 - 0x00fc40b0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.6 10 <- [0x00fc40c000 - 0x00fc40c0ff] size 0x00000100 gran 0x08 mem
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:00.0 subsystem <- 1022/3050
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 000b
PCI: 00:01.0 cmd <- 07
PCI: 01:05.0 subsystem <- 1022/3050
PCI: 01:05.0 cmd <- 03
PCI: 01:05.2 cmd <- 02
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 00
PCI: 00:05.0 bridge ctrl <- 0003
PCI: 00:05.0 cmd <- 00
PCI: 00:06.0 bridge ctrl <- 0003
PCI: 00:06.0 cmd <- 00
PCI: 00:07.0 bridge ctrl <- 0003
PCI: 00:07.0 cmd <- 06
PCI: 05:00.0 cmd <- 02
PCI: 00:12.0 cmd <- 03
PCI: 00:13.0 subsystem <- 1022/3050
PCI: 00:13.0 cmd <- 02
PCI: 00:13.1 subsystem <- 1022/3050
PCI: 00:13.1 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/3050
PCI: 00:13.2 cmd <- 02
PCI: 00:13.3 subsystem <- 1022/3050
PCI: 00:13.3 cmd <- 02
PCI: 00:13.4 subsystem <- 1022/3050
PCI: 00:13.4 cmd <- 02
PCI: 00:13.5 subsystem <- 1022/3050
PCI: 00:13.5 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/3050
PCI: 00:14.0 cmd <- 403
PCI: 00:14.1 subsystem <- 1022/3050
PCI: 00:14.1 cmd <- 01
PCI: 00:14.2 subsystem <- 1022/3050
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/3050
PCI: 00:14.3 cmd <- 0f
sb600 lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff
sb600 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
sb600 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 07
PCI: 06:05.0 cmd <- 01
PCI: 06:05.1 cmd <- 01
PCI: 06:05.2 cmd <- 02
PCI: 00:14.5 subsystem <- 1022/3050
PCI: 00:14.5 cmd <- 02
PCI: 00:14.6 subsystem <- 1022/3050
PCI: 00:14.6 cmd <- 02
PCI: 00:18.1 subsystem <- 1022/3050
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/3050
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor AMD device 60f82
CPU: family 0f, model 68, stepping 02
Enabling cache

Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range: 1024MB, type WB
Setting variable MTRR 1, base: 1024MB, range:  128MB, type WB
Setting variable MTRR 2, base:  896MB, range:  128MB, type UC
DONE variable MTRRs
Clear out the extra MTRR's

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU model AMD Turion(tm) 64 X2 Mobile Technology TL-62
Setting up local apic... apic_id: 0x00 done.
ECC Disabled
CPU #0 initialized
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 60f82
CPU: family 0f, model 68, stepping 02
Enabling cache

Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range: 1024MB, type WB
Setting variable MTRR 1, base: 1024MB, range:  128MB, type WB
Setting variable MTRR 2, base:  896MB, range:  128MB, type UC
DONE variable MTRRs
Clear out the extra MTRR's

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU model AMD Turion(tm) 64 X2 Mobile Technology TL-62
Setting up local apic... apic_id: 0x01 done.
CPU #1 initialized
All AP CPUs stopped
PCI: 00:18.0 init
PCI: 00:00.0 init
pcie_init in rs690_ht.c
PCI: 01:05.0 init
internal_gfx_pci_dev_init device=791f, vendor=1002, vga_rom_address=0xfff00000.
On mainboard, rom address for PCI: 01:05.0 = fff00000
Device or Vendor ID mismatch Vendor 1106, Device 3038
PCI: 00:12.0 init
No Primary Master SATA drive on Slot0
No Primary Slave SATA drive on Slot1
No Secondary Master SATA drive on Slot2
No Secondary Slave SATA drive on Slot3
PCI: 00:13.0 init
PCI: 00:13.1 init
PCI: 00:13.2 init
PCI: 00:13.3 init
PCI: 00:13.4 init
PCI: 00:13.5 init
usb2_bar0=fc40a000
PCI: 00:14.0 init
sm_init().
lapicid = 0000000000000000
set power on after power fail
++++++++++no set NMI+++++
RTC Init
3.11, ABCFG:0x54
3.12, ABCFG:0x54
sm_init() end
PCI: 00:14.1 init
On mainboard, rom address for PCI: 00:14.1 = 0
PCI: 00:14.2 init
base = fc400000
codec_mask = 04
codec viddid: 10ec0882
Dev=PCI: 00:14.2
Default viddid=10ec0882
Reading viddid=10ec0882
verb_size: 48
verb loaded!
PCI: 00:14.3 init
PNP: 002e.1 init
PNP: 002e.5 init
Keyboard init...
Keyboard selftest failed ACK: 0xfe
PNP: 002e.6 init
PCI: 00:14.4 init
PCI: 00:18.1 init
On mainboard, rom address for PCI: 00:18.1 = 0
PCI: 00:18.2 init
On mainboard, rom address for PCI: 00:18.2 = 0
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
PCI: 01:05.2 init
On card, rom address for PCI: 01:05.2 = 0
PCI: 05:00.0 init
On card, rom address for PCI: 05:00.0 = 0
PCI: 06:05.0 init
On card, rom address for PCI: 06:05.0 = 0
PCI: 06:05.1 init
On card, rom address for PCI: 06:05.1 = 0
PCI: 06:05.2 init
On card, rom address for PCI: 06:05.2 = 0
Devices initialized
High Tables Base is 3fff0000.
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0x3fff0000...write_pirq_routing_table done.
ACPI: Writing ACPI tables at 3fff0400...
ACPI:    * HPET
ACPI: added table 1/9 Length now 40
ACPI:    * MADT
ACPI: added table 2/9 Length now 44
ACPI:    * SSDT
processor_brand=AMD Turion(tm) 64 X2 Mobile Technology TL-62
Pstates Algorithm ...
Pstate_freq[0] = 2100MHz	Pstate_vid[0] = 19	Pstate_volt[0] = 1075mv	Pstate_power[0] = 35
000mw
Pstate_freq[1] = 2000MHz	Pstate_vid[1] = 20	Pstate_volt[1] = 1050mv	Pstate_power[1] = 31
800mw
Pstate_freq[2] = 1800MHz	Pstate_vid[2] = 21	Pstate_volt[2] = 1025mv	Pstate_power[2] = 27
274mw
Pstate_freq[3] = 1600MHz	Pstate_vid[3] = 22	Pstate_volt[3] = 1000mv	Pstate_power[3] = 23
075mw
Pstate_freq[4] = 800MHz	Pstate_vid[4] = 30	Pstate_volt[4] = 800mv	Pstate_power[4] = 7384mw
ACPI: added table 3/9 Length now 48
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * DSDT @ 3fff08ba Length 267c
ACPI:    * FADT
pm_base: 0x0800
ACPI: added table 4/9 Length now 52
ACPI: done.
Wrote the mp table end at: 00000020 - 00000134
Wrote the mp table end at: 3fff3410 - 3fff3524
Moving GDT to 0x3fff3800...ok
Multiboot Information structure has been written.
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum 83df
New low_table_end: 0x00000500
Now going to write high coreboot table at 0x3fff3c00
rom_table_end = 0x3fff3c00
Adjust low_table_end from 0x00000500 to 0x00001000 
Adjust rom_table_end from 0x3fff3c00 to 0x40000000 
Adding high table area
uma_memory_base=0x38000000, uma_memory_size=0x8000000 
Wrote coreboot table at: 3fff3c00 - 3fff3de4  checksum 3ef6

elfboot: Attempting to load payload.
rom_stream: 0xfffc0000 - 0xfffdffff
Found ELF candidate at offset 0
header_offset is 0
Try to load at offset 0x0
New segment addr 0xf0000 size 0x10000 offset 0x1000 filesize 0x10000
(cleaned up) New segment addr 0xf0000 size 0x10000 offset 0x1000 filesize 0x10000
Dropping non PT_LOAD segment
Loading Segment: addr: 0x00000000000f0000 memsz: 0x0000000000010000 filesz: 0x0000000000010000
Jumping to boot code at 000fc522
Start bios
CPU Mhz=2101
bios_table_addr: 0x000fd5bc end=0x000fddbc
Found 2 cpu(s)
SMBIOS table addr=0x000fd5c0
Ram Size=0x38000000
Scan for VGA option rom
Turning on vga console
Starting SeaBIOS

Got ps2 nak (status=51); continuing
ps2_recvbyte timeout
Found 0 lpt ports
Found 1 serial ports
e820 map has 5 items:
  0: 0000000000000000 - 000000000009fc00 = 1
  1: 000000000009fc00 - 00000000000a0000 = 2
  2: 00000000000f0000 - 0000000000100000 = 2
  3: 0000000000100000 - 0000000038000000 = 1
  4: 0000000038000000 - 0000000040000000 = 2
final bios_table_addr: 0x000fd6f1 (used 15%)
ATA controller 0 at 3020/3060 (dev 90 prog_if 8f)
ATA controller 1 at 3030/3070 (dev 90 prog_if 8f)
ATA controller 2 at 1f0/3f0 (dev a1 prog_if 8a)
ATA controller 3 at 170/370 (dev a1 prog_if 8a)
powerup IDE floating
powerup IDE floating
powerup IDE floating
powerup IDE floating
powerup IDE floating
powerup IDE floating
powerup IDE floating
powerup IDE floating

Scan for option roms
Running option rom at c000:0003
hello, initialize_usb
00:13.0 4387:1002.0 OHCI controller
Not supported.
00:13.1 4388:1002.1 OHCI controller
Not supported.
00:13.2 4389:1002.2 OHCI controller
Not supported.
00:13.3 438a:1002.3 OHCI controller
Not supported.
00:13.4 438b:1002.4 OHCI controller
Not supported.
00:13.5 4386:1002.5 EHCI controller
Not supported.
00:05.0 3038:1106.0 UHCI controller



INIT detected from  --- {  APICID = 00 NODEID = 00 COREID = 00} ---

Issuing SOFT_RESET...


coreboot-2.0.0-r4253M Tue Jul 28 03:50:01 CST 2009 starting...
bsp_apicid=0x0
core0 started: 
 01SBLink=00
NC node|link=00
rs690_early_setup()
get_cpu_rev EAX=0x60f82.
CPU Rev is K8_G0.
NB Revision is A12.
k8_optimization()
rs690_por_init
sb600_early_setup()
sb600_devices_por_init()
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
sb600_pmio_por_init()
begin msr fid, vid: hi=0x32111e11, lo=0x110d000d
end msr fid, vid: hi=0x32111e11, lo=0x110d000d
needs_reset=0x0
sysinfo->nodes:  1  sysinfo->ctrl: cf188  spd_addr: ffffa348
Ram1.00
Ram2.00
sdram_set_spd_registers: paramx :000cece4
Unbuffered
400MHz
400MHz
RAM: 0x00100000 kB
Ram3
sdram_enable: tsc0[8]: 000ceda4Initializing memory:  done
Setting variable MTRR 2, base:    0MB, range: 1024MB, type WB
DQS Training:RcvrEn:Pass1: 00
 CTLRMaxDelay=14
 done
DQS Training:DQSPos: 00
TrainDQSRdWrPos: buf_a:000ce870
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
TrainDQSPos: MutualCSPassW[48] :000ce754
 done
DQS Training:RcvrEn:Pass2: 00
 CTLRMaxDelay=2c
 done
DQS SAVE NVRAM: c2000
DQS Training:tsc[00]=00000000183421d1
DQS Training:tsc[01]=00000000194e871d
DQS Training:tsc[02]=000000001955c4c0
DQS Training:tsc[03]=000000003b1db335
DQS Training:tsc[04]=000000003c54c8ec
Ram4
v_esp=000cee78
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now 
Clearing initial memory region: Done
Uncompressing image to RAM.
Jumping to image.
coreboot-2.0.0-r4253M Tue Jul 28 03:50:01 CST 2009 booting...
Enumerating buses...
Mainboard DBM690T Enable. dev=0x00025690
dbm690t_enable, TOP MEM: msr.lo = 0x40000000, msr.hi = 0x00000000
dbm690t_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000
dbm690t_enable: uma size 0x08000000, memory start 0x38000000
enable_onboard_nic.
Init adt7461 end , status 0x02 00
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
  PCI: 00:18.3 siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] enabled
rs690_enable: dev=00027908, VID_DID=0x79101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3()
gpp_sb_init nb_dev=0x00027908, dev=0x00029b68, port=0x8
PCI: 00:00.0 [1002/7910] enabled
PCI: 00:00.0 [1002/7910] enabled next_unitid: 0015
PCI: pci_scan_bus for bus 00
rs690_enable: dev=00027908, VID_DID=0x79101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3()
gpp_sb_init nb_dev=0x00027908, dev=0x00029b68, port=0x8
PCI: 00:00.0 [1002/7910] enabled
rs690_enable: dev=00027d54, VID_DID=0x79121002
Bus-0, Dev-1, Fun-0.
PCI: 00:01.0 [1002/7912] enabled
rs690_enable: dev=000281a0, VID_DID=0x79131002
Bus-0, Dev-2,3, Fun-0. enable=1
rs690_gfx_init, nb_dev=0x00027908, dev=0x000281a0, port=0x2.
rs690_gfx_init step0.
rs690_gfx_init step1.
rs690_gfx_init step2.
rs690_gfx_init step4.
rs690_gfx_init step8.1.
rs690_gfx_init step8.2.
rs690_gfx_init step8.3.
rs690_gfx_init step8.4.
rs690_gfx_init step8.5.
rs690_gfx_init step8.6.
rs690_gfx_init step8.8.
rs690_gfx_init step8.9.
rs690_gfx_init step8.10.
rs690_gfx_init step8.11.
rs690_gfx_init step8.12.
rs690_gfx_init step8.13.
rs690_gfx_init single_port_configuration.
PcieLinkTraining port=2:lc current state=2030400
rs690_gfx_init single_port_configuration step12.
rs690_gfx_init single_port_configuration step13.
rs690_gfx_init single_port_configuration step14.
Disabling static device: PCI: 00:02.0
rs690_enable: dev=000285ec, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=0
rs690_enable: dev=00028a38, VID_DID=0x79141002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x00028a38, port=0x4
PcieLinkTraining port=4:lc current state=4000102
PcieTrainPort port=0x4 result=0
PCI: 00:04.0 subbordinate bus PCI Express
PCI: 00:04.0 [1002/7914] enabled
rs690_enable: dev=00028e84, VID_DID=0x79151002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x00028e84, port=0x5
PcieLinkTraining port=5:lc current state=4000102
PcieTrainPort port=0x5 result=0
PCI: 00:05.0 subbordinate bus PCI Express
PCI: 00:05.0 [1002/7915] enabled
rs690_enable: dev=000292d0, VID_DID=0x79161002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x000292d0, port=0x6
PcieLinkTraining port=6:lc current state=4000102
PcieTrainPort port=0x6 result=0
PCI: 00:06.0 subbordinate bus PCI Express
PCI: 00:06.0 [1002/7916] enabled
rs690_enable: dev=0002971c, VID_DID=0x79171002
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
gpp_sb_init nb_dev=0x00027908, dev=0x0002971c, port=0x7
PcieLinkTraining port=7:lc current state=a0b0f10
addr=e0000004,bus=0,devfn=38
PcieTrainPort reg=0x0
PcieTrainPort port=0x7 result=1
PCI: 00:07.0 subbordinate bus PCI Express
PCI: 00:07.0 [1002/7917] enabled
rs690_enable: dev=00029b68, VID_DID=0x79181002
Bus-0, Dev-8, Fun-0. enable=0
disable_pcie_bar3()
sb600_enable()
PCI: 00:12.0 [1002/4380] enabled
sb600_enable()
PCI: 00:13.0 [1002/4387] enabled
sb600_enable()
PCI: 00:13.1 [1002/4388] enabled
sb600_enable()
PCI: 00:13.2 [1002/4389] enabled
sb600_enable()
PCI: 00:13.3 [1002/438a] enabled
sb600_enable()
PCI: 00:13.4 [1002/438b] enabled
sb600_enable()
PCI: 00:13.5 [1002/4386] enabled
sb600_enable()
PCI: 00:14.0 [1002/4385] enabled
sb600_enable()
PCI: 00:14.1 [1002/438c] enabled
sb600_enable()
PCI: 00:14.2 [1002/4383] enabled
sb600_enable()
PCI: 00:14.3 [1002/438d] enabled
sb600_enable()
PCI: 00:14.4 [1002/4384] enabled
sb600_enable()
PCI: 00:14.5 [1002/4382] enabled
sb600_enable()
PCI: 00:14.6 [1002/438e] enabled
PCI: pci_scan_bus for bus 01
rs690_internal_gfx_enable dev=0x00029fb8, nb_dev=0x00027908.
nb_dev, 0x8c=0x10002333
PCI: 01:05.0 [1002/791f] enabled
PCI: 01:05.2 [1002/7919] enabled
PCI: pci_scan_bus returning with max=001
PCI: pci_scan_bus for bus 02
PCI: pci_scan_bus returning with max=002
PCI: pci_scan_bus for bus 03
PCI: pci_scan_bus returning with max=003
PCI: pci_scan_bus for bus 04
PCI: pci_scan_bus returning with max=004
PCI: pci_scan_bus for bus 05
PCI: 05:00.0 [14e4/169d] enabled
PCI: pci_scan_bus returning with max=005
PCIe: tuning PCI: 05:00.0
smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled
PNP: 002e.0 disabled
PNP: 002e.1 enabled
PNP: 002e.2 disabled
PNP: 002e.3 disabled
PNP: 002e.4 disabled
PNP: 002e.5 enabled
PNP: 002e.6 enabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.a disabled
PCI: pci_scan_bus for bus 06
PCI: 06:05.0 [1106/3038] enabled
PCI: 06:05.1 [1106/3038] enabled
PCI: 06:05.2 [1106/3104] enabled
PCI: pci_scan_bus returning with max=006
PCI: pci_scan_bus returning with max=006
PCI: pci_scan_bus returning with max=006
done
Allocating resources...
Reading resources...
PCI: 00:00.0 register 1c(e0000004), read-only ignoring it
rs690_gfx_read_resources.
PCI: 00:04.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:04.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:04.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:05.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:05.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:05.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:06.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:06.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:06.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:07.0 1c <- [0x0001fff000 - 0x0001ffefff] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:07.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:14.4 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 06 prefmem
Done reading resources.
Allocating VGA resource PCI: 01:05.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Setting resources...
0: mmio_basek=003c0000, basek=00000300, limitk=00100000
VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 0>
PCI: 00:18.0 1b8 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 prefmem <node 0 link 0>
PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fc4fffff] size 0x00500000 gran 0x14 mem <node 0 link 0>
PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00fc000000 - 0x00fc1fffff] size 0x00200000 gran 0x14 bus 01 mem
PCI: 01:05.0 10 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x1b prefmem64
PCI: 01:05.0 18 <- [0x00fc100000 - 0x00fc10ffff] size 0x00010000 gran 0x10 mem64
PCI: 01:05.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:05.0 24 <- [0x00fc000000 - 0x00fc0fffff] size 0x00100000 gran 0x14 mem
PCI: 01:05.0 30 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x00 romem
PCI: 01:05.2 10 <- [0x00fc110000 - 0x00fc113fff] size 0x00004000 gran 0x0e mem64
PCI: 00:07.0 20 <- [0x00fc200000 - 0x00fc2fffff] size 0x00100000 gran 0x14 bus 05 mem
PCI: 05:00.0 10 <- [0x00fc200000 - 0x00fc20ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:12.0 10 <- [0x0000003020 - 0x0000003027] size 0x00000008 gran 0x03 io
PCI: 00:12.0 14 <- [0x0000003060 - 0x0000003063] size 0x00000004 gran 0x02 io
PCI: 00:12.0 18 <- [0x0000003030 - 0x0000003037] size 0x00000008 gran 0x03 io
PCI: 00:12.0 1c <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io
PCI: 00:12.0 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io
PCI: 00:12.0 24 <- [0x00fc409000 - 0x00fc4093ff] size 0x00000400 gran 0x0a mem
PCI: 00:13.0 10 <- [0x00fc404000 - 0x00fc404fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.1 10 <- [0x00fc405000 - 0x00fc405fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00fc406000 - 0x00fc406fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.3 10 <- [0x00fc407000 - 0x00fc407fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.4 10 <- [0x00fc408000 - 0x00fc408fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.5 10 <- [0x00fc40a000 - 0x00fc40a0ff] size 0x00000100 gran 0x08 mem
ERROR: PCI: 00:14.0 74 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:14.0 14 mem size: 0x0000000400 not assigned
ERROR: PCI: 00:14.0 10 io size: 0x0000000010 not assigned
PCI: 00:14.1 10 <- [0x0000003040 - 0x0000003047] size 0x00000008 gran 0x03 io
PCI: 00:14.1 14 <- [0x0000003080 - 0x0000003083] size 0x00000004 gran 0x02 io
PCI: 00:14.1 18 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io
PCI: 00:14.1 1c <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:14.1 20 <- [0x0000003010 - 0x000000301f] size 0x00000010 gran 0x04 io
PCI: 00:14.2 10 <- [0x00fc400000 - 0x00fc403fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 a0 <- [0x00fc40d000 - 0x00fc40d01f] size 0x00000020 gran 0x05 mem
PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PCI: 00:14.4 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 06 io
PCI: 00:14.4 20 <- [0x00fc300000 - 0x00fc3fffff] size 0x00100000 gran 0x14 bus 06 mem
PCI: 06:05.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 06:05.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io
PCI: 06:05.2 10 <- [0x00fc300000 - 0x00fc3000ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.5 10 <- [0x00fc40b000 - 0x00fc40b0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.6 10 <- [0x00fc40c000 - 0x00fc40c0ff] size 0x00000100 gran 0x08 mem
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:00.0 subsystem <- 1022/3050
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 000b
PCI: 00:01.0 cmd <- 07
PCI: 01:05.0 subsystem <- 1022/3050
PCI: 01:05.0 cmd <- 03
PCI: 01:05.2 cmd <- 02
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 00
PCI: 00:05.0 bridge ctrl <- 0003
PCI: 00:05.0 cmd <- 00
PCI: 00:06.0 bridge ctrl <- 0003
PCI: 00:06.0 cmd <- 00
PCI: 00:07.0 bridge ctrl <- 0003
PCI: 00:07.0 cmd <- 06
PCI: 05:00.0 cmd <- 02
PCI: 00:12.0 cmd <- 03
PCI: 00:13.0 subsystem <- 1022/3050
PCI: 00:13.0 cmd <- 02
PCI: 00:13.1 subsystem <- 1022/3050
PCI: 00:13.1 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/3050
PCI: 00:13.2 cmd <- 02
PCI: 00:13.3 subsystem <- 1022/3050
PCI: 00:13.3 cmd <- 02
PCI: 00:13.4 subsystem <- 1022/3050
PCI: 00:13.4 cmd <- 02
PCI: 00:13.5 subsystem <- 1022/3050
PCI: 00:13.5 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/3050
PCI: 00:14.0 cmd <- 403
PCI: 00:14.1 subsystem <- 1022/3050
PCI: 00:14.1 cmd <- 01
PCI: 00:14.2 subsystem <- 1022/3050
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/3050
PCI: 00:14.3 cmd <- 0f
sb600 lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff
sb600 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
sb600 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 07
PCI: 06:05.0 cmd <- 01
PCI: 06:05.1 cmd <- 01
PCI: 06:05.2 cmd <- 02
PCI: 00:14.5 subsystem <- 1022/3050
PCI: 00:14.5 cmd <- 02
PCI: 00:14.6 subsystem <- 1022/3050
PCI: 00:14.6 cmd <- 02
PCI: 00:18.1 subsystem <- 1022/3050
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/3050
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor AMD device 60f82
CPU: family 0f, model 68, stepping 02
Enabling cache

Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range: 1024MB, type WB
Setting variable MTRR 1, base: 1024MB, r


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