[coreboot] [patch][v2]:fam10 microcode
marcj303 at gmail.com
Tue Jun 2 18:39:56 CEST 2009
On Tue, Jun 2, 2009 at 9:57 AM, Ward Vandewege <ward at gnu.org> wrote:
> Hey Marc et al,
> I just received a h8dmr box with quad core CPUs (2372HE) and 32GB of ram. I
> hacked up an h8dmr-fam10 patch which boots but still has tons of issues. Boot
> log here:
> First problem is that it complains about not finding the microcode rev id. So
> I found the message below - did you ever get around to doing this?
> I also modified coreboot a little to print out the CPU version id (0x10042),
> which is not yet listed in amd/amdfam10/raminit_amdmct.c.
We added for one of the C2 parts. It should be easy enough to add the other one.
You will also need to change Options.lb for the C2 microcode.
Shanghai rev DA-C2: "mc_patch_0100009f.h"
> A little further down in the log it seems I've got multiple cores talking at
> once so that's something else I'll need to figure out.
Yes, that stuff should be fine.
> It does actually get all the way to CBFS, but hangs after loadking the first
> stage. There is also some slowness during/after ram detection.
There is slowness around the cache disable / mem copy.. I think that
someone posted a fix to the list at one point. It would require some
> Any hints on where I should look to fix those things would be welcome :)
> On Wed, Mar 25, 2009 at 09:49:42AM -0600, Marc Jones wrote:
>> 2009/3/24 Bao, Zheng <Zheng.Bao at amd.com>:
>> > Attached are the latest ucode patches for Family 10h:
>> > 9fh for RB/BL/DA Rev C;
>> > 96h for DR Rev B.
>> > Signed-off-by: <zheng.bao at amd.com>
>> Acked-by: Marc Jones <marcj303 at gmail.com>
>> I will work up a patch for the fam10 mainboards to use these new
>> microcode files.
>> coreboot mailing list: coreboot at coreboot.org
> Ward Vandewege <ward at gnu.org>
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