[coreboot] [patch][v2]:fam10 microcode
Ward Vandewege
ward at gnu.org
Tue Jun 2 19:35:33 CEST 2009
On Tue, Jun 02, 2009 at 10:39:56AM -0600, Marc Jones wrote:
> We added for one of the C2 parts. It should be easy enough to add the other one.
> You will also need to change Options.lb for the C2 microcode.
> Shanghai rev DA-C2: "mc_patch_0100009f.h"
Great, I made those changes, and the microcode update happens now. It also
stopped complaining about the CPU version. Booting does not get very far
anymore though, so I must be doing something wrong:
------------------------------------------------------------------------------
coreboot-2.0.0-r4329M_h8dmr_Fallback Tue Jun 2 13:24:42 EDT 2009 starting...
BSP Family_Model: 00100f42
*sysinfo range: [000cc000,000cdfa0]
bsp_apicid = 00
cpu_init_detectedx = 00000000
microcode: equivalent rev id = 0x1062, current patch id = 0x00000000
microcode: patch id to apply = 0x0100009f
microcode: updated to patch id = 0x0100009f success
cpuSetAMDMSR done
Enter amd_ht_init()
AMD_CB_EventNotify()
event class: 05
event: 1004
data: 04 00 00 01
AMD_CB_EventNotify()
event class: 05
event: 2006
data: 04 00 02 00
Exit amd_ht_init()
cpuSetAMDPCI 00 done
cpuSetAMDPCI 01
------------------------------------------------------------------------------
It hangs right there. This started happening when I added
case 0x10042:
ret = AMD_RB_C2;
break;
to the switch statement in mctGetLogicalCPUID
(northbridge/amd/amdfam10/raminit_amdmct.c), telling coreboot about this CPU
version.
If I remove that part again, the system reboots endlessly (this is with the
microcode update now working, and the change in Options.lb that you
suggested):
http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-j.cap
Thoughts?
Thanks,
Ward.
--
Ward Vandewege <ward at gnu.org>
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