[coreboot] GSOC USBROM linking problem

[Marc Jones]

On Wed, Jun 17, 2009 at 11:18 AM, ron minnich<rminnich at gmail.com> wrote:
> On Wed, Jun 17, 2009 at 10:15 AM, Marc Jones<marcj303 at gmail.com> wrote:
>> On Wed, Jun 17, 2009 at 11:05 AM, ron minnich<rminnich at gmail.com> wrote:
>>> -fpic is the wrong way to go ... can we talk about this relocatable
>>> code a bit? I need to catch up.
>>
>>
>> The code is a PCI option ROM that can be copied and run at some
>> arbitrary location between 0xC0000 and 0x100000. For 16bit code the
>> segment would be loaded and there is no problem. I don't know the
>> right way to do this for 32bit flat mode code.
>
> I think we need to seek a common solution, and after discussion with
> segher from a while back I think -fpic and -fpie as we do it in v3 are
> rather questionable.
>
> What we should look to do is a run command which sets a new entry in
> the gdt and does a ljmp which sets CS to that entry. Then we link with
> that code to run at 0. This is what FILO does and it works well.
>

Ron,
That is a much better solution.

Jason,
Let me know if you need help with that.

We should probably make a wiki article about it since it seems to come
up now and then.

Marc


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