[coreboot] Flashrom support for EPIA-N(L) - patch for review

[Luc Verhaegen]

On Wed, Jun 17, 2009 at 12:36:41PM +0100, Harrison, Jon (SELEX GALILEO, UK) wrote:
> Hi Guys,
> 
> See below patch for flashrom to add support for EPIA-N(L) Programming.
> 
> This has been built against R599 and tested for read, write and verify
> on an EPIA-NL 800
> 
> Seems to work for me!
> 
> Regards,
> Jon
> 
> 
>  Index: util/flashrom/board_enable.c
> ===================================================================
> --- util/flashrom/board_enable.c	(revision 599)
> +++ util/flashrom/board_enable.c	(working copy)
> @@ -270,6 +270,44 @@
>  }
>  
>  /**
> + * Suited for VIAs EPIA N & NL.
> + */
> +static int board_via_epia_n(const char *name)
> +{
> +	struct pci_dev *dev;
> +	uint16_t base;
> +	uint8_t val;
> +
> +	dev = pci_dev_find(0x1106, 0x3227);	/* VT8237R ISA bridge */
> +	if (!dev) {
> +		fprintf(stderr, "\nERROR: VT8237R ISA bridge not
> found.\n");
> +		return -1;
> +	}
> +
> +	/* All memory cycles, not just ROM ones, go to LPC */
> +	val = pci_read_byte(dev, 0x59);
> +	val &= ~0x80;
> +	pci_write_byte(dev, 0x59, val);
> +	
> +	/* GPIO9 -> output */
> +	val = pci_read_byte(dev, 0xE4);
> +	//printf("GPO Pin Select Reg = 0x%02X\n", val);
> +	val |= 0x20;
> +	pci_write_byte(dev, 0xE4, val);
> +
> +	/* Get Power Management IO address. */
> +	base = pci_read_word(dev, 0x88) & 0xFF80;
> +
> +	/* Enable GPIO9 which is connected to write protect. */
> +	val = INB(base + 0x4D);
> +	//printf("PMM GPIO = 0x%02X\n", val);
> +	val |= 0x02;
> +	OUTB(val, base + 0x4D);
> +
> +	return 0;
> +}
> +

Please use
	vt823x_set_all_writes_to_lpc
and
	vt823x_gpio_set

I will verify and fix gpio_set for setting other gpio lines than 12-15, 
in the next hour or so.

Remove the //printf.

> +	{0x1106, 0x0259, 0x1106, 0xaa08,  0x1106, 0x3227, 0x1106,
> 0xAA08, "via",        "epia-n",      "VIA",         "EPIA-N/NL",
> board_via_epia_n},

Please remove the coreboot ids. This hardware can be autodetected, and 
you should not disable rom access in your upcoming coreboot support, and 
therefor will not need this board enable.

So NACK on this first pass, but will ack once issues are addressed, and 
once vt823x_gpio_set is fixed.

Luc Verhaegen.