[coreboot] locking...

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Fri Jun 19 23:57:52 CEST 2009

On 19.06.2009 19:08, Myles Watson wrote:
>>> This should only matter for the time during RAM, right?  Is it a larger
>>> issue?
>> Once we have printk in CAR for almost all CPUs, it matters even for CAR
>> stage.
> I meant the RAM init time when you're in CAR.  After CAR the APs should be
> stopped until CPU init time, which is relatively short.

Ah. That part was never clear to me. Thanks for the info.

>> Do you know of an example
>> fur such a MMIO area for the K8 with 690/SB600? That would help me
>> implement a proof of concept.
> From the BKD for Opterons:
> 3.5.13 Scratch Register
> Scratch Register Function 2: Offset 9Ch
> Bits Mnemonic Function R/W Reset
> 31-0 Data Scratch Data R/W 0h
> Field Descriptions
> Scratch Data (Data)-Bits 31-0.
> So you get one per socket, first one at PCI_DEV(0,0x18,2) 0x9C

AFAICS this is not MMIO, so it's unusable for locking. I did look at the
Family 0Fh BKDG. Should I have looked elsewhere?



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