[coreboot] coreboot initialization problems

[Leandro Dorileo]

Hi

I`m running coreboot with an asus a8v-e Deluxe, my processor is an
athlon 64 3000+ with 512Mb of RAM.
When initializing coreboot I get the following output in the serial
debug output.

Talking to Carl-Daniel he found weird the like stating "INIT
detected", he says it looks really suspicious and he gets this kind of
log message only "if something is really horribly wrong".

Log message as follows:


coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009
starting...
now booting... fallback


coreboot-2.0.0-r4368M.0Normal Dom Jun 21 19:41:47 AMT 2009 starting...
now booting... real_main



INIT detected from  --- {  APICID = 00 NODEID = 00 COREID = 00} ---

Issuing SOFT_RESET...
soft reset


coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009
starting...
now booting... fallback


coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009
starting...
now booting... real_main
Enabling routing table for node 00 done.
Enabling UP settings
Disabling read/write/fill probes for UP... done.
coherent_ht_finalize
done
core0 started:
now booting... Core0 started
started ap apicid:
SBLink=00
NC node|link=00
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x35
pos=0x6e, unfiltered freq_cap=0x75
pos=0x6e, filtered freq_cap=0x75
freq_cap1=0x35, freq_cap2=0x75
dev1 old_freq=0x6, freq=0x5, needs_reset=0x1
dev2 old_freq=0x6, freq=0x5, needs_reset=0x1
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x1
after optimize_link_read_pointers_chain, reset_needed=0x1
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq:
05 VIA HT caps: 0075
ht reset -
soft reset


coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009
starting...
now booting... fallback


coreboot-2.0.0-r4368M.0Normal Dom Jun 21 19:41:47 AMT 2009 starting...
now booting... real_main
Enabling routing table for node 00 done.
Enabling UP settings
Disabling read/write/fill probes for UP... done.
coherent_ht_finalize
done
core0 started:
now booting... Core0 started
started ap apicid:
SBLink=00
NC node|link=00
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x35
pos=0x6e, unfiltered freq_cap=0x75
pos=0x6e, filtered freq_cap=0x75
freq_cap1=0x35, freq_cap2=0x75
dev1 old_freq=0x5, freq=0x5, needs_reset=0x0
dev2 old_freq=0x5, freq=0x5, needs_reset=0x0
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x0
after optimize_link_read_pointers_chain, reset_needed=0x0
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq:
05 VIA HT caps: 0075
Current fid_cur: 0xa, fid_max: 0xa
Requested fid_new: 0xa
Ram1.00
setting up CPU00 northbridge registers
done.
Ram2.00
Device error
Device error
Device error
Unbuffered
200Mhz
Interleaved
RAM end at 0x00080000 kB
Lower RAM end at 0x00080000 kB
Ram3
Initializing memory:  done
Ram4
v_esp=000cee78
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack...
Done
testx = 5a5a5a5a
Disabling cache as ram now
Clearing initial memory region:



Regards....

-- 
(°=   Leandro Dorileo
//\    ldorileo at gmail.com   -   http://www.dorilex.net
V_/  Software is a matter of freedom.