[coreboot] coreboot for C3/CN400 (Luke)

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Wed Jun 24 12:31:34 CEST 2009

On 24.06.2009 12:17, Harrison, Jon (SELEX GALILEO, UK) wrote:
> I've made a bit of progress, now getting beyond the basic RAM init.

RAM init is one of the big obstacles in finishing a port. If RAM works
reliably for you, please send your code to the list.



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