[coreboot] coreboot+seabios+gpxe

Kevin O'Connor kevin at koconnor.net
Wed Mar 4 01:26:42 CET 2009

Hi Joe,

I'm CC'ing the coreboot mailing list.

On Tue, Mar 03, 2009 at 03:21:00PM -0800, Joe Julian wrote:
> I'm attempting to duplicate your results and was wondering about the  
> OPTIONROM defines you mentioned on the coreboot mailing list:
> #define OPTIONROM_BDF_1 0x0100
> #define OPTIONROM_MEM_1 0xfffc0000
> #define OPTIONROM_BDF_2 0x0048
> #define OPTIONROM_MEM_2 0xfffcf800
> Where do those addresses come from?

The values are where the rom can be found in physical memory, and
which PCI device they correspond to.

It's now possible to use a helper function when setting the BDF
values, so an equivalent of the above is:

#define OPTIONROM_BDF_1 pci_to_bdf(0x01, 0x00, 0)
#define OPTIONROM_MEM_1 0xfffc0000
#define OPTIONROM_BDF_2 pci_to_bdf(0x00, 0x09, 0)
#define OPTIONROM_MEM_2 0xfffcf800

To find the PCI addresses, look at the lspci and find the device ids.
On my machine they are from:

01:00.0 VGA compatible controller: VIA Technologies, Inc...
00:09.0 Ethernet controller: Realtek Semiconductor Co...

For the memory addresses, I have a 256KiB chip, and the first rom is
located at the start of the chip - so it is 0x100000000 - 0x40000 =

> Do you still load the video bios in coreboot?

No - I have SeaBIOS load and execute all the roms.


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