[coreboot] the seabios reboot in the post process

Kevin O'Connor kevin at koconnor.net
Wed Mar 18 15:44:26 CET 2009

On Wed, Mar 18, 2009 at 08:32:42AM +0000, wei yang wrote:
> Hi, Kevin
> I found a issue, may it be a bug of SeaBIOS.  As previous mail
> mentioned, I met the PIRQ problem. So I put the the ACPI tables into
> coreboot and still take seabios as the payload.  Then I still found
> the problem existed. I checked the 0xF0000 Section. Before Payload
> loaded, the DSDP, DSDT, etc ACPI tables are correctly existed in the
> F section. After SeaBios loaded, the 0xF0000 section had been
> rewroten.  I checked the *.ld.s, romlayout.S, config.h, the SeaBios
> actually need to put into the 0xF0000 section due to the code
> orgination and its BIOS aim.
> So here, I have a question in the mind, how does the SeaBIOS boot
> the linux with ACPI enabled type.

Coreboot needs to have the HAVE_HIGH_TABLES option set.  This will
tell coreboot to place the tables in the top 64K of ram.  Once this is
done, SeaBIOS will copy the tables to 0xf0000 that need to exist


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