[coreboot] DL145G3
Peter Stuge
peter at stuge.se
Fri Mar 27 17:57:48 CET 2009
Stefan Reinauer wrote:
> > The patch is probably not ready for primetime, maybe someone can
> > review it?
Correct - but we can probably clean it up and commit easily if
someone with hardware access comes to #coreboot on irc.freenode.org.
> > + outb(0x44, 0x0cd6);
> > + b = inb(0x0cd7) | 0x24;
> > + outb(b, 0x0cd7);
>
> Any chance to find out what hardware is listening at 0xcd6/0xcd7?
We must. As it stands this is not going in.
> Is that covered by PMBASE or GPIOBASE of the southbridge, or the
> SuperIO?
Did it have Intel south? Will check.
//Peter
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