[coreboot] [flashrom] Transaction Error with opcode 0x03 failed...

Stan Yong stanne at gmail.com
Thu May 7 14:23:51 CEST 2009


Thanks for the explanation. After looking at the ICH9 specification, i'm
thinking of modifying the FRAP register value in order to enable write and
read permission to all the region. However, i have a question:

How to exactly use flashrom to bring the SPI into descriptor mode so that i
can do a read and write to FRAP? Or is that even possible?


On Wed, May 6, 2009 at 11:41 PM, FENG Yu Ning <fengyuning1984 at gmail.com>wrote:

> Stan Yong wrote:
> > I'm having problems with the flashrom on my system. ...
> > Can provide some advice on this?
> I can only tell the reason. Your current BIOS prevents flashrom from
> reading certain part of the flash chip. I don't know if there is any
> way to bypass that setting.
> If you are interested in further explanation on the flashrom output,
> please read on.
> > ich_spi_read_page: offset=45056, number=256, buf=0163B020
> > BBAR: 0x0
> > Transaction error!
> > run OPCODE 0x03 failed
> > Error readingdone.
> Error occurs here, when flashrom tries to read data at offset 45056
> from the flash chip. 45056(dec) = b000(hex).
> Look at FREG2.
> > 0x5C: 0x023f000b (FREG2)
> The value 0x0(23f)0(00b) means, the area in the flash chip from
> 0x00(00b)000 to 0x00(23f)fff belongs to (F)lash (REG)ion (2), which
> stores data for the "Management Engine". That is, flashrom runs into
> error when it is trying to read FREG2.
> Now look at FRAP.
> > 0x50: 0x00001a1b (FRAP)
> The least significant byte '1b' indicates which regions software can
> read. Expand it to binary, 00011011. That means the software can read
> FREG0, FREG1, FREG3 and FREG4 but not FREG2. That is why flashrom runs
> into error at offset 45056.
> yu ning
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