[coreboot] [PATCH] flashrom: Handle one-byte SPI writes

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Fri May 8 02:12:00 CEST 2009


Hi,

On 08.05.2009 01:05, stephan.guilloux at free.fr wrote:
> This might work, but, if I can say, I don't like the idea of renaming the
> ich_spi_write to ich_spi_write_256.
>
> 1) ich_spi_write() looks to be the generic one, then, this one has the good
> name.
>   

The big problem is that the standard says something about 1-byte writes
being the default. Many vendors extended that to 256-byte writes (or 16
or even full-chip), depending on the exact flash chip model.

> 2) ich_spi_write() should already use something, stored in the relevant
> flashchips[] item, to perform byte, page sector or block write operations. If we
> come to make it more "generic", all will have to be renamed back again.
>   

Indeed. We should add more info to struct flashchip. Realistically, that
will only happen after my dozen pending flashrom patches (cleanup,
bugfixes and architecture iprovements) are merged.

Regards,
Carl-Daniel

> Selon Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>:
>
>   
>> Chips like the SST SST25VF080B can only handle single byte writes
>> outside AAI mode.
>>
>> Change SPI architecture to handle 1-byte chunk chip writing differently
>> from 256-byte chunk chip writing.
>>
>> Convert all flashchips.c entries with SPI programing to the 256-byte
>> version by default.
>>
>> Change the flashchips entry for SST SST25VF080B to 1-byte writing.
>>     

-- 
http://www.hailfinger.org/





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