[coreboot] [PATCH] flashrom: Downgrade all SST25* chips to 1-byte write

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Tue May 12 23:42:52 CEST 2009


SST25 chips do not support page program, only byte program.

Downgrade the chips from 256-byte writes to 1-byte writes. This fixes
writing to them on ICH/VIA SPI masters.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-sst_1byte_write/flashchips.c
===================================================================
--- flashrom-sst_1byte_write/flashchips.c	(Revision 498)
+++ flashrom-sst_1byte_write/flashchips.c	(Arbeitskopie)
@@ -1168,7 +1168,7 @@
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.erase		= spi_chip_erase_c7,
-		.write		= spi_chip_write_256,
+		.write		= spi_chip_write_1,
 		.read		= spi_chip_read,
 	},
 
@@ -1182,7 +1182,7 @@
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.erase		= spi_chip_erase_c7,
-		.write		= spi_chip_write_256,
+		.write		= spi_chip_write_1,
 		.read		= spi_chip_read,
 	},
 
@@ -1196,7 +1196,7 @@
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.erase		= spi_chip_erase_c7,
-		.write		= spi_chip_write_256,
+		.write		= spi_chip_write_1,
 		.read		= spi_chip_read,
 	},
 
@@ -1210,7 +1210,7 @@
 		.tested		= TEST_OK_PR,
 		.probe		= probe_spi_rems,
 		.erase		= spi_chip_erase_60,
-		.write		= spi_chip_write_256,
+		.write		= spi_chip_write_1,
 		.read		= spi_chip_read,
 	},
 
@@ -1224,7 +1224,7 @@
 		.tested		= TEST_OK_PR,
 		.probe		= probe_spi_rems,
 		.erase		= spi_chip_erase_c7,
-		.write		= spi_aai_write,
+		.write		= spi_chip_write_1,
 		.read		= spi_chip_read,
 	},
 


-- 
http://www.hailfinger.org/

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