[coreboot] [PATCH] flashrom: Downgrade all SST25* chips to 1-byte write
c-d.hailfinger.devel.2006 at gmx.net
Thu May 14 00:22:38 CEST 2009
On 13.05.2009 16:38, FENG Yu Ning wrote:
> Carl-Daniel Hailfinger wrote:
>> Downgrade the chips from 256-byte writes to 1-byte writes. This fixes
>> writing to them on ICH/VIA SPI masters.
> Acked-by: FENG Yu Ning <fengyuning1984 at gmail.com>
Thanks, committed in r504.
> Some other issue. write_256 really means write_pagesize in ichspi.
> Maybe comment it somewhere?
The write size of write_256 in ichspi depends on many things, among them
the chipset (VIA or Intel)...
We need one additional member is struct flashchip which stores the
maximum write size for SPI.
That would allow us to have only one spi_chip_write function.
More information about the coreboot