[coreboot] [PATCH] Table code cleanup

Patrick Georgi patrick at georgi-clan.de
Thu May 14 19:12:54 CEST 2009


Am 14.05.2009 18:46, schrieb Myles Watson:
> On Thu, May 14, 2009 at 9:33 AM, Myles Watson<mylesgw at gmail.com>  wrote:
>> Sorry to be dense.  Could we do this in terms of which tables we want in
>> each place?
>>
>> Page0 (low_table_start):
>> COREBOOT TABLE
>>
>> 0xf0000 (rom_table):
>> PIRQ
>> MPTABLE (with floating table)
>> ACPI bulk
>>
>> 0x7fff0000 (high_tables):
>> PIRQ
>> MPTABLE
>> ACPI bulk
>
> That was less than clear :)
In general, I agree with that table.
The constraints are:

- MPTABLE must be two complete copies (because of Linux)

- ACPI must be one copy (because there needs to be a single address for 
some objects) with two RSDPs (see below).

> A problem that I see with the code right now is that it depends on the
> implementation of acpi_write_tables, which is per-mainboard right now.
>
> If someone decides to align their rsdp at 64 bytes instead of 16, it
> might break.
Right. I thought it works out, until the generic parts of ACPI aren't 
copied into every mainboard tree anymore.

> You also end up with two rsdp structures, one in 0xf0000 and one in
> high_tables.  Is that really what we want?
SeaBIOS overwrites the fseg with itself, then copies the RSDP in 
high_tables down into fseg again.

So the low RSDP is used if the payload doesn't overwrite it, the high 
one is used as "backup" in case the payload claims the same memory location.

I'll test your patches tonight, and look how to get stable RSDP handling 
in there.


Patrick




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