[coreboot] [flashrom] r555 - trunk
svn at coreboot.org
svn at coreboot.org
Fri May 29 14:55:31 CEST 2009
Author: hailfinger
Date: 2009-05-29 14:55:31 +0200 (Fri, 29 May 2009)
New Revision: 555
Modified:
trunk/flash.h
trunk/flashchips.c
Log:
Add support for probe and read of Intel 28F001BX-T and BX-B.
Erase & write support wont be this easy - the chips need 12V Vpp
(needs a hardware hack or a supporting mb) and they have a very weird
layout and are old.
Signed-off-by: Urja Rannikko <urjaman at gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Modified: trunk/flash.h
===================================================================
--- trunk/flash.h 2009-05-28 15:07:42 UTC (rev 554)
+++ trunk/flash.h 2009-05-29 12:55:31 UTC (rev 555)
@@ -345,6 +345,8 @@
#define IM_29F004T 0xAF
#define INTEL_ID 0x89 /* Intel */
+#define P28F001BXT 0x94 /* 28F001BX-T */
+#define P28F001BXB 0x95 /* 28F001BX-B */
#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
Modified: trunk/flashchips.c
===================================================================
--- trunk/flashchips.c 2009-05-28 15:07:42 UTC (rev 554)
+++ trunk/flashchips.c 2009-05-29 12:55:31 UTC (rev 555)
@@ -754,6 +754,34 @@
{
.vendor = "Intel",
+ .name = "28F001BX-B",
+ .manufacture_id = INTEL_ID,
+ .model_id = P28F001BXB,
+ .total_size = 128,
+ .page_size = 128 * 1024, /* 8k + 2x4k + 112k */
+ .tested = TEST_BAD_ERASE|TEST_BAD_WRITE,
+ .probe = probe_jedec,
+ .erase = NULL,
+ .write = NULL,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "Intel",
+ .name = "28F001BX-T",
+ .manufacture_id = INTEL_ID,
+ .model_id = P28F001BXT,
+ .total_size = 128,
+ .page_size = 128 * 1024, /* 112k + 2x4k + 8k */
+ .tested = TEST_OK_PR|TEST_BAD_ERASE|TEST_BAD_WRITE,
+ .probe = probe_jedec,
+ .erase = NULL,
+ .write = NULL,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "Intel",
.name = "82802AB",
.manufacture_id = INTEL_ID,
.model_id = 173,
More information about the coreboot
mailing list