[coreboot] [v2] r4925 makes my linux hang

[Stefan Reinauer]

Peter Stuge wrote:
> Config.lb_mahogany_k8
>   
>> chip southbridge/amd/rs780
>> 	device pci 0.0 on end # HT  	0x9600
>> 	device pci 1.0 on  # Internal Graphics P2P bridge 0x9602
>> 		chip drivers/pci/onboard
>> 			device pci 5.0 on end	# Internal Graphics 0x9615
>> 			register "rom_address" = "0xfff00000"
>> 		end
>> 	end
>>     

I would think the above does not compile anymore with HEAD.


> I think onboard was removed, and also rom_address because CBFS can be
> used to find the ROM.
>
> I'm not sure how to best "decouple" the graphics device from the 780.
>   
What do you mean by decouple?

There is likely a

static struct pci_driver pcie_driver_780 __pci_driver = {
        .ops = &pcie_ops,
        .vendor = PCI_VENDOR_ID_ATI,
        .device = PCI_DEVICE_ID_ATI_RS780_INT_GFX,
};

and that is why a non-standard .ops is associated with that device.

If the problem is chip_ops:

This is how it should look if the graphics device is supposed to have
the chip_ops of the 780 attached (ie the internal graphicsw can use
values from struct southbridge_amd_rs780_config

chip southbridge/amd/rs780
	device pci 0.0 on end # HT  	0x9600
	device pci 1.0 on  # Internal Graphics P2P bridge 0x9602
		device pci 5.0 on end	# Internal Graphics 0x9615
	end

This is different from the old behavior, however... It gives a different
set of chip_ops to the internal graphics chip:

struct chip_operations southbridge_amd_rs780_ops = {
        CHIP_NAME("AMD RS780 Northbridge")
        .enable_dev = enable_dev,
};

Now, I don't know the RS780 code but if it is based on/similar to the
RS690 code I think I know what's wrong.


This is from RS690:
/***********************************************
*       0:00.0  NBCFG   :
*       0:00.1  CLK     : bit 0 of nb_cfg 0x4c : 0 - disable, default
*       0:01.0  P2P Internal:
*       0:02.0  P2P     : bit 2 of nbmiscind 0x0c : 0 - enable,
default    + 32 * 2
*       0:03.0  P2P     : bit 3 of nbmiscind 0x0c : 0 - enable,
default    + 32 * 2
*       0:04.0  P2P     : bit 4 of nbmiscind 0x0c : 0 - enable,
default    + 32 * 2
*       0:05.0  P2P     : bit 5 of nbmiscind 0x0c : 0 - enable,
default    + 32 * 2
*       0:06.0  P2P     : bit 6 of nbmiscind 0x0c : 0 - enable,
default    + 32 * 2
*       0:07.0  P2P     : bit 7 of nbmiscind 0x0c : 0 - enable,
default    + 32 * 2
*       0:08.0  NB2SB   : bit 6 of nbmiscind 0x00 : 0 - disable,
default   + 32 * 1
* case 0 will be called twice, one is by cpu in hypertransport.c line458,
* the other is by rs690.
***********************************************/
void rs690_enable(device_t dev)
{
...
        dev_ind = dev->path.pci.devfn >> 3;
        switch (dev_ind) {
        case 0:         /* bus0, dev0, fun0; */
...
        case 1:         /* bus0, dev1 */
                printk_info("Bus-0, Dev-1, Fun-0.\n");
                break;
...
        case 4:         /* bus0, dev4-7, four GPP */
        case 5:
        case 6:
        case 7:
                printk_info("Bus-0, Dev-4,5,6,7, Fun-0. enable=%d\n",
                            dev->enabled);
                set_nbmisc_enable_bits(nb_dev, 0x0c, 1 << dev_ind,
                                       (dev->enabled ? 0 : 1) << dev_ind);
                if (dev->enabled)
                        rs690_gpp_sb_init(nb_dev, dev, dev_ind);
                break;
...
}


Now let's think about that for a minute:

* case 0 will not only match for bus 0, device 0, function 0. Instead it
will ignore bus and function.
   So it will listen to all device 0 that have an ams_rs690_ops called
* The same appears for case 5. Instead of calling it for 0:5.0 it also
gets called for 1:5.0 (or whatever bus gfx is on) and will treat it as a
device that it is not.


The good news is:
chip southbridge/amd/rs780 unconditionally pulls in the graphics driver
which is still executed per PCI ID, and not per notation of static.c

So it's completely enough to drop the graphics device from
Config.lb/devicetree.cb and say

chip southbridge/amd/rs780
	device pci 0.0 on end # HT  	0x9600
	device pci 1.0 on end # Internal Graphics P2P bridge 0x9602


Stefan



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