[coreboot] GeodeLX RAM initialisation issue

Nathan Williams nathan at traverse.com.au
Tue Nov 24 09:09:11 CET 2009

Marc Jones wrote:
> On Mon, Nov 23, 2009 at 12:27 AM, Nathan Williams
> <nathan at traverse.com.au> wrote:
>> I managed to get the commercial BIOS to boot on my board and diffed it with coreboot:
>> http://coreboot.pastebin.com/m39b22c21
>> The only differences I can see are related to interrupts, which shouldn't matter in relation to
>> my RAM problems.
>> I have also run a memtest86 with the commercial BIOS (from bootable CDROM) and as a payload in coreboot.
>> The commercial BIOS didn't have any errors, but my coreboot did.  So the hardware can't be too bad.
> That looks like just the southbridge cs5536 target. The memory
> differences would be in the processor geodelx target. Can you send
> those results?
> Marc

I did some new MSR dumps.

./msrtool -t geodelx -t cs5536 -d amd_ref_bios

AMD NAS reference BIOS:
./msrtool -t geodelx -t cs5536 -l -s amd_ref_bios

My Coreboot:
./msrtool -t geodelx -t cs5536 -l -s nathan_bios

The diffs I did today show some differences with GLCP_DELAY_CONTROLS.
Last time I added some code to force it to match the commercial BIOS
GLCP_DELAY_CONTROLS MSR, but it didn't seem to make any difference.

I also tested all the SODIMMS I have here (about 10) with the commercial BIOS.
Each time I did a msrtool diff to one I saved on disk.

Most are 333MHz, but 2 are 400MHz.  There weren't any changes to the MSRs.

Could there be an issue with the initialisation sequence that reading MSRs
after booting won't show?  Also, quite a few MSRs aren't defined in geodelx.c yet.
Are there any obvious ones that should be added in?


More information about the coreboot mailing list