[coreboot] [v2] r4745 - in trunk/coreboot-v2/src/cpu/intel: socket_PGA370 socket_mPGA479M socket_mPGA604

ron minnich rminnich at gmail.com
Fri Oct 9 20:04:59 CEST 2009

On Fri, Oct 9, 2009 at 8:47 AM, Myles Watson <mylesgw at gmail.com> wrote:

> Maybe since these options are romcc-specific they should be ROMCC_MMX
> & ROMCC_SSE.  I just noticed that on my K8 boards SSE=0, which is
> confusing.

Why not set SSE to 1 then? They have it.

I think we leave it as MMX and SSE because, at some future time,
people might want to use MMX and/or SSE config variables in some other
way, not related to romcc.

SSE and MMX are described what capabilities can be used for a given
socket. Those capabilities, if available, can be used by romcc, but
might also be usable by other bits of software too. We might even find
ourselves using them in gcc someday.

Just my $.02


More information about the coreboot mailing list