[coreboot] [Fwd: Re: [Fwd: Re: arima hdama problem]]

Hugh Greenberg hng at lanl.gov
Tue Oct 20 21:50:23 CEST 2009

No, I haven't been editing the logs.  I sent you exactly what I saw on 
the serial port.

Hugh Greenberg
Los Alamos National Laboratory, CCS-1
Email: hng at lanl.gov
Phone: (505) 665-6471

Myles Watson wrote:
> On Tue, Oct 20, 2009 at 1:31 PM, Hugh Greenberg <hng at lanl.gov 
> <mailto:hng at lanl.gov>> wrote:
>     I have been power cycling since you pointed it out last time.
> So have you been editing the logs (removing the first bit before the 
> HT reset)?
> pos=0x8a, unfiltered freq_cap=0x8075
> pos=0x8a, filtered freq_cap=0x35
> pos=0xce, unfiltered freq_cap=0x35
> freq_cap1=0x35, freq_cap2=0x15
> dev1 old_freq=0x4, freq=0x4, needs_reset=0x0
> dev2 old_freq=0x4, freq=0x4, needs_reset=0x0
> This is link 0, and it says it is already running at the maximum 
> frequency, so it doesn't need a reset.  A cold boot should start at 
> 200MHz and always need a reset.  Here's an example from SimNOW:
> dev1 old_freq=0x0, freq=0x4, needs_reset=0x1
> dev2 old_freq=0x0, freq=0x4, needs_reset=0x1
> If you haven't been editing the logs, then maybe there's something 
> wrong with the early serial port initialization.  That would be good 
> to know.
> Thanks,
> Myles

More information about the coreboot mailing list