[coreboot] [Fwd: Re: [Fwd: Re: [Fwd: Re: arima hdama problem]]]

Myles Watson mylesgw at gmail.com
Thu Oct 22 17:16:14 CEST 2009

> RAM end at 0x00200000 kB
> Lower RAM end at 0x00200000 kB
> Ram3
> Before starting clocks: Before memreset: cpu is pre_c0
> after first udelay

OK.  So the timer worked for the first udelay...

Does it only freeze when you have both CPUs enabled?  Have you tried it with
the no_smp patch again?  I'm grasping at straws.


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